VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMInternal.h@ 25372

Last change on this file since 25372 was 25368, checked in by vboxsync, 15 years ago

RTCritSect,PDMCritSect,iprt/lockvalidator.h: Reworked the deadlocking detection for critical sections and preparing for lock order validation. This change generalizes the RTCRITSECT::Strict data and moves it out of the RTCRITSECT, leaving a pointer behind. This saves a bit of space in release builds.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 42.9 KB
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1/* $Id: PDMInternal.h 25368 2009-12-14 16:31:40Z vboxsync $ */
2/** @file
3 * PDM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22#ifndef ___PDMInternal_h
23#define ___PDMInternal_h
24
25#include <VBox/types.h>
26#include <VBox/param.h>
27#include <VBox/cfgm.h>
28#include <VBox/stam.h>
29#include <VBox/vusb.h>
30#include <VBox/pdmasynccompletion.h>
31#include <VBox/pdmcommon.h>
32#include <iprt/assert.h>
33#include <iprt/critsect.h>
34#ifdef IN_RING3
35# include <iprt/thread.h>
36#endif
37
38RT_C_DECLS_BEGIN
39
40
41/** @defgroup grp_pdm_int Internal
42 * @ingroup grp_pdm
43 * @internal
44 * @{
45 */
46
47/** @def PDM_WITH_R3R0_CRIT_SECT
48 * Enables or disabled ring-3/ring-0 critical sections. */
49#if defined(DOXYGEN_RUNNING) || 1
50# define PDM_WITH_R3R0_CRIT_SECT
51#endif
52
53/** @def PDMCRITSECT_STRICT
54 * Enables/disables PDM critsect strictness like deadlock detection. */
55#if defined(VBOX_STRICT) || defined(DOXYGEN_RUNNING)
56# define PDMCRITSECT_STRICT
57#endif
58
59
60/*******************************************************************************
61* Structures and Typedefs *
62*******************************************************************************/
63
64/** Pointer to a PDM Device. */
65typedef struct PDMDEV *PPDMDEV;
66/** Pointer to a pointer to a PDM Device. */
67typedef PPDMDEV *PPPDMDEV;
68
69/** Pointer to a PDM USB Device. */
70typedef struct PDMUSB *PPDMUSB;
71/** Pointer to a pointer to a PDM USB Device. */
72typedef PPDMUSB *PPPDMUSB;
73
74/** Pointer to a PDM Driver. */
75typedef struct PDMDRV *PPDMDRV;
76/** Pointer to a pointer to a PDM Driver. */
77typedef PPDMDRV *PPPDMDRV;
78
79/** Pointer to a PDM Logical Unit. */
80typedef struct PDMLUN *PPDMLUN;
81/** Pointer to a pointer to a PDM Logical Unit. */
82typedef PPDMLUN *PPPDMLUN;
83
84/** Pointer to a PDM PCI Bus instance. */
85typedef struct PDMPCIBUS *PPDMPCIBUS;
86/** Pointer to a DMAC instance. */
87typedef struct PDMDMAC *PPDMDMAC;
88/** Pointer to a RTC instance. */
89typedef struct PDMRTC *PPDMRTC;
90
91/** Pointer to an USB HUB registration record. */
92typedef struct PDMUSBHUB *PPDMUSBHUB;
93
94/**
95 * Private device instance data.
96 */
97typedef struct PDMDEVINSINT
98{
99 /** Pointer to the next instance (HC Ptr).
100 * (Head is pointed to by PDM::pDevInstances.) */
101 R3PTRTYPE(PPDMDEVINS) pNextR3;
102 /** Pointer to the next per device instance (HC Ptr).
103 * (Head is pointed to by PDMDEV::pInstances.) */
104 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
105 /** Pointer to device structure - HC Ptr. */
106 R3PTRTYPE(PPDMDEV) pDevR3;
107 /** Pointer to the list of logical units associated with the device. (FIFO) */
108 R3PTRTYPE(PPDMLUN) pLunsR3;
109 /** Pointer to the asynchronous notification callback set while in
110 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
111 R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
112 /** Configuration handle to the instance node. */
113 R3PTRTYPE(PCFGMNODE) pCfgHandle;
114
115 /** R3 pointer to the VM this instance was created for. */
116 PVMR3 pVMR3;
117 /** R3 pointer to associated PCI device structure. */
118 R3PTRTYPE(struct PCIDevice *) pPciDeviceR3;
119 /** R3 pointer to associated PCI bus structure. */
120 R3PTRTYPE(PPDMPCIBUS) pPciBusR3;
121
122 /** R0 pointer to the VM this instance was created for. */
123 PVMR0 pVMR0;
124 /** R0 pointer to associated PCI device structure. */
125 R0PTRTYPE(struct PCIDevice *) pPciDeviceR0;
126 /** R0 pointer to associated PCI bus structure. */
127 R0PTRTYPE(PPDMPCIBUS) pPciBusR0;
128
129 /** RC pointer to the VM this instance was created for. */
130 PVMRC pVMRC;
131 /** RC pointer to associated PCI device structure. */
132 RCPTRTYPE(struct PCIDevice *) pPciDeviceRC;
133 /** RC pointer to associated PCI bus structure. */
134 RCPTRTYPE(PPDMPCIBUS) pPciBusRC;
135
136 /** Flags, see PDMDEVINSINT_FLAGS_XXX. */
137 uint32_t fIntFlags;
138} PDMDEVINSINT;
139
140/** @name PDMDEVINSINT::fIntFlags
141 * @{ */
142/** Used by pdmR3Load to mark device instances it found in the saved state. */
143#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
144/** Indicates that the device hasn't been powered on or resumed.
145 * This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
146 * to make sure each device gets exactly one notification for each of those
147 * events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
148 * a failure (already resumed/powered-on devices are suspended). */
149#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
150/** Indicates that the device has been reset already. Used by PDMR3Reset. */
151#define PDMDEVINSINT_FLAGS_RESET RT_BIT_32(2)
152/** @} */
153
154
155/**
156 * Private USB device instance data.
157 */
158typedef struct PDMUSBINSINT
159{
160 /** The UUID of this instance. */
161 RTUUID Uuid;
162 /** Pointer to the next instance.
163 * (Head is pointed to by PDM::pUsbInstances.) */
164 R3PTRTYPE(PPDMUSBINS) pNext;
165 /** Pointer to the next per USB device instance.
166 * (Head is pointed to by PDMUSB::pInstances.) */
167 R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
168
169 /** Pointer to device structure. */
170 R3PTRTYPE(PPDMUSB) pUsbDev;
171
172 /** Pointer to the VM this instance was created for. */
173 PVMR3 pVM;
174 /** Pointer to the list of logical units associated with the device. (FIFO) */
175 R3PTRTYPE(PPDMLUN) pLuns;
176 /** The per instance device configuration. */
177 R3PTRTYPE(PCFGMNODE) pCfg;
178 /** Same as pCfg if the configuration should be deleted when detaching the device. */
179 R3PTRTYPE(PCFGMNODE) pCfgDelete;
180 /** The global device configuration. */
181 R3PTRTYPE(PCFGMNODE) pCfgGlobal;
182
183 /** Pointer to the USB hub this device is attached to.
184 * This is NULL if the device isn't connected to any HUB. */
185 R3PTRTYPE(PPDMUSBHUB) pHub;
186 /** The port number that we're connected to. */
187 uint32_t iPort;
188 /** Indicates that the USB device hasn't been powered on or resumed.
189 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
190 bool fVMSuspended;
191 /** Indicates that the USB device has been reset. */
192 bool fVMReset;
193 /** Pointer to the asynchronous notification callback set while in
194 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
195 R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
196} PDMUSBINSINT;
197
198
199/**
200 * Private driver instance data.
201 */
202typedef struct PDMDRVINSINT
203{
204 /** Pointer to the driver instance above.
205 * This is NULL for the topmost drive. */
206 PPDMDRVINS pUp;
207 /** Pointer to the driver instance below.
208 * This is NULL for the bottommost driver. */
209 PPDMDRVINS pDown;
210 /** Pointer to the logical unit this driver chained on. */
211 PPDMLUN pLun;
212 /** Pointer to driver structure from which this was instantiated. */
213 PPDMDRV pDrv;
214 /** Pointer to the VM this instance was created for. */
215 PVM pVM;
216 /** Flag indicating that the driver is being detached and destroyed.
217 * (Helps detect potential recursive detaching.) */
218 bool fDetaching;
219 /** Indicates that the driver hasn't been powered on or resumed.
220 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
221 bool fVMSuspended;
222 /** Indicates that the driver has been reset already. */
223 bool fVMReset;
224 /** Pointer to the asynchronous notification callback set while in
225 * PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
226 R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
227 /** Configuration handle to the instance node. */
228 PCFGMNODE pCfgHandle;
229
230} PDMDRVINSINT;
231
232
233/**
234 * Private critical section data.
235 */
236typedef struct PDMCRITSECTINT
237{
238 /** The critical section core which is shared with IPRT. */
239 RTCRITSECT Core;
240 /** Pointer to the next critical section.
241 * This chain is used for relocating pVMRC and device cleanup. */
242 R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
243 /** Owner identifier.
244 * This is pDevIns if the owner is a device. Similarily for a driver or service.
245 * PDMR3CritSectInit() sets this to point to the critsect itself. */
246 RTR3PTR pvKey;
247 /** Pointer to the VM - R3Ptr. */
248 PVMR3 pVMR3;
249 /** Pointer to the VM - R0Ptr. */
250 PVMR0 pVMR0;
251 /** Pointer to the VM - GCPtr. */
252 PVMRC pVMRC;
253 /** Alignment padding. */
254 uint32_t padding;
255 /** Event semaphore that is scheduled to be signaled upon leaving the
256 * critical section. This is Ring-3 only of course. */
257 RTSEMEVENT EventToSignal;
258 /** The lock name. */
259 R3PTRTYPE(const char *) pszName;
260 /** R0/RC lock contention. */
261 STAMCOUNTER StatContentionRZLock;
262 /** R0/RC unlock contention. */
263 STAMCOUNTER StatContentionRZUnlock;
264 /** R3 lock contention. */
265 STAMCOUNTER StatContentionR3;
266 /** Profiling the time the section is locked. */
267 STAMPROFILEADV StatLocked;
268} PDMCRITSECTINT;
269AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
270/** Pointer to private critical section data. */
271typedef PDMCRITSECTINT *PPDMCRITSECTINT;
272
273/** Indicates that the critical section is queued for unlock.
274 * PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
275#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
276
277
278/**
279 * The usual device/driver/internal/external stuff.
280 */
281typedef enum
282{
283 /** The usual invalid entry. */
284 PDMTHREADTYPE_INVALID = 0,
285 /** Device type. */
286 PDMTHREADTYPE_DEVICE,
287 /** USB Device type. */
288 PDMTHREADTYPE_USB,
289 /** Driver type. */
290 PDMTHREADTYPE_DRIVER,
291 /** Internal type. */
292 PDMTHREADTYPE_INTERNAL,
293 /** External type. */
294 PDMTHREADTYPE_EXTERNAL,
295 /** The usual 32-bit hack. */
296 PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
297} PDMTHREADTYPE;
298
299
300/**
301 * The internal structure for the thread.
302 */
303typedef struct PDMTHREADINT
304{
305 /** The VM pointer. */
306 PVMR3 pVM;
307 /** The event semaphore the thread blocks on when not running. */
308 RTSEMEVENTMULTI BlockEvent;
309 /** The event semaphore the thread sleeps on while running. */
310 RTSEMEVENTMULTI SleepEvent;
311 /** Pointer to the next thread. */
312 R3PTRTYPE(struct PDMTHREAD *) pNext;
313 /** The thread type. */
314 PDMTHREADTYPE enmType;
315} PDMTHREADINT;
316
317
318
319/* Must be included after PDMDEVINSINT is defined. */
320#define PDMDEVINSINT_DECLARED
321#define PDMUSBINSINT_DECLARED
322#define PDMDRVINSINT_DECLARED
323#define PDMCRITSECTINT_DECLARED
324#define PDMTHREADINT_DECLARED
325#ifdef ___VBox_pdm_h
326# error "Invalid header PDM order. Include PDMInternal.h before VBox/pdm.h!"
327#endif
328RT_C_DECLS_END
329#include <VBox/pdm.h>
330RT_C_DECLS_BEGIN
331
332/**
333 * PDM Logical Unit.
334 *
335 * This typically the representation of a physical port on a
336 * device, like for instance the PS/2 keyboard port on the
337 * keyboard controller device. The LUNs are chained on the
338 * device the belong to (PDMDEVINSINT::pLunsR3).
339 */
340typedef struct PDMLUN
341{
342 /** The LUN - The Logical Unit Number. */
343 RTUINT iLun;
344 /** Pointer to the next LUN. */
345 PPDMLUN pNext;
346 /** Pointer to the top driver in the driver chain. */
347 PPDMDRVINS pTop;
348 /** Pointer to the bottom driver in the driver chain. */
349 PPDMDRVINS pBottom;
350 /** Pointer to the device instance which the LUN belongs to.
351 * Either this is set or pUsbIns is set. Both is never set at the same time. */
352 PPDMDEVINS pDevIns;
353 /** Pointer to the USB device instance which the LUN belongs to. */
354 PPDMUSBINS pUsbIns;
355 /** Pointer to the device base interface. */
356 PPDMIBASE pBase;
357 /** Description of this LUN. */
358 const char *pszDesc;
359} PDMLUN;
360
361
362/**
363 * PDM Device.
364 */
365typedef struct PDMDEV
366{
367 /** Pointer to the next device (R3 Ptr). */
368 R3PTRTYPE(PPDMDEV) pNext;
369 /** Device name length. (search optimization) */
370 RTUINT cchName;
371 /** Registration structure. */
372 R3PTRTYPE(const struct PDMDEVREG *) pDevReg;
373 /** Number of instances. */
374 RTUINT cInstances;
375 /** Pointer to chain of instances (R3 Ptr). */
376 PPDMDEVINSR3 pInstances;
377} PDMDEV;
378
379
380/**
381 * PDM USB Device.
382 */
383typedef struct PDMUSB
384{
385 /** Pointer to the next device (R3 Ptr). */
386 R3PTRTYPE(PPDMUSB) pNext;
387 /** Device name length. (search optimization) */
388 RTUINT cchName;
389 /** Registration structure. */
390 R3PTRTYPE(const struct PDMUSBREG *) pUsbReg;
391 /** Next instance number. */
392 RTUINT iNextInstance;
393 /** Pointer to chain of instances (R3 Ptr). */
394 R3PTRTYPE(PPDMUSBINS) pInstances;
395} PDMUSB;
396
397
398/**
399 * PDM Driver.
400 */
401typedef struct PDMDRV
402{
403 /** Pointer to the next device. */
404 PPDMDRV pNext;
405 /** Registration structure. */
406 const struct PDMDRVREG * pDrvReg;
407 /** Number of instances. */
408 RTUINT cInstances;
409} PDMDRV;
410
411
412/**
413 * PDM registered PIC device.
414 */
415typedef struct PDMPIC
416{
417 /** Pointer to the PIC device instance - R3. */
418 PPDMDEVINSR3 pDevInsR3;
419 /** @copydoc PDMPICREG::pfnSetIrqR3 */
420 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
421 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
422 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
423
424 /** Pointer to the PIC device instance - R0. */
425 PPDMDEVINSR0 pDevInsR0;
426 /** @copydoc PDMPICREG::pfnSetIrqR3 */
427 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
428 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
429 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
430
431 /** Pointer to the PIC device instance - RC. */
432 PPDMDEVINSRC pDevInsRC;
433 /** @copydoc PDMPICREG::pfnSetIrqR3 */
434 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
435 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
436 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
437 /** Alignment padding. */
438 RTRCPTR RCPtrPadding;
439} PDMPIC;
440
441
442/**
443 * PDM registered APIC device.
444 */
445typedef struct PDMAPIC
446{
447 /** Pointer to the APIC device instance - R3 Ptr. */
448 PPDMDEVINSR3 pDevInsR3;
449 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
450 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
451 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
452 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
453 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
454 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
455 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
456 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
457 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
458 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
459 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
460 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
461 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
462 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
463 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
464 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
465 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
466 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
467 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
468 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
469 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
470
471 /** Pointer to the APIC device instance - R0 Ptr. */
472 PPDMDEVINSR0 pDevInsR0;
473 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
474 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
475 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
476 DECLR0CALLBACKMEMBER(bool, pfnHasPendingIrqR0,(PPDMDEVINS pDevIns));
477 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
478 DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, uint64_t u64Base));
479 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
480 DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns));
481 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
482 DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
483 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
484 DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
485 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
486 DECLR0CALLBACKMEMBER(uint32_t, pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
487 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
488 DECLR0CALLBACKMEMBER(uint32_t, pfnReadMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
489 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
490 DECLR0CALLBACKMEMBER(int, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
491 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
492 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
493 DECLR0CALLBACKMEMBER(int, pfnLocalInterruptR0,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
494
495 /** Pointer to the APIC device instance - RC Ptr. */
496 PPDMDEVINSRC pDevInsRC;
497 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
498 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
499 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
500 DECLRCCALLBACKMEMBER(bool, pfnHasPendingIrqRC,(PPDMDEVINS pDevIns));
501 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
502 DECLRCCALLBACKMEMBER(void, pfnSetBaseRC,(PPDMDEVINS pDevIns, uint64_t u64Base));
503 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
504 DECLRCCALLBACKMEMBER(uint64_t, pfnGetBaseRC,(PPDMDEVINS pDevIns));
505 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
506 DECLRCCALLBACKMEMBER(void, pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
507 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
508 DECLRCCALLBACKMEMBER(uint8_t, pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
509 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
510 DECLRCCALLBACKMEMBER(uint32_t, pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
511 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
512 DECLRCCALLBACKMEMBER(uint32_t, pfnReadMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
513 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
514 DECLRCCALLBACKMEMBER(int, pfnBusDeliverRC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
515 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
516 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
517 DECLRCCALLBACKMEMBER(int, pfnLocalInterruptRC,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
518 RTRCPTR RCPtrAlignment;
519
520} PDMAPIC;
521
522
523/**
524 * PDM registered I/O APIC device.
525 */
526typedef struct PDMIOAPIC
527{
528 /** Pointer to the APIC device instance - R3 Ptr. */
529 PPDMDEVINSR3 pDevInsR3;
530 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
531 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
532
533 /** Pointer to the PIC device instance - R0. */
534 PPDMDEVINSR0 pDevInsR0;
535 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
536 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
537
538 /** Pointer to the APIC device instance - RC Ptr. */
539 PPDMDEVINSRC pDevInsRC;
540 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
541 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
542} PDMIOAPIC;
543
544/** Maximum number of PCI busses for a VM. */
545#define PDM_PCI_BUSSES_MAX 8
546
547/**
548 * PDM PCI Bus instance.
549 */
550typedef struct PDMPCIBUS
551{
552 /** PCI bus number. */
553 RTUINT iBus;
554 RTUINT uPadding0; /**< Alignment padding.*/
555
556 /** Pointer to PCI Bus device instance. */
557 PPDMDEVINSR3 pDevInsR3;
558 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
559 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
560 /** @copydoc PDMPCIBUSREG::pfnRegisterR3 */
561 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
562 /** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */
563 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,
564 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
565 /** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */
566 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,
567 PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
568 /** @copydoc PDMPCIBUSREG::pfnSaveExecR3 */
569 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
570 /** @copydoc PDMPCIBUSREG::pfnLoadExecR3 */
571 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
572 /** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSR3 */
573 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
574
575 /** Pointer to the PIC device instance - R0. */
576 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
577 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
578 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
579
580 /** Pointer to PCI Bus device instance. */
581 PPDMDEVINSRC pDevInsRC;
582 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
583 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
584} PDMPCIBUS;
585
586
587#ifdef IN_RING3
588/**
589 * PDM registered DMAC (DMA Controller) device.
590 */
591typedef struct PDMDMAC
592{
593 /** Pointer to the DMAC device instance. */
594 PPDMDEVINSR3 pDevIns;
595 /** Copy of the registration structure. */
596 PDMDMACREG Reg;
597} PDMDMAC;
598
599
600/**
601 * PDM registered RTC (Real Time Clock) device.
602 */
603typedef struct PDMRTC
604{
605 /** Pointer to the RTC device instance. */
606 PPDMDEVINSR3 pDevIns;
607 /** Copy of the registration structure. */
608 PDMRTCREG Reg;
609} PDMRTC;
610
611#endif /* IN_RING3 */
612
613/**
614 * Module type.
615 */
616typedef enum PDMMODTYPE
617{
618 /** Raw-mode (RC) context module. */
619 PDMMOD_TYPE_RC,
620 /** Ring-0 (host) context module. */
621 PDMMOD_TYPE_R0,
622 /** Ring-3 (host) context module. */
623 PDMMOD_TYPE_R3
624} PDMMODTYPE;
625
626
627/** The module name length including the terminator. */
628#define PDMMOD_NAME_LEN 32
629
630/**
631 * Loaded module instance.
632 */
633typedef struct PDMMOD
634{
635 /** Module name. This is used for refering to
636 * the module internally, sort of like a handle. */
637 char szName[PDMMOD_NAME_LEN];
638 /** Module type. */
639 PDMMODTYPE eType;
640 /** Loader module handle. Not used for R0 modules. */
641 RTLDRMOD hLdrMod;
642 /** Loaded address.
643 * This is the 'handle' for R0 modules. */
644 RTUINTPTR ImageBase;
645 /** Old loaded address.
646 * This is used during relocation of GC modules. Not used for R0 modules. */
647 RTUINTPTR OldImageBase;
648 /** Where the R3 HC bits are stored.
649 * This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
650 void *pvBits;
651
652 /** Pointer to next module. */
653 struct PDMMOD *pNext;
654 /** Module filename. */
655 char szFilename[1];
656} PDMMOD;
657/** Pointer to loaded module instance. */
658typedef PDMMOD *PPDMMOD;
659
660
661
662/** Extra space in the free array. */
663#define PDMQUEUE_FREE_SLACK 16
664
665/**
666 * Queue type.
667 */
668typedef enum PDMQUEUETYPE
669{
670 /** Device consumer. */
671 PDMQUEUETYPE_DEV = 1,
672 /** Driver consumer. */
673 PDMQUEUETYPE_DRV,
674 /** Internal consumer. */
675 PDMQUEUETYPE_INTERNAL,
676 /** External consumer. */
677 PDMQUEUETYPE_EXTERNAL
678} PDMQUEUETYPE;
679
680/** Pointer to a PDM Queue. */
681typedef struct PDMQUEUE *PPDMQUEUE;
682
683/**
684 * PDM Queue.
685 */
686typedef struct PDMQUEUE
687{
688 /** Pointer to the next queue in the list. */
689 R3PTRTYPE(PPDMQUEUE) pNext;
690 /** Type specific data. */
691 union
692 {
693 /** PDMQUEUETYPE_DEV */
694 struct
695 {
696 /** Pointer to consumer function. */
697 R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
698 /** Pointer to the device instance owning the queue. */
699 R3PTRTYPE(PPDMDEVINS) pDevIns;
700 } Dev;
701 /** PDMQUEUETYPE_DRV */
702 struct
703 {
704 /** Pointer to consumer function. */
705 R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
706 /** Pointer to the driver instance owning the queue. */
707 R3PTRTYPE(PPDMDRVINS) pDrvIns;
708 } Drv;
709 /** PDMQUEUETYPE_INTERNAL */
710 struct
711 {
712 /** Pointer to consumer function. */
713 R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
714 } Int;
715 /** PDMQUEUETYPE_EXTERNAL */
716 struct
717 {
718 /** Pointer to consumer function. */
719 R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
720 /** Pointer to user argument. */
721 R3PTRTYPE(void *) pvUser;
722 } Ext;
723 } u;
724 /** Queue type. */
725 PDMQUEUETYPE enmType;
726 /** The interval between checking the queue for events.
727 * The realtime timer below is used to do the waiting.
728 * If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
729 uint32_t cMilliesInterval;
730 /** Interval timer. Only used if cMilliesInterval is non-zero. */
731 PTMTIMERR3 pTimer;
732 /** Pointer to the VM - R3. */
733 PVMR3 pVMR3;
734 /** LIFO of pending items - R3. */
735 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
736 /** Pointer to the VM - R0. */
737 PVMR0 pVMR0;
738 /** LIFO of pending items - R0. */
739 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
740 /** Pointer to the GC VM and indicator for GC enabled queue.
741 * If this is NULL, the queue cannot be used in GC.
742 */
743 PVMRC pVMRC;
744 /** LIFO of pending items - GC. */
745 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
746
747 /** Item size (bytes). */
748 uint32_t cbItem;
749 /** Number of items in the queue. */
750 uint32_t cItems;
751 /** Index to the free head (where we insert). */
752 uint32_t volatile iFreeHead;
753 /** Index to the free tail (where we remove). */
754 uint32_t volatile iFreeTail;
755
756 /** Unqiue queue name. */
757 R3PTRTYPE(const char *) pszName;
758#if HC_ARCH_BITS == 32
759 RTR3PTR Alignment1;
760#endif
761 /** Stat: Times PDMQueueAlloc fails. */
762 STAMCOUNTER StatAllocFailures;
763 /** Stat: PDMQueueInsert calls. */
764 STAMCOUNTER StatInsert;
765 /** Stat: Queue flushes. */
766 STAMCOUNTER StatFlush;
767 /** Stat: Queue flushes with pending items left over. */
768 STAMCOUNTER StatFlushLeftovers;
769#ifdef VBOX_WITH_STATISTICS
770 /** State: Profiling the flushing. */
771 STAMPROFILE StatFlushPrf;
772 /** State: Pending items. */
773 uint32_t volatile cStatPending;
774 uint32_t volatile cAlignment;
775#endif
776
777 /** Array of pointers to free items. Variable size. */
778 struct PDMQUEUEFREEITEM
779 {
780 /** Pointer to the free item - HC Ptr. */
781 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
782 /** Pointer to the free item - HC Ptr. */
783 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
784 /** Pointer to the free item - GC Ptr. */
785 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
786#if HC_ARCH_BITS == 64
787 RTRCPTR Alignment0;
788#endif
789 } aFreeItems[1];
790} PDMQUEUE;
791
792/** @name PDM::fQueueFlushing
793 * @{ */
794/** Indicating that an queue insert has been performed. */
795#define PDM_QUEUE_FLUSH_FLAG_ACTIVE RT_BIT_32(PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT)
796/** The bit number for PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT. */
797#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
798/** Indicating there are pending items.
799 * This is make sure we don't miss inserts happening during flushing. The FF
800 * cannot be used for this since it has to be cleared immediately to prevent
801 * other EMTs from spinning. */
802#define PDM_QUEUE_FLUSH_FLAG_PENDING RT_BIT_32(PDM_QUEUE_FLUSH_FLAG_PENDING_BIT)
803/** The bit number for PDM_QUEUE_FLUSH_FLAG_PENDING. */
804#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
805/** }@ */
806
807
808/**
809 * Queue device helper task operation.
810 */
811typedef enum PDMDEVHLPTASKOP
812{
813 /** The usual invalid 0 entry. */
814 PDMDEVHLPTASKOP_INVALID = 0,
815 /** ISASetIrq */
816 PDMDEVHLPTASKOP_ISA_SET_IRQ,
817 /** PCISetIrq */
818 PDMDEVHLPTASKOP_PCI_SET_IRQ,
819 /** PCISetIrq */
820 PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
821 /** The usual 32-bit hack. */
822 PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
823} PDMDEVHLPTASKOP;
824
825/**
826 * Queued Device Helper Task.
827 */
828typedef struct PDMDEVHLPTASK
829{
830 /** The queue item core (don't touch). */
831 PDMQUEUEITEMCORE Core;
832 /** Pointer to the device instance (R3 Ptr). */
833 PPDMDEVINSR3 pDevInsR3;
834 /** This operation to perform. */
835 PDMDEVHLPTASKOP enmOp;
836#if HC_ARCH_BITS == 64
837 uint32_t Alignment0;
838#endif
839 /** Parameters to the operation. */
840 union PDMDEVHLPTASKPARAMS
841 {
842 /**
843 * PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_PCI_SET_IRQ.
844 */
845 struct PDMDEVHLPTASKSETIRQ
846 {
847 /** The IRQ */
848 int iIrq;
849 /** The new level. */
850 int iLevel;
851 } SetIRQ;
852 } u;
853} PDMDEVHLPTASK;
854/** Pointer to a queued Device Helper Task. */
855typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
856/** Pointer to a const queued Device Helper Task. */
857typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
858
859
860
861/**
862 * An USB hub registration record.
863 */
864typedef struct PDMUSBHUB
865{
866 /** The USB versions this hub support.
867 * Note that 1.1 hubs can take on 2.0 devices. */
868 uint32_t fVersions;
869 /** The number of ports on the hub. */
870 uint32_t cPorts;
871 /** The number of available ports (0..cPorts). */
872 uint32_t cAvailablePorts;
873 /** The driver instance of the hub. */
874 PPDMDRVINS pDrvIns;
875 /** Copy of the to the registration structure. */
876 PDMUSBHUBREG Reg;
877
878 /** Pointer to the next hub in the list. */
879 struct PDMUSBHUB *pNext;
880} PDMUSBHUB;
881
882/** Pointer to a const USB HUB registration record. */
883typedef const PDMUSBHUB *PCPDMUSBHUB;
884
885/** Pointer to a PDM Async I/O template. */
886typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
887
888/** Pointer to the main PDM Async completion endpoint class. */
889typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
890
891
892/**
893 * PDM VMCPU Instance data.
894 * Changes to this must checked against the padding of the cfgm union in VMCPU!
895 */
896typedef struct PDMCPU
897{
898 /** The number of entries in the apQueuedCritSectsLeaves table that's currnetly in use. */
899 uint32_t cQueuedCritSectLeaves;
900 uint32_t uPadding0; /**< Alignment padding.*/
901 /** Critical sections queued in RC/R0 because of contention preventing leave to complete. (R3 Ptrs)
902 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
903 R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];
904} PDMCPU;
905
906/**
907 * Converts a PDM pointer into a VM pointer.
908 * @returns Pointer to the VM structure the PDM is part of.
909 * @param pPDM Pointer to PDM instance data.
910 */
911#define PDM2VM(pPDM) ( (PVM)((char*)pPDM - pPDM->offVM) )
912
913
914/**
915 * PDM VM Instance data.
916 * Changes to this must checked against the padding of the cfgm union in VM!
917 */
918typedef struct PDM
919{
920 /** Offset to the VM structure.
921 * See PDM2VM(). */
922 RTUINT offVM;
923 RTUINT uPadding0; /**< Alignment padding.*/
924
925 /** List of registered devices. (FIFO) */
926 R3PTRTYPE(PPDMDEV) pDevs;
927 /** List of devices instances. (FIFO) */
928 R3PTRTYPE(PPDMDEVINS) pDevInstances;
929 /** List of registered USB devices. (FIFO) */
930 R3PTRTYPE(PPDMUSB) pUsbDevs;
931 /** List of USB devices instances. (FIFO) */
932 R3PTRTYPE(PPDMUSBINS) pUsbInstances;
933 /** List of registered drivers. (FIFO) */
934 R3PTRTYPE(PPDMDRV) pDrvs;
935 /** List of initialized critical sections. (LIFO) */
936 R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
937 /** PCI Buses. */
938 PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
939 /** The register PIC device. */
940 PDMPIC Pic;
941 /** The registerd APIC device. */
942 PDMAPIC Apic;
943 /** The registerd I/O APIC device. */
944 PDMIOAPIC IoApic;
945 /** The registered DMAC device. */
946 R3PTRTYPE(PPDMDMAC) pDmac;
947 /** The registered RTC device. */
948 R3PTRTYPE(PPDMRTC) pRtc;
949 /** The registered USB HUBs. (FIFO) */
950 R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
951
952 /** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
953 R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
954 /** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
955 R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
956 /** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
957 RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
958 RTRCPTR uPadding1; /**< Alignment padding. */
959
960 /** Linked list of timer driven PDM queues. */
961 R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
962 /** Linked list of force action driven PDM queues. */
963 R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
964 /** Pointer to the queue which should be manually flushed - R0 Ptr.
965 * Only touched by EMT. */
966 R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
967 /** Pointer to the queue which should be manually flushed - RC Ptr.
968 * Only touched by EMT. */
969 RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
970 /** Bitmask controlling the queue flushing.
971 * See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
972 uint32_t volatile fQueueFlushing;
973
974 /** Head of the PDM Thread list. (singly linked) */
975 R3PTRTYPE(PPDMTHREAD) pThreads;
976 /** Tail of the PDM Thread list. (singly linked) */
977 R3PTRTYPE(PPDMTHREAD) pThreadsTail;
978
979 /** @name PDM Async Completion
980 * @{ */
981 /** Pointer to the array of supported endpoint classes. */
982 R3PTRTYPE(PPDMASYNCCOMPLETIONEPCLASS *) papAsyncCompletionEndpointClass;
983 /** Head of the templates. (singly linked) */
984 R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
985 /** @} */
986
987 /** @name VMM device heap
988 * @{ */
989 /** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
990 RTR3PTR pvVMMDevHeap;
991#if HC_ARCH_BITS == 32
992 /** Alignment padding. */
993 uint32_t u32Padding2;
994#endif
995 /** The heap size. */
996 RTUINT cbVMMDevHeap;
997 /** Free space. */
998 RTUINT cbVMMDevHeapLeft;
999 /** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
1000 RTGCPHYS GCPhysVMMDevHeap;
1001 /** @} */
1002
1003 /** The PDM lock.
1004 * This is used to protect everything that deals with interrupts, i.e.
1005 * the PIC, APIC, IOAPIC and PCI devices pluss some PDM functions. */
1006 PDMCRITSECT CritSect;
1007 /** The PDM miscellancous lock.
1008 * This is used to protect things like critsect init/delete that formerly was
1009 * serialized by there only being one EMT.
1010 */
1011 RTCRITSECT MiscCritSect;
1012
1013 /** Number of times a critical section leave requesed needed to be queued for ring-3 execution. */
1014 STAMCOUNTER StatQueuedCritSectLeaves;
1015} PDM;
1016AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1017AssertCompileMemberAlignment(PDM, CritSect, 8);
1018AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1019/** Pointer to PDM VM instance data. */
1020typedef PDM *PPDM;
1021
1022
1023/**
1024 * PDM data kept in the UVM.
1025 */
1026typedef struct PDMUSERPERVM
1027{
1028 /** Pointer to list of loaded modules. */
1029 PPDMMOD pModules;
1030 /** @todo move more stuff over here. */
1031} PDMUSERPERVM;
1032/** Pointer to the PDM data kept in the UVM. */
1033typedef PDMUSERPERVM *PPDMUSERPERVM;
1034
1035
1036
1037/*******************************************************************************
1038* Global Variables *
1039*******************************************************************************/
1040#ifdef IN_RING3
1041extern const PDMDRVHLP g_pdmR3DrvHlp;
1042extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1043extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1044extern const PDMPICHLPR3 g_pdmR3DevPicHlp;
1045extern const PDMAPICHLPR3 g_pdmR3DevApicHlp;
1046extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;
1047extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1048extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1049extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1050#endif
1051
1052
1053/*******************************************************************************
1054* Defined Constants And Macros *
1055*******************************************************************************/
1056/** @def PDMDEV_ASSERT_DEVINS
1057 * Asserts the validity of the device instance.
1058 */
1059#ifdef VBOX_STRICT
1060# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1061 do { \
1062 AssertPtr(pDevIns); \
1063 Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1064 Assert(pDevIns->CTX_SUFF(pvInstanceData) == (void *)&pDevIns->achInstanceData[0]); \
1065 } while (0)
1066#else
1067# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1068#endif
1069
1070
1071/*******************************************************************************
1072* Internal Functions *
1073*******************************************************************************/
1074#ifdef IN_RING3
1075int pdmR3CritSectInit(PVM pVM);
1076int pdmR3CritSectTerm(PVM pVM);
1077void pdmR3CritSectRelocate(PVM pVM);
1078int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName);
1079int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1080
1081int pdmR3DevInit(PVM pVM);
1082PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1083int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1084DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1085
1086int pdmR3UsbLoadModules(PVM pVM);
1087int pdmR3UsbInstantiateDevices(PVM pVM);
1088PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1089int pdmR3UsbFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1090int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1091int pdmR3UsbVMInitComplete(PVM pVM);
1092
1093int pdmR3DrvInit(PVM pVM);
1094int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1095void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1096PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1097
1098int pdmR3LdrInitU(PUVM pUVM);
1099void pdmR3LdrTermU(PUVM pUVM);
1100char * pdmR3FileR3(const char *pszFile, bool fShared = false);
1101int pdmR3LoadR3U(PUVM pUVM, const char *pszFilename, const char *pszName);
1102
1103void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1104
1105int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1106 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1107int pdmR3ThreadCreateUsb(PVM pVM, PPDMDRVINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1108 PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1109int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1110 PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1111int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1112int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1113int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1114void pdmR3ThreadDestroyAll(PVM pVM);
1115int pdmR3ThreadResumeAll(PVM pVM);
1116int pdmR3ThreadSuspendAll(PVM pVM);
1117
1118#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1119int pdmR3AsyncCompletionInit(PVM pVM);
1120int pdmR3AsyncCompletionTerm(PVM pVM);
1121#endif
1122
1123#endif /* IN_RING3 */
1124
1125void pdmLock(PVM pVM);
1126int pdmLockEx(PVM pVM, int rc);
1127void pdmUnlock(PVM pVM);
1128
1129/** @} */
1130
1131RT_C_DECLS_END
1132
1133#endif
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