PDMInternal.h@ 2705

Last change on this file since 2705 was 2597, checked in by vboxsync, 18 years ago
New device helper PCISetConfigCallbacks. (patch from R. Zeljko)
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 26.0 KB

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1	/* $Id: PDMInternal.h 2597 2007-05-11 18:19:23Z vboxsync $ */
2	/** @file
3	* PDM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2006 InnoTek Systemberatung GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* If you received this file as part of a commercial VirtualBox
18	* distribution, then only the terms of your commercial VirtualBox
19	* license agreement apply instead of the previous paragraph.
20	*/
21
22	#ifndef __PDMInternal_h__
23	#define __PDMInternal_h__
24
25	#include <VBox/cdefs.h>
26	#include <VBox/types.h>
27	#include <VBox/param.h>
28	#include <VBox/cfgm.h>
29	#include <VBox/stam.h>
30	#include <iprt/critsect.h>
31
32	__BEGIN_DECLS
33
34
35	/** @defgroup grp_pdm_int Internal
36	* @ingroup grp_pdm
37	* @internal
38	* @{
39	*/
40
41	/** Pointer to a PDM Device. */
42	typedef struct PDMDEV *PPDMDEV;
43	/** Pointer to a pointer to a PDM Device. */
44	typedef PPDMDEV *PPPDMDEV;
45
46	/** Pointer to a PDM Driver. */
47	typedef struct PDMDRV *PPDMDRV;
48	/** Pointer to a pointer to a PDM Driver. */
49	typedef PPDMDRV *PPPDMDRV;
50
51	/** Pointer to a PDM Logical Unit. */
52	typedef struct PDMLUN *PPDMLUN;
53	/** Pointer to a pointer to a PDM Logical Unit. */
54	typedef PPDMLUN *PPPDMLUN;
55
56	/** Pointer to a PDM PCI Bus instance. */
57	typedef struct PDMPCIBUS *PPDMPCIBUS;
58	/** Pointer to a DMAC instance. */
59	typedef struct PDMDMAC *PPDMDMAC;
60	/** Pointer to a RTC instance. */
61	typedef struct PDMRTC *PPDMRTC;
62
63
64	/**
65	* Private instance data.
66	*/
67	typedef struct PDMDEVINSINT
68	{
69	/** Pointer to the next instance (HC Ptr).
70	* (Head is pointed to by PDM::pDevInstances.) */
71	HCPTRTYPE(PPDMDEVINS) pNextHC;
72	/** Pointer to the next per device instance (HC Ptr).
73	* (Head is pointed to by PDMDEV::pInstances.) */
74	HCPTRTYPE(PPDMDEVINS) pPerDeviceNextHC;
75
76	/** Pointer to device structure - HC Ptr. */
77	HCPTRTYPE(PPDMDEV) pDevHC;
78
79	/** Pointer to the VM this instance was created for - HC Ptr. */
80	HCPTRTYPE(PVM) pVMHC;
81	/** Pointer to the list of logical units associated with the device. (FIFO) */
82	HCPTRTYPE(PPDMLUN) pLunsHC;
83	/** Configuration handle to the instance node. */
84	HCPTRTYPE(PCFGMNODE) pCfgHandle;
85	/** HC pointer to associated PCI device structure. */
86	HCPTRTYPE(struct PCIDevice *) pPciDeviceHC;
87	/** HC pointer to associated PCI bus structure. */
88	HCPTRTYPE(PPDMPCIBUS) pPciBusHC;
89
90	/** GC pointer to associated PCI device structure. */
91	GCPTRTYPE(struct PCIDevice *) pPciDeviceGC;
92	/** Pointer to the VM this instance was created for - GC Ptr. */
93	GCPTRTYPE(PVM) pVMGC;
94	/** GC pointer to associated PCI bus structure. */
95	GCPTRTYPE(PPDMPCIBUS) pPciBusGC;
96	#if GC_ARCH_BITS == 32
97	uint32_t Alignment0;
98	#endif
99	} PDMDEVINSINT;
100
101
102	/**
103	* Private instance data.
104	*/
105	typedef struct PDMDRVINSINT
106	{
107	/** Pointer to the driver instance above.
108	* This is NULL for the topmost drive. */
109	PPDMDRVINS pUp;
110	/** Pointer to the driver instance below.
111	* This is NULL for the bottommost driver. */
112	PPDMDRVINS pDown;
113	/** Pointer to the logical unit this driver chained on. */
114	PPDMLUN pLun;
115	/** Pointer to driver structure from which this was instantiated. */
116	PPDMDRV pDrv;
117	/** Pointer to the VM this instance was created for. */
118	PVM pVM;
119	/** Flag indicating that the driver is being detached and destroyed.
120	* (Helps detect potential recursive detaching.) */
121	bool fDetaching;
122	/** Configuration handle to the instance node. */
123	PCFGMNODE pCfgHandle;
124
125	} PDMDRVINSINT;
126
127
128	/**
129	* Private critical section data.
130	*/
131	typedef struct PDMCRITSECTINT
132	{
133	/** The critical section core which is shared with IPRT. */
134	RTCRITSECT Core;
135	/** Pointer to the next critical section.
136	* This chain is used for relocating pVMGC and device cleanup. */
137	R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
138	/** Owner identifier.
139	* This is pDevIns if the owner is a device. Similarily for a driver or service.
140	* PDMR3CritSectInit() sets this to point to the critsect itself. */
141	RTR3PTR pvKey;
142	/** Pointer to the VM - R3Ptr. */
143	R3PTRTYPE(PVM) pVMR3;
144	/** Pointer to the VM - R0Ptr. */
145	R0PTRTYPE(PVM) pVMR0;
146	/** Pointer to the VM - GCPtr. */
147	GCPTRTYPE(PVM) pVMGC;
148	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
149	uint32_t padding;
150	#endif
151	/** Event semaphore that is scheduled to be signaled upon leaving the
152	* critical section. This is Ring-3 only of course. */
153	RTSEMEVENT EventToSignal;
154	/** R0/GC lock contention. */
155	STAMCOUNTER StatContentionR0GCLock;
156	/** R0/GC unlock contention. */
157	STAMCOUNTER StatContentionR0GCUnlock;
158	/** R3 lock contention. */
159	STAMCOUNTER StatContentionR3;
160	/** Profiling the time the section is locked. */
161	STAMPROFILEADV StatLocked;
162	} PDMCRITSECTINT, *PPDMCRITSECTINT;
163
164
165	/* Must be included after PDMDEVINSINT is defined. */
166	#define PDMDEVINSINT_DECLARED
167	#define PDMDRVINSINT_DECLARED
168	#define PDMCRITSECTINT_DECLARED
169	#ifdef __VBox_pdm_h__
170	# error "Invalid header PDM order. Include PDMInternal.h before VBox/pdm.h!"
171	#endif
172	#include <VBox/pdm.h>
173
174
175
176	/**
177	* PDM Logical Unit.
178	*
179	* This typically the representation of a physical port on a
180	* device, like for instance the PS/2 keyboard port on the
181	* keyboard controller device. The LUNs are chained on the
182	* device the belong to (PDMDEVINSINT::pLunsHC).
183	*/
184	typedef struct PDMLUN
185	{
186	/** The LUN - The Logical Unit Number. */
187	RTUINT iLun;
188	/** Pointer to the next LUN. */
189	PPDMLUN pNext;
190	/** Pointer to the top driver in the driver chain. */
191	PPDMDRVINS pTop;
192	/** Pointer to the device instance which the LUN belongs to. */
193	PPDMDEVINS pDevIns;
194	/** Pointer to the device base interface. */
195	PPDMIBASE pBase;
196	/** Description of this LUN. */
197	const char *pszDesc;
198	} PDMLUN;
199
200
201	/**
202	* PDM Device.
203	*/
204	typedef struct PDMDEV
205	{
206	/** Pointer to the next device (HC Ptr). */
207	HCPTRTYPE(PPDMDEV) pNext;
208	/** Device name length. (search optimization) */
209	RTUINT cchName;
210	/** Registration structure. */
211	HCPTRTYPE(const struct PDMDEVREG *) pDevReg;
212	/** Number of instances. */
213	RTUINT cInstances;
214	/** Pointer to chain of instances (HC Ptr). */
215	HCPTRTYPE(PPDMDEVINS) pInstances;
216
217	} PDMDEV;
218
219
220	/**
221	* PDM Driver.
222	*/
223	typedef struct PDMDRV
224	{
225	/** Pointer to the next device. */
226	PPDMDRV pNext;
227	/** Registration structure. */
228	const struct PDMDRVREG *pDrvReg;
229	/** Number of instances. */
230	RTUINT cInstances;
231
232	} PDMDRV;
233
234
235	/**
236	* PDM registered PIC device.
237	*/
238	typedef struct PDMPIC
239	{
240	/** Pointer to the PIC device instance - HC. */
241	HCPTRTYPE(PPDMDEVINS) pDevInsR3;
242	/** @copydoc PDMPICREG::pfnSetIrqHC */
243	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
244	/** @copydoc PDMPICREG::pfnGetInterruptHC */
245	DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
246
247	/** Pointer to the PIC device instance - R0. */
248	R0PTRTYPE(PPDMDEVINS) pDevInsR0;
249	/** @copydoc PDMPICREG::pfnSetIrqHC */
250	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
251	/** @copydoc PDMPICREG::pfnGetInterruptHC */
252	DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
253
254	/** Pointer to the PIC device instance - GC. */
255	GCPTRTYPE(PPDMDEVINS) pDevInsGC;
256	/** @copydoc PDMPICREG::pfnSetIrqHC */
257	DECLGCCALLBACKMEMBER(void, pfnSetIrqGC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
258	/** @copydoc PDMPICREG::pfnGetInterruptHC */
259	DECLGCCALLBACKMEMBER(int, pfnGetInterruptGC,(PPDMDEVINS pDevIns));
260	#if GC_ARCH_BITS == 32
261	RTGCPTR GCPtrPadding; /*< Alignment padding. /
262	#endif
263	} PDMPIC;
264
265
266	/**
267	* PDM registered APIC device.
268	*/
269	typedef struct PDMAPIC
270	{
271	/** Pointer to the APIC device instance - HC Ptr. */
272	PPDMDEVINSHC pDevInsR3;
273	/** @copydoc PDMAPICREG::pfnGetInterruptHC */
274	DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
275	/** @copydoc PDMAPICREG::pfnSetBaseHC */
276	DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
277	/** @copydoc PDMAPICREG::pfnGetBaseHC */
278	DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
279	/** @copydoc PDMAPICREG::pfnSetTPRHC */
280	DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, uint8_t u8TPR));
281	/** @copydoc PDMAPICREG::pfnGetTPRHC */
282	DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns));
283	/** @copydoc PDMAPICREG::pfnBusDeliverHC */
284	DECLR3CALLBACKMEMBER(void, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
285	uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
286
287	/** Pointer to the PIC device instance - R0. */
288	R0PTRTYPE(PPDMDEVINS) pDevInsR0;
289	/** @copydoc PDMAPICREG::pfnGetInterruptHC */
290	DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
291	/** @copydoc PDMAPICREG::pfnSetBaseHC */
292	DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, uint64_t u64Base));
293	/** @copydoc PDMAPICREG::pfnGetBaseHC */
294	DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns));
295	/** @copydoc PDMAPICREG::pfnSetTPRHC */
296	DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, uint8_t u8TPR));
297	/** @copydoc PDMAPICREG::pfnGetTPRHC */
298	DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns));
299	/** @copydoc PDMAPICREG::pfnBusDeliverHC */
300	DECLR0CALLBACKMEMBER(void, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
301	uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
302
303	/** Pointer to the APIC device instance - GC Ptr. */
304	PPDMDEVINSGC pDevInsGC;
305	/** @copydoc PDMAPICREG::pfnGetInterruptHC */
306	DECLGCCALLBACKMEMBER(int, pfnGetInterruptGC,(PPDMDEVINS pDevIns));
307	/** @copydoc PDMAPICREG::pfnSetBaseHC */
308	DECLGCCALLBACKMEMBER(void, pfnSetBaseGC,(PPDMDEVINS pDevIns, uint64_t u64Base));
309	/** @copydoc PDMAPICREG::pfnGetBaseHC */
310	DECLGCCALLBACKMEMBER(uint64_t, pfnGetBaseGC,(PPDMDEVINS pDevIns));
311	/** @copydoc PDMAPICREG::pfnSetTPRHC */
312	DECLGCCALLBACKMEMBER(void, pfnSetTPRGC,(PPDMDEVINS pDevIns, uint8_t u8TPR));
313	/** @copydoc PDMAPICREG::pfnGetTPRHC */
314	DECLGCCALLBACKMEMBER(uint8_t, pfnGetTPRGC,(PPDMDEVINS pDevIns));
315	/** @copydoc PDMAPICREG::pfnBusDeliverHC */
316	DECLGCCALLBACKMEMBER(void, pfnBusDeliverGC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
317	uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
318	#if GC_ARCH_BITS == 32
319	RTGCPTR GCPtrPadding; /*< Alignment padding. /
320	#endif
321	} PDMAPIC;
322
323
324	/**
325	* PDM registered I/O APIC device.
326	*/
327	typedef struct PDMIOAPIC
328	{
329	/** Pointer to the APIC device instance - HC Ptr. */
330	PPDMDEVINSHC pDevInsR3;
331	/** @copydoc PDMIOAPICREG::pfnSetIrqHC */
332	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
333
334	/** Pointer to the PIC device instance - R0. */
335	R0PTRTYPE(PPDMDEVINS) pDevInsR0;
336	/** @copydoc PDMIOAPICREG::pfnSetIrqHC */
337	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
338
339	/** Pointer to the APIC device instance - GC Ptr. */
340	PPDMDEVINSGC pDevInsGC;
341	/** @copydoc PDMIOAPICREG::pfnSetIrqHC */
342	DECLGCCALLBACKMEMBER(void, pfnSetIrqGC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
343	} PDMIOAPIC;
344
345
346	/**
347	* PDM PCI Bus instance.
348	*/
349	typedef struct PDMPCIBUS
350	{
351	/** PCI bus number. */
352	RTUINT iBus;
353	RTUINT uPadding0; /*< Alignment padding./
354
355	/** Pointer to PCI Bus device instance. */
356	PPDMDEVINSHC pDevInsR3;
357	/** @copydoc PDMPCIBUSREG::pfnSetIrqHC */
358	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
359	/** @copydoc PDMPCIBUSREG::pfnRegisterHC */
360	DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
361	/** @copydoc PDMPCIBUSREG::pfnIORegionRegisterHC */
362	DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,
363	PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
364	/** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksHC */
365	DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,
366	PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
367	/** @copydoc PDMPCIBUSREG::pfnSaveExecHC */
368	DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
369	/** @copydoc PDMPCIBUSREG::pfnLoadExecHC */
370	DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
371	/** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSHC */
372	DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
373
374	/** Pointer to the PIC device instance - R0. */
375	R0PTRTYPE(PPDMDEVINS) pDevInsR0;
376	/** @copydoc PDMPCIBUSREG::pfnSetIrqHC */
377	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
378
379	/** Pointer to PCI Bus device instance. */
380	PPDMDEVINSGC pDevInsGC;
381	/** @copydoc PDMPCIBUSREG::pfnSetIrqHC */
382	DECLGCCALLBACKMEMBER(void, pfnSetIrqGC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
383	} PDMPCIBUS;
384
385
386	#ifdef IN_RING3
387	/**
388	* PDM registered DMAC (DMA Controller) device.
389	*/
390	typedef struct PDMDMAC
391	{
392	/** Pointer to the DMAC device instance. */
393	PPDMDEVINS pDevIns;
394	/** Copy of the registration structure. */
395	PDMDMACREG Reg;
396	} PDMDMAC;
397
398
399	/**
400	* PDM registered RTC (Real Time Clock) device.
401	*/
402	typedef struct PDMRTC
403	{
404	/** Pointer to the RTC device instance. */
405	PPDMDEVINS pDevIns;
406	/** Copy of the registration structure. */
407	PDMRTCREG Reg;
408	} PDMRTC;
409
410	#endif /* IN_RING3 */
411
412	/**
413	* Module type.
414	*/
415	typedef enum PDMMODTYPE
416	{
417	/** Guest context module. */
418	PDMMOD_TYPE_GC,
419	/** Ring-0 (host) context module. */
420	PDMMOD_TYPE_R0,
421	/** Ring-3 (host) context module. */
422	PDMMOD_TYPE_R3
423	} PDMMODTYPE, *PPDMMODTYPE;
424
425
426	/** The module name length including the terminator. */
427	#define PDMMOD_NAME_LEN 32
428
429	/**
430	* Loaded module instance.
431	*/
432	typedef struct PDMMOD
433	{
434	/** Module name. This is used for refering to
435	* the module internally, sort of like a handle. */
436	char szName[PDMMOD_NAME_LEN];
437	/** Module type. */
438	PDMMODTYPE eType;
439	/** Loader module handle. Not used for R0 modules. */
440	RTLDRMOD hLdrMod;
441	/** Loaded address.
442	* This is the 'handle' for R0 modules. */
443	RTUINTPTR ImageBase;
444	/** Old loaded address.
445	* This is used during relocation of GC modules. Not used for R0 modules. */
446	RTUINTPTR OldImageBase;
447	/** Where the R3 HC bits are stored.
448	* This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
449	void *pvBits;
450
451	/** Pointer to next module. */
452	struct PDMMOD *pNext;
453	/** Module filename. */
454	char szFilename[1];
455	} PDMMOD;
456	/** Pointer to loaded module instance. */
457	typedef PDMMOD *PPDMMOD;
458
459
460
461	/** Extra space in the free array. */
462	#define PDMQUEUE_FREE_SLACK 16
463
464	/**
465	* Queue type.
466	*/
467	typedef enum PDMQUEUETYPE
468	{
469	/** Device consumer. */
470	PDMQUEUETYPE_DEV = 1,
471	/** Driver consumer. */
472	PDMQUEUETYPE_DRV,
473	/** Internal consumer. */
474	PDMQUEUETYPE_INTERNAL,
475	/** External consumer. */
476	PDMQUEUETYPE_EXTERNAL
477	} PDMQUEUETYPE;
478
479	/** Pointer to a PDM Queue. */
480	typedef struct PDMQUEUE *PPDMQUEUE;
481
482	/**
483	* PDM Queue.
484	*/
485	typedef struct PDMQUEUE
486	{
487	/** Pointer to the next queue in the list. */
488	HCPTRTYPE(PPDMQUEUE) pNext;
489	/** Type specific data. */
490	union
491	{
492	/** PDMQUEUETYPE_DEV */
493	struct
494	{
495	/** Pointer to consumer function. */
496	HCPTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
497	/** Pointer to the device instance owning the queue. */
498	HCPTRTYPE(PPDMDEVINS) pDevIns;
499	} Dev;
500	/** PDMQUEUETYPE_DRV */
501	struct
502	{
503	/** Pointer to consumer function. */
504	HCPTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
505	/** Pointer to the driver instance owning the queue. */
506	HCPTRTYPE(PPDMDRVINS) pDrvIns;
507	} Drv;
508	/** PDMQUEUETYPE_INTERNAL */
509	struct
510	{
511	/** Pointer to consumer function. */
512	HCPTRTYPE(PFNPDMQUEUEINT) pfnCallback;
513	} Int;
514	/** PDMQUEUETYPE_EXTERNAL */
515	struct
516	{
517	/** Pointer to consumer function. */
518	HCPTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
519	/** Pointer to user argument. */
520	HCPTRTYPE(void *) pvUser;
521	} Ext;
522	} u;
523	/** Queue type. */
524	PDMQUEUETYPE enmType;
525	/** The interval between checking the queue for events.
526	* The realtime timer below is used to do the waiting.
527	* If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
528	uint32_t cMilliesInterval;
529	/** Interval timer. Only used if cMilliesInterval is non-zero. */
530	PTMTIMERHC pTimer;
531	/** Pointer to the VM. */
532	HCPTRTYPE(PVM) pVMHC;
533	/** LIFO of pending items - HC. */
534	HCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingHC;
535	/** Pointer to the GC VM and indicator for GC enabled queue.
536	* If this is NULL, the queue cannot be used in GC.
537	*/
538	GCPTRTYPE(PVM) pVMGC;
539	/** LIFO of pending items - GC. */
540	GCPTRTYPE(PPDMQUEUEITEMCORE) pPendingGC;
541	/** Item size (bytes). */
542	RTUINT cbItem;
543	/** Number of items in the queue. */
544	RTUINT cItems;
545	/** Index to the free head (where we insert). */
546	uint32_t volatile iFreeHead;
547	/** Index to the free tail (where we remove). */
548	uint32_t volatile iFreeTail;
549	/** Array of pointers to free items. Variable size. */
550	struct PDMQUEUEFREEITEM
551	{
552	/** Pointer to the free item - HC Ptr. */
553	HCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemHC;
554	/** Pointer to the free item - GC Ptr. */
555	GCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemGC;
556	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
557	uint32_t Alignment0;
558	#endif
559	} aFreeItems[1];
560	} PDMQUEUE;
561
562
563	/**
564	* Queue device helper task operation.
565	*/
566	typedef enum PDMDEVHLPTASKOP
567	{
568	/** The usual invalid 0 entry. */
569	PDMDEVHLPTASKOP_INVALID = 0,
570	/** ISASetIrq */
571	PDMDEVHLPTASKOP_ISA_SET_IRQ,
572	/** PCISetIrq */
573	PDMDEVHLPTASKOP_PCI_SET_IRQ,
574	/** PCISetIrq */
575	PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
576	/** The usual 32-bit hack. */
577	PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
578	} PDMDEVHLPTASKOP;
579
580	/**
581	* Queued Device Helper Task.
582	*/
583	typedef struct PDMDEVHLPTASK
584	{
585	/** The queue item core (don't touch). */
586	PDMQUEUEITEMCORE Core;
587	/** Pointer to the device instance (HC Ptr). */
588	HCPTRTYPE(PPDMDEVINS) pDevInsHC;
589	/** This operation to perform. */
590	PDMDEVHLPTASKOP enmOp;
591	#if HC_ARCH_BITS == 64
592	uint32_t Alignment0;
593	#endif
594	/** Parameters to the operation. */
595	union PDMDEVHLPTASKPARAMS
596	{
597	/**
598	* PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_PCI_SET_IRQ.
599	*/
600	struct PDMDEVHLPTASKSETIRQ
601	{
602	/** The IRQ */
603	int iIrq;
604	/** The new level. */
605	int iLevel;
606	} SetIRQ;
607	} u;
608	} PDMDEVHLPTASK;
609	/** Pointer to a queued Device Helper Task. */
610	typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
611	/** Pointer to a const queued Device Helper Task. */
612	typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
613
614
615
616	/**
617	* Converts a PDM pointer into a VM pointer.
618	* @returns Pointer to the VM structure the PDM is part of.
619	* @param pPDM Pointer to PDM instance data.
620	*/
621	#define PDM2VM(pPDM) ( (PVM)((char*)pPDM - pPDM->offVM) )
622
623
624	/**
625	* PDM VM Instance data.
626	* Changes to this must checked against the padding of the cfgm union in VM!
627	*/
628	typedef struct PDM
629	{
630	/** Offset to the VM structure.
631	* See PDM2VM(). */
632	RTUINT offVM;
633	RTUINT uPadding0; /*< Alignment padding./
634
635	/** Pointer to list of loaded modules. This is HC only! */
636	HCPTRTYPE(PPDMMOD) pModules;
637
638	/** List of registered devices. (FIFO) */
639	HCPTRTYPE(PPDMDEV) pDevs;
640	/** List of devices instances. (FIFO) */
641	HCPTRTYPE(PPDMDEVINS) pDevInstances;
642	/** List of registered drivers. (FIFO) */
643	HCPTRTYPE(PPDMDRV) pDrvs;
644	/** List of initialized critical sections. (LIFO) */
645	HCPTRTYPE(PPDMCRITSECTINT) pCritSects;
646	/** PCI Buses. */
647	PDMPCIBUS aPciBuses[1];
648	/** The register PIC device. */
649	PDMPIC Pic;
650	/** The registerd APIC device. */
651	PDMAPIC Apic;
652	/** The registerd I/O APIC device. */
653	PDMIOAPIC IoApic;
654	/** The registered DMAC device. */
655	HCPTRTYPE(PPDMDMAC) pDmac;
656	/** The registered RTC device. */
657	HCPTRTYPE(PPDMRTC) pRtc;
658
659	/** Queue in which devhlp tasks are queued for R3 execution - HC Ptr. */
660	HCPTRTYPE(PPDMQUEUE) pDevHlpQueueHC;
661	/** Queue in which devhlp tasks are queued for R3 execution - GC Ptr. */
662	GCPTRTYPE(PPDMQUEUE) pDevHlpQueueGC;
663
664	/** The number of entries in the apQueuedCritSectsLeaves table that's currnetly in use. */
665	RTUINT cQueuedCritSectLeaves;
666	/** Critical sections queued in GC/R0 because of contention preventing leave to complete. (R3 Ptrs)
667	* We will return to Ring-3 ASAP, so this queue doesn't has to be very long. */
668	R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];
669
670	/** Linked list of timer driven PDM queues. */
671	HCPTRTYPE(struct PDMQUEUE *) pQueuesTimer;
672	/** Linked list of force action driven PDM queues. */
673	HCPTRTYPE(struct PDMQUEUE *) pQueuesForced;
674	/** Pointer to the queue which should be manually flushed - HCPtr.
675	* Only touched by EMT. */
676	HCPTRTYPE(struct PDMQUEUE *) pQueueFlushHC;
677	/** Pointer to the queue which should be manually flushed - GCPtr. */
678	GCPTRTYPE(struct PDMQUEUE *) pQueueFlushGC;
679
680	/** TEMPORARY HACKS FOR NETWORK POLLING.
681	* @todo fix NAT and kill this!
682	* @{ */
683	RTUINT cPollers;
684	HCPTRTYPE(PFNPDMDRVPOLLER) apfnPollers[16];
685	HCPTRTYPE(PPDMDRVINS) aDrvInsPollers[16];
686	PTMTIMERHC pTimerPollers;
687	/** @} */
688
689	#ifdef VBOX_WITH_PDM_LOCK
690	/** The PDM lock.
691	* This is used to protect everything that deals with interrupts, i.e.
692	* the PIC, APIC, IOAPIC and PCI devices pluss some PDM functions. */
693	PDMCRITSECT CritSect;
694	#endif
695
696
697	/** Number of times a critical section leave requesed needed to be queued for ring-3 execution. */
698	STAMCOUNTER StatQueuedCritSectLeaves;
699	} PDM;
700	/** Pointer to PDM VM instance data. */
701	typedef PDM *PPDM;
702
703
704
705	/*******************************************************************************
706	* Global Variables *
707	*******************************************************************************/
708	#ifdef IN_RING3
709	extern const PDMDRVHLP g_pdmR3DrvHlp;
710	#endif
711
712
713	/*******************************************************************************
714	* Internal Functions *
715	*******************************************************************************/
716	int pdmR3CritSectInit(PVM pVM);
717	int pdmR3CritSectTerm(PVM pVM);
718	void pdmR3CritSectRelocate(PVM pVM);
719	int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName);
720	int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
721
722	int pdmR3DevInit(PVM pVM);
723	PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
724	int pdmR3DevFindLun(PVM pVM, const char pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN ppLun);
725
726	int pdmR3DrvInit(PVM pVM);
727	int pdmR3DrvDetach(PPDMDRVINS pDrvIns);
728	PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
729
730	int pdmR3LdrInit(PVM pVM);
731	void pdmR3LdrTerm(PVM pVM);
732	char * pdmR3FileR3(const char *pszFile, bool fShared = false);
733	int pdmR3LoadR3(PVM pVM, const char pszFilename, const char pszName);
734
735	void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
736
737	#ifdef VBOX_WITH_PDM_LOCK
738	void pdmLock(PVM pVM);
739	int pdmLockEx(PVM pVM, int rc);
740	void pdmUnlock(PVM pVM);
741	#else
742	# define pdmLock(pVM) do {} while (0)
743	# define pdmLockEx(pVM, rc) (VINF_SUCCESS)
744	# define pdmUnlock(pVM) do {} while (0)
745	#endif
746
747	/** @} */
748
749	__END_DECLS
750
751	#endif

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source: vbox/trunk/src/VBox/VMM/PDMInternal.h@ 2705

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