VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMInternal.h@ 28739

Last change on this file since 28739 was 28425, checked in by vboxsync, 15 years ago

Added PDMDRVHLP::pfnCallR0 / PDMDrvHlpCallR0 / PFNPDMDRVREQHANDLERR0 for making it possible for a driver to call it's ring-0 side via a private interface.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 44.6 KB
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1/* $Id: PDMInternal.h 28425 2010-04-16 18:06:35Z vboxsync $ */
2/** @file
3 * PDM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22#ifndef ___PDMInternal_h
23#define ___PDMInternal_h
24
25#include <VBox/types.h>
26#include <VBox/param.h>
27#include <VBox/cfgm.h>
28#include <VBox/stam.h>
29#include <VBox/vusb.h>
30#include <VBox/pdmasynccompletion.h>
31#include <VBox/pdmcommon.h>
32#include <iprt/assert.h>
33#include <iprt/critsect.h>
34#ifdef IN_RING3
35# include <iprt/thread.h>
36#endif
37
38RT_C_DECLS_BEGIN
39
40
41/** @defgroup grp_pdm_int Internal
42 * @ingroup grp_pdm
43 * @internal
44 * @{
45 */
46
47/** @def PDM_WITH_R3R0_CRIT_SECT
48 * Enables or disabled ring-3/ring-0 critical sections. */
49#if defined(DOXYGEN_RUNNING) || 1
50# define PDM_WITH_R3R0_CRIT_SECT
51#endif
52
53/** @def PDMCRITSECT_STRICT
54 * Enables/disables PDM critsect strictness like deadlock detection. */
55#if (defined(RT_LOCK_STRICT) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
56# define PDMCRITSECT_STRICT
57#endif
58
59
60/*******************************************************************************
61* Structures and Typedefs *
62*******************************************************************************/
63
64/** Pointer to a PDM Device. */
65typedef struct PDMDEV *PPDMDEV;
66/** Pointer to a pointer to a PDM Device. */
67typedef PPDMDEV *PPPDMDEV;
68
69/** Pointer to a PDM USB Device. */
70typedef struct PDMUSB *PPDMUSB;
71/** Pointer to a pointer to a PDM USB Device. */
72typedef PPDMUSB *PPPDMUSB;
73
74/** Pointer to a PDM Driver. */
75typedef struct PDMDRV *PPDMDRV;
76/** Pointer to a pointer to a PDM Driver. */
77typedef PPDMDRV *PPPDMDRV;
78
79/** Pointer to a PDM Logical Unit. */
80typedef struct PDMLUN *PPDMLUN;
81/** Pointer to a pointer to a PDM Logical Unit. */
82typedef PPDMLUN *PPPDMLUN;
83
84/** Pointer to a PDM PCI Bus instance. */
85typedef struct PDMPCIBUS *PPDMPCIBUS;
86/** Pointer to a DMAC instance. */
87typedef struct PDMDMAC *PPDMDMAC;
88/** Pointer to a RTC instance. */
89typedef struct PDMRTC *PPDMRTC;
90
91/** Pointer to an USB HUB registration record. */
92typedef struct PDMUSBHUB *PPDMUSBHUB;
93
94/**
95 * Supported asynchronous completion endpoint classes.
96 */
97typedef enum PDMASYNCCOMPLETIONEPCLASSTYPE
98{
99 /** File class. */
100 PDMASYNCCOMPLETIONEPCLASSTYPE_FILE = 0,
101 /** Number of supported classes. */
102 PDMASYNCCOMPLETIONEPCLASSTYPE_MAX,
103 /** 32bit hack. */
104 PDMASYNCCOMPLETIONEPCLASSTYPE_32BIT_HACK = 0x7fffffff
105} PDMASYNCCOMPLETIONEPCLASSTYPE;
106
107/**
108 * Private device instance data.
109 */
110typedef struct PDMDEVINSINT
111{
112 /** Pointer to the next instance (HC Ptr).
113 * (Head is pointed to by PDM::pDevInstances.) */
114 R3PTRTYPE(PPDMDEVINS) pNextR3;
115 /** Pointer to the next per device instance (HC Ptr).
116 * (Head is pointed to by PDMDEV::pInstances.) */
117 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
118 /** Pointer to device structure - HC Ptr. */
119 R3PTRTYPE(PPDMDEV) pDevR3;
120 /** Pointer to the list of logical units associated with the device. (FIFO) */
121 R3PTRTYPE(PPDMLUN) pLunsR3;
122 /** Pointer to the asynchronous notification callback set while in
123 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
124 R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
125 /** Configuration handle to the instance node. */
126 R3PTRTYPE(PCFGMNODE) pCfgHandle;
127
128 /** R3 pointer to the VM this instance was created for. */
129 PVMR3 pVMR3;
130 /** R3 pointer to associated PCI device structure. */
131 R3PTRTYPE(struct PCIDevice *) pPciDeviceR3;
132 /** R3 pointer to associated PCI bus structure. */
133 R3PTRTYPE(PPDMPCIBUS) pPciBusR3;
134
135 /** R0 pointer to the VM this instance was created for. */
136 PVMR0 pVMR0;
137 /** R0 pointer to associated PCI device structure. */
138 R0PTRTYPE(struct PCIDevice *) pPciDeviceR0;
139 /** R0 pointer to associated PCI bus structure. */
140 R0PTRTYPE(PPDMPCIBUS) pPciBusR0;
141
142 /** RC pointer to the VM this instance was created for. */
143 PVMRC pVMRC;
144 /** RC pointer to associated PCI device structure. */
145 RCPTRTYPE(struct PCIDevice *) pPciDeviceRC;
146 /** RC pointer to associated PCI bus structure. */
147 RCPTRTYPE(PPDMPCIBUS) pPciBusRC;
148
149 /** Flags, see PDMDEVINSINT_FLAGS_XXX. */
150 uint32_t fIntFlags;
151} PDMDEVINSINT;
152
153/** @name PDMDEVINSINT::fIntFlags
154 * @{ */
155/** Used by pdmR3Load to mark device instances it found in the saved state. */
156#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
157/** Indicates that the device hasn't been powered on or resumed.
158 * This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
159 * to make sure each device gets exactly one notification for each of those
160 * events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
161 * a failure (already resumed/powered-on devices are suspended). */
162#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
163/** Indicates that the device has been reset already. Used by PDMR3Reset. */
164#define PDMDEVINSINT_FLAGS_RESET RT_BIT_32(2)
165/** @} */
166
167
168/**
169 * Private USB device instance data.
170 */
171typedef struct PDMUSBINSINT
172{
173 /** The UUID of this instance. */
174 RTUUID Uuid;
175 /** Pointer to the next instance.
176 * (Head is pointed to by PDM::pUsbInstances.) */
177 R3PTRTYPE(PPDMUSBINS) pNext;
178 /** Pointer to the next per USB device instance.
179 * (Head is pointed to by PDMUSB::pInstances.) */
180 R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
181
182 /** Pointer to device structure. */
183 R3PTRTYPE(PPDMUSB) pUsbDev;
184
185 /** Pointer to the VM this instance was created for. */
186 PVMR3 pVM;
187 /** Pointer to the list of logical units associated with the device. (FIFO) */
188 R3PTRTYPE(PPDMLUN) pLuns;
189 /** The per instance device configuration. */
190 R3PTRTYPE(PCFGMNODE) pCfg;
191 /** Same as pCfg if the configuration should be deleted when detaching the device. */
192 R3PTRTYPE(PCFGMNODE) pCfgDelete;
193 /** The global device configuration. */
194 R3PTRTYPE(PCFGMNODE) pCfgGlobal;
195
196 /** Pointer to the USB hub this device is attached to.
197 * This is NULL if the device isn't connected to any HUB. */
198 R3PTRTYPE(PPDMUSBHUB) pHub;
199 /** The port number that we're connected to. */
200 uint32_t iPort;
201 /** Indicates that the USB device hasn't been powered on or resumed.
202 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
203 bool fVMSuspended;
204 /** Indicates that the USB device has been reset. */
205 bool fVMReset;
206 /** Pointer to the asynchronous notification callback set while in
207 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
208 R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
209} PDMUSBINSINT;
210
211
212/**
213 * Private driver instance data.
214 */
215typedef struct PDMDRVINSINT
216{
217 /** Pointer to the driver instance above.
218 * This is NULL for the topmost drive. */
219 R3PTRTYPE(PPDMDRVINS) pUp;
220 /** Pointer to the driver instance below.
221 * This is NULL for the bottommost driver. */
222 R3PTRTYPE(PPDMDRVINS) pDown;
223 /** Pointer to the logical unit this driver chained on. */
224 R3PTRTYPE(PPDMLUN) pLun;
225 /** Pointer to driver structure from which this was instantiated. */
226 R3PTRTYPE(PPDMDRV) pDrv;
227 /** Pointer to the VM this instance was created for, ring-3 context. */
228 PVMR3 pVMR3;
229 /** Pointer to the VM this instance was created for, ring-0 context. */
230 PVMR0 pVMR0;
231 /** Pointer to the VM this instance was created for, raw-mode context. */
232 PVMRC pVMRC;
233 /** Flag indicating that the driver is being detached and destroyed.
234 * (Helps detect potential recursive detaching.) */
235 bool fDetaching;
236 /** Indicates that the driver hasn't been powered on or resumed.
237 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
238 bool fVMSuspended;
239 /** Indicates that the driver has been reset already. */
240 bool fVMReset;
241 /** Set if allocated on the hyper heap, false if on the ring-3 heap. */
242 bool fHyperHeap;
243 /** Pointer to the asynchronous notification callback set while in
244 * PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
245 R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
246 /** Configuration handle to the instance node. */
247 R3PTRTYPE(PCFGMNODE) pCfgHandle;
248 /** Pointer to the ring-0 request handler function. */
249 PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
250} PDMDRVINSINT;
251
252
253/**
254 * Private critical section data.
255 */
256typedef struct PDMCRITSECTINT
257{
258 /** The critical section core which is shared with IPRT. */
259 RTCRITSECT Core;
260 /** Pointer to the next critical section.
261 * This chain is used for relocating pVMRC and device cleanup. */
262 R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
263 /** Owner identifier.
264 * This is pDevIns if the owner is a device. Similarily for a driver or service.
265 * PDMR3CritSectInit() sets this to point to the critsect itself. */
266 RTR3PTR pvKey;
267 /** Pointer to the VM - R3Ptr. */
268 PVMR3 pVMR3;
269 /** Pointer to the VM - R0Ptr. */
270 PVMR0 pVMR0;
271 /** Pointer to the VM - GCPtr. */
272 PVMRC pVMRC;
273 /** Alignment padding. */
274 uint32_t padding;
275 /** Event semaphore that is scheduled to be signaled upon leaving the
276 * critical section. This is Ring-3 only of course. */
277 RTSEMEVENT EventToSignal;
278 /** The lock name. */
279 R3PTRTYPE(const char *) pszName;
280 /** R0/RC lock contention. */
281 STAMCOUNTER StatContentionRZLock;
282 /** R0/RC unlock contention. */
283 STAMCOUNTER StatContentionRZUnlock;
284 /** R3 lock contention. */
285 STAMCOUNTER StatContentionR3;
286 /** Profiling the time the section is locked. */
287 STAMPROFILEADV StatLocked;
288} PDMCRITSECTINT;
289AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
290/** Pointer to private critical section data. */
291typedef PDMCRITSECTINT *PPDMCRITSECTINT;
292
293/** Indicates that the critical section is queued for unlock.
294 * PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
295#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
296
297
298/**
299 * The usual device/driver/internal/external stuff.
300 */
301typedef enum
302{
303 /** The usual invalid entry. */
304 PDMTHREADTYPE_INVALID = 0,
305 /** Device type. */
306 PDMTHREADTYPE_DEVICE,
307 /** USB Device type. */
308 PDMTHREADTYPE_USB,
309 /** Driver type. */
310 PDMTHREADTYPE_DRIVER,
311 /** Internal type. */
312 PDMTHREADTYPE_INTERNAL,
313 /** External type. */
314 PDMTHREADTYPE_EXTERNAL,
315 /** The usual 32-bit hack. */
316 PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
317} PDMTHREADTYPE;
318
319
320/**
321 * The internal structure for the thread.
322 */
323typedef struct PDMTHREADINT
324{
325 /** The VM pointer. */
326 PVMR3 pVM;
327 /** The event semaphore the thread blocks on when not running. */
328 RTSEMEVENTMULTI BlockEvent;
329 /** The event semaphore the thread sleeps on while running. */
330 RTSEMEVENTMULTI SleepEvent;
331 /** Pointer to the next thread. */
332 R3PTRTYPE(struct PDMTHREAD *) pNext;
333 /** The thread type. */
334 PDMTHREADTYPE enmType;
335} PDMTHREADINT;
336
337
338
339/* Must be included after PDMDEVINSINT is defined. */
340#define PDMDEVINSINT_DECLARED
341#define PDMUSBINSINT_DECLARED
342#define PDMDRVINSINT_DECLARED
343#define PDMCRITSECTINT_DECLARED
344#define PDMTHREADINT_DECLARED
345#ifdef ___VBox_pdm_h
346# error "Invalid header PDM order. Include PDMInternal.h before VBox/pdm.h!"
347#endif
348RT_C_DECLS_END
349#include <VBox/pdm.h>
350RT_C_DECLS_BEGIN
351
352/**
353 * PDM Logical Unit.
354 *
355 * This typically the representation of a physical port on a
356 * device, like for instance the PS/2 keyboard port on the
357 * keyboard controller device. The LUNs are chained on the
358 * device the belong to (PDMDEVINSINT::pLunsR3).
359 */
360typedef struct PDMLUN
361{
362 /** The LUN - The Logical Unit Number. */
363 RTUINT iLun;
364 /** Pointer to the next LUN. */
365 PPDMLUN pNext;
366 /** Pointer to the top driver in the driver chain. */
367 PPDMDRVINS pTop;
368 /** Pointer to the bottom driver in the driver chain. */
369 PPDMDRVINS pBottom;
370 /** Pointer to the device instance which the LUN belongs to.
371 * Either this is set or pUsbIns is set. Both is never set at the same time. */
372 PPDMDEVINS pDevIns;
373 /** Pointer to the USB device instance which the LUN belongs to. */
374 PPDMUSBINS pUsbIns;
375 /** Pointer to the device base interface. */
376 PPDMIBASE pBase;
377 /** Description of this LUN. */
378 const char *pszDesc;
379} PDMLUN;
380
381
382/**
383 * PDM Device.
384 */
385typedef struct PDMDEV
386{
387 /** Pointer to the next device (R3 Ptr). */
388 R3PTRTYPE(PPDMDEV) pNext;
389 /** Device name length. (search optimization) */
390 RTUINT cchName;
391 /** Registration structure. */
392 R3PTRTYPE(const struct PDMDEVREG *) pReg;
393 /** Number of instances. */
394 uint32_t cInstances;
395 /** Pointer to chain of instances (R3 Ptr). */
396 PPDMDEVINSR3 pInstances;
397} PDMDEV;
398
399
400/**
401 * PDM USB Device.
402 */
403typedef struct PDMUSB
404{
405 /** Pointer to the next device (R3 Ptr). */
406 R3PTRTYPE(PPDMUSB) pNext;
407 /** Device name length. (search optimization) */
408 RTUINT cchName;
409 /** Registration structure. */
410 R3PTRTYPE(const struct PDMUSBREG *) pReg;
411 /** Next instance number. */
412 uint32_t iNextInstance;
413 /** Pointer to chain of instances (R3 Ptr). */
414 R3PTRTYPE(PPDMUSBINS) pInstances;
415} PDMUSB;
416
417
418/**
419 * PDM Driver.
420 */
421typedef struct PDMDRV
422{
423 /** Pointer to the next device. */
424 PPDMDRV pNext;
425 /** Registration structure. */
426 const struct PDMDRVREG * pReg;
427 /** Current number of instances. */
428 uint32_t cInstances;
429 /** The next instance number. */
430 uint32_t iNextInstance;
431} PDMDRV;
432
433
434/**
435 * PDM registered PIC device.
436 */
437typedef struct PDMPIC
438{
439 /** Pointer to the PIC device instance - R3. */
440 PPDMDEVINSR3 pDevInsR3;
441 /** @copydoc PDMPICREG::pfnSetIrqR3 */
442 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
443 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
444 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
445
446 /** Pointer to the PIC device instance - R0. */
447 PPDMDEVINSR0 pDevInsR0;
448 /** @copydoc PDMPICREG::pfnSetIrqR3 */
449 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
450 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
451 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
452
453 /** Pointer to the PIC device instance - RC. */
454 PPDMDEVINSRC pDevInsRC;
455 /** @copydoc PDMPICREG::pfnSetIrqR3 */
456 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
457 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
458 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
459 /** Alignment padding. */
460 RTRCPTR RCPtrPadding;
461} PDMPIC;
462
463
464/**
465 * PDM registered APIC device.
466 */
467typedef struct PDMAPIC
468{
469 /** Pointer to the APIC device instance - R3 Ptr. */
470 PPDMDEVINSR3 pDevInsR3;
471 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
472 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
473 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
474 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
475 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
476 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
477 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
478 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
479 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
480 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
481 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
482 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
483 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
484 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
485 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
486 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
487 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
488 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
489 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
490 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
491 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
492
493 /** Pointer to the APIC device instance - R0 Ptr. */
494 PPDMDEVINSR0 pDevInsR0;
495 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
496 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
497 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
498 DECLR0CALLBACKMEMBER(bool, pfnHasPendingIrqR0,(PPDMDEVINS pDevIns));
499 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
500 DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, uint64_t u64Base));
501 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
502 DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns));
503 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
504 DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
505 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
506 DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
507 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
508 DECLR0CALLBACKMEMBER(uint32_t, pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
509 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
510 DECLR0CALLBACKMEMBER(uint32_t, pfnReadMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
511 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
512 DECLR0CALLBACKMEMBER(int, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
513 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
514 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
515 DECLR0CALLBACKMEMBER(int, pfnLocalInterruptR0,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
516
517 /** Pointer to the APIC device instance - RC Ptr. */
518 PPDMDEVINSRC pDevInsRC;
519 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
520 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
521 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
522 DECLRCCALLBACKMEMBER(bool, pfnHasPendingIrqRC,(PPDMDEVINS pDevIns));
523 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
524 DECLRCCALLBACKMEMBER(void, pfnSetBaseRC,(PPDMDEVINS pDevIns, uint64_t u64Base));
525 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
526 DECLRCCALLBACKMEMBER(uint64_t, pfnGetBaseRC,(PPDMDEVINS pDevIns));
527 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
528 DECLRCCALLBACKMEMBER(void, pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
529 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
530 DECLRCCALLBACKMEMBER(uint8_t, pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
531 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
532 DECLRCCALLBACKMEMBER(uint32_t, pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
533 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
534 DECLRCCALLBACKMEMBER(uint32_t, pfnReadMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
535 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
536 DECLRCCALLBACKMEMBER(int, pfnBusDeliverRC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
537 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
538 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
539 DECLRCCALLBACKMEMBER(int, pfnLocalInterruptRC,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
540 RTRCPTR RCPtrAlignment;
541
542} PDMAPIC;
543
544
545/**
546 * PDM registered I/O APIC device.
547 */
548typedef struct PDMIOAPIC
549{
550 /** Pointer to the APIC device instance - R3 Ptr. */
551 PPDMDEVINSR3 pDevInsR3;
552 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
553 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
554
555 /** Pointer to the PIC device instance - R0. */
556 PPDMDEVINSR0 pDevInsR0;
557 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
558 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
559
560 /** Pointer to the APIC device instance - RC Ptr. */
561 PPDMDEVINSRC pDevInsRC;
562 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
563 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
564} PDMIOAPIC;
565
566/** Maximum number of PCI busses for a VM. */
567#define PDM_PCI_BUSSES_MAX 8
568
569/**
570 * PDM PCI Bus instance.
571 */
572typedef struct PDMPCIBUS
573{
574 /** PCI bus number. */
575 RTUINT iBus;
576 RTUINT uPadding0; /**< Alignment padding.*/
577
578 /** Pointer to PCI Bus device instance. */
579 PPDMDEVINSR3 pDevInsR3;
580 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
581 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
582 /** @copydoc PDMPCIBUSREG::pfnRegisterR3 */
583 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
584 /** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */
585 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,
586 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
587 /** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */
588 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,
589 PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
590 /** @copydoc PDMPCIBUSREG::pfnSaveExecR3 */
591 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
592 /** @copydoc PDMPCIBUSREG::pfnLoadExecR3 */
593 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
594 /** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSR3 */
595 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
596
597 /** Pointer to the PIC device instance - R0. */
598 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
599 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
600 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
601
602 /** Pointer to PCI Bus device instance. */
603 PPDMDEVINSRC pDevInsRC;
604 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
605 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
606} PDMPCIBUS;
607
608
609#ifdef IN_RING3
610/**
611 * PDM registered DMAC (DMA Controller) device.
612 */
613typedef struct PDMDMAC
614{
615 /** Pointer to the DMAC device instance. */
616 PPDMDEVINSR3 pDevIns;
617 /** Copy of the registration structure. */
618 PDMDMACREG Reg;
619} PDMDMAC;
620
621
622/**
623 * PDM registered RTC (Real Time Clock) device.
624 */
625typedef struct PDMRTC
626{
627 /** Pointer to the RTC device instance. */
628 PPDMDEVINSR3 pDevIns;
629 /** Copy of the registration structure. */
630 PDMRTCREG Reg;
631} PDMRTC;
632
633#endif /* IN_RING3 */
634
635/**
636 * Module type.
637 */
638typedef enum PDMMODTYPE
639{
640 /** Raw-mode (RC) context module. */
641 PDMMOD_TYPE_RC,
642 /** Ring-0 (host) context module. */
643 PDMMOD_TYPE_R0,
644 /** Ring-3 (host) context module. */
645 PDMMOD_TYPE_R3
646} PDMMODTYPE;
647
648
649/** The module name length including the terminator. */
650#define PDMMOD_NAME_LEN 32
651
652/**
653 * Loaded module instance.
654 */
655typedef struct PDMMOD
656{
657 /** Module name. This is used for refering to
658 * the module internally, sort of like a handle. */
659 char szName[PDMMOD_NAME_LEN];
660 /** Module type. */
661 PDMMODTYPE eType;
662 /** Loader module handle. Not used for R0 modules. */
663 RTLDRMOD hLdrMod;
664 /** Loaded address.
665 * This is the 'handle' for R0 modules. */
666 RTUINTPTR ImageBase;
667 /** Old loaded address.
668 * This is used during relocation of GC modules. Not used for R0 modules. */
669 RTUINTPTR OldImageBase;
670 /** Where the R3 HC bits are stored.
671 * This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
672 void *pvBits;
673
674 /** Pointer to next module. */
675 struct PDMMOD *pNext;
676 /** Module filename. */
677 char szFilename[1];
678} PDMMOD;
679/** Pointer to loaded module instance. */
680typedef PDMMOD *PPDMMOD;
681
682
683
684/** Extra space in the free array. */
685#define PDMQUEUE_FREE_SLACK 16
686
687/**
688 * Queue type.
689 */
690typedef enum PDMQUEUETYPE
691{
692 /** Device consumer. */
693 PDMQUEUETYPE_DEV = 1,
694 /** Driver consumer. */
695 PDMQUEUETYPE_DRV,
696 /** Internal consumer. */
697 PDMQUEUETYPE_INTERNAL,
698 /** External consumer. */
699 PDMQUEUETYPE_EXTERNAL
700} PDMQUEUETYPE;
701
702/** Pointer to a PDM Queue. */
703typedef struct PDMQUEUE *PPDMQUEUE;
704
705/**
706 * PDM Queue.
707 */
708typedef struct PDMQUEUE
709{
710 /** Pointer to the next queue in the list. */
711 R3PTRTYPE(PPDMQUEUE) pNext;
712 /** Type specific data. */
713 union
714 {
715 /** PDMQUEUETYPE_DEV */
716 struct
717 {
718 /** Pointer to consumer function. */
719 R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
720 /** Pointer to the device instance owning the queue. */
721 R3PTRTYPE(PPDMDEVINS) pDevIns;
722 } Dev;
723 /** PDMQUEUETYPE_DRV */
724 struct
725 {
726 /** Pointer to consumer function. */
727 R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
728 /** Pointer to the driver instance owning the queue. */
729 R3PTRTYPE(PPDMDRVINS) pDrvIns;
730 } Drv;
731 /** PDMQUEUETYPE_INTERNAL */
732 struct
733 {
734 /** Pointer to consumer function. */
735 R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
736 } Int;
737 /** PDMQUEUETYPE_EXTERNAL */
738 struct
739 {
740 /** Pointer to consumer function. */
741 R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
742 /** Pointer to user argument. */
743 R3PTRTYPE(void *) pvUser;
744 } Ext;
745 } u;
746 /** Queue type. */
747 PDMQUEUETYPE enmType;
748 /** The interval between checking the queue for events.
749 * The realtime timer below is used to do the waiting.
750 * If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
751 uint32_t cMilliesInterval;
752 /** Interval timer. Only used if cMilliesInterval is non-zero. */
753 PTMTIMERR3 pTimer;
754 /** Pointer to the VM - R3. */
755 PVMR3 pVMR3;
756 /** LIFO of pending items - R3. */
757 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
758 /** Pointer to the VM - R0. */
759 PVMR0 pVMR0;
760 /** LIFO of pending items - R0. */
761 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
762 /** Pointer to the GC VM and indicator for GC enabled queue.
763 * If this is NULL, the queue cannot be used in GC.
764 */
765 PVMRC pVMRC;
766 /** LIFO of pending items - GC. */
767 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
768
769 /** Item size (bytes). */
770 uint32_t cbItem;
771 /** Number of items in the queue. */
772 uint32_t cItems;
773 /** Index to the free head (where we insert). */
774 uint32_t volatile iFreeHead;
775 /** Index to the free tail (where we remove). */
776 uint32_t volatile iFreeTail;
777
778 /** Unqiue queue name. */
779 R3PTRTYPE(const char *) pszName;
780#if HC_ARCH_BITS == 32
781 RTR3PTR Alignment1;
782#endif
783 /** Stat: Times PDMQueueAlloc fails. */
784 STAMCOUNTER StatAllocFailures;
785 /** Stat: PDMQueueInsert calls. */
786 STAMCOUNTER StatInsert;
787 /** Stat: Queue flushes. */
788 STAMCOUNTER StatFlush;
789 /** Stat: Queue flushes with pending items left over. */
790 STAMCOUNTER StatFlushLeftovers;
791#ifdef VBOX_WITH_STATISTICS
792 /** State: Profiling the flushing. */
793 STAMPROFILE StatFlushPrf;
794 /** State: Pending items. */
795 uint32_t volatile cStatPending;
796 uint32_t volatile cAlignment;
797#endif
798
799 /** Array of pointers to free items. Variable size. */
800 struct PDMQUEUEFREEITEM
801 {
802 /** Pointer to the free item - HC Ptr. */
803 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
804 /** Pointer to the free item - HC Ptr. */
805 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
806 /** Pointer to the free item - GC Ptr. */
807 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
808#if HC_ARCH_BITS == 64
809 RTRCPTR Alignment0;
810#endif
811 } aFreeItems[1];
812} PDMQUEUE;
813
814/** @name PDM::fQueueFlushing
815 * @{ */
816/** Indicating that an queue insert has been performed. */
817#define PDM_QUEUE_FLUSH_FLAG_ACTIVE RT_BIT_32(PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT)
818/** The bit number for PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT. */
819#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
820/** Indicating there are pending items.
821 * This is make sure we don't miss inserts happening during flushing. The FF
822 * cannot be used for this since it has to be cleared immediately to prevent
823 * other EMTs from spinning. */
824#define PDM_QUEUE_FLUSH_FLAG_PENDING RT_BIT_32(PDM_QUEUE_FLUSH_FLAG_PENDING_BIT)
825/** The bit number for PDM_QUEUE_FLUSH_FLAG_PENDING. */
826#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
827/** }@ */
828
829
830/**
831 * Queue device helper task operation.
832 */
833typedef enum PDMDEVHLPTASKOP
834{
835 /** The usual invalid 0 entry. */
836 PDMDEVHLPTASKOP_INVALID = 0,
837 /** ISASetIrq */
838 PDMDEVHLPTASKOP_ISA_SET_IRQ,
839 /** PCISetIrq */
840 PDMDEVHLPTASKOP_PCI_SET_IRQ,
841 /** PCISetIrq */
842 PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
843 /** The usual 32-bit hack. */
844 PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
845} PDMDEVHLPTASKOP;
846
847/**
848 * Queued Device Helper Task.
849 */
850typedef struct PDMDEVHLPTASK
851{
852 /** The queue item core (don't touch). */
853 PDMQUEUEITEMCORE Core;
854 /** Pointer to the device instance (R3 Ptr). */
855 PPDMDEVINSR3 pDevInsR3;
856 /** This operation to perform. */
857 PDMDEVHLPTASKOP enmOp;
858#if HC_ARCH_BITS == 64
859 uint32_t Alignment0;
860#endif
861 /** Parameters to the operation. */
862 union PDMDEVHLPTASKPARAMS
863 {
864 /**
865 * PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_PCI_SET_IRQ.
866 */
867 struct PDMDEVHLPTASKSETIRQ
868 {
869 /** The IRQ */
870 int iIrq;
871 /** The new level. */
872 int iLevel;
873 } SetIRQ;
874 } u;
875} PDMDEVHLPTASK;
876/** Pointer to a queued Device Helper Task. */
877typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
878/** Pointer to a const queued Device Helper Task. */
879typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
880
881
882
883/**
884 * An USB hub registration record.
885 */
886typedef struct PDMUSBHUB
887{
888 /** The USB versions this hub support.
889 * Note that 1.1 hubs can take on 2.0 devices. */
890 uint32_t fVersions;
891 /** The number of ports on the hub. */
892 uint32_t cPorts;
893 /** The number of available ports (0..cPorts). */
894 uint32_t cAvailablePorts;
895 /** The driver instance of the hub. */
896 PPDMDRVINS pDrvIns;
897 /** Copy of the to the registration structure. */
898 PDMUSBHUBREG Reg;
899
900 /** Pointer to the next hub in the list. */
901 struct PDMUSBHUB *pNext;
902} PDMUSBHUB;
903
904/** Pointer to a const USB HUB registration record. */
905typedef const PDMUSBHUB *PCPDMUSBHUB;
906
907/** Pointer to a PDM Async I/O template. */
908typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
909
910/** Pointer to the main PDM Async completion endpoint class. */
911typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
912
913
914/**
915 * PDM VMCPU Instance data.
916 * Changes to this must checked against the padding of the cfgm union in VMCPU!
917 */
918typedef struct PDMCPU
919{
920 /** The number of entries in the apQueuedCritSectsLeaves table that's currnetly in use. */
921 uint32_t cQueuedCritSectLeaves;
922 uint32_t uPadding0; /**< Alignment padding.*/
923 /** Critical sections queued in RC/R0 because of contention preventing leave to complete. (R3 Ptrs)
924 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
925 R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];
926} PDMCPU;
927
928/**
929 * Converts a PDM pointer into a VM pointer.
930 * @returns Pointer to the VM structure the PDM is part of.
931 * @param pPDM Pointer to PDM instance data.
932 */
933#define PDM2VM(pPDM) ( (PVM)((char*)pPDM - pPDM->offVM) )
934
935
936/**
937 * PDM VM Instance data.
938 * Changes to this must checked against the padding of the cfgm union in VM!
939 */
940typedef struct PDM
941{
942 /** Offset to the VM structure.
943 * See PDM2VM(). */
944 RTUINT offVM;
945 RTUINT uPadding0; /**< Alignment padding.*/
946
947 /** List of registered devices. (FIFO) */
948 R3PTRTYPE(PPDMDEV) pDevs;
949 /** List of devices instances. (FIFO) */
950 R3PTRTYPE(PPDMDEVINS) pDevInstances;
951 /** List of registered USB devices. (FIFO) */
952 R3PTRTYPE(PPDMUSB) pUsbDevs;
953 /** List of USB devices instances. (FIFO) */
954 R3PTRTYPE(PPDMUSBINS) pUsbInstances;
955 /** List of registered drivers. (FIFO) */
956 R3PTRTYPE(PPDMDRV) pDrvs;
957 /** PCI Buses. */
958 PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
959 /** The register PIC device. */
960 PDMPIC Pic;
961 /** The registerd APIC device. */
962 PDMAPIC Apic;
963 /** The registerd I/O APIC device. */
964 PDMIOAPIC IoApic;
965 /** The registered DMAC device. */
966 R3PTRTYPE(PPDMDMAC) pDmac;
967 /** The registered RTC device. */
968 R3PTRTYPE(PPDMRTC) pRtc;
969 /** The registered USB HUBs. (FIFO) */
970 R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
971
972 /** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
973 R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
974 /** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
975 R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
976 /** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
977 RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
978 /** Pointer to the queue which should be manually flushed - RC Ptr.
979 * Only touched by EMT. */
980 RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
981 /** Pointer to the queue which should be manually flushed - R0 Ptr.
982 * Only touched by EMT. */
983 R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
984 /** Bitmask controlling the queue flushing.
985 * See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
986 uint32_t volatile fQueueFlushing;
987 /** Alignment padding. */
988 uint32_t u32Padding2;
989
990 /** @name VMM device heap
991 * @{ */
992 /** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
993 RTR3PTR pvVMMDevHeap;
994 /** The heap size. */
995 uint32_t cbVMMDevHeap;
996 /** Free space. */
997 uint32_t cbVMMDevHeapLeft;
998 /** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
999 RTGCPHYS GCPhysVMMDevHeap;
1000 /** @} */
1001
1002 /** The PDM lock.
1003 * This is used to protect everything that deals with interrupts, i.e.
1004 * the PIC, APIC, IOAPIC and PCI devices pluss some PDM functions. */
1005 PDMCRITSECT CritSect;
1006
1007 /** Number of times a critical section leave requesed needed to be queued for ring-3 execution. */
1008 STAMCOUNTER StatQueuedCritSectLeaves;
1009} PDM;
1010AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1011AssertCompileMemberAlignment(PDM, CritSect, 8);
1012AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1013/** Pointer to PDM VM instance data. */
1014typedef PDM *PPDM;
1015
1016
1017
1018/**
1019 * PDM data kept in the UVM.
1020 */
1021typedef struct PDMUSERPERVM
1022{
1023 /** @todo move more stuff over here. */
1024
1025 /** Linked list of timer driven PDM queues.
1026 * Currently serialized by PDM::CritSect. */
1027 R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
1028 /** Linked list of force action driven PDM queues.
1029 * Currently serialized by PDM::CritSect. */
1030 R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
1031
1032 /** Lock protecting the lists below it. */
1033 RTCRITSECT ListCritSect;
1034 /** Pointer to list of loaded modules. */
1035 PPDMMOD pModules;
1036 /** List of initialized critical sections. (LIFO) */
1037 R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
1038 /** Head of the PDM Thread list. (singly linked) */
1039 R3PTRTYPE(PPDMTHREAD) pThreads;
1040 /** Tail of the PDM Thread list. (singly linked) */
1041 R3PTRTYPE(PPDMTHREAD) pThreadsTail;
1042
1043 /** @name PDM Async Completion
1044 * @{ */
1045 /** Pointer to the array of supported endpoint classes. */
1046 PPDMASYNCCOMPLETIONEPCLASS apAsyncCompletionEndpointClass[PDMASYNCCOMPLETIONEPCLASSTYPE_MAX];
1047 /** Head of the templates. Singly linked, protected by ListCritSect. */
1048 R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
1049 /** @} */
1050
1051} PDMUSERPERVM;
1052/** Pointer to the PDM data kept in the UVM. */
1053typedef PDMUSERPERVM *PPDMUSERPERVM;
1054
1055
1056
1057/*******************************************************************************
1058* Global Variables *
1059*******************************************************************************/
1060#ifdef IN_RING3
1061extern const PDMDRVHLPR3 g_pdmR3DrvHlp;
1062extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1063extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1064extern const PDMPICHLPR3 g_pdmR3DevPicHlp;
1065extern const PDMAPICHLPR3 g_pdmR3DevApicHlp;
1066extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;
1067extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1068extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1069extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1070extern const PDMHPETHLPR3 g_pdmR3DevHpetHlp;
1071#endif
1072
1073
1074/*******************************************************************************
1075* Defined Constants And Macros *
1076*******************************************************************************/
1077/** @def PDMDEV_ASSERT_DEVINS
1078 * Asserts the validity of the device instance.
1079 */
1080#ifdef VBOX_STRICT
1081# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1082 do { \
1083 AssertPtr(pDevIns); \
1084 Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1085 Assert(pDevIns->CTX_SUFF(pvInstanceData) == (void *)&pDevIns->achInstanceData[0]); \
1086 } while (0)
1087#else
1088# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1089#endif
1090
1091/** @def PDMDRV_ASSERT_DRVINS
1092 * Asserts the validity of the driver instance.
1093 */
1094#ifdef VBOX_STRICT
1095# define PDMDRV_ASSERT_DRVINS(pDrvIns) \
1096 do { \
1097 AssertPtr(pDrvIns); \
1098 Assert(pDrvIns->u32Version == PDM_DRVINS_VERSION); \
1099 Assert(pDrvIns->CTX_SUFF(pvInstanceData) == (void *)&pDrvIns->achInstanceData[0]); \
1100 } while (0)
1101#else
1102# define PDMDRV_ASSERT_DRVINS(pDrvIns) do { } while (0)
1103#endif
1104
1105
1106/*******************************************************************************
1107* Internal Functions *
1108*******************************************************************************/
1109#ifdef IN_RING3
1110int pdmR3CritSectInitStats(PVM pVM);
1111void pdmR3CritSectRelocate(PVM pVM);
1112int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, va_list va);
1113int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1114int pdmR3CritSectInitDriver(PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...);
1115int pdmR3CritSectDeleteDriver(PVM pVM, PPDMDRVINS pDrvIns);
1116
1117int pdmR3DevInit(PVM pVM);
1118PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1119int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1120DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1121
1122int pdmR3UsbLoadModules(PVM pVM);
1123int pdmR3UsbInstantiateDevices(PVM pVM);
1124PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1125int pdmR3UsbFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1126int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1127int pdmR3UsbVMInitComplete(PVM pVM);
1128
1129int pdmR3DrvInit(PVM pVM);
1130int pdmR3DrvInstantiate(PVM pVM, PCFGMNODE pNode, PPDMIBASE pBaseInterface, PPDMDRVINS pDrvAbove,
1131 PPDMLUN pLun, PPDMIBASE *ppBaseInterface);
1132int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1133void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1134PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1135
1136int pdmR3LdrInitU(PUVM pUVM);
1137void pdmR3LdrTermU(PUVM pUVM);
1138char * pdmR3FileR3(const char *pszFile, bool fShared = false);
1139int pdmR3LoadR3U(PUVM pUVM, const char *pszFilename, const char *pszName);
1140
1141void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1142
1143int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1144 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1145int pdmR3ThreadCreateUsb(PVM pVM, PPDMDRVINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1146 PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1147int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1148 PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1149int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1150int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1151int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1152void pdmR3ThreadDestroyAll(PVM pVM);
1153int pdmR3ThreadResumeAll(PVM pVM);
1154int pdmR3ThreadSuspendAll(PVM pVM);
1155
1156#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1157int pdmR3AsyncCompletionInit(PVM pVM);
1158int pdmR3AsyncCompletionTerm(PVM pVM);
1159#endif
1160
1161#endif /* IN_RING3 */
1162
1163void pdmLock(PVM pVM);
1164int pdmLockEx(PVM pVM, int rc);
1165void pdmUnlock(PVM pVM);
1166
1167/** @} */
1168
1169RT_C_DECLS_END
1170
1171#endif
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