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source: vbox/trunk/src/VBox/VMM/PDMInternal.h@ 29349

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1/* $Id: PDMInternal.h 28800 2010-04-27 08:22:32Z vboxsync $ */
2/** @file
3 * PDM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef ___PDMInternal_h
19#define ___PDMInternal_h
20
21#include <VBox/types.h>
22#include <VBox/param.h>
23#include <VBox/cfgm.h>
24#include <VBox/stam.h>
25#include <VBox/vusb.h>
26#include <VBox/pdmasynccompletion.h>
27#include <VBox/pdmcommon.h>
28#include <iprt/assert.h>
29#include <iprt/critsect.h>
30#ifdef IN_RING3
31# include <iprt/thread.h>
32#endif
33
34RT_C_DECLS_BEGIN
35
36
37/** @defgroup grp_pdm_int Internal
38 * @ingroup grp_pdm
39 * @internal
40 * @{
41 */
42
43/** @def PDM_WITH_R3R0_CRIT_SECT
44 * Enables or disabled ring-3/ring-0 critical sections. */
45#if defined(DOXYGEN_RUNNING) || 1
46# define PDM_WITH_R3R0_CRIT_SECT
47#endif
48
49/** @def PDMCRITSECT_STRICT
50 * Enables/disables PDM critsect strictness like deadlock detection. */
51#if (defined(RT_LOCK_STRICT) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
52# define PDMCRITSECT_STRICT
53#endif
54
55
56/*******************************************************************************
57* Structures and Typedefs *
58*******************************************************************************/
59
60/** Pointer to a PDM Device. */
61typedef struct PDMDEV *PPDMDEV;
62/** Pointer to a pointer to a PDM Device. */
63typedef PPDMDEV *PPPDMDEV;
64
65/** Pointer to a PDM USB Device. */
66typedef struct PDMUSB *PPDMUSB;
67/** Pointer to a pointer to a PDM USB Device. */
68typedef PPDMUSB *PPPDMUSB;
69
70/** Pointer to a PDM Driver. */
71typedef struct PDMDRV *PPDMDRV;
72/** Pointer to a pointer to a PDM Driver. */
73typedef PPDMDRV *PPPDMDRV;
74
75/** Pointer to a PDM Logical Unit. */
76typedef struct PDMLUN *PPDMLUN;
77/** Pointer to a pointer to a PDM Logical Unit. */
78typedef PPDMLUN *PPPDMLUN;
79
80/** Pointer to a PDM PCI Bus instance. */
81typedef struct PDMPCIBUS *PPDMPCIBUS;
82/** Pointer to a DMAC instance. */
83typedef struct PDMDMAC *PPDMDMAC;
84/** Pointer to a RTC instance. */
85typedef struct PDMRTC *PPDMRTC;
86
87/** Pointer to an USB HUB registration record. */
88typedef struct PDMUSBHUB *PPDMUSBHUB;
89
90/**
91 * Supported asynchronous completion endpoint classes.
92 */
93typedef enum PDMASYNCCOMPLETIONEPCLASSTYPE
94{
95 /** File class. */
96 PDMASYNCCOMPLETIONEPCLASSTYPE_FILE = 0,
97 /** Number of supported classes. */
98 PDMASYNCCOMPLETIONEPCLASSTYPE_MAX,
99 /** 32bit hack. */
100 PDMASYNCCOMPLETIONEPCLASSTYPE_32BIT_HACK = 0x7fffffff
101} PDMASYNCCOMPLETIONEPCLASSTYPE;
102
103/**
104 * Private device instance data.
105 */
106typedef struct PDMDEVINSINT
107{
108 /** Pointer to the next instance (HC Ptr).
109 * (Head is pointed to by PDM::pDevInstances.) */
110 R3PTRTYPE(PPDMDEVINS) pNextR3;
111 /** Pointer to the next per device instance (HC Ptr).
112 * (Head is pointed to by PDMDEV::pInstances.) */
113 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
114 /** Pointer to device structure - HC Ptr. */
115 R3PTRTYPE(PPDMDEV) pDevR3;
116 /** Pointer to the list of logical units associated with the device. (FIFO) */
117 R3PTRTYPE(PPDMLUN) pLunsR3;
118 /** Pointer to the asynchronous notification callback set while in
119 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
120 R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
121 /** Configuration handle to the instance node. */
122 R3PTRTYPE(PCFGMNODE) pCfgHandle;
123
124 /** R3 pointer to the VM this instance was created for. */
125 PVMR3 pVMR3;
126 /** R3 pointer to associated PCI device structure. */
127 R3PTRTYPE(struct PCIDevice *) pPciDeviceR3;
128 /** R3 pointer to associated PCI bus structure. */
129 R3PTRTYPE(PPDMPCIBUS) pPciBusR3;
130
131 /** R0 pointer to the VM this instance was created for. */
132 PVMR0 pVMR0;
133 /** R0 pointer to associated PCI device structure. */
134 R0PTRTYPE(struct PCIDevice *) pPciDeviceR0;
135 /** R0 pointer to associated PCI bus structure. */
136 R0PTRTYPE(PPDMPCIBUS) pPciBusR0;
137
138 /** RC pointer to the VM this instance was created for. */
139 PVMRC pVMRC;
140 /** RC pointer to associated PCI device structure. */
141 RCPTRTYPE(struct PCIDevice *) pPciDeviceRC;
142 /** RC pointer to associated PCI bus structure. */
143 RCPTRTYPE(PPDMPCIBUS) pPciBusRC;
144
145 /** Flags, see PDMDEVINSINT_FLAGS_XXX. */
146 uint32_t fIntFlags;
147} PDMDEVINSINT;
148
149/** @name PDMDEVINSINT::fIntFlags
150 * @{ */
151/** Used by pdmR3Load to mark device instances it found in the saved state. */
152#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
153/** Indicates that the device hasn't been powered on or resumed.
154 * This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
155 * to make sure each device gets exactly one notification for each of those
156 * events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
157 * a failure (already resumed/powered-on devices are suspended). */
158#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
159/** Indicates that the device has been reset already. Used by PDMR3Reset. */
160#define PDMDEVINSINT_FLAGS_RESET RT_BIT_32(2)
161/** @} */
162
163
164/**
165 * Private USB device instance data.
166 */
167typedef struct PDMUSBINSINT
168{
169 /** The UUID of this instance. */
170 RTUUID Uuid;
171 /** Pointer to the next instance.
172 * (Head is pointed to by PDM::pUsbInstances.) */
173 R3PTRTYPE(PPDMUSBINS) pNext;
174 /** Pointer to the next per USB device instance.
175 * (Head is pointed to by PDMUSB::pInstances.) */
176 R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
177
178 /** Pointer to device structure. */
179 R3PTRTYPE(PPDMUSB) pUsbDev;
180
181 /** Pointer to the VM this instance was created for. */
182 PVMR3 pVM;
183 /** Pointer to the list of logical units associated with the device. (FIFO) */
184 R3PTRTYPE(PPDMLUN) pLuns;
185 /** The per instance device configuration. */
186 R3PTRTYPE(PCFGMNODE) pCfg;
187 /** Same as pCfg if the configuration should be deleted when detaching the device. */
188 R3PTRTYPE(PCFGMNODE) pCfgDelete;
189 /** The global device configuration. */
190 R3PTRTYPE(PCFGMNODE) pCfgGlobal;
191
192 /** Pointer to the USB hub this device is attached to.
193 * This is NULL if the device isn't connected to any HUB. */
194 R3PTRTYPE(PPDMUSBHUB) pHub;
195 /** The port number that we're connected to. */
196 uint32_t iPort;
197 /** Indicates that the USB device hasn't been powered on or resumed.
198 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
199 bool fVMSuspended;
200 /** Indicates that the USB device has been reset. */
201 bool fVMReset;
202 /** Pointer to the asynchronous notification callback set while in
203 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
204 R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
205} PDMUSBINSINT;
206
207
208/**
209 * Private driver instance data.
210 */
211typedef struct PDMDRVINSINT
212{
213 /** Pointer to the driver instance above.
214 * This is NULL for the topmost drive. */
215 R3PTRTYPE(PPDMDRVINS) pUp;
216 /** Pointer to the driver instance below.
217 * This is NULL for the bottommost driver. */
218 R3PTRTYPE(PPDMDRVINS) pDown;
219 /** Pointer to the logical unit this driver chained on. */
220 R3PTRTYPE(PPDMLUN) pLun;
221 /** Pointer to driver structure from which this was instantiated. */
222 R3PTRTYPE(PPDMDRV) pDrv;
223 /** Pointer to the VM this instance was created for, ring-3 context. */
224 PVMR3 pVMR3;
225 /** Pointer to the VM this instance was created for, ring-0 context. */
226 PVMR0 pVMR0;
227 /** Pointer to the VM this instance was created for, raw-mode context. */
228 PVMRC pVMRC;
229 /** Flag indicating that the driver is being detached and destroyed.
230 * (Helps detect potential recursive detaching.) */
231 bool fDetaching;
232 /** Indicates that the driver hasn't been powered on or resumed.
233 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
234 bool fVMSuspended;
235 /** Indicates that the driver has been reset already. */
236 bool fVMReset;
237 /** Set if allocated on the hyper heap, false if on the ring-3 heap. */
238 bool fHyperHeap;
239 /** Pointer to the asynchronous notification callback set while in
240 * PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
241 R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
242 /** Configuration handle to the instance node. */
243 R3PTRTYPE(PCFGMNODE) pCfgHandle;
244 /** Pointer to the ring-0 request handler function. */
245 PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
246} PDMDRVINSINT;
247
248
249/**
250 * Private critical section data.
251 */
252typedef struct PDMCRITSECTINT
253{
254 /** The critical section core which is shared with IPRT. */
255 RTCRITSECT Core;
256 /** Pointer to the next critical section.
257 * This chain is used for relocating pVMRC and device cleanup. */
258 R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
259 /** Owner identifier.
260 * This is pDevIns if the owner is a device. Similarily for a driver or service.
261 * PDMR3CritSectInit() sets this to point to the critsect itself. */
262 RTR3PTR pvKey;
263 /** Pointer to the VM - R3Ptr. */
264 PVMR3 pVMR3;
265 /** Pointer to the VM - R0Ptr. */
266 PVMR0 pVMR0;
267 /** Pointer to the VM - GCPtr. */
268 PVMRC pVMRC;
269 /** Alignment padding. */
270 uint32_t padding;
271 /** Event semaphore that is scheduled to be signaled upon leaving the
272 * critical section. This is Ring-3 only of course. */
273 RTSEMEVENT EventToSignal;
274 /** The lock name. */
275 R3PTRTYPE(const char *) pszName;
276 /** R0/RC lock contention. */
277 STAMCOUNTER StatContentionRZLock;
278 /** R0/RC unlock contention. */
279 STAMCOUNTER StatContentionRZUnlock;
280 /** R3 lock contention. */
281 STAMCOUNTER StatContentionR3;
282 /** Profiling the time the section is locked. */
283 STAMPROFILEADV StatLocked;
284} PDMCRITSECTINT;
285AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
286/** Pointer to private critical section data. */
287typedef PDMCRITSECTINT *PPDMCRITSECTINT;
288
289/** Indicates that the critical section is queued for unlock.
290 * PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
291#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
292
293
294/**
295 * The usual device/driver/internal/external stuff.
296 */
297typedef enum
298{
299 /** The usual invalid entry. */
300 PDMTHREADTYPE_INVALID = 0,
301 /** Device type. */
302 PDMTHREADTYPE_DEVICE,
303 /** USB Device type. */
304 PDMTHREADTYPE_USB,
305 /** Driver type. */
306 PDMTHREADTYPE_DRIVER,
307 /** Internal type. */
308 PDMTHREADTYPE_INTERNAL,
309 /** External type. */
310 PDMTHREADTYPE_EXTERNAL,
311 /** The usual 32-bit hack. */
312 PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
313} PDMTHREADTYPE;
314
315
316/**
317 * The internal structure for the thread.
318 */
319typedef struct PDMTHREADINT
320{
321 /** The VM pointer. */
322 PVMR3 pVM;
323 /** The event semaphore the thread blocks on when not running. */
324 RTSEMEVENTMULTI BlockEvent;
325 /** The event semaphore the thread sleeps on while running. */
326 RTSEMEVENTMULTI SleepEvent;
327 /** Pointer to the next thread. */
328 R3PTRTYPE(struct PDMTHREAD *) pNext;
329 /** The thread type. */
330 PDMTHREADTYPE enmType;
331} PDMTHREADINT;
332
333
334
335/* Must be included after PDMDEVINSINT is defined. */
336#define PDMDEVINSINT_DECLARED
337#define PDMUSBINSINT_DECLARED
338#define PDMDRVINSINT_DECLARED
339#define PDMCRITSECTINT_DECLARED
340#define PDMTHREADINT_DECLARED
341#ifdef ___VBox_pdm_h
342# error "Invalid header PDM order. Include PDMInternal.h before VBox/pdm.h!"
343#endif
344RT_C_DECLS_END
345#include <VBox/pdm.h>
346RT_C_DECLS_BEGIN
347
348/**
349 * PDM Logical Unit.
350 *
351 * This typically the representation of a physical port on a
352 * device, like for instance the PS/2 keyboard port on the
353 * keyboard controller device. The LUNs are chained on the
354 * device the belong to (PDMDEVINSINT::pLunsR3).
355 */
356typedef struct PDMLUN
357{
358 /** The LUN - The Logical Unit Number. */
359 RTUINT iLun;
360 /** Pointer to the next LUN. */
361 PPDMLUN pNext;
362 /** Pointer to the top driver in the driver chain. */
363 PPDMDRVINS pTop;
364 /** Pointer to the bottom driver in the driver chain. */
365 PPDMDRVINS pBottom;
366 /** Pointer to the device instance which the LUN belongs to.
367 * Either this is set or pUsbIns is set. Both is never set at the same time. */
368 PPDMDEVINS pDevIns;
369 /** Pointer to the USB device instance which the LUN belongs to. */
370 PPDMUSBINS pUsbIns;
371 /** Pointer to the device base interface. */
372 PPDMIBASE pBase;
373 /** Description of this LUN. */
374 const char *pszDesc;
375} PDMLUN;
376
377
378/**
379 * PDM Device.
380 */
381typedef struct PDMDEV
382{
383 /** Pointer to the next device (R3 Ptr). */
384 R3PTRTYPE(PPDMDEV) pNext;
385 /** Device name length. (search optimization) */
386 RTUINT cchName;
387 /** Registration structure. */
388 R3PTRTYPE(const struct PDMDEVREG *) pReg;
389 /** Number of instances. */
390 uint32_t cInstances;
391 /** Pointer to chain of instances (R3 Ptr). */
392 PPDMDEVINSR3 pInstances;
393} PDMDEV;
394
395
396/**
397 * PDM USB Device.
398 */
399typedef struct PDMUSB
400{
401 /** Pointer to the next device (R3 Ptr). */
402 R3PTRTYPE(PPDMUSB) pNext;
403 /** Device name length. (search optimization) */
404 RTUINT cchName;
405 /** Registration structure. */
406 R3PTRTYPE(const struct PDMUSBREG *) pReg;
407 /** Next instance number. */
408 uint32_t iNextInstance;
409 /** Pointer to chain of instances (R3 Ptr). */
410 R3PTRTYPE(PPDMUSBINS) pInstances;
411} PDMUSB;
412
413
414/**
415 * PDM Driver.
416 */
417typedef struct PDMDRV
418{
419 /** Pointer to the next device. */
420 PPDMDRV pNext;
421 /** Registration structure. */
422 const struct PDMDRVREG * pReg;
423 /** Current number of instances. */
424 uint32_t cInstances;
425 /** The next instance number. */
426 uint32_t iNextInstance;
427} PDMDRV;
428
429
430/**
431 * PDM registered PIC device.
432 */
433typedef struct PDMPIC
434{
435 /** Pointer to the PIC device instance - R3. */
436 PPDMDEVINSR3 pDevInsR3;
437 /** @copydoc PDMPICREG::pfnSetIrqR3 */
438 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
439 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
440 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
441
442 /** Pointer to the PIC device instance - R0. */
443 PPDMDEVINSR0 pDevInsR0;
444 /** @copydoc PDMPICREG::pfnSetIrqR3 */
445 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
446 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
447 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
448
449 /** Pointer to the PIC device instance - RC. */
450 PPDMDEVINSRC pDevInsRC;
451 /** @copydoc PDMPICREG::pfnSetIrqR3 */
452 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
453 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
454 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
455 /** Alignment padding. */
456 RTRCPTR RCPtrPadding;
457} PDMPIC;
458
459
460/**
461 * PDM registered APIC device.
462 */
463typedef struct PDMAPIC
464{
465 /** Pointer to the APIC device instance - R3 Ptr. */
466 PPDMDEVINSR3 pDevInsR3;
467 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
468 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
469 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
470 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
471 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
472 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
473 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
474 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
475 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
476 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
477 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
478 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
479 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
480 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
481 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
482 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
483 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
484 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
485 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
486 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
487 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
488
489 /** Pointer to the APIC device instance - R0 Ptr. */
490 PPDMDEVINSR0 pDevInsR0;
491 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
492 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
493 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
494 DECLR0CALLBACKMEMBER(bool, pfnHasPendingIrqR0,(PPDMDEVINS pDevIns));
495 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
496 DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, uint64_t u64Base));
497 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
498 DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns));
499 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
500 DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
501 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
502 DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
503 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
504 DECLR0CALLBACKMEMBER(uint32_t, pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
505 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
506 DECLR0CALLBACKMEMBER(uint32_t, pfnReadMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
507 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
508 DECLR0CALLBACKMEMBER(int, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
509 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
510 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
511 DECLR0CALLBACKMEMBER(int, pfnLocalInterruptR0,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
512
513 /** Pointer to the APIC device instance - RC Ptr. */
514 PPDMDEVINSRC pDevInsRC;
515 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
516 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
517 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
518 DECLRCCALLBACKMEMBER(bool, pfnHasPendingIrqRC,(PPDMDEVINS pDevIns));
519 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
520 DECLRCCALLBACKMEMBER(void, pfnSetBaseRC,(PPDMDEVINS pDevIns, uint64_t u64Base));
521 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
522 DECLRCCALLBACKMEMBER(uint64_t, pfnGetBaseRC,(PPDMDEVINS pDevIns));
523 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
524 DECLRCCALLBACKMEMBER(void, pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
525 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
526 DECLRCCALLBACKMEMBER(uint8_t, pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
527 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
528 DECLRCCALLBACKMEMBER(uint32_t, pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
529 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
530 DECLRCCALLBACKMEMBER(uint32_t, pfnReadMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
531 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
532 DECLRCCALLBACKMEMBER(int, pfnBusDeliverRC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
533 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
534 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
535 DECLRCCALLBACKMEMBER(int, pfnLocalInterruptRC,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
536 RTRCPTR RCPtrAlignment;
537
538} PDMAPIC;
539
540
541/**
542 * PDM registered I/O APIC device.
543 */
544typedef struct PDMIOAPIC
545{
546 /** Pointer to the APIC device instance - R3 Ptr. */
547 PPDMDEVINSR3 pDevInsR3;
548 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
549 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
550
551 /** Pointer to the PIC device instance - R0. */
552 PPDMDEVINSR0 pDevInsR0;
553 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
554 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
555
556 /** Pointer to the APIC device instance - RC Ptr. */
557 PPDMDEVINSRC pDevInsRC;
558 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
559 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
560} PDMIOAPIC;
561
562/** Maximum number of PCI busses for a VM. */
563#define PDM_PCI_BUSSES_MAX 8
564
565/**
566 * PDM PCI Bus instance.
567 */
568typedef struct PDMPCIBUS
569{
570 /** PCI bus number. */
571 RTUINT iBus;
572 RTUINT uPadding0; /**< Alignment padding.*/
573
574 /** Pointer to PCI Bus device instance. */
575 PPDMDEVINSR3 pDevInsR3;
576 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
577 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
578 /** @copydoc PDMPCIBUSREG::pfnRegisterR3 */
579 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
580 /** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */
581 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,
582 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
583 /** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */
584 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,
585 PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
586 /** @copydoc PDMPCIBUSREG::pfnSaveExecR3 */
587 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
588 /** @copydoc PDMPCIBUSREG::pfnLoadExecR3 */
589 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
590 /** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSR3 */
591 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
592
593 /** Pointer to the PIC device instance - R0. */
594 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
595 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
596 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
597
598 /** Pointer to PCI Bus device instance. */
599 PPDMDEVINSRC pDevInsRC;
600 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
601 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
602} PDMPCIBUS;
603
604
605#ifdef IN_RING3
606/**
607 * PDM registered DMAC (DMA Controller) device.
608 */
609typedef struct PDMDMAC
610{
611 /** Pointer to the DMAC device instance. */
612 PPDMDEVINSR3 pDevIns;
613 /** Copy of the registration structure. */
614 PDMDMACREG Reg;
615} PDMDMAC;
616
617
618/**
619 * PDM registered RTC (Real Time Clock) device.
620 */
621typedef struct PDMRTC
622{
623 /** Pointer to the RTC device instance. */
624 PPDMDEVINSR3 pDevIns;
625 /** Copy of the registration structure. */
626 PDMRTCREG Reg;
627} PDMRTC;
628
629#endif /* IN_RING3 */
630
631/**
632 * Module type.
633 */
634typedef enum PDMMODTYPE
635{
636 /** Raw-mode (RC) context module. */
637 PDMMOD_TYPE_RC,
638 /** Ring-0 (host) context module. */
639 PDMMOD_TYPE_R0,
640 /** Ring-3 (host) context module. */
641 PDMMOD_TYPE_R3
642} PDMMODTYPE;
643
644
645/** The module name length including the terminator. */
646#define PDMMOD_NAME_LEN 32
647
648/**
649 * Loaded module instance.
650 */
651typedef struct PDMMOD
652{
653 /** Module name. This is used for refering to
654 * the module internally, sort of like a handle. */
655 char szName[PDMMOD_NAME_LEN];
656 /** Module type. */
657 PDMMODTYPE eType;
658 /** Loader module handle. Not used for R0 modules. */
659 RTLDRMOD hLdrMod;
660 /** Loaded address.
661 * This is the 'handle' for R0 modules. */
662 RTUINTPTR ImageBase;
663 /** Old loaded address.
664 * This is used during relocation of GC modules. Not used for R0 modules. */
665 RTUINTPTR OldImageBase;
666 /** Where the R3 HC bits are stored.
667 * This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
668 void *pvBits;
669
670 /** Pointer to next module. */
671 struct PDMMOD *pNext;
672 /** Module filename. */
673 char szFilename[1];
674} PDMMOD;
675/** Pointer to loaded module instance. */
676typedef PDMMOD *PPDMMOD;
677
678
679
680/** Extra space in the free array. */
681#define PDMQUEUE_FREE_SLACK 16
682
683/**
684 * Queue type.
685 */
686typedef enum PDMQUEUETYPE
687{
688 /** Device consumer. */
689 PDMQUEUETYPE_DEV = 1,
690 /** Driver consumer. */
691 PDMQUEUETYPE_DRV,
692 /** Internal consumer. */
693 PDMQUEUETYPE_INTERNAL,
694 /** External consumer. */
695 PDMQUEUETYPE_EXTERNAL
696} PDMQUEUETYPE;
697
698/** Pointer to a PDM Queue. */
699typedef struct PDMQUEUE *PPDMQUEUE;
700
701/**
702 * PDM Queue.
703 */
704typedef struct PDMQUEUE
705{
706 /** Pointer to the next queue in the list. */
707 R3PTRTYPE(PPDMQUEUE) pNext;
708 /** Type specific data. */
709 union
710 {
711 /** PDMQUEUETYPE_DEV */
712 struct
713 {
714 /** Pointer to consumer function. */
715 R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
716 /** Pointer to the device instance owning the queue. */
717 R3PTRTYPE(PPDMDEVINS) pDevIns;
718 } Dev;
719 /** PDMQUEUETYPE_DRV */
720 struct
721 {
722 /** Pointer to consumer function. */
723 R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
724 /** Pointer to the driver instance owning the queue. */
725 R3PTRTYPE(PPDMDRVINS) pDrvIns;
726 } Drv;
727 /** PDMQUEUETYPE_INTERNAL */
728 struct
729 {
730 /** Pointer to consumer function. */
731 R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
732 } Int;
733 /** PDMQUEUETYPE_EXTERNAL */
734 struct
735 {
736 /** Pointer to consumer function. */
737 R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
738 /** Pointer to user argument. */
739 R3PTRTYPE(void *) pvUser;
740 } Ext;
741 } u;
742 /** Queue type. */
743 PDMQUEUETYPE enmType;
744 /** The interval between checking the queue for events.
745 * The realtime timer below is used to do the waiting.
746 * If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
747 uint32_t cMilliesInterval;
748 /** Interval timer. Only used if cMilliesInterval is non-zero. */
749 PTMTIMERR3 pTimer;
750 /** Pointer to the VM - R3. */
751 PVMR3 pVMR3;
752 /** LIFO of pending items - R3. */
753 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
754 /** Pointer to the VM - R0. */
755 PVMR0 pVMR0;
756 /** LIFO of pending items - R0. */
757 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
758 /** Pointer to the GC VM and indicator for GC enabled queue.
759 * If this is NULL, the queue cannot be used in GC.
760 */
761 PVMRC pVMRC;
762 /** LIFO of pending items - GC. */
763 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
764
765 /** Item size (bytes). */
766 uint32_t cbItem;
767 /** Number of items in the queue. */
768 uint32_t cItems;
769 /** Index to the free head (where we insert). */
770 uint32_t volatile iFreeHead;
771 /** Index to the free tail (where we remove). */
772 uint32_t volatile iFreeTail;
773
774 /** Unqiue queue name. */
775 R3PTRTYPE(const char *) pszName;
776#if HC_ARCH_BITS == 32
777 RTR3PTR Alignment1;
778#endif
779 /** Stat: Times PDMQueueAlloc fails. */
780 STAMCOUNTER StatAllocFailures;
781 /** Stat: PDMQueueInsert calls. */
782 STAMCOUNTER StatInsert;
783 /** Stat: Queue flushes. */
784 STAMCOUNTER StatFlush;
785 /** Stat: Queue flushes with pending items left over. */
786 STAMCOUNTER StatFlushLeftovers;
787#ifdef VBOX_WITH_STATISTICS
788 /** State: Profiling the flushing. */
789 STAMPROFILE StatFlushPrf;
790 /** State: Pending items. */
791 uint32_t volatile cStatPending;
792 uint32_t volatile cAlignment;
793#endif
794
795 /** Array of pointers to free items. Variable size. */
796 struct PDMQUEUEFREEITEM
797 {
798 /** Pointer to the free item - HC Ptr. */
799 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
800 /** Pointer to the free item - HC Ptr. */
801 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
802 /** Pointer to the free item - GC Ptr. */
803 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
804#if HC_ARCH_BITS == 64
805 RTRCPTR Alignment0;
806#endif
807 } aFreeItems[1];
808} PDMQUEUE;
809
810/** @name PDM::fQueueFlushing
811 * @{ */
812/** Indicating that an queue insert has been performed. */
813#define PDM_QUEUE_FLUSH_FLAG_ACTIVE RT_BIT_32(PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT)
814/** The bit number for PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT. */
815#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
816/** Indicating there are pending items.
817 * This is make sure we don't miss inserts happening during flushing. The FF
818 * cannot be used for this since it has to be cleared immediately to prevent
819 * other EMTs from spinning. */
820#define PDM_QUEUE_FLUSH_FLAG_PENDING RT_BIT_32(PDM_QUEUE_FLUSH_FLAG_PENDING_BIT)
821/** The bit number for PDM_QUEUE_FLUSH_FLAG_PENDING. */
822#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
823/** }@ */
824
825
826/**
827 * Queue device helper task operation.
828 */
829typedef enum PDMDEVHLPTASKOP
830{
831 /** The usual invalid 0 entry. */
832 PDMDEVHLPTASKOP_INVALID = 0,
833 /** ISASetIrq */
834 PDMDEVHLPTASKOP_ISA_SET_IRQ,
835 /** PCISetIrq */
836 PDMDEVHLPTASKOP_PCI_SET_IRQ,
837 /** PCISetIrq */
838 PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
839 /** The usual 32-bit hack. */
840 PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
841} PDMDEVHLPTASKOP;
842
843/**
844 * Queued Device Helper Task.
845 */
846typedef struct PDMDEVHLPTASK
847{
848 /** The queue item core (don't touch). */
849 PDMQUEUEITEMCORE Core;
850 /** Pointer to the device instance (R3 Ptr). */
851 PPDMDEVINSR3 pDevInsR3;
852 /** This operation to perform. */
853 PDMDEVHLPTASKOP enmOp;
854#if HC_ARCH_BITS == 64
855 uint32_t Alignment0;
856#endif
857 /** Parameters to the operation. */
858 union PDMDEVHLPTASKPARAMS
859 {
860 /**
861 * PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_PCI_SET_IRQ.
862 */
863 struct PDMDEVHLPTASKSETIRQ
864 {
865 /** The IRQ */
866 int iIrq;
867 /** The new level. */
868 int iLevel;
869 } SetIRQ;
870 } u;
871} PDMDEVHLPTASK;
872/** Pointer to a queued Device Helper Task. */
873typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
874/** Pointer to a const queued Device Helper Task. */
875typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
876
877
878
879/**
880 * An USB hub registration record.
881 */
882typedef struct PDMUSBHUB
883{
884 /** The USB versions this hub support.
885 * Note that 1.1 hubs can take on 2.0 devices. */
886 uint32_t fVersions;
887 /** The number of ports on the hub. */
888 uint32_t cPorts;
889 /** The number of available ports (0..cPorts). */
890 uint32_t cAvailablePorts;
891 /** The driver instance of the hub. */
892 PPDMDRVINS pDrvIns;
893 /** Copy of the to the registration structure. */
894 PDMUSBHUBREG Reg;
895
896 /** Pointer to the next hub in the list. */
897 struct PDMUSBHUB *pNext;
898} PDMUSBHUB;
899
900/** Pointer to a const USB HUB registration record. */
901typedef const PDMUSBHUB *PCPDMUSBHUB;
902
903/** Pointer to a PDM Async I/O template. */
904typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
905
906/** Pointer to the main PDM Async completion endpoint class. */
907typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
908
909
910/**
911 * PDM VMCPU Instance data.
912 * Changes to this must checked against the padding of the cfgm union in VMCPU!
913 */
914typedef struct PDMCPU
915{
916 /** The number of entries in the apQueuedCritSectsLeaves table that's currnetly in use. */
917 uint32_t cQueuedCritSectLeaves;
918 uint32_t uPadding0; /**< Alignment padding.*/
919 /** Critical sections queued in RC/R0 because of contention preventing leave to complete. (R3 Ptrs)
920 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
921 R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];
922} PDMCPU;
923
924/**
925 * Converts a PDM pointer into a VM pointer.
926 * @returns Pointer to the VM structure the PDM is part of.
927 * @param pPDM Pointer to PDM instance data.
928 */
929#define PDM2VM(pPDM) ( (PVM)((char*)pPDM - pPDM->offVM) )
930
931
932/**
933 * PDM VM Instance data.
934 * Changes to this must checked against the padding of the cfgm union in VM!
935 */
936typedef struct PDM
937{
938 /** Offset to the VM structure.
939 * See PDM2VM(). */
940 RTUINT offVM;
941 RTUINT uPadding0; /**< Alignment padding.*/
942
943 /** List of registered devices. (FIFO) */
944 R3PTRTYPE(PPDMDEV) pDevs;
945 /** List of devices instances. (FIFO) */
946 R3PTRTYPE(PPDMDEVINS) pDevInstances;
947 /** List of registered USB devices. (FIFO) */
948 R3PTRTYPE(PPDMUSB) pUsbDevs;
949 /** List of USB devices instances. (FIFO) */
950 R3PTRTYPE(PPDMUSBINS) pUsbInstances;
951 /** List of registered drivers. (FIFO) */
952 R3PTRTYPE(PPDMDRV) pDrvs;
953 /** PCI Buses. */
954 PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
955 /** The register PIC device. */
956 PDMPIC Pic;
957 /** The registerd APIC device. */
958 PDMAPIC Apic;
959 /** The registerd I/O APIC device. */
960 PDMIOAPIC IoApic;
961 /** The registered DMAC device. */
962 R3PTRTYPE(PPDMDMAC) pDmac;
963 /** The registered RTC device. */
964 R3PTRTYPE(PPDMRTC) pRtc;
965 /** The registered USB HUBs. (FIFO) */
966 R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
967
968 /** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
969 R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
970 /** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
971 R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
972 /** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
973 RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
974 /** Pointer to the queue which should be manually flushed - RC Ptr.
975 * Only touched by EMT. */
976 RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
977 /** Pointer to the queue which should be manually flushed - R0 Ptr.
978 * Only touched by EMT. */
979 R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
980 /** Bitmask controlling the queue flushing.
981 * See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
982 uint32_t volatile fQueueFlushing;
983 /** Alignment padding. */
984 uint32_t u32Padding2;
985
986 /** @name VMM device heap
987 * @{ */
988 /** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
989 RTR3PTR pvVMMDevHeap;
990 /** The heap size. */
991 uint32_t cbVMMDevHeap;
992 /** Free space. */
993 uint32_t cbVMMDevHeapLeft;
994 /** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
995 RTGCPHYS GCPhysVMMDevHeap;
996 /** @} */
997
998 /** The PDM lock.
999 * This is used to protect everything that deals with interrupts, i.e.
1000 * the PIC, APIC, IOAPIC and PCI devices pluss some PDM functions. */
1001 PDMCRITSECT CritSect;
1002
1003 /** Number of times a critical section leave requesed needed to be queued for ring-3 execution. */
1004 STAMCOUNTER StatQueuedCritSectLeaves;
1005} PDM;
1006AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1007AssertCompileMemberAlignment(PDM, CritSect, 8);
1008AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1009/** Pointer to PDM VM instance data. */
1010typedef PDM *PPDM;
1011
1012
1013
1014/**
1015 * PDM data kept in the UVM.
1016 */
1017typedef struct PDMUSERPERVM
1018{
1019 /** @todo move more stuff over here. */
1020
1021 /** Linked list of timer driven PDM queues.
1022 * Currently serialized by PDM::CritSect. */
1023 R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
1024 /** Linked list of force action driven PDM queues.
1025 * Currently serialized by PDM::CritSect. */
1026 R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
1027
1028 /** Lock protecting the lists below it. */
1029 RTCRITSECT ListCritSect;
1030 /** Pointer to list of loaded modules. */
1031 PPDMMOD pModules;
1032 /** List of initialized critical sections. (LIFO) */
1033 R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
1034 /** Head of the PDM Thread list. (singly linked) */
1035 R3PTRTYPE(PPDMTHREAD) pThreads;
1036 /** Tail of the PDM Thread list. (singly linked) */
1037 R3PTRTYPE(PPDMTHREAD) pThreadsTail;
1038
1039 /** @name PDM Async Completion
1040 * @{ */
1041 /** Pointer to the array of supported endpoint classes. */
1042 PPDMASYNCCOMPLETIONEPCLASS apAsyncCompletionEndpointClass[PDMASYNCCOMPLETIONEPCLASSTYPE_MAX];
1043 /** Head of the templates. Singly linked, protected by ListCritSect. */
1044 R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
1045 /** @} */
1046
1047} PDMUSERPERVM;
1048/** Pointer to the PDM data kept in the UVM. */
1049typedef PDMUSERPERVM *PPDMUSERPERVM;
1050
1051
1052
1053/*******************************************************************************
1054* Global Variables *
1055*******************************************************************************/
1056#ifdef IN_RING3
1057extern const PDMDRVHLPR3 g_pdmR3DrvHlp;
1058extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1059extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1060extern const PDMPICHLPR3 g_pdmR3DevPicHlp;
1061extern const PDMAPICHLPR3 g_pdmR3DevApicHlp;
1062extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;
1063extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1064extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1065extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1066extern const PDMHPETHLPR3 g_pdmR3DevHpetHlp;
1067#endif
1068
1069
1070/*******************************************************************************
1071* Defined Constants And Macros *
1072*******************************************************************************/
1073/** @def PDMDEV_ASSERT_DEVINS
1074 * Asserts the validity of the device instance.
1075 */
1076#ifdef VBOX_STRICT
1077# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1078 do { \
1079 AssertPtr(pDevIns); \
1080 Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1081 Assert(pDevIns->CTX_SUFF(pvInstanceData) == (void *)&pDevIns->achInstanceData[0]); \
1082 } while (0)
1083#else
1084# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1085#endif
1086
1087/** @def PDMDRV_ASSERT_DRVINS
1088 * Asserts the validity of the driver instance.
1089 */
1090#ifdef VBOX_STRICT
1091# define PDMDRV_ASSERT_DRVINS(pDrvIns) \
1092 do { \
1093 AssertPtr(pDrvIns); \
1094 Assert(pDrvIns->u32Version == PDM_DRVINS_VERSION); \
1095 Assert(pDrvIns->CTX_SUFF(pvInstanceData) == (void *)&pDrvIns->achInstanceData[0]); \
1096 } while (0)
1097#else
1098# define PDMDRV_ASSERT_DRVINS(pDrvIns) do { } while (0)
1099#endif
1100
1101
1102/*******************************************************************************
1103* Internal Functions *
1104*******************************************************************************/
1105#ifdef IN_RING3
1106int pdmR3CritSectInitStats(PVM pVM);
1107void pdmR3CritSectRelocate(PVM pVM);
1108int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, va_list va);
1109int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1110int pdmR3CritSectInitDriver(PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...);
1111int pdmR3CritSectDeleteDriver(PVM pVM, PPDMDRVINS pDrvIns);
1112
1113int pdmR3DevInit(PVM pVM);
1114PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1115int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1116DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1117
1118int pdmR3UsbLoadModules(PVM pVM);
1119int pdmR3UsbInstantiateDevices(PVM pVM);
1120PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1121int pdmR3UsbFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1122int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1123int pdmR3UsbVMInitComplete(PVM pVM);
1124
1125int pdmR3DrvInit(PVM pVM);
1126int pdmR3DrvInstantiate(PVM pVM, PCFGMNODE pNode, PPDMIBASE pBaseInterface, PPDMDRVINS pDrvAbove,
1127 PPDMLUN pLun, PPDMIBASE *ppBaseInterface);
1128int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1129void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1130PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1131
1132int pdmR3LdrInitU(PUVM pUVM);
1133void pdmR3LdrTermU(PUVM pUVM);
1134char * pdmR3FileR3(const char *pszFile, bool fShared = false);
1135int pdmR3LoadR3U(PUVM pUVM, const char *pszFilename, const char *pszName);
1136
1137void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1138
1139int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1140 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1141int pdmR3ThreadCreateUsb(PVM pVM, PPDMDRVINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1142 PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1143int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1144 PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1145int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1146int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1147int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1148void pdmR3ThreadDestroyAll(PVM pVM);
1149int pdmR3ThreadResumeAll(PVM pVM);
1150int pdmR3ThreadSuspendAll(PVM pVM);
1151
1152#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1153int pdmR3AsyncCompletionInit(PVM pVM);
1154int pdmR3AsyncCompletionTerm(PVM pVM);
1155#endif
1156
1157#endif /* IN_RING3 */
1158
1159void pdmLock(PVM pVM);
1160int pdmLockEx(PVM pVM, int rc);
1161void pdmUnlock(PVM pVM);
1162
1163/** @} */
1164
1165RT_C_DECLS_END
1166
1167#endif
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