PGMGst.h@ 16281

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1	/* $Id: PGMGst.h 16260 2009-01-27 10:45:39Z vboxsync $ */
2	/** @file
3	* VBox - Page Manager / Monitor, Guest Paging Template.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22	/*******************************************************************************
23	* Defined Constants And Macros *
24	*******************************************************************************/
25	#undef GSTPT
26	#undef PGSTPT
27	#undef GSTPTE
28	#undef PGSTPTE
29	#undef GSTPD
30	#undef PGSTPD
31	#undef GSTPDE
32	#undef PGSTPDE
33	#undef GST_BIG_PAGE_SIZE
34	#undef GST_BIG_PAGE_OFFSET_MASK
35	#undef GST_PDE_PG_MASK
36	#undef GST_PDE_BIG_PG_MASK
37	#undef GST_PD_SHIFT
38	#undef GST_PD_MASK
39	#undef GST_PTE_PG_MASK
40	#undef GST_PT_SHIFT
41	#undef GST_PT_MASK
42	#undef GST_TOTAL_PD_ENTRIES
43	#undef GST_CR3_PAGE_MASK
44	#undef GST_PDPE_ENTRIES
45	#undef GST_GET_PDE_BIG_PG_GCPHYS
46
47	#if PGM_GST_TYPE == PGM_TYPE_32BIT \
48	\|\| PGM_GST_TYPE == PGM_TYPE_REAL \
49	\|\| PGM_GST_TYPE == PGM_TYPE_PROT
50	# define GSTPT X86PT
51	# define PGSTPT PX86PT
52	# define GSTPTE X86PTE
53	# define PGSTPTE PX86PTE
54	# define GSTPD X86PD
55	# define PGSTPD PX86PD
56	# define GSTPDE X86PDE
57	# define PGSTPDE PX86PDE
58	# define GST_BIG_PAGE_SIZE X86_PAGE_4M_SIZE
59	# define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_4M_OFFSET_MASK
60	# define GST_PDE_PG_MASK X86_PDE_PG_MASK
61	# define GST_PDE_BIG_PG_MASK X86_PDE4M_PG_MASK
62	# define GST_GET_PDE_BIG_PG_GCPHYS(PdeGst) pgmGstGet4MBPhysPage(&pVM->pgm.s, PdeGst)
63	# define GST_PD_SHIFT X86_PD_SHIFT
64	# define GST_PD_MASK X86_PD_MASK
65	# define GST_TOTAL_PD_ENTRIES X86_PG_ENTRIES
66	# define GST_PTE_PG_MASK X86_PTE_PG_MASK
67	# define GST_PT_SHIFT X86_PT_SHIFT
68	# define GST_PT_MASK X86_PT_MASK
69	# define GST_CR3_PAGE_MASK X86_CR3_PAGE_MASK
70
71	#elif PGM_GST_TYPE == PGM_TYPE_PAE \
72	\|\| PGM_GST_TYPE == PGM_TYPE_AMD64
73	# define GSTPT X86PTPAE
74	# define PGSTPT PX86PTPAE
75	# define GSTPTE X86PTEPAE
76	# define PGSTPTE PX86PTEPAE
77	# define GSTPD X86PDPAE
78	# define PGSTPD PX86PDPAE
79	# define GSTPDE X86PDEPAE
80	# define PGSTPDE PX86PDEPAE
81	# define GST_BIG_PAGE_SIZE X86_PAGE_2M_SIZE
82	# define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_2M_OFFSET_MASK
83	# define GST_PDE_PG_MASK X86_PDE_PAE_PG_MASK
84	# define GST_PDE_BIG_PG_MASK X86_PDE2M_PAE_PG_MASK
85	# define GST_GET_PDE_BIG_PG_GCPHYS(PdeGst) (PdeGst.u & GST_PDE_BIG_PG_MASK)
86	# define GST_PD_SHIFT X86_PD_PAE_SHIFT
87	# define GST_PD_MASK X86_PD_PAE_MASK
88	# if PGM_GST_TYPE == PGM_TYPE_PAE
89	# define GST_TOTAL_PD_ENTRIES (X86_PG_PAE_ENTRIES * X86_PG_PAE_PDPE_ENTRIES)
90	# define GST_PDPE_ENTRIES X86_PG_PAE_PDPE_ENTRIES
91	# else
92	# define GST_TOTAL_PD_ENTRIES (X86_PG_AMD64_ENTRIES * X86_PG_AMD64_PDPE_ENTRIES)
93	# define GST_PDPE_ENTRIES X86_PG_AMD64_PDPE_ENTRIES
94	# endif
95	# define GST_PTE_PG_MASK X86_PTE_PAE_PG_MASK
96	# define GST_PT_SHIFT X86_PT_PAE_SHIFT
97	# define GST_PT_MASK X86_PT_PAE_MASK
98	# define GST_CR3_PAGE_MASK X86_CR3_PAE_PAGE_MASK
99	#endif
100
101
102	/*******************************************************************************
103	* Internal Functions *
104	*******************************************************************************/
105	__BEGIN_DECLS
106	/* r3 */
107	PGM_GST_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0);
108	PGM_GST_DECL(int, Enter)(PVM pVM, RTGCPHYS GCPhysCR3);
109	PGM_GST_DECL(int, Relocate)(PVM pVM, RTGCPTR offDelta);
110	PGM_GST_DECL(int, Exit)(PVM pVM);
111
112	#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
113	static DECLCALLBACK(int) pgmR3Gst32BitWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void pvPhys, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
114	static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void pvPhys, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
115	#endif
116
117	/* all */
118	PGM_GST_DECL(int, GetPage)(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
119	PGM_GST_DECL(int, ModifyPage)(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
120	PGM_GST_DECL(int, GetPDE)(PVM pVM, RTGCPTR GCPtr, PX86PDEPAE pPDE);
121	PGM_GST_DECL(int, MapCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
122	PGM_GST_DECL(int, UnmapCR3)(PVM pVM);
123	#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
124	PGM_GST_DECL(int, MonitorCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
125	PGM_GST_DECL(int, UnmonitorCR3)(PVM pVM);
126	#endif
127	__END_DECLS
128
129
130	/**
131	* Initializes the guest bit of the paging mode data.
132	*
133	* @returns VBox status code.
134	* @param pVM The VM handle.
135	* @param fResolveGCAndR0 Indicate whether or not GC and Ring-0 symbols can be resolved now.
136	* This is used early in the init process to avoid trouble with PDM
137	* not being initialized yet.
138	*/
139	PGM_GST_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0)
140	{
141	Assert(pModeData->uGstType == PGM_GST_TYPE);
142
143	/* Ring-3 */
144	pModeData->pfnR3GstRelocate = PGM_GST_NAME(Relocate);
145	pModeData->pfnR3GstExit = PGM_GST_NAME(Exit);
146	pModeData->pfnR3GstGetPDE = PGM_GST_NAME(GetPDE);
147	pModeData->pfnR3GstGetPage = PGM_GST_NAME(GetPage);
148	pModeData->pfnR3GstModifyPage = PGM_GST_NAME(ModifyPage);
149	pModeData->pfnR3GstMapCR3 = PGM_GST_NAME(MapCR3);
150	pModeData->pfnR3GstUnmapCR3 = PGM_GST_NAME(UnmapCR3);
151	#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
152	pModeData->pfnR3GstMonitorCR3 = PGM_GST_NAME(MonitorCR3);
153	pModeData->pfnR3GstUnmonitorCR3 = PGM_GST_NAME(UnmonitorCR3);
154	#endif
155
156	#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
157	# if PGM_GST_TYPE == PGM_TYPE_32BIT \|\| PGM_GST_TYPE == PGM_TYPE_PAE
158	pModeData->pfnR3GstWriteHandlerCR3 = PGM_GST_NAME(WriteHandlerCR3);
159	pModeData->pszR3GstWriteHandlerCR3 = "Guest CR3 Write access handler";
160	pModeData->pfnR3GstPAEWriteHandlerCR3 = PGM_GST_NAME(WriteHandlerCR3);
161	pModeData->pszR3GstPAEWriteHandlerCR3 = "Guest CR3 Write access handler (PAE)";
162	# else
163	pModeData->pfnR3GstWriteHandlerCR3 = NULL;
164	pModeData->pszR3GstWriteHandlerCR3 = NULL;
165	pModeData->pfnR3GstPAEWriteHandlerCR3 = NULL;
166	pModeData->pszR3GstPAEWriteHandlerCR3 = NULL;
167	# endif
168	#endif
169
170	if (fResolveGCAndR0)
171	{
172	int rc;
173
174	#if PGM_SHW_TYPE != PGM_TYPE_AMD64 /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */
175	/* GC */
176	rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(GetPage), &pModeData->pfnRCGstGetPage);
177	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(GetPage), rc), rc);
178	rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(ModifyPage), &pModeData->pfnRCGstModifyPage);
179	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(ModifyPage), rc), rc);
180	rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(GetPDE), &pModeData->pfnRCGstGetPDE);
181	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(GetPDE), rc), rc);
182	# ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
183	rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(MonitorCR3), &pModeData->pfnRCGstMonitorCR3);
184	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(MonitorCR3), rc), rc);
185	rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(UnmonitorCR3), &pModeData->pfnRCGstUnmonitorCR3);
186	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(UnmonitorCR3), rc), rc);
187	# endif
188	rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(MapCR3), &pModeData->pfnRCGstMapCR3);
189	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(MapCR3), rc), rc);
190	rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(UnmapCR3), &pModeData->pfnRCGstUnmapCR3);
191	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(UnmapCR3), rc), rc);
192	# ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
193	# if PGM_GST_TYPE == PGM_TYPE_32BIT \|\| PGM_GST_TYPE == PGM_TYPE_PAE
194	rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(WriteHandlerCR3), &pModeData->pfnRCGstWriteHandlerCR3);
195	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(WriteHandlerCR3), rc), rc);
196	rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(WriteHandlerCR3), &pModeData->pfnRCGstPAEWriteHandlerCR3);
197	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(WriteHandlerCR3), rc), rc);
198	# endif
199	# endif
200	#endif /* Not AMD64 shadow paging. */
201
202	/* Ring-0 */
203	rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(GetPage), &pModeData->pfnR0GstGetPage);
204	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(GetPage), rc), rc);
205	rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(ModifyPage), &pModeData->pfnR0GstModifyPage);
206	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(ModifyPage), rc), rc);
207	rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(GetPDE), &pModeData->pfnR0GstGetPDE);
208	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(GetPDE), rc), rc);
209	#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
210	rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(MonitorCR3), &pModeData->pfnR0GstMonitorCR3);
211	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(MonitorCR3), rc), rc);
212	rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(UnmonitorCR3), &pModeData->pfnR0GstUnmonitorCR3);
213	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(UnmonitorCR3), rc), rc);
214	#endif
215	rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(MapCR3), &pModeData->pfnR0GstMapCR3);
216	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(MapCR3), rc), rc);
217	rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(UnmapCR3), &pModeData->pfnR0GstUnmapCR3);
218	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(UnmapCR3), rc), rc);
219	#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
220	# if PGM_GST_TYPE == PGM_TYPE_32BIT \|\| PGM_GST_TYPE == PGM_TYPE_PAE
221	rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(WriteHandlerCR3), &pModeData->pfnR0GstWriteHandlerCR3);
222	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(WriteHandlerCR3), rc), rc);
223	rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(WriteHandlerCR3), &pModeData->pfnR0GstPAEWriteHandlerCR3);
224	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(WriteHandlerCR3), rc), rc);
225	# endif
226	#endif
227	}
228
229	return VINF_SUCCESS;
230	}
231
232
233	/**
234	* Enters the guest mode.
235	*
236	* @returns VBox status code.
237	* @param pVM VM handle.
238	* @param GCPhysCR3 The physical address from the CR3 register.
239	*/
240	PGM_GST_DECL(int, Enter)(PVM pVM, RTGCPHYS GCPhysCR3)
241	{
242	/*
243	* Map and monitor CR3
244	*/
245	int rc = PGM_GST_NAME(MapCR3)(pVM, GCPhysCR3);
246	#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
247	if (RT_SUCCESS(rc) && !pVM->pgm.s.fMappingsFixed)
248	rc = PGM_GST_NAME(MonitorCR3)(pVM, GCPhysCR3);
249	#endif
250	return rc;
251	}
252
253
254	/**
255	* Relocate any GC pointers related to guest mode paging.
256	*
257	* @returns VBox status code.
258	* @param pVM The VM handle.
259	* @param offDelta The reloation offset.
260	*/
261	PGM_GST_DECL(int, Relocate)(PVM pVM, RTGCPTR offDelta)
262	{
263	/* nothing special to do here - InitData does the job. */
264	return VINF_SUCCESS;
265	}
266
267
268	/**
269	* Exits the guest mode.
270	*
271	* @returns VBox status code.
272	* @param pVM VM handle.
273	*/
274	PGM_GST_DECL(int, Exit)(PVM pVM)
275	{
276	int rc;
277
278	#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
279	rc = PGM_GST_NAME(UnmonitorCR3)(pVM);
280	if (RT_SUCCESS(rc))
281	#endif
282	rc = PGM_GST_NAME(UnmapCR3)(pVM);
283	return rc;
284	}
285
286
287	#if PGM_GST_TYPE == PGM_TYPE_32BIT
288	/**
289	* Physical write access for the Guest CR3 in 32-bit mode.
290	*
291	* @returns VINF_SUCCESS if the handler have carried out the operation.
292	* @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
293	* @param pVM VM Handle.
294	* @param GCPhys The physical address the guest is writing to.
295	* @param pvPhys The HC mapping of that address.
296	* @param pvBuf What the guest is reading/writing.
297	* @param cbBuf How much it's reading/writing.
298	* @param enmAccessType The access type.
299	* @param pvUser User argument.
300	*/
301	static DECLCALLBACK(int) pgmR3Gst32BitWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void pvPhys, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
302	{
303	AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
304	Assert(enmAccessType == PGMACCESSTYPE_WRITE);
305	Log2(("pgmR3Gst32BitWriteHandlerCR3: ff=%#x GCPhys=%RGp pvPhys=%p cbBuf=%d pvBuf={%.*Rhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
306
307	/*
308	* Do the write operation.
309	*/
310	memcpy(pvPhys, pvBuf, cbBuf);
311	if ( !pVM->pgm.s.fMappingsFixed
312	&& !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
313	{
314	/*
315	* Check for conflicts.
316	*/
317	const RTGCPTR offPD = GCPhys & PAGE_OFFSET_MASK;
318	const unsigned iPD1 = offPD / sizeof(X86PDE);
319	const unsigned iPD2 = (unsigned)(offPD + cbBuf - 1) / sizeof(X86PDE);
320	Assert(iPD1 - iPD2 <= 1);
321	if ( ( pVM->pgm.s.pGst32BitPdR3->a[iPD1].n.u1Present
322	&& pgmGetMapping(pVM, iPD1 << X86_PD_SHIFT) )
323	\|\| ( iPD1 != iPD2
324	&& pVM->pgm.s.pGst32BitPdR3->a[iPD2].n.u1Present
325	&& pgmGetMapping(pVM, iPD2 << X86_PD_SHIFT) )
326	)
327	{
328	Log(("pgmR3Gst32BitWriteHandlerCR3: detected conflict. iPD1=%#x iPD2=%#x GCPhys=%RGp\n", iPD1, iPD2, GCPhys));
329	STAM_COUNTER_INC(&pVM->pgm.s.StatR3GuestPDWriteConflict);
330	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
331	}
332	}
333
334	STAM_COUNTER_INC(&pVM->pgm.s.StatR3GuestPDWrite);
335	return VINF_SUCCESS;
336	}
337	#endif /* 32BIT */
338
339	#if PGM_GST_TYPE == PGM_TYPE_PAE
340
341	/**
342	* Physical write access handler for the Guest CR3 in PAE mode.
343	*
344	* @returns VINF_SUCCESS if the handler have carried out the operation.
345	* @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
346	* @param pVM VM Handle.
347	* @param GCPhys The physical address the guest is writing to.
348	* @param pvPhys The HC mapping of that address.
349	* @param pvBuf What the guest is reading/writing.
350	* @param cbBuf How much it's reading/writing.
351	* @param enmAccessType The access type.
352	* @param pvUser User argument.
353	*/
354	static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void pvPhys, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
355	{
356	AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
357	Assert(enmAccessType == PGMACCESSTYPE_WRITE);
358	Log2(("pgmR3GstPAEWriteHandlerCR3: ff=%#x GCPhys=%RGp pvPhys=%p cbBuf=%d pvBuf={%.*Rhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
359
360	/*
361	* Do the write operation.
362	*/
363	memcpy(pvPhys, pvBuf, cbBuf);
364	if ( !pVM->pgm.s.fMappingsFixed
365	&& !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 \| VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
366	{
367	/*
368	* Check if any of the PDs have changed.
369	* We'll simply check all of them instead of figuring out which one/two to check.
370	*/
371	for (unsigned i = 0; i < 4; i++)
372	{
373	if ( pVM->pgm.s.pGstPaePdptR3->a[i].n.u1Present
374	&& (pVM->pgm.s.pGstPaePdptR3->a[i].u & X86_PDPE_PG_MASK) != pVM->pgm.s.aGCPhysGstPaePDsMonitored[i])
375	{
376	Log(("pgmR3GstPAEWriteHandlerCR3: detected updated PDPE; [%d] = %#llx, Old GCPhys=%RGp\n",
377	i, pVM->pgm.s.pGstPaePdptR3->a[i].u, pVM->pgm.s.aGCPhysGstPaePDsMonitored[i]));
378	/*
379	* The PD has changed.
380	* We will schedule a monitoring update for the next TLB Flush,
381	* InvalidatePage or SyncCR3.
382	*
383	* This isn't perfect, because a lazy page sync might be dealing with an half
384	* updated PDPE. However, we assume that the guest OS is disabling interrupts
385	* and being extremely careful (cmpxchg8b) when updating a PDPE where it's
386	* executing.
387	*/
388	pVM->pgm.s.fSyncFlags \|= PGM_SYNC_MONITOR_CR3;
389	}
390	}
391	}
392	/*
393	* Flag a updating of the monitor at the next crossroad so we don't monitor the
394	* wrong pages for soo long that they can be reused as code pages and freak out
395	* the recompiler or something.
396	*/
397	else
398	pVM->pgm.s.fSyncFlags \|= PGM_SYNC_MONITOR_CR3;
399
400
401	STAM_COUNTER_INC(&pVM->pgm.s.StatR3GuestPDWrite);
402	return VINF_SUCCESS;
403	}
404
405	#endif /* PAE */
406

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source: vbox/trunk/src/VBox/VMM/PGMGst.h@ 16281

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