VirtualBox

source: vbox/trunk/src/VBox/VMM/PGMGst.h@ 17049

Last change on this file since 17049 was 16918, checked in by vboxsync, 16 years ago

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1/* $Id: PGMGst.h 16918 2009-02-18 15:58:38Z vboxsync $ */
2/** @file
3 * VBox - Page Manager / Monitor, Guest Paging Template.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22/*******************************************************************************
23* Defined Constants And Macros *
24*******************************************************************************/
25#undef GSTPT
26#undef PGSTPT
27#undef GSTPTE
28#undef PGSTPTE
29#undef GSTPD
30#undef PGSTPD
31#undef GSTPDE
32#undef PGSTPDE
33#undef GST_BIG_PAGE_SIZE
34#undef GST_BIG_PAGE_OFFSET_MASK
35#undef GST_PDE_PG_MASK
36#undef GST_PDE_BIG_PG_MASK
37#undef GST_PD_SHIFT
38#undef GST_PD_MASK
39#undef GST_PTE_PG_MASK
40#undef GST_PT_SHIFT
41#undef GST_PT_MASK
42#undef GST_TOTAL_PD_ENTRIES
43#undef GST_CR3_PAGE_MASK
44#undef GST_PDPE_ENTRIES
45#undef GST_GET_PDE_BIG_PG_GCPHYS
46
47#if PGM_GST_TYPE == PGM_TYPE_32BIT \
48 || PGM_GST_TYPE == PGM_TYPE_REAL \
49 || PGM_GST_TYPE == PGM_TYPE_PROT
50# define GSTPT X86PT
51# define PGSTPT PX86PT
52# define GSTPTE X86PTE
53# define PGSTPTE PX86PTE
54# define GSTPD X86PD
55# define PGSTPD PX86PD
56# define GSTPDE X86PDE
57# define PGSTPDE PX86PDE
58# define GST_BIG_PAGE_SIZE X86_PAGE_4M_SIZE
59# define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_4M_OFFSET_MASK
60# define GST_PDE_PG_MASK X86_PDE_PG_MASK
61# define GST_PDE_BIG_PG_MASK X86_PDE4M_PG_MASK
62# define GST_GET_PDE_BIG_PG_GCPHYS(PdeGst) pgmGstGet4MBPhysPage(&pVM->pgm.s, PdeGst)
63# define GST_PD_SHIFT X86_PD_SHIFT
64# define GST_PD_MASK X86_PD_MASK
65# define GST_TOTAL_PD_ENTRIES X86_PG_ENTRIES
66# define GST_PTE_PG_MASK X86_PTE_PG_MASK
67# define GST_PT_SHIFT X86_PT_SHIFT
68# define GST_PT_MASK X86_PT_MASK
69# define GST_CR3_PAGE_MASK X86_CR3_PAGE_MASK
70
71#elif PGM_GST_TYPE == PGM_TYPE_PAE \
72 || PGM_GST_TYPE == PGM_TYPE_AMD64
73# define GSTPT X86PTPAE
74# define PGSTPT PX86PTPAE
75# define GSTPTE X86PTEPAE
76# define PGSTPTE PX86PTEPAE
77# define GSTPD X86PDPAE
78# define PGSTPD PX86PDPAE
79# define GSTPDE X86PDEPAE
80# define PGSTPDE PX86PDEPAE
81# define GST_BIG_PAGE_SIZE X86_PAGE_2M_SIZE
82# define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_2M_OFFSET_MASK
83# define GST_PDE_PG_MASK X86_PDE_PAE_PG_MASK
84# define GST_PDE_BIG_PG_MASK X86_PDE2M_PAE_PG_MASK
85# define GST_GET_PDE_BIG_PG_GCPHYS(PdeGst) (PdeGst.u & GST_PDE_BIG_PG_MASK)
86# define GST_PD_SHIFT X86_PD_PAE_SHIFT
87# define GST_PD_MASK X86_PD_PAE_MASK
88# if PGM_GST_TYPE == PGM_TYPE_PAE
89# define GST_TOTAL_PD_ENTRIES (X86_PG_PAE_ENTRIES * X86_PG_PAE_PDPE_ENTRIES)
90# define GST_PDPE_ENTRIES X86_PG_PAE_PDPE_ENTRIES
91# else
92# define GST_TOTAL_PD_ENTRIES (X86_PG_AMD64_ENTRIES * X86_PG_AMD64_PDPE_ENTRIES)
93# define GST_PDPE_ENTRIES X86_PG_AMD64_PDPE_ENTRIES
94# endif
95# define GST_PTE_PG_MASK X86_PTE_PAE_PG_MASK
96# define GST_PT_SHIFT X86_PT_PAE_SHIFT
97# define GST_PT_MASK X86_PT_PAE_MASK
98# define GST_CR3_PAGE_MASK X86_CR3_PAE_PAGE_MASK
99#endif
100
101
102/*******************************************************************************
103* Internal Functions *
104*******************************************************************************/
105__BEGIN_DECLS
106/* r3 */
107PGM_GST_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0);
108PGM_GST_DECL(int, Enter)(PVM pVM, RTGCPHYS GCPhysCR3);
109PGM_GST_DECL(int, Relocate)(PVM pVM, RTGCPTR offDelta);
110PGM_GST_DECL(int, Exit)(PVM pVM);
111
112#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
113static DECLCALLBACK(int) pgmR3Gst32BitWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
114static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
115#endif
116
117/* all */
118PGM_GST_DECL(int, GetPage)(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
119PGM_GST_DECL(int, ModifyPage)(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
120PGM_GST_DECL(int, GetPDE)(PVM pVM, RTGCPTR GCPtr, PX86PDEPAE pPDE);
121#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
122PGM_GST_DECL(int, MonitorCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
123PGM_GST_DECL(int, UnmonitorCR3)(PVM pVM);
124#endif
125__END_DECLS
126
127
128/**
129 * Initializes the guest bit of the paging mode data.
130 *
131 * @returns VBox status code.
132 * @param pVM The VM handle.
133 * @param fResolveGCAndR0 Indicate whether or not GC and Ring-0 symbols can be resolved now.
134 * This is used early in the init process to avoid trouble with PDM
135 * not being initialized yet.
136 */
137PGM_GST_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0)
138{
139 Assert(pModeData->uGstType == PGM_GST_TYPE);
140
141 /* Ring-3 */
142 pModeData->pfnR3GstRelocate = PGM_GST_NAME(Relocate);
143 pModeData->pfnR3GstExit = PGM_GST_NAME(Exit);
144 pModeData->pfnR3GstGetPDE = PGM_GST_NAME(GetPDE);
145 pModeData->pfnR3GstGetPage = PGM_GST_NAME(GetPage);
146 pModeData->pfnR3GstModifyPage = PGM_GST_NAME(ModifyPage);
147#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
148 pModeData->pfnR3GstMonitorCR3 = PGM_GST_NAME(MonitorCR3);
149 pModeData->pfnR3GstUnmonitorCR3 = PGM_GST_NAME(UnmonitorCR3);
150#endif
151
152#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
153# if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
154 pModeData->pfnR3GstWriteHandlerCR3 = PGM_GST_NAME(WriteHandlerCR3);
155 pModeData->pszR3GstWriteHandlerCR3 = "Guest CR3 Write access handler";
156 pModeData->pfnR3GstPAEWriteHandlerCR3 = PGM_GST_NAME(WriteHandlerCR3);
157 pModeData->pszR3GstPAEWriteHandlerCR3 = "Guest CR3 Write access handler (PAE)";
158# else
159 pModeData->pfnR3GstWriteHandlerCR3 = NULL;
160 pModeData->pszR3GstWriteHandlerCR3 = NULL;
161 pModeData->pfnR3GstPAEWriteHandlerCR3 = NULL;
162 pModeData->pszR3GstPAEWriteHandlerCR3 = NULL;
163# endif
164#endif
165
166 if (fResolveGCAndR0)
167 {
168 int rc;
169
170#if PGM_SHW_TYPE != PGM_TYPE_AMD64 /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */
171 /* GC */
172 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(GetPage), &pModeData->pfnRCGstGetPage);
173 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(GetPage), rc), rc);
174 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(ModifyPage), &pModeData->pfnRCGstModifyPage);
175 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(ModifyPage), rc), rc);
176 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(GetPDE), &pModeData->pfnRCGstGetPDE);
177 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(GetPDE), rc), rc);
178# ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
179 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(MonitorCR3), &pModeData->pfnRCGstMonitorCR3);
180 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(MonitorCR3), rc), rc);
181 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(UnmonitorCR3), &pModeData->pfnRCGstUnmonitorCR3);
182 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(UnmonitorCR3), rc), rc);
183# endif
184# ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
185# if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
186 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(WriteHandlerCR3), &pModeData->pfnRCGstWriteHandlerCR3);
187 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(WriteHandlerCR3), rc), rc);
188 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(WriteHandlerCR3), &pModeData->pfnRCGstPAEWriteHandlerCR3);
189 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(WriteHandlerCR3), rc), rc);
190# endif
191# endif
192#endif /* Not AMD64 shadow paging. */
193
194 /* Ring-0 */
195 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(GetPage), &pModeData->pfnR0GstGetPage);
196 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(GetPage), rc), rc);
197 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(ModifyPage), &pModeData->pfnR0GstModifyPage);
198 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(ModifyPage), rc), rc);
199 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(GetPDE), &pModeData->pfnR0GstGetPDE);
200 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(GetPDE), rc), rc);
201#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
202 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(MonitorCR3), &pModeData->pfnR0GstMonitorCR3);
203 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(MonitorCR3), rc), rc);
204 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(UnmonitorCR3), &pModeData->pfnR0GstUnmonitorCR3);
205 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(UnmonitorCR3), rc), rc);
206#endif
207#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
208# if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
209 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(WriteHandlerCR3), &pModeData->pfnR0GstWriteHandlerCR3);
210 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(WriteHandlerCR3), rc), rc);
211 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(WriteHandlerCR3), &pModeData->pfnR0GstPAEWriteHandlerCR3);
212 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(WriteHandlerCR3), rc), rc);
213# endif
214#endif
215 }
216
217 return VINF_SUCCESS;
218}
219
220
221/**
222 * Enters the guest mode.
223 *
224 * @returns VBox status code.
225 * @param pVM VM handle.
226 * @param GCPhysCR3 The physical address from the CR3 register.
227 */
228PGM_GST_DECL(int, Enter)(PVM pVM, RTGCPHYS GCPhysCR3)
229{
230 /*
231 * Map and monitor CR3
232 */
233#ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
234 int rc = PGM_BTH_PFN(MapCR3, pVM)(pVM, GCPhysCR3);
235#else
236 int rc = PGM_BTH_NAME(MapCR3)(pVM, GCPhysCR3);
237 if (RT_SUCCESS(rc) && !pVM->pgm.s.fMappingsFixed)
238 rc = PGM_GST_NAME(MonitorCR3)(pVM, GCPhysCR3);
239#endif
240 return rc;
241}
242
243
244/**
245 * Relocate any GC pointers related to guest mode paging.
246 *
247 * @returns VBox status code.
248 * @param pVM The VM handle.
249 * @param offDelta The reloation offset.
250 */
251PGM_GST_DECL(int, Relocate)(PVM pVM, RTGCPTR offDelta)
252{
253 /* nothing special to do here - InitData does the job. */
254 return VINF_SUCCESS;
255}
256
257
258/**
259 * Exits the guest mode.
260 *
261 * @returns VBox status code.
262 * @param pVM VM handle.
263 */
264PGM_GST_DECL(int, Exit)(PVM pVM)
265{
266 int rc;
267
268#ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
269 rc = PGM_BTH_PFN(UnmapCR3, pVM)(pVM);
270#else
271 rc = PGM_GST_NAME(UnmonitorCR3)(pVM);
272 if (RT_SUCCESS(rc))
273 rc = PGM_BTH_NAME(UnmapCR3)(pVM);
274#endif
275 return rc;
276}
277
278
279#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
280
281#if PGM_GST_TYPE == PGM_TYPE_32BIT
282/**
283 * Physical write access for the Guest CR3 in 32-bit mode.
284 *
285 * @returns VINF_SUCCESS if the handler have carried out the operation.
286 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
287 * @param pVM VM Handle.
288 * @param GCPhys The physical address the guest is writing to.
289 * @param pvPhys The HC mapping of that address.
290 * @param pvBuf What the guest is reading/writing.
291 * @param cbBuf How much it's reading/writing.
292 * @param enmAccessType The access type.
293 * @param pvUser User argument.
294 */
295static DECLCALLBACK(int) pgmR3Gst32BitWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
296{
297 AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
298 Assert(enmAccessType == PGMACCESSTYPE_WRITE);
299 Log2(("pgmR3Gst32BitWriteHandlerCR3: ff=%#x GCPhys=%RGp pvPhys=%p cbBuf=%d pvBuf={%.*Rhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
300
301 /*
302 * Do the write operation.
303 */
304 memcpy(pvPhys, pvBuf, cbBuf);
305 if ( !pVM->pgm.s.fMappingsFixed
306 && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
307 {
308 /*
309 * Check for conflicts.
310 */
311 const RTGCPTR offPD = GCPhys & PAGE_OFFSET_MASK;
312 const unsigned iPD1 = offPD / sizeof(X86PDE);
313 const unsigned iPD2 = (unsigned)(offPD + cbBuf - 1) / sizeof(X86PDE);
314 Assert(iPD1 - iPD2 <= 1);
315 if ( ( pVM->pgm.s.pGst32BitPdR3->a[iPD1].n.u1Present
316 && pgmGetMapping(pVM, iPD1 << X86_PD_SHIFT) )
317 || ( iPD1 != iPD2
318 && pVM->pgm.s.pGst32BitPdR3->a[iPD2].n.u1Present
319 && pgmGetMapping(pVM, iPD2 << X86_PD_SHIFT) )
320 )
321 {
322 Log(("pgmR3Gst32BitWriteHandlerCR3: detected conflict. iPD1=%#x iPD2=%#x GCPhys=%RGp\n", iPD1, iPD2, GCPhys));
323 STAM_COUNTER_INC(&pVM->pgm.s.StatR3GuestPDWriteConflict);
324 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
325 }
326 }
327
328 STAM_COUNTER_INC(&pVM->pgm.s.StatR3GuestPDWrite);
329 return VINF_SUCCESS;
330}
331#endif /* 32BIT */
332
333#if PGM_GST_TYPE == PGM_TYPE_PAE
334
335/**
336 * Physical write access handler for the Guest CR3 in PAE mode.
337 *
338 * @returns VINF_SUCCESS if the handler have carried out the operation.
339 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
340 * @param pVM VM Handle.
341 * @param GCPhys The physical address the guest is writing to.
342 * @param pvPhys The HC mapping of that address.
343 * @param pvBuf What the guest is reading/writing.
344 * @param cbBuf How much it's reading/writing.
345 * @param enmAccessType The access type.
346 * @param pvUser User argument.
347 */
348static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
349{
350 AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
351 Assert(enmAccessType == PGMACCESSTYPE_WRITE);
352 Log2(("pgmR3GstPAEWriteHandlerCR3: ff=%#x GCPhys=%RGp pvPhys=%p cbBuf=%d pvBuf={%.*Rhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
353
354 /*
355 * Do the write operation.
356 */
357 memcpy(pvPhys, pvBuf, cbBuf);
358 if ( !pVM->pgm.s.fMappingsFixed
359 && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
360 {
361 /*
362 * Check if any of the PDs have changed.
363 * We'll simply check all of them instead of figuring out which one/two to check.
364 */
365 for (unsigned i = 0; i < 4; i++)
366 {
367 if ( pVM->pgm.s.pGstPaePdptR3->a[i].n.u1Present
368 && (pVM->pgm.s.pGstPaePdptR3->a[i].u & X86_PDPE_PG_MASK) != pVM->pgm.s.aGCPhysGstPaePDsMonitored[i])
369 {
370 Log(("pgmR3GstPAEWriteHandlerCR3: detected updated PDPE; [%d] = %#llx, Old GCPhys=%RGp\n",
371 i, pVM->pgm.s.pGstPaePdptR3->a[i].u, pVM->pgm.s.aGCPhysGstPaePDsMonitored[i]));
372 /*
373 * The PD has changed.
374 * We will schedule a monitoring update for the next TLB Flush,
375 * InvalidatePage or SyncCR3.
376 *
377 * This isn't perfect, because a lazy page sync might be dealing with an half
378 * updated PDPE. However, we assume that the guest OS is disabling interrupts
379 * and being extremely careful (cmpxchg8b) when updating a PDPE where it's
380 * executing.
381 */
382 pVM->pgm.s.fSyncFlags |= PGM_SYNC_MONITOR_CR3;
383 }
384 }
385 }
386 /*
387 * Flag a updating of the monitor at the next crossroad so we don't monitor the
388 * wrong pages for soo long that they can be reused as code pages and freak out
389 * the recompiler or something.
390 */
391 else
392 pVM->pgm.s.fSyncFlags |= PGM_SYNC_MONITOR_CR3;
393
394
395 STAM_COUNTER_INC(&pVM->pgm.s.StatR3GuestPDWrite);
396 return VINF_SUCCESS;
397}
398
399#endif /* PAE */
400#endif /* !VBOX_WITH_PGMPOOL_PAGING_ONLY */
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