VirtualBox

source: vbox/trunk/src/VBox/VMM/PGMGst.h@ 16916

Last change on this file since 16916 was 16907, checked in by vboxsync, 16 years ago

VBOX_WITH_PGMPOOL_PAGING_ONLY: changes for marking root pages as special.
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1/* $Id: PGMGst.h 16907 2009-02-18 15:04:16Z vboxsync $ */
2/** @file
3 * VBox - Page Manager / Monitor, Guest Paging Template.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22/*******************************************************************************
23* Defined Constants And Macros *
24*******************************************************************************/
25#undef GSTPT
26#undef PGSTPT
27#undef GSTPTE
28#undef PGSTPTE
29#undef GSTPD
30#undef PGSTPD
31#undef GSTPDE
32#undef PGSTPDE
33#undef GST_BIG_PAGE_SIZE
34#undef GST_BIG_PAGE_OFFSET_MASK
35#undef GST_PDE_PG_MASK
36#undef GST_PDE_BIG_PG_MASK
37#undef GST_PD_SHIFT
38#undef GST_PD_MASK
39#undef GST_PTE_PG_MASK
40#undef GST_PT_SHIFT
41#undef GST_PT_MASK
42#undef GST_TOTAL_PD_ENTRIES
43#undef GST_CR3_PAGE_MASK
44#undef GST_PDPE_ENTRIES
45#undef GST_GET_PDE_BIG_PG_GCPHYS
46
47#if PGM_GST_TYPE == PGM_TYPE_32BIT \
48 || PGM_GST_TYPE == PGM_TYPE_REAL \
49 || PGM_GST_TYPE == PGM_TYPE_PROT
50# define GSTPT X86PT
51# define PGSTPT PX86PT
52# define GSTPTE X86PTE
53# define PGSTPTE PX86PTE
54# define GSTPD X86PD
55# define PGSTPD PX86PD
56# define GSTPDE X86PDE
57# define PGSTPDE PX86PDE
58# define GST_BIG_PAGE_SIZE X86_PAGE_4M_SIZE
59# define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_4M_OFFSET_MASK
60# define GST_PDE_PG_MASK X86_PDE_PG_MASK
61# define GST_PDE_BIG_PG_MASK X86_PDE4M_PG_MASK
62# define GST_GET_PDE_BIG_PG_GCPHYS(PdeGst) pgmGstGet4MBPhysPage(&pVM->pgm.s, PdeGst)
63# define GST_PD_SHIFT X86_PD_SHIFT
64# define GST_PD_MASK X86_PD_MASK
65# define GST_TOTAL_PD_ENTRIES X86_PG_ENTRIES
66# define GST_PTE_PG_MASK X86_PTE_PG_MASK
67# define GST_PT_SHIFT X86_PT_SHIFT
68# define GST_PT_MASK X86_PT_MASK
69# define GST_CR3_PAGE_MASK X86_CR3_PAGE_MASK
70
71#elif PGM_GST_TYPE == PGM_TYPE_PAE \
72 || PGM_GST_TYPE == PGM_TYPE_AMD64
73# define GSTPT X86PTPAE
74# define PGSTPT PX86PTPAE
75# define GSTPTE X86PTEPAE
76# define PGSTPTE PX86PTEPAE
77# define GSTPD X86PDPAE
78# define PGSTPD PX86PDPAE
79# define GSTPDE X86PDEPAE
80# define PGSTPDE PX86PDEPAE
81# define GST_BIG_PAGE_SIZE X86_PAGE_2M_SIZE
82# define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_2M_OFFSET_MASK
83# define GST_PDE_PG_MASK X86_PDE_PAE_PG_MASK
84# define GST_PDE_BIG_PG_MASK X86_PDE2M_PAE_PG_MASK
85# define GST_GET_PDE_BIG_PG_GCPHYS(PdeGst) (PdeGst.u & GST_PDE_BIG_PG_MASK)
86# define GST_PD_SHIFT X86_PD_PAE_SHIFT
87# define GST_PD_MASK X86_PD_PAE_MASK
88# if PGM_GST_TYPE == PGM_TYPE_PAE
89# define GST_TOTAL_PD_ENTRIES (X86_PG_PAE_ENTRIES * X86_PG_PAE_PDPE_ENTRIES)
90# define GST_PDPE_ENTRIES X86_PG_PAE_PDPE_ENTRIES
91# else
92# define GST_TOTAL_PD_ENTRIES (X86_PG_AMD64_ENTRIES * X86_PG_AMD64_PDPE_ENTRIES)
93# define GST_PDPE_ENTRIES X86_PG_AMD64_PDPE_ENTRIES
94# endif
95# define GST_PTE_PG_MASK X86_PTE_PAE_PG_MASK
96# define GST_PT_SHIFT X86_PT_PAE_SHIFT
97# define GST_PT_MASK X86_PT_PAE_MASK
98# define GST_CR3_PAGE_MASK X86_CR3_PAE_PAGE_MASK
99#endif
100
101
102/*******************************************************************************
103* Internal Functions *
104*******************************************************************************/
105__BEGIN_DECLS
106/* r3 */
107PGM_GST_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0);
108PGM_GST_DECL(int, Enter)(PVM pVM, RTGCPHYS GCPhysCR3);
109PGM_GST_DECL(int, Relocate)(PVM pVM, RTGCPTR offDelta);
110PGM_GST_DECL(int, Exit)(PVM pVM);
111
112#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
113static DECLCALLBACK(int) pgmR3Gst32BitWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
114static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
115#endif
116
117/* all */
118PGM_GST_DECL(int, GetPage)(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
119PGM_GST_DECL(int, ModifyPage)(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
120PGM_GST_DECL(int, GetPDE)(PVM pVM, RTGCPTR GCPtr, PX86PDEPAE pPDE);
121PGM_GST_DECL(int, MonitorCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
122PGM_GST_DECL(int, UnmonitorCR3)(PVM pVM);
123__END_DECLS
124
125
126/**
127 * Initializes the guest bit of the paging mode data.
128 *
129 * @returns VBox status code.
130 * @param pVM The VM handle.
131 * @param fResolveGCAndR0 Indicate whether or not GC and Ring-0 symbols can be resolved now.
132 * This is used early in the init process to avoid trouble with PDM
133 * not being initialized yet.
134 */
135PGM_GST_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0)
136{
137 Assert(pModeData->uGstType == PGM_GST_TYPE);
138
139 /* Ring-3 */
140 pModeData->pfnR3GstRelocate = PGM_GST_NAME(Relocate);
141 pModeData->pfnR3GstExit = PGM_GST_NAME(Exit);
142 pModeData->pfnR3GstGetPDE = PGM_GST_NAME(GetPDE);
143 pModeData->pfnR3GstGetPage = PGM_GST_NAME(GetPage);
144 pModeData->pfnR3GstModifyPage = PGM_GST_NAME(ModifyPage);
145 pModeData->pfnR3GstMonitorCR3 = PGM_GST_NAME(MonitorCR3);
146 pModeData->pfnR3GstUnmonitorCR3 = PGM_GST_NAME(UnmonitorCR3);
147
148#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
149# if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
150 pModeData->pfnR3GstWriteHandlerCR3 = PGM_GST_NAME(WriteHandlerCR3);
151 pModeData->pszR3GstWriteHandlerCR3 = "Guest CR3 Write access handler";
152 pModeData->pfnR3GstPAEWriteHandlerCR3 = PGM_GST_NAME(WriteHandlerCR3);
153 pModeData->pszR3GstPAEWriteHandlerCR3 = "Guest CR3 Write access handler (PAE)";
154# else
155 pModeData->pfnR3GstWriteHandlerCR3 = NULL;
156 pModeData->pszR3GstWriteHandlerCR3 = NULL;
157 pModeData->pfnR3GstPAEWriteHandlerCR3 = NULL;
158 pModeData->pszR3GstPAEWriteHandlerCR3 = NULL;
159# endif
160#endif
161
162 if (fResolveGCAndR0)
163 {
164 int rc;
165
166#if PGM_SHW_TYPE != PGM_TYPE_AMD64 /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */
167 /* GC */
168 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(GetPage), &pModeData->pfnRCGstGetPage);
169 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(GetPage), rc), rc);
170 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(ModifyPage), &pModeData->pfnRCGstModifyPage);
171 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(ModifyPage), rc), rc);
172 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(GetPDE), &pModeData->pfnRCGstGetPDE);
173 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(GetPDE), rc), rc);
174 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(MonitorCR3), &pModeData->pfnRCGstMonitorCR3);
175 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(MonitorCR3), rc), rc);
176 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(UnmonitorCR3), &pModeData->pfnRCGstUnmonitorCR3);
177 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(UnmonitorCR3), rc), rc);
178# ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
179# if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
180 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(WriteHandlerCR3), &pModeData->pfnRCGstWriteHandlerCR3);
181 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(WriteHandlerCR3), rc), rc);
182 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_GST_NAME_RC_STR(WriteHandlerCR3), &pModeData->pfnRCGstPAEWriteHandlerCR3);
183 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(WriteHandlerCR3), rc), rc);
184# endif
185# endif
186#endif /* Not AMD64 shadow paging. */
187
188 /* Ring-0 */
189 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(GetPage), &pModeData->pfnR0GstGetPage);
190 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(GetPage), rc), rc);
191 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(ModifyPage), &pModeData->pfnR0GstModifyPage);
192 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(ModifyPage), rc), rc);
193 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(GetPDE), &pModeData->pfnR0GstGetPDE);
194 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(GetPDE), rc), rc);
195 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(MonitorCR3), &pModeData->pfnR0GstMonitorCR3);
196 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(MonitorCR3), rc), rc);
197 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(UnmonitorCR3), &pModeData->pfnR0GstUnmonitorCR3);
198 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(UnmonitorCR3), rc), rc);
199#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
200# if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
201 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(WriteHandlerCR3), &pModeData->pfnR0GstWriteHandlerCR3);
202 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(WriteHandlerCR3), rc), rc);
203 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(WriteHandlerCR3), &pModeData->pfnR0GstPAEWriteHandlerCR3);
204 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(WriteHandlerCR3), rc), rc);
205# endif
206#endif
207 }
208
209 return VINF_SUCCESS;
210}
211
212
213/**
214 * Enters the guest mode.
215 *
216 * @returns VBox status code.
217 * @param pVM VM handle.
218 * @param GCPhysCR3 The physical address from the CR3 register.
219 */
220PGM_GST_DECL(int, Enter)(PVM pVM, RTGCPHYS GCPhysCR3)
221{
222 /*
223 * Map and monitor CR3
224 */
225#ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
226 int rc = PGM_BTH_PFN(MapCR3, pVM)(pVM, GCPhysCR3);
227#else
228 int rc = PGM_BTH_NAME(MapCR3)(pVM, GCPhysCR3);
229#endif
230 if (RT_SUCCESS(rc) && !pVM->pgm.s.fMappingsFixed)
231 rc = PGM_GST_NAME(MonitorCR3)(pVM, GCPhysCR3);
232 return rc;
233}
234
235
236/**
237 * Relocate any GC pointers related to guest mode paging.
238 *
239 * @returns VBox status code.
240 * @param pVM The VM handle.
241 * @param offDelta The reloation offset.
242 */
243PGM_GST_DECL(int, Relocate)(PVM pVM, RTGCPTR offDelta)
244{
245 /* nothing special to do here - InitData does the job. */
246 return VINF_SUCCESS;
247}
248
249
250/**
251 * Exits the guest mode.
252 *
253 * @returns VBox status code.
254 * @param pVM VM handle.
255 */
256PGM_GST_DECL(int, Exit)(PVM pVM)
257{
258 int rc;
259
260 rc = PGM_GST_NAME(UnmonitorCR3)(pVM);
261 if (RT_SUCCESS(rc))
262#ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
263 rc = PGM_BTH_PFN(UnmapCR3, pVM)(pVM);
264#else
265 rc = PGM_BTH_NAME(UnmapCR3)(pVM);
266#endif
267 return rc;
268}
269
270
271#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
272
273#if PGM_GST_TYPE == PGM_TYPE_32BIT
274/**
275 * Physical write access for the Guest CR3 in 32-bit mode.
276 *
277 * @returns VINF_SUCCESS if the handler have carried out the operation.
278 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
279 * @param pVM VM Handle.
280 * @param GCPhys The physical address the guest is writing to.
281 * @param pvPhys The HC mapping of that address.
282 * @param pvBuf What the guest is reading/writing.
283 * @param cbBuf How much it's reading/writing.
284 * @param enmAccessType The access type.
285 * @param pvUser User argument.
286 */
287static DECLCALLBACK(int) pgmR3Gst32BitWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
288{
289 AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
290 Assert(enmAccessType == PGMACCESSTYPE_WRITE);
291 Log2(("pgmR3Gst32BitWriteHandlerCR3: ff=%#x GCPhys=%RGp pvPhys=%p cbBuf=%d pvBuf={%.*Rhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
292
293 /*
294 * Do the write operation.
295 */
296 memcpy(pvPhys, pvBuf, cbBuf);
297 if ( !pVM->pgm.s.fMappingsFixed
298 && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
299 {
300 /*
301 * Check for conflicts.
302 */
303 const RTGCPTR offPD = GCPhys & PAGE_OFFSET_MASK;
304 const unsigned iPD1 = offPD / sizeof(X86PDE);
305 const unsigned iPD2 = (unsigned)(offPD + cbBuf - 1) / sizeof(X86PDE);
306 Assert(iPD1 - iPD2 <= 1);
307 if ( ( pVM->pgm.s.pGst32BitPdR3->a[iPD1].n.u1Present
308 && pgmGetMapping(pVM, iPD1 << X86_PD_SHIFT) )
309 || ( iPD1 != iPD2
310 && pVM->pgm.s.pGst32BitPdR3->a[iPD2].n.u1Present
311 && pgmGetMapping(pVM, iPD2 << X86_PD_SHIFT) )
312 )
313 {
314 Log(("pgmR3Gst32BitWriteHandlerCR3: detected conflict. iPD1=%#x iPD2=%#x GCPhys=%RGp\n", iPD1, iPD2, GCPhys));
315 STAM_COUNTER_INC(&pVM->pgm.s.StatR3GuestPDWriteConflict);
316 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
317 }
318 }
319
320 STAM_COUNTER_INC(&pVM->pgm.s.StatR3GuestPDWrite);
321 return VINF_SUCCESS;
322}
323#endif /* 32BIT */
324
325#if PGM_GST_TYPE == PGM_TYPE_PAE
326
327/**
328 * Physical write access handler for the Guest CR3 in PAE mode.
329 *
330 * @returns VINF_SUCCESS if the handler have carried out the operation.
331 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
332 * @param pVM VM Handle.
333 * @param GCPhys The physical address the guest is writing to.
334 * @param pvPhys The HC mapping of that address.
335 * @param pvBuf What the guest is reading/writing.
336 * @param cbBuf How much it's reading/writing.
337 * @param enmAccessType The access type.
338 * @param pvUser User argument.
339 */
340static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
341{
342 AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
343 Assert(enmAccessType == PGMACCESSTYPE_WRITE);
344 Log2(("pgmR3GstPAEWriteHandlerCR3: ff=%#x GCPhys=%RGp pvPhys=%p cbBuf=%d pvBuf={%.*Rhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
345
346 /*
347 * Do the write operation.
348 */
349 memcpy(pvPhys, pvBuf, cbBuf);
350 if ( !pVM->pgm.s.fMappingsFixed
351 && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
352 {
353 /*
354 * Check if any of the PDs have changed.
355 * We'll simply check all of them instead of figuring out which one/two to check.
356 */
357 for (unsigned i = 0; i < 4; i++)
358 {
359 if ( pVM->pgm.s.pGstPaePdptR3->a[i].n.u1Present
360 && (pVM->pgm.s.pGstPaePdptR3->a[i].u & X86_PDPE_PG_MASK) != pVM->pgm.s.aGCPhysGstPaePDsMonitored[i])
361 {
362 Log(("pgmR3GstPAEWriteHandlerCR3: detected updated PDPE; [%d] = %#llx, Old GCPhys=%RGp\n",
363 i, pVM->pgm.s.pGstPaePdptR3->a[i].u, pVM->pgm.s.aGCPhysGstPaePDsMonitored[i]));
364 /*
365 * The PD has changed.
366 * We will schedule a monitoring update for the next TLB Flush,
367 * InvalidatePage or SyncCR3.
368 *
369 * This isn't perfect, because a lazy page sync might be dealing with an half
370 * updated PDPE. However, we assume that the guest OS is disabling interrupts
371 * and being extremely careful (cmpxchg8b) when updating a PDPE where it's
372 * executing.
373 */
374 pVM->pgm.s.fSyncFlags |= PGM_SYNC_MONITOR_CR3;
375 }
376 }
377 }
378 /*
379 * Flag a updating of the monitor at the next crossroad so we don't monitor the
380 * wrong pages for soo long that they can be reused as code pages and freak out
381 * the recompiler or something.
382 */
383 else
384 pVM->pgm.s.fSyncFlags |= PGM_SYNC_MONITOR_CR3;
385
386
387 STAM_COUNTER_INC(&pVM->pgm.s.StatR3GuestPDWrite);
388 return VINF_SUCCESS;
389}
390
391#endif /* PAE */
392#endif /* !VBOX_WITH_PGMPOOL_PAGING_ONLY */
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