PGMInternal.h@ 2273

Last change on this file since 2273 was 2270, checked in by vboxsync, 18 years ago
Stricter pointer typechecking. (R0 vs R3)
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1	/* $Id: PGMInternal.h 2270 2007-04-20 12:58:15Z vboxsync $ */
2	/** @file
3	* PGM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2006 InnoTek Systemberatung GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* If you received this file as part of a commercial VirtualBox
18	* distribution, then only the terms of your commercial VirtualBox
19	* license agreement apply instead of the previous paragraph.
20	*/
21
22	#ifndef __PGMInternal_h__
23	#define __PGMInternal_h__
24
25	#include <VBox/cdefs.h>
26	#include <VBox/types.h>
27	#include <VBox/err.h>
28	#include <VBox/stam.h>
29	#include <VBox/param.h>
30	#include <VBox/vmm.h>
31	#include <VBox/mm.h>
32	#include <VBox/pdm.h>
33	#include <iprt/avl.h>
34	#include <iprt/assert.h>
35	#include <iprt/critsect.h>
36
37	#if !defined(IN_PGM_R3) && !defined(IN_PGM_R0) && !defined(IN_PGM_GC)
38	# error "Not in PGM! This is an internal header!"
39	#endif
40
41
42	/** @defgroup grp_pgm_int Internals
43	* @ingroup grp_pgm
44	* @internal
45	* @{
46	*/
47
48
49	/** @name PGM Compile Time Config
50	* @{
51	*/
52
53	/**
54	* Solve page is out of sync issues inside Guest Context (in PGMGC.cpp).
55	* Comment it if it will break something.
56	*/
57	#define PGM_OUT_OF_SYNC_IN_GC
58
59	/**
60	* Virtualize the dirty bit
61	* This also makes a half-hearted attempt at the accessed bit. For full
62	* accessed bit virtualization define PGM_SYNC_ACCESSED_BIT.
63	*/
64	#define PGM_SYNC_DIRTY_BIT
65
66	/**
67	* Fully virtualize the accessed bit.
68	* @remark This requires SYNC_DIRTY_ACCESSED_BITS to be defined!
69	*/
70	#define PGM_SYNC_ACCESSED_BIT
71
72	/**
73	* Check and skip global PDEs for non-global flushes
74	*/
75	#define PGM_SKIP_GLOBAL_PAGEDIRS_ON_NONGLOBAL_FLUSH
76
77	/**
78	* Sync N pages instead of a whole page table
79	*/
80	#define PGM_SYNC_N_PAGES
81
82	/**
83	* Number of pages to sync during a page fault
84	*
85	* When PGMPOOL_WITH_GCPHYS_TRACKING is enabled using high values here
86	* causes a lot of unnecessary extents and also is slower than taking more \#PFs.
87	*/
88	#define PGM_SYNC_NR_PAGES 8
89
90	/**
91	* Number of PGMPhysRead/Write cache entries (must be <= sizeof(uint64_t))
92	*/
93	#define PGM_MAX_PHYSCACHE_ENTRIES 64
94	#define PGM_MAX_PHYSCACHE_ENTRIES_MASK (PGM_MAX_PHYSCACHE_ENTRIES-1)
95
96	/**
97	* Enable caching of PGMR3PhysRead/WriteByte/Word/Dword
98	*/
99	#define PGM_PHYSMEMACCESS_CACHING
100
101	/*
102	* Assert Sanity.
103	*/
104	#if defined(PGM_SYNC_ACCESSED_BIT) && !defined(PGM_SYNC_DIRTY_BIT)
105	# error "PGM_SYNC_ACCESSED_BIT requires PGM_SYNC_DIRTY_BIT!"
106	#endif
107
108	/** @def PGMPOOL_WITH_CACHE
109	* Enable agressive caching using the page pool.
110	*
111	* This requires PGMPOOL_WITH_USER_TRACKING and PGMPOOL_WITH_MONITORING.
112	*/
113	#define PGMPOOL_WITH_CACHE
114
115	/** @def PGMPOOL_WITH_MIXED_PT_CR3
116	* When defined, we'll deal with 'uncachable' pages.
117	*/
118	#ifdef PGMPOOL_WITH_CACHE
119	# define PGMPOOL_WITH_MIXED_PT_CR3
120	#endif
121
122	/** @def PGMPOOL_WITH_MONITORING
123	* Monitor the guest pages which are shadowed.
124	* When this is enabled, PGMPOOL_WITH_CACHE or PGMPOOL_WITH_GCPHYS_TRACKING must
125	* be enabled as well.
126	* @remark doesn't really work without caching now. (Mixed PT/CR3 change.)
127	*/
128	#ifdef PGMPOOL_WITH_CACHE
129	# define PGMPOOL_WITH_MONITORING
130	#endif
131
132	/** @def PGMPOOL_WITH_GCPHYS_TRACKING
133	* Tracking the of shadow pages mapping guest physical pages.
134	*
135	* This is very expensive, the current cache prototype is trying to figure out
136	* whether it will be acceptable with an agressive caching policy.
137	*/
138	#if defined(PGMPOOL_WITH_CACHE) \|\| defined(PGMPOOL_WITH_MONITORING)
139	# define PGMPOOL_WITH_GCPHYS_TRACKING
140	#endif
141
142	/** @def PGMPOOL_WITH_USER_TRACKING
143	* Tracking users of shadow pages. This is required for the linking of shadow page
144	* tables and physical guest addresses.
145	*/
146	#if defined(PGMPOOL_WITH_GCPHYS_TRACKING) \|\| defined(PGMPOOL_WITH_CACHE) \|\| defined(PGMPOOL_WITH_MONITORING)
147	# define PGMPOOL_WITH_USER_TRACKING
148	#endif
149
150	/** @def PGMPOOL_CFG_MAX_GROW
151	* The maximum number of pages to add to the pool in one go.
152	*/
153	#define PGMPOOL_CFG_MAX_GROW (_256K >> PAGE_SHIFT)
154
155	/** @def VBOX_STRICT_PGM_HANDLER_VIRTUAL
156	* Enables some extra assertions for virtual handlers (mainly phys2virt related).
157	*/
158	#ifdef VBOX_STRICT
159	# define VBOX_STRICT_PGM_HANDLER_VIRTUAL
160	#endif
161	/** @} */
162
163
164	/** @name PDPTR and PML4 flags.
165	* These are placed in the three bits available for system programs in
166	* the PDPTR and PML4 entries.
167	* @{ */
168	/** The entry is a permanent one and it's must always be present.
169	* Never free such an entry. */
170	#define PGM_PLXFLAGS_PERMANENT BIT64(10)
171	/** @} */
172
173	/** @name Page directory flags.
174	* These are placed in the three bits available for system programs in
175	* the page directory entries.
176	* @{ */
177	/** Mapping (hypervisor allocated pagetable). */
178	#define PGM_PDFLAGS_MAPPING BIT64(10)
179	/** Made read-only to facilitate dirty bit tracking. */
180	#define PGM_PDFLAGS_TRACK_DIRTY BIT64(11)
181	/** @} */
182
183	/** @name Page flags.
184	* These are placed in the three bits available for system programs in
185	* the page entries.
186	* @{ */
187	/** Made read-only to facilitate dirty bit tracking. */
188	#define PGM_PTFLAGS_TRACK_DIRTY BIT64(9)
189
190	#ifndef PGM_PTFLAGS_CSAM_VALIDATED
191	/** Scanned and approved by CSAM (tm).
192	* NOTE: Must be identical to the one defined in CSAMInternal.h!!
193	* @todo Move PGM_PTFLAGS_* and PGM_PDFLAGS_* to VBox/pgm.h. */
194	#define PGM_PTFLAGS_CSAM_VALIDATED BIT64(11)
195	#endif
196	/** @} */
197
198	/** @name Defines used to indicate the shadow and guest paging in the templates.
199	* @{ */
200	#define PGM_TYPE_REAL 1
201	#define PGM_TYPE_PROT 2
202	#define PGM_TYPE_32BIT 3
203	#define PGM_TYPE_PAE 4
204	#define PGM_TYPE_AMD64 5
205	/** @} */
206
207	/** @name Defines used to check if the guest is using paging
208	* @{ */
209	#define PGM_WITH_PAGING(a) (a == PGM_TYPE_32BIT \|\| a == PGM_TYPE_PAE \|\| a == PGM_TYPE_AMD64)
210	/** @} */
211
212	/** @def PGM_HCPHYS_2_PTR
213	* Maps a HC physical page pool address to a virtual address.
214	*
215	* @returns VBox status code.
216	* @param pVM The VM handle.
217	* @param HCPhys The HC physical address to map to a virtual one.
218	* @param ppv Where to store the virtual address. No need to cast this.
219	*
220	* @remark In GC this uses PGMGCDynMapHCPage(), so it will consume of the
221	* small page window employeed by that function. Be careful.
222	* @remark There is no need to assert on the result.
223	*/
224	#ifdef IN_GC
225	# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) PGMGCDynMapHCPage(pVM, HCPhys, (void **)(ppv))
226	#else
227	# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) MMPagePhys2PageEx(pVM, HCPhys, (void **)(ppv))
228	#endif
229
230	/** @def PGM_GCPHYS_2_PTR
231	* Maps a GC physical page address to a virtual address.
232	*
233	* @returns VBox status code.
234	* @param pVM The VM handle.
235	* @param GCPhys The GC physical address to map to a virtual one.
236	* @param ppv Where to store the virtual address. No need to cast this.
237	*
238	* @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
239	* small page window employeed by that function. Be careful.
240	* @remark There is no need to assert on the result.
241	*/
242	#ifdef IN_GC
243	# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMGCDynMapGCPage(pVM, GCPhys, (void **)(ppv))
244	#else
245	# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1 /* one page only /, (void )(ppv)) /* @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
246	#endif
247
248	/** @def PGM_GCPHYS_2_PTR_EX
249	* Maps a unaligned GC physical page address to a virtual address.
250	*
251	* @returns VBox status code.
252	* @param pVM The VM handle.
253	* @param GCPhys The GC physical address to map to a virtual one.
254	* @param ppv Where to store the virtual address. No need to cast this.
255	*
256	* @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
257	* small page window employeed by that function. Be careful.
258	* @remark There is no need to assert on the result.
259	*/
260	#ifdef IN_GC
261	# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMGCDynMapGCPageEx(pVM, GCPhys, (void **)(ppv))
262	#else
263	# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1 /* one page only /, (void )(ppv)) /* @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
264	#endif
265
266	/** @def PGM_INVL_PG
267	* Invalidates a page when in GC does nothing in HC.
268	*
269	* @param GCVirt The virtual address of the page to invalidate.
270	*/
271	#ifdef IN_GC
272	# define PGM_INVL_PG(GCVirt) ASMInvalidatePage((void *)(GCVirt))
273	#else
274	# define PGM_INVL_PG(GCVirt) ((void)0)
275	#endif
276
277	/** @def PGM_INVL_BIG_PG
278	* Invalidates a 4MB page directory entry when in GC does nothing in HC.
279	*
280	* @param GCVirt The virtual address within the page directory to invalidate.
281	*/
282	#ifdef IN_GC
283	# define PGM_INVL_BIG_PG(GCVirt) ASMReloadCR3()
284	#else
285	# define PGM_INVL_BIG_PG(GCVirt) ((void)0)
286	#endif
287
288	/** @def PGM_INVL_GUEST_TLBS()
289	* Invalidates all guest TLBs.
290	*/
291	#ifdef IN_GC
292	# define PGM_INVL_GUEST_TLBS() ASMReloadCR3()
293	#else
294	# define PGM_INVL_GUEST_TLBS() ((void)0)
295	#endif
296
297
298	/**
299	* Structure for tracking GC Mappings.
300	*
301	* This structure is used by linked list in both GC and HC.
302	*/
303	typedef struct PGMMAPPING
304	{
305	/** Pointer to next entry. */
306	R3PTRTYPE(struct PGMMAPPING *) pNextR3;
307	/** Pointer to next entry. */
308	GCPTRTYPE(struct PGMMAPPING *) pNextGC;
309	/** Pointer to next entry. */
310	R0PTRTYPE(struct PGMMAPPING *) pNextR0;
311	/** Start Virtual address. */
312	RTGCUINTPTR GCPtr;
313	/** Last Virtual address (inclusive). */
314	RTGCUINTPTR GCPtrLast;
315	/** Range size (bytes). */
316	RTGCUINTPTR cb;
317	/** Pointer to relocation callback function. */
318	R3PTRTYPE(PFNPGMRELOCATE) pfnRelocate;
319	/** User argument to the callback. */
320	R3PTRTYPE(void *) pvUser;
321	/** Mapping description / name. For easing debugging. */
322	R3PTRTYPE(const char *) pszDesc;
323	/** Number of page tables. */
324	RTUINT cPTs;
325	#if HC_ARCH_BITS != GC_ARCH_BITS
326	RTUINT uPadding0; /*< Alignment padding. /
327	#endif
328	/** Array of page table mapping data. Each entry
329	* describes one page table. The array can be longer
330	* than the declared length.
331	*/
332	struct
333	{
334	/** The HC physical address of the page table. */
335	RTHCPHYS HCPhysPT;
336	/** The HC physical address of the first PAE page table. */
337	RTHCPHYS HCPhysPaePT0;
338	/** The HC physical address of the second PAE page table. */
339	RTHCPHYS HCPhysPaePT1;
340	/** The HC virtual address of the 32-bit page table. */
341	R3PTRTYPE(PVBOXPT) pPTR3;
342	/** The HC virtual address of the two PAE page table. (i.e 1024 entries instead of 512) */
343	R3PTRTYPE(PX86PTPAE) paPaePTsR3;
344	/** The GC virtual address of the 32-bit page table. */
345	GCPTRTYPE(PVBOXPT) pPTGC;
346	/** The GC virtual address of the two PAE page table. */
347	GCPTRTYPE(PX86PTPAE) paPaePTsGC;
348	/** The GC virtual address of the 32-bit page table. */
349	R0PTRTYPE(PVBOXPT) pPTR0;
350	/** The GC virtual address of the two PAE page table. */
351	R0PTRTYPE(PX86PTPAE) paPaePTsR0;
352	} aPTs[1];
353	} PGMMAPPING;
354	/** Pointer to structure for tracking GC Mappings. */
355	typedef struct PGMMAPPING *PPGMMAPPING;
356
357
358	/**
359	* Physical page access handler structure.
360	*
361	* This is used to keep track of physical address ranges
362	* which are being monitored in some kind of way.
363	*/
364	typedef struct PGMPHYSHANDLER
365	{
366	AVLROGCPHYSNODECORE Core;
367	/** Alignment padding. */
368	uint32_t u32Padding;
369	/** Access type. */
370	PGMPHYSHANDLERTYPE enmType;
371	/** Number of pages to update. */
372	uint32_t cPages;
373	/** Pointer to R3 callback function. */
374	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3;
375	/** User argument for R3 handlers. */
376	R3PTRTYPE(void *) pvUserR3;
377	/** Pointer to R0 callback function. */
378	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0;
379	/** User argument for R0 handlers. */
380	R0PTRTYPE(void *) pvUserR0;
381	/** Pointer to GC callback function. */
382	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC;
383	/** User argument for GC handlers. */
384	GCPTRTYPE(void *) pvUserGC;
385	/** Description / Name. For easing debugging. */
386	R3PTRTYPE(const char *) pszDesc;
387	#ifdef VBOX_WITH_STATISTICS
388	/** Profiling of this handler. */
389	STAMPROFILE Stat;
390	#endif
391	} PGMPHYSHANDLER;
392	/** Pointer to a physical page access handler structure. */
393	typedef PGMPHYSHANDLER *PPGMPHYSHANDLER;
394
395
396	/**
397	* Cache node for the physical addresses covered by a virtual handler.
398	*/
399	typedef struct PGMPHYS2VIRTHANDLER
400	{
401	/** Core node for the tree based on physical ranges. */
402	AVLROGCPHYSNODECORE Core;
403	/** Offset from this struct to the PGMVIRTHANDLER structure. */
404	RTGCINTPTR offVirtHandler;
405	/** Offset of the next alias relativer to this one.
406	* Bit 0 is used for indicating whether we're in the tree.
407	* Bit 1 is used for indicating that we're the head node.
408	*/
409	int32_t offNextAlias;
410	} PGMPHYS2VIRTHANDLER;
411	/** Pointer to a phys to virtual handler structure. */
412	typedef PGMPHYS2VIRTHANDLER *PPGMPHYS2VIRTHANDLER;
413
414	/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
415	* node is in the tree. */
416	#define PGMPHYS2VIRTHANDLER_IN_TREE BIT(0)
417	/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
418	* node is in the head of an alias chain.
419	* The PGMPHYS2VIRTHANDLER_IN_TREE is always set if this bit is set. */
420	#define PGMPHYS2VIRTHANDLER_IS_HEAD BIT(1)
421	/** The mask to apply to PGMPHYS2VIRTHANDLER::offNextAlias to get the offset. */
422	#define PGMPHYS2VIRTHANDLER_OFF_MASK (~(int32_t)3)
423
424
425	/**
426	* Virtual page access handler structure.
427	*
428	* This is used to keep track of virtual address ranges
429	* which are being monitored in some kind of way.
430	*/
431	typedef struct PGMVIRTHANDLER
432	{
433	/** Core node for the tree based on virtual ranges. */
434	AVLROGCPTRNODECORE Core;
435	/** Number of cache pages. */
436	uint32_t u32Padding;
437	/** Access type. */
438	PGMVIRTHANDLERTYPE enmType;
439	/** Number of cache pages. */
440	uint32_t cPages;
441
442	/** @todo The next two members are redundant. It adds some readability though. */
443	/** Start of the range. */
444	RTGCPTR GCPtr;
445	/** End of the range (exclusive). */
446	RTGCPTR GCPtrLast;
447	/** Size of the range (in bytes). */
448	RTGCUINTPTR cb;
449	/** Pointer to the GC callback function. */
450	GCPTRTYPE(PFNPGMGCVIRTHANDLER) pfnHandlerGC;
451	/** Pointer to the HC callback function for invalidation. */
452	HCPTRTYPE(PFNPGMHCVIRTINVALIDATE) pfnInvalidateHC;
453	/** Pointer to the HC callback function. */
454	HCPTRTYPE(PFNPGMHCVIRTHANDLER) pfnHandlerHC;
455	/** Description / Name. For easing debugging. */
456	HCPTRTYPE(const char *) pszDesc;
457	#ifdef VBOX_WITH_STATISTICS
458	/** Profiling of this handler. */
459	STAMPROFILE Stat;
460	#endif
461	/** Array of cached physical addresses for the monitored ranged. */
462	PGMPHYS2VIRTHANDLER aPhysToVirt[HC_ARCH_BITS == 32 ? 1 : 2];
463	} PGMVIRTHANDLER;
464	/** Pointer to a virtual page access handler structure. */
465	typedef PGMVIRTHANDLER *PPGMVIRTHANDLER;
466
467
468	/**
469	* Ram range for GC Phys to HC Phys conversion.
470	*
471	* Can be used for HC Virt to GC Phys and HC Virt to HC Phys
472	* conversions too, but we'll let MM handle that for now.
473	*
474	* This structure is used by linked lists in both GC and HC.
475	*/
476	typedef struct PGMRAMRANGE
477	{
478	/** Pointer to the next RAM range - for HC. */
479	HCPTRTYPE(struct PGMRAMRANGE *) pNextHC;
480	/** Pointer to the next RAM range - for GC. */
481	GCPTRTYPE(struct PGMRAMRANGE *) pNextGC;
482	/** Start of the range. Page aligned. */
483	RTGCPHYS GCPhys;
484	/** Last address in the range (inclusive). Page aligned (-1). */
485	RTGCPHYS GCPhysLast;
486	/** Size of the range. (Page aligned of course). */
487	RTGCPHYS cb;
488	/** MM_RAM_* flags */
489	uint32_t fFlags;
490
491	/** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
492	GCPTRTYPE(PRTHCPTR) pavHCChunkGC;
493	/** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
494	HCPTRTYPE(PRTHCPTR) pavHCChunkHC;
495
496	/** Start of the HC mapping of the range.
497	* For pure MMIO and dynamically allocated ranges this is NULL, while for all ranges this is a valid pointer. */
498	HCPTRTYPE(void *) pvHC;
499
500	/** Array of the flags and HC physical addresses corresponding to the range.
501	* The index is the page number in the range. The size is cb >> PAGE_SHIFT.
502	*
503	* The 12 lower bits of the physical address are flags and must be masked
504	* off to get the correct physical address.
505	*
506	* For pure MMIO ranges only the flags are valid.
507	*/
508	RTHCPHYS aHCPhys[1];
509	} PGMRAMRANGE;
510	/** Pointer to Ram range for GC Phys to HC Phys conversion. */
511	typedef PGMRAMRANGE *PPGMRAMRANGE;
512
513	/** Return hc ptr corresponding to the ram range and physical offset */
514	#define PGMRAMRANGE_GETHCPTR(pRam, off) \
515	(pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC) ? (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[(off >> PGM_DYNAMIC_CHUNK_SHIFT)] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK)) \
516	: (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
517
518	/** @todo r=bird: fix typename. */
519	/**
520	* PGMPhysRead/Write cache entry
521	*/
522	typedef struct PGMPHYSCACHE_ENTRY
523	{
524	/** HC pointer to physical page */
525	R3PTRTYPE(uint8_t *) pbHC;
526	/** GC Physical address for cache entry */
527	RTGCPHYS GCPhys;
528	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
529	RTGCPHYS u32Padding0; /*< alignment padding. /
530	#endif
531	} PGMPHYSCACHE_ENTRY;
532
533	/**
534	* PGMPhysRead/Write cache to reduce REM memory access overhead
535	*/
536	typedef struct PGMPHYSCACHE
537	{
538	/** Bitmap of valid cache entries */
539	uint64_t aEntries;
540	/** Cache entries */
541	PGMPHYSCACHE_ENTRY Entry[PGM_MAX_PHYSCACHE_ENTRIES];
542	} PGMPHYSCACHE;
543
544
545	/** @name PGM Pool Indexes.
546	* Aka. the unique shadow page identifier.
547	* @{ */
548	/** NIL page pool IDX. */
549	#define NIL_PGMPOOL_IDX 0
550	/** The first normal index. */
551	#define PGMPOOL_IDX_FIRST_SPECIAL 1
552	/** Page directory (32-bit root). */
553	#define PGMPOOL_IDX_PD 1
554	/** The extended PAE page directory (2048 entries, works as root currently). */
555	#define PGMPOOL_IDX_PAE_PD 2
556	/** Page Directory Pointer Table (PAE root, not currently used). */
557	#define PGMPOOL_IDX_PDPTR 3
558	/** Page Map Level-4 (64-bit root). */
559	#define PGMPOOL_IDX_PML4 4
560	/** The first normal index. */
561	#define PGMPOOL_IDX_FIRST 5
562	/** The last valid index. (inclusive, 14 bits) */
563	#define PGMPOOL_IDX_LAST 0x3fff
564	/** @} */
565
566	/** The NIL index for the parent chain. */
567	#define NIL_PGMPOOL_USER_INDEX ((uint16_t)0xffff)
568
569	/**
570	* Node in the chain linking a shadowed page to it's parent (user).
571	*/
572	#pragma pack(1)
573	typedef struct PGMPOOLUSER
574	{
575	/** The index to the next item in the chain. NIL_PGMPOOL_USER_INDEX is no next. */
576	uint16_t iNext;
577	/** The user page index. */
578	uint16_t iUser;
579	/** Index into the user table. */
580	uint16_t iUserTable;
581	} PGMPOOLUSER, *PPGMPOOLUSER;
582	typedef const PGMPOOLUSER *PCPGMPOOLUSER;
583	#pragma pack()
584
585
586	/** The NIL index for the phys ext chain. */
587	#define NIL_PGMPOOL_PHYSEXT_INDEX ((uint16_t)0xffff)
588
589	/**
590	* Node in the chain of physical cross reference extents.
591	*/
592	#pragma pack(1)
593	typedef struct PGMPOOLPHYSEXT
594	{
595	/** The index to the next item in the chain. NIL_PGMPOOL_PHYSEXT_INDEX is no next. */
596	uint16_t iNext;
597	/** The user page index. */
598	uint16_t aidx[3];
599	} PGMPOOLPHYSEXT, *PPGMPOOLPHYSEXT;
600	typedef const PGMPOOLPHYSEXT *PCPGMPOOLPHYSEXT;
601	#pragma pack()
602
603
604	/**
605	* The kind of page that's being shadowed.
606	*/
607	typedef enum PGMPOOLKIND
608	{
609	/** The virtual invalid 0 entry. */
610	PGMPOOLKIND_INVALID = 0,
611	/** The entry is free (=unused). */
612	PGMPOOLKIND_FREE,
613
614	/** Shw: 32-bit page table; Gst: no paging */
615	PGMPOOLKIND_32BIT_PT_FOR_PHYS,
616	/** Shw: 32-bit page table; Gst: 32-bit page table. */
617	PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT,
618	/** Shw: 32-bit page table; Gst: 4MB page. */
619	PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB,
620	/** Shw: PAE page table; Gst: no paging */
621	PGMPOOLKIND_PAE_PT_FOR_PHYS,
622	/** Shw: PAE page table; Gst: 32-bit page table. */
623	PGMPOOLKIND_PAE_PT_FOR_32BIT_PT,
624	/** Shw: PAE page table; Gst: Half of a 4MB page. */
625	PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB,
626	/** Shw: PAE page table; Gst: PAE page table. */
627	PGMPOOLKIND_PAE_PT_FOR_PAE_PT,
628	/** Shw: PAE page table; Gst: 2MB page. */
629	PGMPOOLKIND_PAE_PT_FOR_PAE_2MB,
630
631	/** Shw: PAE page directory; Gst: 32-bit page directory. */
632	PGMPOOLKIND_PAE_PD_FOR_32BIT_PD,
633	/** Shw: PAE page directory; Gst: PAE page directory. */
634	PGMPOOLKIND_PAE_PD_FOR_PAE_PD,
635
636	/** Shw: 64-bit page directory pointer table; Gst: 64-bit page directory pointer table. */
637	PGMPOOLKIND_64BIT_PDPTR_FOR_64BIT_PDPTR,
638
639	/** Shw: Root 32-bit page directory. */
640	PGMPOOLKIND_ROOT_32BIT_PD,
641	/** Shw: Root PAE page directory */
642	PGMPOOLKIND_ROOT_PAE_PD,
643	/** Shw: Root PAE page directory pointer table (legacy, 4 entries). */
644	PGMPOOLKIND_ROOT_PDPTR,
645	/** Shw: Root page map level-4 table. */
646	PGMPOOLKIND_ROOT_PML4,
647
648	/** The last valid entry. */
649	PGMPOOLKIND_LAST = PGMPOOLKIND_ROOT_PML4
650	} PGMPOOLKIND;
651
652
653	/**
654	* The tracking data for a page in the pool.
655	*/
656	typedef struct PGMPOOLPAGE
657	{
658	/** AVL node code with the (HC) physical address of this page. */
659	AVLOHCPHYSNODECORE Core;
660	/** Pointer to the HC mapping of the page. */
661	HCPTRTYPE(void *) pvPageHC;
662	/** The guest physical address. */
663	RTGCPHYS GCPhys;
664	/** The kind of page we're shadowing. (This is really a PGMPOOLKIND enum.) */
665	uint8_t enmKind;
666	uint8_t bPadding;
667	/** The index of this page. */
668	uint16_t idx;
669	/** The next entry in the list this page currently resides in.
670	* It's either in the free list or in the GCPhys hash. */
671	uint16_t iNext;
672	#ifdef PGMPOOL_WITH_USER_TRACKING
673	/** Head of the user chain. NIL_PGMPOOL_USER_INDEX if not currently in use. */
674	uint16_t iUserHead;
675	/** The number of present entries. */
676	uint16_t cPresent;
677	/** The first entry in the table which is present. */
678	uint16_t iFirstPresent;
679	#endif
680	#ifdef PGMPOOL_WITH_MONITORING
681	/** The number of modifications to the monitored page. */
682	uint16_t cModifications;
683	/** The next modified page. NIL_PGMPOOL_IDX if tail. */
684	uint16_t iModifiedNext;
685	/** The previous modified page. NIL_PGMPOOL_IDX if head. */
686	uint16_t iModifiedPrev;
687	/** The next page sharing access handler. NIL_PGMPOOL_IDX if tail. */
688	uint16_t iMonitoredNext;
689	/** The previous page sharing access handler. NIL_PGMPOOL_IDX if head. */
690	uint16_t iMonitoredPrev;
691	#endif
692	#ifdef PGMPOOL_WITH_CACHE
693	/** The next page in the age list. */
694	uint16_t iAgeNext;
695	/** The previous page in the age list. */
696	uint16_t iAgePrev;
697	/** @todo add more from PGMCache.h when merging with it. */
698	#endif /* PGMPOOL_WITH_CACHE */
699	/** Used to indicate that the page is zeroed. */
700	bool fZeroed;
701	/** Used to indicate that a PT has non-global entries. */
702	bool fSeenNonGlobal;
703	/** Used to indicate that we're monitoring writes to the guest page. */
704	bool fMonitored;
705	/** Used to indicate that the page is in the cache (e.g. in the GCPhys hash).
706	* (All pages are in the age list.) */
707	bool fCached;
708	/** This is used by the R3 access handlers when invoked by an async thread.
709	* It's a hack required because of REMR3NotifyHandlerPhysicalDeregister. */
710	bool volatile fReusedFlushPending;
711	/** Used to indicate that the guest is mapping the page is also used as a CR3.
712	* In these cases the access handler acts differently and will check
713	* for mapping conflicts like the normal CR3 handler.
714	* @todo When we change the CR3 shadowing to use pool pages, this flag can be
715	* replaced by a list of pages which share access handler.
716	*/
717	bool fCR3Mix;
718	#if HC_ARCH_BITS == 64 \|\| GC_ARCH_BITS == 64
719	bool Alignment[4]; /*< Align the structure size on a 64-bit boundrary. /
720	#endif
721	} PGMPOOLPAGE, PPGMPOOLPAGE, *PPPGMPOOLPAGE;
722
723
724	#ifdef PGMPOOL_WITH_CACHE
725	/** The hash table size. */
726	# define PGMPOOL_HASH_SIZE 0x40
727	/** The hash function. */
728	# define PGMPOOL_HASH(GCPhys) ( ((GCPhys) >> PAGE_SHIFT) & (PGMPOOL_HASH_SIZE - 1) )
729	#endif
730
731
732	/**
733	* The shadow page pool instance data.
734	*
735	* It's all one big allocation made at init time, except for the
736	* pages that is. The user nodes follows immediatly after the
737	* page structures.
738	*/
739	typedef struct PGMPOOL
740	{
741	/** The VM handle - HC Ptr. */
742	HCPTRTYPE(PVM) pVMHC;
743	/** The VM handle - GC Ptr. */
744	GCPTRTYPE(PVM) pVMGC;
745	/** The max pool size. This includes the special IDs. */
746	uint16_t cMaxPages;
747	/** The current pool size. */
748	uint16_t cCurPages;
749	/** The head of the free page list. */
750	uint16_t iFreeHead;
751	/* Padding. */
752	uint16_t u16Padding;
753	#ifdef PGMPOOL_WITH_USER_TRACKING
754	/** Head of the chain of free user nodes. */
755	uint16_t iUserFreeHead;
756	/** The number of user nodes we've allocated. */
757	uint16_t cMaxUsers;
758	/** The number of present page table entries in the entire pool. */
759	uint32_t cPresent;
760	/** Pointer to the array of user nodes - GC pointer. */
761	GCPTRTYPE(PPGMPOOLUSER) paUsersGC;
762	/** Pointer to the array of user nodes - HC pointer. */
763	HCPTRTYPE(PPGMPOOLUSER) paUsersHC;
764	#endif /* PGMPOOL_WITH_USER_TRACKING */
765	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
766	/** Head of the chain of free phys ext nodes. */
767	uint16_t iPhysExtFreeHead;
768	/** The number of user nodes we've allocated. */
769	uint16_t cMaxPhysExts;
770	/** Pointer to the array of physical xref extent - GC pointer. */
771	GCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsGC;
772	/** Pointer to the array of physical xref extent nodes - HC pointer. */
773	HCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsHC;
774	#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
775	#ifdef PGMPOOL_WITH_CACHE
776	/** Hash table for GCPhys addresses. */
777	uint16_t aiHash[PGMPOOL_HASH_SIZE];
778	/** The head of the age list. */
779	uint16_t iAgeHead;
780	/** The tail of the age list. */
781	uint16_t iAgeTail;
782	/** Set if the cache is enabled. */
783	bool fCacheEnabled;
784	#endif /* PGMPOOL_WITH_CACHE */
785	#ifdef PGMPOOL_WITH_MONITORING
786	/** Head of the list of modified pages. */
787	uint16_t iModifiedHead;
788	/** The current number of modified pages. */
789	uint16_t cModifiedPages;
790	/** Access handler, GC. */
791	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnAccessHandlerGC;
792	/** Access handler, R0. */
793	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnAccessHandlerR0;
794	/** Access handler, R3. */
795	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnAccessHandlerR3;
796	/** The access handler description (HC ptr). */
797	R3PTRTYPE(const char *) pszAccessHandler;
798	#endif /* PGMPOOL_WITH_MONITORING */
799	/** The number of pages currently in use. */
800	uint16_t cUsedPages;
801	#ifdef VBOX_WITH_STATISTICS
802	/** The high wather mark for cUsedPages. */
803	uint16_t cUsedPagesHigh;
804	uint32_t Alignment1; /*< Align the next member on a 64-bit boundrary. /
805	/** Profiling pgmPoolAlloc(). */
806	STAMPROFILEADV StatAlloc;
807	/** Profiling pgmPoolClearAll(). */
808	STAMPROFILE StatClearAll;
809	/** Profiling pgmPoolFlushAllInt(). */
810	STAMPROFILE StatFlushAllInt;
811	/** Profiling pgmPoolFlushPage(). */
812	STAMPROFILE StatFlushPage;
813	/** Profiling pgmPoolFree(). */
814	STAMPROFILE StatFree;
815	/** Profiling time spent zeroing pages. */
816	STAMPROFILE StatZeroPage;
817	# ifdef PGMPOOL_WITH_USER_TRACKING
818	/** Profiling of pgmPoolTrackDeref. */
819	STAMPROFILE StatTrackDeref;
820	/** Profiling pgmTrackFlushGCPhysPT. */
821	STAMPROFILE StatTrackFlushGCPhysPT;
822	/** Profiling pgmTrackFlushGCPhysPTs. */
823	STAMPROFILE StatTrackFlushGCPhysPTs;
824	/** Profiling pgmTrackFlushGCPhysPTsSlow. */
825	STAMPROFILE StatTrackFlushGCPhysPTsSlow;
826	/** Number of times we've been out of user records. */
827	STAMCOUNTER StatTrackFreeUpOneUser;
828	# endif
829	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
830	/** Profiling deref activity related tracking GC physical pages. */
831	STAMPROFILE StatTrackDerefGCPhys;
832	/** Number of linear searches for a HCPhys in the ram ranges. */
833	STAMCOUNTER StatTrackLinearRamSearches;
834	/** The number of failing pgmPoolTrackPhysExtAlloc calls. */
835	STAMCOUNTER StamTrackPhysExtAllocFailures;
836	# endif
837	# ifdef PGMPOOL_WITH_MONITORING
838	/** Profiling the GC PT access handler. */
839	STAMPROFILE StatMonitorGC;
840	/** Times we've failed interpreting the instruction. */
841	STAMCOUNTER StatMonitorGCEmulateInstr;
842	/** Profiling the pgmPoolFlushPage calls made from the GC PT access handler. */
843	STAMPROFILE StatMonitorGCFlushPage;
844	/** Times we've detected fork(). */
845	STAMCOUNTER StatMonitorGCFork;
846	/** Profiling the GC access we've handled (except REP STOSD). */
847	STAMPROFILE StatMonitorGCHandled;
848	/** Times we've failed interpreting a patch code instruction. */
849	STAMCOUNTER StatMonitorGCIntrFailPatch1;
850	/** Times we've failed interpreting a patch code instruction during flushing. */
851	STAMCOUNTER StatMonitorGCIntrFailPatch2;
852	/** The number of times we've seen rep prefixes we can't handle. */
853	STAMCOUNTER StatMonitorGCRepPrefix;
854	/** Profiling the REP STOSD cases we've handled. */
855	STAMPROFILE StatMonitorGCRepStosd;
856
857	/** Profiling the HC PT access handler. */
858	STAMPROFILE StatMonitorHC;
859	/** Times we've failed interpreting the instruction. */
860	STAMCOUNTER StatMonitorHCEmulateInstr;
861	/** Profiling the pgmPoolFlushPage calls made from the HC PT access handler. */
862	STAMPROFILE StatMonitorHCFlushPage;
863	/** Times we've detected fork(). */
864	STAMCOUNTER StatMonitorHCFork;
865	/** Profiling the HC access we've handled (except REP STOSD). */
866	STAMPROFILE StatMonitorHCHandled;
867	/** The number of times we've seen rep prefixes we can't handle. */
868	STAMCOUNTER StatMonitorHCRepPrefix;
869	/** Profiling the REP STOSD cases we've handled. */
870	STAMPROFILE StatMonitorHCRepStosd;
871	/** The number of times we're called in an async thread an need to flush. */
872	STAMCOUNTER StatMonitorHCAsync;
873	/** The high wather mark for cModifiedPages. */
874	uint16_t cModifiedPagesHigh;
875	uint16_t Alignment2[3]; /*< Align the next member on a 64-bit boundrary. /
876	# endif
877	# ifdef PGMPOOL_WITH_CACHE
878	/** The number of cache hits. */
879	STAMCOUNTER StatCacheHits;
880	/** The number of cache misses. */
881	STAMCOUNTER StatCacheMisses;
882	/** The number of times we've got a conflict of 'kind' in the cache. */
883	STAMCOUNTER StatCacheKindMismatches;
884	/** Number of times we've been out of pages. */
885	STAMCOUNTER StatCacheFreeUpOne;
886	/** The number of cacheable allocations. */
887	STAMCOUNTER StatCacheCacheable;
888	/** The number of uncacheable allocations. */
889	STAMCOUNTER StatCacheUncacheable;
890	# endif
891	#elif HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
892	uint32_t Alignment1; /*< Align the next member on a 64-bit boundrary. /
893	#endif
894	/** The AVL tree for looking up a page by its HC physical address. */
895	AVLOHCPHYSTREE HCPhysTree;
896	uint32_t Alignment3; /*< Align the next member on a 64-bit boundrary. /
897	/** Array of pages. (cMaxPages in length)
898	* The Id is the index into thist array.
899	*/
900	PGMPOOLPAGE aPages[PGMPOOL_IDX_FIRST];
901	} PGMPOOL, PPGMPOOL, *PPPGMPOOL;
902
903
904	/** @def PGMPOOL_PAGE_2_PTR
905	* Maps a pool page pool into the current context.
906	*
907	* @returns VBox status code.
908	* @param pVM The VM handle.
909	* @param pPage The pool page.
910	*
911	* @remark In HC this uses PGMGCDynMapHCPage(), so it will consume of the
912	* small page window employeed by that function. Be careful.
913	* @remark There is no need to assert on the result.
914	*/
915	#ifdef IN_GC
916	# define PGMPOOL_PAGE_2_PTR(pVM, pPage) pgmGCPoolMapPage((pVM), (pPage))
917	#else
918	# define PGMPOOL_PAGE_2_PTR(pVM, pPage) ((pPage)->pvPageHC)
919	#endif
920
921
922	/**
923	* Trees are using self relative offsets as pointers.
924	* So, all its data, including the root pointer, must be in the heap for HC and GC
925	* to have the same layout.
926	*/
927	typedef struct PGMTREES
928	{
929	/** Physical access handlers (AVL range+offsetptr tree). */
930	AVLROGCPHYSTREE PhysHandlers;
931	/** Virtual access handlers (AVL range + GC ptr tree). */
932	AVLROGCPTRTREE VirtHandlers;
933	/** Virtual access handlers (Phys range AVL range + offsetptr tree). */
934	AVLROGCPHYSTREE PhysToVirtHandlers;
935	uint32_t auPadding[1];
936	} PGMTREES;
937	/** Pointer to PGM trees. */
938	typedef PGMTREES *PPGMTREES;
939
940
941	/** @name Paging mode macros
942	* @{ */
943	#ifdef IN_GC
944	# define PGM_CTX(a,b) a##GC##b
945	# define PGM_CTX_STR(a,b) a "GC" b
946	# define PGM_CTX_DECL(type) PGMGCDECL(type)
947	#else
948	# ifdef IN_RING3
949	# define PGM_CTX(a,b) a##R3##b
950	# define PGM_CTX_STR(a,b) a "R3" b
951	# define PGM_CTX_DECL(type) DECLCALLBACK(type)
952	# else
953	# define PGM_CTX(a,b) a##R0##b
954	# define PGM_CTX_STR(a,b) a "R0" b
955	# define PGM_CTX_DECL(type) PGMDECL(type)
956	# endif
957	#endif
958
959	#define PGM_GST_NAME_REAL(name) PGM_CTX(pgm,GstReal##name)
960	#define PGM_GST_NAME_GC_REAL_STR(name) "pgmGCGstReal" #name
961	#define PGM_GST_NAME_R0_REAL_STR(name) "pgmR0GstReal" #name
962	#define PGM_GST_NAME_PROT(name) PGM_CTX(pgm,GstProt##name)
963	#define PGM_GST_NAME_GC_PROT_STR(name) "pgmGCGstProt" #name
964	#define PGM_GST_NAME_R0_PROT_STR(name) "pgmR0GstProt" #name
965	#define PGM_GST_NAME_32BIT(name) PGM_CTX(pgm,Gst32Bit##name)
966	#define PGM_GST_NAME_GC_32BIT_STR(name) "pgmGCGst32Bit" #name
967	#define PGM_GST_NAME_R0_32BIT_STR(name) "pgmR0Gst32Bit" #name
968	#define PGM_GST_NAME_PAE(name) PGM_CTX(pgm,GstPAE##name)
969	#define PGM_GST_NAME_GC_PAE_STR(name) "pgmGCGstPAE" #name
970	#define PGM_GST_NAME_R0_PAE_STR(name) "pgmR0GstPAE" #name
971	#define PGM_GST_NAME_AMD64(name) PGM_CTX(pgm,GstAMD64##name)
972	#define PGM_GST_NAME_GC_AMD64_STR(name) "pgmGCGstAMD64" #name
973	#define PGM_GST_NAME_R0_AMD64_STR(name) "pgmR0GstAMD64" #name
974	#define PGM_GST_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Gst##name))
975	#define PGM_GST_DECL(type, name) PGM_CTX_DECL(type) PGM_GST_NAME(name)
976
977	#define PGM_SHW_NAME_32BIT(name) PGM_CTX(pgm,Shw32Bit##name)
978	#define PGM_SHW_NAME_GC_32BIT_STR(name) "pgmGCShw32Bit" #name
979	#define PGM_SHW_NAME_R0_32BIT_STR(name) "pgmR0Shw32Bit" #name
980	#define PGM_SHW_NAME_PAE(name) PGM_CTX(pgm,ShwPAE##name)
981	#define PGM_SHW_NAME_GC_PAE_STR(name) "pgmGCShwPAE" #name
982	#define PGM_SHW_NAME_R0_PAE_STR(name) "pgmR0ShwPAE" #name
983	#define PGM_SHW_NAME_AMD64(name) PGM_CTX(pgm,ShwAMD64##name)
984	#define PGM_SHW_NAME_GC_AMD64_STR(name) "pgmGCShwAMD64" #name
985	#define PGM_SHW_NAME_R0_AMD64_STR(name) "pgmR0ShwAMD64" #name
986	#define PGM_SHW_DECL(type, name) PGM_CTX_DECL(type) PGM_SHW_NAME(name)
987	#define PGM_SHW_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Shw##name))
988
989	/* Shw_Gst */
990	#define PGM_BTH_NAME_32BIT_REAL(name) PGM_CTX(pgm,Bth32BitReal##name)
991	#define PGM_BTH_NAME_32BIT_PROT(name) PGM_CTX(pgm,Bth32BitProt##name)
992	#define PGM_BTH_NAME_32BIT_32BIT(name) PGM_CTX(pgm,Bth32Bit32Bit##name)
993	#define PGM_BTH_NAME_PAE_REAL(name) PGM_CTX(pgm,BthPAEReal##name)
994	#define PGM_BTH_NAME_PAE_PROT(name) PGM_CTX(pgm,BthPAEProt##name)
995	#define PGM_BTH_NAME_PAE_32BIT(name) PGM_CTX(pgm,BthPAE32Bit##name)
996	#define PGM_BTH_NAME_PAE_PAE(name) PGM_CTX(pgm,BthPAEPAE##name)
997	#define PGM_BTH_NAME_AMD64_REAL(name) PGM_CTX(pgm,BthAMD64Real##name)
998	#define PGM_BTH_NAME_AMD64_PROT(name) PGM_CTX(pgm,BthAMD64Prot##name)
999	#define PGM_BTH_NAME_AMD64_AMD64(name) PGM_CTX(pgm,BthAMD64AMD64##name)
1000	#define PGM_BTH_NAME_GC_32BIT_REAL_STR(name) "pgmGCBth32BitReal" #name
1001	#define PGM_BTH_NAME_GC_32BIT_PROT_STR(name) "pgmGCBth32BitProt" #name
1002	#define PGM_BTH_NAME_GC_32BIT_32BIT_STR(name) "pgmGCBth32Bit32Bit" #name
1003	#define PGM_BTH_NAME_GC_PAE_REAL_STR(name) "pgmGCBthPAEReal" #name
1004	#define PGM_BTH_NAME_GC_PAE_PROT_STR(name) "pgmGCBthPAEProt" #name
1005	#define PGM_BTH_NAME_GC_PAE_32BIT_STR(name) "pgmGCBthPAE32Bit" #name
1006	#define PGM_BTH_NAME_GC_PAE_PAE_STR(name) "pgmGCBthPAEPAE" #name
1007	#define PGM_BTH_NAME_GC_AMD64_REAL_STR(name) "pgmGCBthAMD64Real" #name
1008	#define PGM_BTH_NAME_GC_AMD64_PROT_STR(name) "pgmGCBthAMD64Prot" #name
1009	#define PGM_BTH_NAME_GC_AMD64_AMD64_STR(name) "pgmGCBthAMD64AMD64" #name
1010	#define PGM_BTH_NAME_R0_32BIT_REAL_STR(name) "pgmR0Bth32BitReal" #name
1011	#define PGM_BTH_NAME_R0_32BIT_PROT_STR(name) "pgmR0Bth32BitProt" #name
1012	#define PGM_BTH_NAME_R0_32BIT_32BIT_STR(name) "pgmR0Bth32Bit32Bit" #name
1013	#define PGM_BTH_NAME_R0_PAE_REAL_STR(name) "pgmR0BthPAEReal" #name
1014	#define PGM_BTH_NAME_R0_PAE_PROT_STR(name) "pgmR0BthPAEProt" #name
1015	#define PGM_BTH_NAME_R0_PAE_32BIT_STR(name) "pgmR0BthPAE32Bit" #name
1016	#define PGM_BTH_NAME_R0_PAE_PAE_STR(name) "pgmR0BthPAEPAE" #name
1017	#define PGM_BTH_NAME_R0_AMD64_REAL_STR(name) "pgmR0BthAMD64Real" #name
1018	#define PGM_BTH_NAME_R0_AMD64_PROT_STR(name) "pgmR0BthAMD64Prot" #name
1019	#define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name) "pgmR0BthAMD64AMD64" #name
1020	#define PGM_BTH_DECL(type, name) PGM_CTX_DECL(type) PGM_BTH_NAME(name)
1021	#define PGM_BTH_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Bth##name))
1022	/** @} */
1023
1024	/**
1025	* Data for each paging mode.
1026	*/
1027	typedef struct PGMMODEDATA
1028	{
1029	/** The guest mode type. */
1030	uint32_t uGstType;
1031	/** The shadow mode type. */
1032	uint32_t uShwType;
1033
1034	/** @name Function pointers for Shadow paging.
1035	* @{
1036	*/
1037	DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1038	DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1039	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1040	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1041	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1042	DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1043	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1044
1045	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1046	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1047	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1048	DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1049	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1050
1051	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1052	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1053	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1054	DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1055	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1056	/** @} */
1057
1058	/** @name Function pointers for Guest paging.
1059	* @{
1060	*/
1061	DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1062	DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1063	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1064	DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1065	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1066	DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1067	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1068	DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1069	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1070	HCPTRTYPE(PFNPGMR3PHYSHANDLER) pfnHCGstWriteHandlerCR3;
1071	HCPTRTYPE(const char *) pszHCGstWriteHandlerCR3;
1072
1073	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1074	DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1075	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1076	DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1077	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1078	DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1079	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1080	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1081
1082	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1083	DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1084	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1085	DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1086	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1087	DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1088	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1089	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnR0GstWriteHandlerCR3;
1090	/** @} */
1091
1092	/** @name Function pointers for Both Shadow and Guest paging.
1093	* @{
1094	*/
1095	DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1096	DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1097	DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1098	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1099	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1100	DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1101	DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1102	#ifdef VBOX_STRICT
1103	DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1104	#endif
1105
1106	DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1107	DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1108	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1109	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1110	DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1111	DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1112	#ifdef VBOX_STRICT
1113	DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1114	#endif
1115
1116	DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1117	DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1118	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1119	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1120	DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1121	DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1122	#ifdef VBOX_STRICT
1123	DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1124	#endif
1125	/** @} */
1126	} PGMMODEDATA, *PPGMMODEDATA;
1127
1128
1129
1130	/**
1131	* Converts a PGM pointer into a VM pointer.
1132	* @returns Pointer to the VM structure the PGM is part of.
1133	* @param pPGM Pointer to PGM instance data.
1134	*/
1135	#define PGM2VM(pPGM) ( (PVM)((char*)pPGM - pPGM->offVM) )
1136
1137	/**
1138	* PGM Data (part of VM)
1139	*/
1140	typedef struct PGM
1141	{
1142	/** Offset to the VM structure. */
1143	RTINT offVM;
1144
1145	/*
1146	* This will be redefined at least two more times before we're done, I'm sure.
1147	* The current code is only to get on with the coding.
1148	* - 2004-06-10: initial version, bird.
1149	* - 2004-07-02: 1st time, bird.
1150	* - 2004-10-18: 2nd time, bird.
1151	* - 2005-07-xx: 3rd time, bird.
1152	*/
1153
1154	/** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1155	GCPTRTYPE(PX86PTE) paDynPageMap32BitPTEsGC;
1156	/** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1157	GCPTRTYPE(PX86PTEPAE) paDynPageMapPaePTEsGC;
1158
1159	/** The host paging mode. (This is what SUPLib reports.) */
1160	SUPPAGINGMODE enmHostMode;
1161	/** The shadow paging mode. */
1162	PGMMODE enmShadowMode;
1163	/** The guest paging mode. */
1164	PGMMODE enmGuestMode;
1165
1166	/** The current physical address representing in the guest CR3 register. */
1167	RTGCPHYS GCPhysCR3;
1168	/** Pointer to the 5 page CR3 content mapping.
1169	* The first page is always the CR3 (in some form) while the 4 other pages
1170	* are used of the PDs in PAE mode. */
1171	RTGCPTR GCPtrCR3Mapping;
1172	/** The physical address of the currently monitored guest CR3 page.
1173	* When this value is NIL_RTGCPHYS no page is being monitored. */
1174	RTGCPHYS GCPhysGstCR3Monitored;
1175	#if HC_ARCH_BITS == 64 \|\| GC_ARCH_BITS == 64
1176	RTGCPHYS GCPhysPadding0; /*< alignment padding. /
1177	#endif
1178
1179	/** @name 32-bit Guest Paging.
1180	* @{ */
1181	/** The guest's page directory, HC pointer. */
1182	HCPTRTYPE(PVBOXPD) pGuestPDHC;
1183	/** The guest's page directory, static GC mapping. */
1184	GCPTRTYPE(PVBOXPD) pGuestPDGC;
1185	/** @} */
1186
1187	/** @name PAE Guest Paging.
1188	* @{ */
1189	/** The guest's page directory pointer table, static GC mapping. */
1190	GCPTRTYPE(PX86PDPTR) pGstPaePDPTRGC;
1191	/** The guest's page directory pointer table, HC pointer. */
1192	HCPTRTYPE(PX86PDPTR) pGstPaePDPTRHC;
1193	/** The guest's page directories, HC pointers.
1194	* These are individual pointers and doesn't have to be adjecent.
1195	* These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1196	HCPTRTYPE(PX86PDPAE) apGstPaePDsHC[4];
1197	/** The guest's page directories, static GC mapping.
1198	* Unlike the HC array the first entry can be accessed as a 2048 entry PD.
1199	* These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1200	GCPTRTYPE(PX86PDPAE) apGstPaePDsGC[4];
1201	/** The physical addresses of the guest page directories (PAE) pointed to by apGstPagePDsHC/GC. */
1202	RTGCPHYS aGCPhysGstPaePDs[4];
1203	/** The physical addresses of the monitored guest page directories (PAE). */
1204	RTGCPHYS aGCPhysGstPaePDsMonitored[4];
1205	/** @} */
1206
1207
1208	/** @name 32-bit Shadow Paging
1209	* @{ */
1210	/** The 32-Bit PD - HC Ptr. */
1211	HCPTRTYPE(PX86PD) pHC32BitPD;
1212	/** The 32-Bit PD - GC Ptr. */
1213	GCPTRTYPE(PX86PD) pGC32BitPD;
1214	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1215	uint32_t u32Padding1; /*< alignment padding. /
1216	#endif
1217	/** The Physical Address (HC) of the 32-Bit PD. */
1218	RTHCPHYS HCPhys32BitPD;
1219	/** @} */
1220
1221	/** @name PAE Shadow Paging
1222	* @{ */
1223	/** The four PDs for the low 4GB - HC Ptr.
1224	* Even though these are 4 pointers, what they point at is a single table.
1225	* Thus, it's possible to walk the 2048 entries starting where apHCPaePDs[0] points. */
1226	HCPTRTYPE(PX86PDPAE) apHCPaePDs[4];
1227	/** The four PDs for the low 4GB - GC Ptr.
1228	* Same kind of mapping as apHCPaePDs. */
1229	GCPTRTYPE(PX86PDPAE) apGCPaePDs[4];
1230	/** The Physical Address (HC) of the four PDs for the low 4GB.
1231	* These are NOT 4 contiguous pages. */
1232	RTHCPHYS aHCPhysPaePDs[4];
1233	/** The PAE PDPTR - HC Ptr. */
1234	HCPTRTYPE(PX86PDPTR) pHCPaePDPTR;
1235	/** The Physical Address (HC) of the PAE PDPTR. */
1236	RTHCPHYS HCPhysPaePDPTR;
1237	/** The PAE PDPTR - GC Ptr. */
1238	GCPTRTYPE(PX86PDPTR) pGCPaePDPTR;
1239	/** @} */
1240
1241	/** @name AMD64 Shadow Paging
1242	* Extends PAE Paging.
1243	* @{ */
1244	/** The Page Map Level 4 table - HC Ptr. */
1245	GCPTRTYPE(PX86PML4) pGCPaePML4;
1246	/** The Page Map Level 4 table - GC Ptr. */
1247	HCPTRTYPE(PX86PML4) pHCPaePML4;
1248	/** The Physical Address (HC) of the Page Map Level 4 table. */
1249	RTHCPHYS HCPhysPaePML4;
1250	/** @}*/
1251
1252	/** @name Function pointers for Shadow paging.
1253	* @{
1254	*/
1255	DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1256	DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1257	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1258	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1259	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1260	DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1261	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1262
1263	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1264	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1265	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1266	DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1267	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1268	#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1269	RTGCPTR alignment0; /*< structure size alignment. /
1270	#endif
1271
1272	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1273	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1274	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1275	DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1276	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1277
1278	/** @} */
1279
1280	/** @name Function pointers for Guest paging.
1281	* @{
1282	*/
1283	DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1284	DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1285	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1286	DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1287	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1288	DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1289	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1290	DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1291	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1292	HCPTRTYPE(PFNPGMR3PHYSHANDLER) pfnHCGstWriteHandlerCR3;
1293	HCPTRTYPE(const char *) pszHCGstWriteHandlerCR3;
1294
1295	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1296	DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1297	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1298	DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1299	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1300	DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1301	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1302	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1303
1304	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1305	DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1306	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1307	DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1308	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1309	DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1310	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1311	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnR0GstWriteHandlerCR3;
1312	/** @} */
1313
1314	/** @name Function pointers for Both Shadow and Guest paging.
1315	* @{
1316	*/
1317	DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1318	DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1319	DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1320	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1321	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1322	DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1323	DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1324	DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1325
1326	DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1327	DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1328	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1329	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1330	DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1331	DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1332	DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1333
1334	DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1335	DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1336	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1337	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1338	DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1339	DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1340	DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1341	#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1342	RTGCPTR alignment2; /*< structure size alignment. /
1343	#endif
1344	/** @} */
1345
1346	/** Pointer to SHW+GST mode data (function pointers).
1347	* The index into this table is made up from */
1348	R3PTRTYPE(PPGMMODEDATA) paModeData;
1349
1350
1351	/** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for HC.
1352	* This is sorted by physical address and contains no overlaps.
1353	* The memory locks and other conversions are managed by MM at the moment.
1354	*/
1355	HCPTRTYPE(PPGMRAMRANGE) pRamRangesHC;
1356	/** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for GC.
1357	* This is sorted by physical address and contains no overlaps.
1358	* The memory locks and other conversions are managed by MM at the moment.
1359	*/
1360	GCPTRTYPE(PPGMRAMRANGE) pRamRangesGC;
1361	/** The configured RAM size. */
1362	RTUINT cbRamSize;
1363
1364	/** PGM offset based trees - HC Ptr. */
1365	HCPTRTYPE(PPGMTREES) pTreesHC;
1366	/** PGM offset based trees - GC Ptr. */
1367	GCPTRTYPE(PPGMTREES) pTreesGC;
1368
1369	/** Linked list of GC mappings - for GC.
1370	* The list is sorted ascending on address.
1371	*/
1372	GCPTRTYPE(PPGMMAPPING) pMappingsGC;
1373	/** Linked list of GC mappings - for HC.
1374	* The list is sorted ascending on address.
1375	*/
1376	R3PTRTYPE(PPGMMAPPING) pMappingsR3;
1377	/** Linked list of GC mappings - for R0.
1378	* The list is sorted ascending on address.
1379	*/
1380	R0PTRTYPE(PPGMMAPPING) pMappingsR0;
1381
1382	/** If set no conflict checks are required. (boolean) */
1383	bool fMappingsFixed;
1384	/** If set, then no mappings are put into the shadow page table. (boolean) */
1385	bool fDisableMappings;
1386	/** Size of fixed mapping */
1387	uint32_t cbMappingFixed;
1388	/** Base address (GC) of fixed mapping */
1389	RTGCPTR GCPtrMappingFixed;
1390	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1391	uint32_t u32Padding0; /*< alignment padding. /
1392	#endif
1393
1394
1395	/** @name Intermediate Context
1396	* @{ */
1397	/** Pointer to the intermediate page directory - Normal. */
1398	HCPTRTYPE(PX86PD) pInterPD;
1399	/** Pointer to the intermedate page tables - Normal.
1400	* There are two page tables, one for the identity mapping and one for
1401	* the host context mapping (of the core code). */
1402	HCPTRTYPE(PX86PT) apInterPTs[2];
1403	/** Pointer to the intermedate page tables - PAE. */
1404	HCPTRTYPE(PX86PTPAE) apInterPaePTs[2];
1405	/** Pointer to the intermedate page directory - PAE. */
1406	HCPTRTYPE(PX86PDPAE) apInterPaePDs[4];
1407	/** Pointer to the intermedate page directory - PAE. */
1408	HCPTRTYPE(PX86PDPTR) pInterPaePDPTR;
1409	/** Pointer to the intermedate page-map level 4 - AMD64. */
1410	HCPTRTYPE(PX86PML4) pInterPaePML4;
1411	/** Pointer to the intermedate page directory - AMD64. */
1412	HCPTRTYPE(PX86PDPTR) pInterPaePDPTR64;
1413	/** The Physical Address (HC) of the intermediate Page Directory - Normal. */
1414	RTHCPHYS HCPhysInterPD;
1415	/** The Physical Address (HC) of the intermediate Page Directory Pointer Table - PAE. */
1416	RTHCPHYS HCPhysInterPaePDPTR;
1417	/** The Physical Address (HC) of the intermediate Page Map Level 4 table - AMD64. */
1418	RTHCPHYS HCPhysInterPaePML4;
1419	/** @} */
1420
1421	/** Base address of the dynamic page mapping area.
1422	* The array is MM_HYPER_DYNAMIC_SIZE bytes big.
1423	*/
1424	GCPTRTYPE(uint8_t *) pbDynPageMapBaseGC;
1425	/** The index of the last entry used in the dynamic page mapping area. */
1426	RTUINT iDynPageMapLast;
1427	/** Cache containing the last entries in the dynamic page mapping area.
1428	* The cache size is covering half of the mapping area. */
1429	RTHCPHYS aHCPhysDynPageMapCache[MM_HYPER_DYNAMIC_SIZE >> (PAGE_SHIFT + 1)];
1430
1431	/** A20 gate mask.
1432	* Our current approach to A20 emulation is to let REM do it and don't bother
1433	* anywhere else. The interesting Guests will be operating with it enabled anyway.
1434	* But whould need arrise, we'll subject physical addresses to this mask. */
1435	RTGCPHYS GCPhysA20Mask;
1436	/** A20 gate state - boolean! */
1437	RTUINT fA20Enabled;
1438
1439	/** What needs syncing (PGM_SYNC_*).
1440	* This is used to queue operations for PGMSyncCR3, PGMInvalidatePage,
1441	* PGMFlushTLB, and PGMR3Load. */
1442	RTUINT fSyncFlags;
1443
1444	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1445	RTUINT uPadding3; /*< alignment padding. /
1446	#endif
1447	/** PGM critical section.
1448	* This protects the physical & virtual access handlers, ram ranges,
1449	* and the page flag updating (some of it anyway).
1450	*/
1451	PDMCRITSECT CritSect;
1452
1453	/** Shadow Page Pool - HC Ptr. */
1454	HCPTRTYPE(PPGMPOOL) pPoolHC;
1455	/** Shadow Page Pool - GC Ptr. */
1456	GCPTRTYPE(PPGMPOOL) pPoolGC;
1457
1458	/** Flush the cache on the next access. */
1459	bool fPhysCacheFlushPending;
1460	/** @todo r=bird: Fix member names!*/
1461	/** PGMPhysRead cache */
1462	PGMPHYSCACHE pgmphysreadcache;
1463	/** PGMPhysWrite cache */
1464	PGMPHYSCACHE pgmphyswritecache;
1465
1466	/** @name Release Statistics
1467	* @{ */
1468	/** The number of times the guest has switched mode since last reset or statistics reset. */
1469	STAMCOUNTER cGuestModeChanges;
1470	/** @} */
1471
1472	#ifdef VBOX_WITH_STATISTICS
1473	/** GC: Which statistic this \#PF should be attributed to. */
1474	GCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionGC;
1475	RTGCPTR padding0;
1476	/** HC: Which statistic this \#PF should be attributed to. */
1477	HCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionHC;
1478	RTHCPTR padding1;
1479	STAMPROFILE StatGCTrap0e; /*< GC: PGMGCTrap0eHandler() profiling. /
1480	STAMPROFILE StatTrap0eCSAM; /*< Profiling of the Trap0eHandler body when the cause is CSAM. /
1481	STAMPROFILE StatTrap0eDirtyAndAccessedBits; /*< Profiling of the Trap0eHandler body when the cause is dirty and/or accessed bit emulation. /
1482	STAMPROFILE StatTrap0eGuestTrap; /*< Profiling of the Trap0eHandler body when the cause is a guest trap. /
1483	STAMPROFILE StatTrap0eHndPhys; /*< Profiling of the Trap0eHandler body when the cause is a physical handler. /
1484	STAMPROFILE StatTrap0eHndVirt; /*< Profiling of the Trap0eHandler body when the cause is a virtual handler. /
1485	STAMPROFILE StatTrap0eHndUnhandled; /*< Profiling of the Trap0eHandler body when the cause is access outside the monitored areas of a monitored page. /
1486	STAMPROFILE StatTrap0eMisc; /*< Profiling of the Trap0eHandler body when the cause is not known. /
1487	STAMPROFILE StatTrap0eOutOfSync; /*< Profiling of the Trap0eHandler body when the cause is an out-of-sync page. /
1488	STAMPROFILE StatTrap0eOutOfSyncHndPhys; /*< Profiling of the Trap0eHandler body when the cause is an out-of-sync physical handler page. /
1489	STAMPROFILE StatTrap0eOutOfSyncHndVirt; /*< Profiling of the Trap0eHandler body when the cause is an out-of-sync virtual handler page. /
1490	STAMPROFILE StatTrap0eOutOfSyncObsHnd; /*< Profiling of the Trap0eHandler body when the cause is an obsolete handler page. /
1491	STAMPROFILE StatTrap0eSyncPT; /*< Profiling of the Trap0eHandler body when the cause is lazy syncing of a PT. /
1492
1493	STAMCOUNTER StatTrap0eMapHandler; /*< Number of traps due to access handlers in mappings. /
1494	STAMCOUNTER StatGCTrap0eConflicts; /*< GC: The number of times \#PF was caused by an undetected conflict. /
1495
1496	STAMCOUNTER StatGCTrap0eUSNotPresentRead;
1497	STAMCOUNTER StatGCTrap0eUSNotPresentWrite;
1498	STAMCOUNTER StatGCTrap0eUSWrite;
1499	STAMCOUNTER StatGCTrap0eUSReserved;
1500	STAMCOUNTER StatGCTrap0eUSRead;
1501
1502	STAMCOUNTER StatGCTrap0eSVNotPresentRead;
1503	STAMCOUNTER StatGCTrap0eSVNotPresentWrite;
1504	STAMCOUNTER StatGCTrap0eSVWrite;
1505	STAMCOUNTER StatGCTrap0eSVReserved;
1506
1507	STAMCOUNTER StatGCTrap0eUnhandled;
1508	STAMCOUNTER StatGCTrap0eMap;
1509
1510	/** GC: PGMSyncPT() profiling. */
1511	STAMPROFILE StatGCSyncPT;
1512	/** GC: The number of times PGMSyncPT() needed to allocate page tables. */
1513	STAMCOUNTER StatGCSyncPTAlloc;
1514	/** GC: The number of times PGMSyncPT() detected conflicts. */
1515	STAMCOUNTER StatGCSyncPTConflict;
1516	/** GC: The number of times PGMSyncPT() failed. */
1517	STAMCOUNTER StatGCSyncPTFailed;
1518	/** GC: PGMGCInvalidatePage() profiling. */
1519	STAMPROFILE StatGCInvalidatePage;
1520	/** GC: The number of times PGMGCInvalidatePage() was called for a 4KB page. */
1521	STAMCOUNTER StatGCInvalidatePage4KBPages;
1522	/** GC: The number of times PGMGCInvalidatePage() was called for a 4MB page. */
1523	STAMCOUNTER StatGCInvalidatePage4MBPages;
1524	/** GC: The number of times PGMGCInvalidatePage() skipped a 4MB page. */
1525	STAMCOUNTER StatGCInvalidatePage4MBPagesSkip;
1526	/** GC: The number of times PGMGCInvalidatePage() was called for a not accessed page directory. */
1527	STAMCOUNTER StatGCInvalidatePagePDNAs;
1528	/** GC: The number of times PGMGCInvalidatePage() was called for a not present page directory. */
1529	STAMCOUNTER StatGCInvalidatePagePDNPs;
1530	/** GC: The number of times PGMGCInvalidatePage() was called for a page directory containing mappings (no conflict). */
1531	STAMCOUNTER StatGCInvalidatePagePDMappings;
1532	/** GC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
1533	STAMCOUNTER StatGCInvalidatePagePDOutOfSync;
1534	/** HC: The number of times PGMGCInvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
1535	STAMCOUNTER StatGCInvalidatePageSkipped;
1536	/** GC: The number of times user page is out of sync was detected in GC. */
1537	STAMCOUNTER StatGCPageOutOfSyncUser;
1538	/** GC: The number of times supervisor page is out of sync was detected in GC. */
1539	STAMCOUNTER StatGCPageOutOfSyncSupervisor;
1540	/** GC: The number of dynamic page mapping cache hits */
1541	STAMCOUNTER StatDynMapCacheMisses;
1542	/** GC: The number of dynamic page mapping cache misses */
1543	STAMCOUNTER StatDynMapCacheHits;
1544	/** GC: The number of times pgmGCGuestPDWriteHandler() was successfully called. */
1545	STAMCOUNTER StatGCGuestCR3WriteHandled;
1546	/** GC: The number of times pgmGCGuestPDWriteHandler() was called and we had to fall back to the recompiler. */
1547	STAMCOUNTER StatGCGuestCR3WriteUnhandled;
1548	/** GC: The number of times pgmGCGuestPDWriteHandler() was called and a conflict was detected. */
1549	STAMCOUNTER StatGCGuestCR3WriteConflict;
1550	/** GC: Number of out-of-sync handled pages. */
1551	STAMCOUNTER StatHandlersOutOfSync;
1552	/** GC: Number of traps due to physical access handlers. */
1553	STAMCOUNTER StatHandlersPhysical;
1554	/** GC: Number of traps due to virtual access handlers. */
1555	STAMCOUNTER StatHandlersVirtual;
1556	/** GC: Number of traps due to virtual access handlers found by physical address. */
1557	STAMCOUNTER StatHandlersVirtualByPhys;
1558	/** GC: Number of traps due to virtual access handlers found by virtual address (without proper physical flags). */
1559	STAMCOUNTER StatHandlersVirtualUnmarked;
1560	/** GC: Number of traps due to access outside range of monitored page(s). */
1561	STAMCOUNTER StatHandlersUnhandled;
1562
1563	/** GC: The number of times pgmGCGuestROMWriteHandler() was successfully called. */
1564	STAMCOUNTER StatGCGuestROMWriteHandled;
1565	/** GC: The number of times pgmGCGuestROMWriteHandler() was called and we had to fall back to the recompiler */
1566	STAMCOUNTER StatGCGuestROMWriteUnhandled;
1567
1568	/** HC: PGMR3InvalidatePage() profiling. */
1569	STAMPROFILE StatHCInvalidatePage;
1570	/** HC: The number of times PGMR3InvalidatePage() was called for a 4KB page. */
1571	STAMCOUNTER StatHCInvalidatePage4KBPages;
1572	/** HC: The number of times PGMR3InvalidatePage() was called for a 4MB page. */
1573	STAMCOUNTER StatHCInvalidatePage4MBPages;
1574	/** HC: The number of times PGMR3InvalidatePage() skipped a 4MB page. */
1575	STAMCOUNTER StatHCInvalidatePage4MBPagesSkip;
1576	/** HC: The number of times PGMR3InvalidatePage() was called for a not accessed page directory. */
1577	STAMCOUNTER StatHCInvalidatePagePDNAs;
1578	/** HC: The number of times PGMR3InvalidatePage() was called for a not present page directory. */
1579	STAMCOUNTER StatHCInvalidatePagePDNPs;
1580	/** HC: The number of times PGMR3InvalidatePage() was called for a page directory containing mappings (no conflict). */
1581	STAMCOUNTER StatHCInvalidatePagePDMappings;
1582	/** HC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
1583	STAMCOUNTER StatHCInvalidatePagePDOutOfSync;
1584	/** HC: The number of times PGMR3InvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
1585	STAMCOUNTER StatHCInvalidatePageSkipped;
1586	/** HC: PGMR3SyncPT() profiling. */
1587	STAMPROFILE StatHCSyncPT;
1588	/** HC: pgmr3SyncPTResolveConflict() profiling (includes the entire relocation). */
1589	STAMPROFILE StatHCResolveConflict;
1590	/** HC: Number of times PGMR3CheckMappingConflicts() detected a conflict. */
1591	STAMCOUNTER StatHCDetectedConflicts;
1592	/** HC: The total number of times pgmHCGuestPDWriteHandler() was called. */
1593	STAMCOUNTER StatHCGuestPDWrite;
1594	/** HC: The number of times pgmHCGuestPDWriteHandler() detected a conflict */
1595	STAMCOUNTER StatHCGuestPDWriteConflict;
1596
1597	/** HC: The number of pages marked not present for accessed bit emulation. */
1598	STAMCOUNTER StatHCAccessedPage;
1599	/** HC: The number of pages marked read-only for dirty bit tracking. */
1600	STAMCOUNTER StatHCDirtyPage;
1601	/** HC: The number of pages marked read-only for dirty bit tracking. */
1602	STAMCOUNTER StatHCDirtyPageBig;
1603	/** HC: The number of traps generated for dirty bit tracking. */
1604	STAMCOUNTER StatHCDirtyPageTrap;
1605	/** HC: The number of pages already dirty or readonly. */
1606	STAMCOUNTER StatHCDirtyPageSkipped;
1607
1608	/** GC: The number of pages marked not present for accessed bit emulation. */
1609	STAMCOUNTER StatGCAccessedPage;
1610	/** GC: The number of pages marked read-only for dirty bit tracking. */
1611	STAMCOUNTER StatGCDirtyPage;
1612	/** GC: The number of pages marked read-only for dirty bit tracking. */
1613	STAMCOUNTER StatGCDirtyPageBig;
1614	/** GC: The number of traps generated for dirty bit tracking. */
1615	STAMCOUNTER StatGCDirtyPageTrap;
1616	/** GC: The number of pages already dirty or readonly. */
1617	STAMCOUNTER StatGCDirtyPageSkipped;
1618	/** GC: The number of pages marked dirty because of write accesses. */
1619	STAMCOUNTER StatGCDirtiedPage;
1620	/** GC: The number of pages already marked dirty because of write accesses. */
1621	STAMCOUNTER StatGCPageAlreadyDirty;
1622	/** GC: The number of real pages faults during dirty bit tracking. */
1623	STAMCOUNTER StatGCDirtyTrackRealPF;
1624
1625	/** GC: Profiling of the PGMTrackDirtyBit() body */
1626	STAMPROFILE StatGCDirtyBitTracking;
1627	/** HC: Profiling of the PGMTrackDirtyBit() body */
1628	STAMPROFILE StatHCDirtyBitTracking;
1629
1630	/** GC: Profiling of the PGMGstModifyPage() body */
1631	STAMPROFILE StatGCGstModifyPage;
1632	/** HC: Profiling of the PGMGstModifyPage() body */
1633	STAMPROFILE StatHCGstModifyPage;
1634
1635	/** GC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
1636	STAMCOUNTER StatGCSyncPagePDNAs;
1637	/** GC: The number of time we've encountered an out-of-sync PD in SyncPage. */
1638	STAMCOUNTER StatGCSyncPagePDOutOfSync;
1639	/** HC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
1640	STAMCOUNTER StatHCSyncPagePDNAs;
1641	/** HC: The number of time we've encountered an out-of-sync PD in SyncPage. */
1642	STAMCOUNTER StatHCSyncPagePDOutOfSync;
1643
1644	STAMCOUNTER StatSynPT4kGC;
1645	STAMCOUNTER StatSynPT4kHC;
1646	STAMCOUNTER StatSynPT4MGC;
1647	STAMCOUNTER StatSynPT4MHC;
1648
1649	/** Profiling of the PGMFlushTLB() body. */
1650	STAMPROFILE StatFlushTLB;
1651	/** The number of times PGMFlushTLB was called with a new CR3, non-global. (switch) */
1652	STAMCOUNTER StatFlushTLBNewCR3;
1653	/** The number of times PGMFlushTLB was called with a new CR3, global. (switch) */
1654	STAMCOUNTER StatFlushTLBNewCR3Global;
1655	/** The number of times PGMFlushTLB was called with the same CR3, non-global. (flush) */
1656	STAMCOUNTER StatFlushTLBSameCR3;
1657	/** The number of times PGMFlushTLB was called with the same CR3, global. (flush) */
1658	STAMCOUNTER StatFlushTLBSameCR3Global;
1659
1660	STAMPROFILE StatGCSyncCR3; /*< GC: PGMSyncCR3() profiling. /
1661	STAMPROFILE StatGCSyncCR3Handlers; /*< GC: Profiling of the PGMSyncCR3() update handler section. /
1662	STAMPROFILE StatGCSyncCR3HandlerVirtualReset; /*< GC: Profiling of the virtual handler resets. /
1663	STAMPROFILE StatGCSyncCR3HandlerVirtualUpdate; /*< GC: Profiling of the virtual handler updates. /
1664	STAMCOUNTER StatGCSyncCR3Global; /*< GC: The number of global CR3 syncs. /
1665	STAMCOUNTER StatGCSyncCR3NotGlobal; /*< GC: The number of non-global CR3 syncs. /
1666	STAMCOUNTER StatGCSyncCR3DstFreed; /*< GC: The number of times we've had to free a shadow entry. /
1667	STAMCOUNTER StatGCSyncCR3DstFreedSrcNP; /*< GC: The number of times we've had to free a shadow entry for which the source entry was not present. /
1668	STAMCOUNTER StatGCSyncCR3DstNotPresent; /*< GC: The number of times we've encountered a not present shadow entry for a present guest entry. /
1669	STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPD; /*< GC: The number of times a global page directory wasn't flushed. /
1670	STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPT; /*< GC: The number of times a page table with only global entries wasn't flushed. /
1671	STAMCOUNTER StatGCSyncCR3DstCacheHit; /*< GC: The number of times we got some kind of cache hit on a page table. /
1672
1673	STAMPROFILE StatHCSyncCR3; /*< HC: PGMSyncCR3() profiling. /
1674	STAMPROFILE StatHCSyncCR3Handlers; /*< HC: Profiling of the PGMSyncCR3() update handler section. /
1675	STAMPROFILE StatHCSyncCR3HandlerVirtualReset; /*< HC: Profiling of the virtual handler resets. /
1676	STAMPROFILE StatHCSyncCR3HandlerVirtualUpdate; /*< HC: Profiling of the virtual handler updates. /
1677	STAMCOUNTER StatHCSyncCR3Global; /*< HC: The number of global CR3 syncs. /
1678	STAMCOUNTER StatHCSyncCR3NotGlobal; /*< HC: The number of non-global CR3 syncs. /
1679	STAMCOUNTER StatHCSyncCR3DstFreed; /*< HC: The number of times we've had to free a shadow entry. /
1680	STAMCOUNTER StatHCSyncCR3DstFreedSrcNP; /*< HC: The number of times we've had to free a shadow entry for which the source entry was not present. /
1681	STAMCOUNTER StatHCSyncCR3DstNotPresent; /*< HC: The number of times we've encountered a not present shadow entry for a present guest entry. /
1682	STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPD; /*< HC: The number of times a global page directory wasn't flushed. /
1683	STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPT; /*< HC: The number of times a page table with only global entries wasn't flushed. /
1684	STAMCOUNTER StatHCSyncCR3DstCacheHit; /*< HC: The number of times we got some kind of cache hit on a page table. /
1685
1686	/** GC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
1687	STAMPROFILE StatVirtHandleSearchByPhysGC;
1688	/** HC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
1689	STAMPROFILE StatVirtHandleSearchByPhysHC;
1690	/** HC: The number of times PGMR3HandlerPhysicalReset is called. */
1691	STAMCOUNTER StatHandlePhysicalReset;
1692
1693	STAMPROFILE StatCheckPageFault;
1694	STAMPROFILE StatLazySyncPT;
1695	STAMPROFILE StatMapping;
1696	STAMPROFILE StatOutOfSync;
1697	STAMPROFILE StatHandlers;
1698	STAMPROFILE StatEIPHandlers;
1699	STAMPROFILE StatHCPrefetch;
1700
1701	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
1702	/** The number of first time shadowings. */
1703	STAMCOUNTER StatTrackVirgin;
1704	/** The number of times switching to cRef2, i.e. the page is being shadowed by two PTs. */
1705	STAMCOUNTER StatTrackAliased;
1706	/** The number of times we're tracking using cRef2. */
1707	STAMCOUNTER StatTrackAliasedMany;
1708	/** The number of times we're hitting pages which has overflowed cRef2. */
1709	STAMCOUNTER StatTrackAliasedLots;
1710	/** The number of times the extent list grows to long. */
1711	STAMCOUNTER StatTrackOverflows;
1712	/** Profiling of SyncPageWorkerTrackDeref (expensive). */
1713	STAMPROFILE StatTrackDeref;
1714	# endif
1715
1716	/** Allocated mbs of guest ram */
1717	STAMCOUNTER StatDynRamTotal;
1718	/** Nr of pgmr3PhysGrowRange calls. */
1719	STAMCOUNTER StatDynRamGrow;
1720
1721	STAMCOUNTER StatGCTrap0ePD[X86_PG_ENTRIES];
1722	STAMCOUNTER StatGCSyncPtPD[X86_PG_ENTRIES];
1723	STAMCOUNTER StatGCSyncPagePD[X86_PG_ENTRIES];
1724	#endif
1725	} PGM, *PPGM;
1726
1727
1728	/** @name PGM::fSyncFlags Flags
1729	* @{
1730	*/
1731	/** Updates the MM_RAM_FLAGS_VIRTUAL_HANDLER page bit. */
1732	#define PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL BIT(0)
1733	/** Always sync CR3. */
1734	#define PGM_SYNC_ALWAYS BIT(1)
1735	/** Check monitoring on next CR3 (re)load and invalidate page. */
1736	#define PGM_SYNC_MONITOR_CR3 BIT(2)
1737	/** Clear the page pool (a light weight flush). */
1738	#define PGM_SYNC_CLEAR_PGM_POOL BIT(8)
1739	/** @} */
1740
1741
1742	__BEGIN_DECLS
1743
1744	PGMGCDECL(int) pgmGCGuestPDWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void pvFault, RTGCPHYS GCPhysFault, void pvUser);
1745	PGMDECL(int) pgmGuestROMWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void pvFault, RTGCPHYS GCPhysFault, void pvUser);
1746	PGMGCDECL(int) pgmCachePTWriteGC(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
1747	int pgmR3SyncPTResolveConflict(PVM pVM, PPGMMAPPING pMapping, PVBOXPD pPDSrc, int iPDOld);
1748	PPGMMAPPING pgmGetMapping(PVM pVM, RTGCPTR GCPtr);
1749	void pgmR3MapRelocate(PVM pVM, PPGMMAPPING pMapping, int iPDOld, int iPDNew);
1750	int pgmR3ChangeMode(PVM pVM, PGMMODE enmGuestMode);
1751	int pgmLock(PVM pVM);
1752	void pgmUnlock(PVM pVM);
1753
1754	void pgmR3HandlerPhysicalUpdateAll(PVM pVM);
1755	int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER ppVirt, unsigned piPage);
1756	DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser);
1757	#ifdef VBOX_STRICT
1758	void pgmHandlerVirtualDumpPhysPages(PVM pVM);
1759	#else
1760	# define pgmHandlerVirtualDumpPhysPages(a) do { } while (0)
1761	#endif
1762	DECLCALLBACK(void) pgmR3InfoHandlers(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
1763
1764
1765	#ifdef IN_RING3
1766	int pgmr3PhysGrowRange(PVM pVM, RTGCPHYS GCPhys);
1767
1768	int pgmR3PoolInit(PVM pVM);
1769	void pgmR3PoolRelocate(PVM pVM);
1770	void pgmR3PoolReset(PVM pVM);
1771
1772	#endif
1773	#ifdef IN_GC
1774	void *pgmGCPoolMapPage(PVM pVM, PPGMPOOLPAGE pPage);
1775	#endif
1776	int pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint16_t iUserTable, PPPGMPOOLPAGE ppPage);
1777	PPGMPOOLPAGE pgmPoolGetPageByHCPhys(PVM pVM, RTHCPHYS HCPhys);
1778	void pgmPoolFree(PVM pVM, RTHCPHYS HCPhys, uint16_t iUser, uint16_t iUserTable);
1779	void pgmPoolFreeByPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint16_t iUserTable);
1780	int pgmPoolFlushPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
1781	void pgmPoolFlushAll(PVM pVM);
1782	void pgmPoolClearAll(PVM pVM);
1783	void pgmPoolTrackFlushGCPhysPT(PVM pVM, PRTHCPHYS pHCPhys, uint16_t iShw, uint16_t cRefs);
1784	void pgmPoolTrackFlushGCPhysPTs(PVM pVM, PRTHCPHYS pHCPhys, uint16_t iPhysExt);
1785	int pgmPoolTrackFlushGCPhysPTsSlow(PVM pVM, PRTHCPHYS pHCPhys);
1786	PPGMPOOLPHYSEXT pgmPoolTrackPhysExtAlloc(PVM pVM, uint16_t *piPhysExt);
1787	void pgmPoolTrackPhysExtFree(PVM pVM, uint16_t iPhysExt);
1788	void pgmPoolTrackPhysExtFreeList(PVM pVM, uint16_t iPhysExt);
1789	uint16_t pgmPoolTrackPhysExtAddref(PVM pVM, uint16_t u16, uint16_t iShwPT);
1790	void pgmPoolTrackPhysExtDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PRTHCPHYS pHCPhys);
1791	#ifdef PGMPOOL_WITH_MONITORING
1792	# ifdef IN_RING3
1793	void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTHCPTR pvAddress, PDISCPUSTATE pCpu);
1794	# else
1795	void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTGCPTR pvAddress, PDISCPUSTATE pCpu);
1796	# endif
1797	int pgmPoolMonitorChainFlush(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
1798	void pgmPoolMonitorModifiedInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
1799	void pgmPoolMonitorModifiedClearAll(PVM pVM);
1800	int pgmPoolMonitorMonitorCR3(PPGMPOOL pPool, uint16_t idxRoot, RTGCPHYS GCPhysCR3);
1801	int pgmPoolMonitorUnmonitorCR3(PPGMPOOL pPool, uint16_t idxRoot);
1802	#endif
1803
1804	__END_DECLS
1805
1806
1807	/**
1808	* Convert GC Phys to HC Phys.
1809	*
1810	* @returns VBox status.
1811	* @param pPGM PGM handle.
1812	* @param GCPhys The GC physical address.
1813	* @param pHCPhys Where to store the corresponding HC physical address.
1814	*/
1815	DECLINLINE(int) PGMRamGCPhys2HCPhys(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
1816	{
1817	/*
1818	* Walk range list.
1819	*/
1820	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
1821	while (pRam)
1822	{
1823	RTGCPHYS off = GCPhys - pRam->GCPhys;
1824	if (off < pRam->cb)
1825	{
1826	unsigned iPage = off >> PAGE_SHIFT;
1827	/* Physical chunk in dynamically allocated range not present? */
1828	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
1829	{
1830	#ifdef IN_RING3
1831	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
1832	#else
1833	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1834	#endif
1835	if (rc != VINF_SUCCESS)
1836	return rc;
1837	}
1838	*pHCPhys = (pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK) \| (off & PAGE_OFFSET_MASK);
1839	return VINF_SUCCESS;
1840	}
1841
1842	pRam = CTXSUFF(pRam->pNext);
1843	}
1844	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1845	}
1846
1847
1848	/**
1849	* Convert GC Phys to HC Virt.
1850	*
1851	* @returns VBox status.
1852	* @param pPGM PGM handle.
1853	* @param GCPhys The GC physical address.
1854	* @param pHCPtr Where to store the corresponding HC virtual address.
1855	*/
1856	DECLINLINE(int) PGMRamGCPhys2HCPtr(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
1857	{
1858	/*
1859	* Walk range list.
1860	*/
1861	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
1862	while (pRam)
1863	{
1864	RTGCPHYS off = GCPhys - pRam->GCPhys;
1865	if (off < pRam->cb)
1866	{
1867	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1868	{
1869	unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
1870	/* Physical chunk in dynamically allocated range not present? */
1871	if (RT_UNLIKELY(!CTXSUFF(pRam->pavHCChunk)[idx]))
1872	{
1873	#ifdef IN_RING3
1874	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
1875	#else
1876	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1877	#endif
1878	if (rc != VINF_SUCCESS)
1879	return rc;
1880	}
1881	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1882	return VINF_SUCCESS;
1883	}
1884	if (pRam->pvHC)
1885	{
1886	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
1887	return VINF_SUCCESS;
1888	}
1889	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1890	}
1891
1892	pRam = CTXSUFF(pRam->pNext);
1893	}
1894	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1895	}
1896
1897
1898	/**
1899	* Convert GC Phys to HC Virt.
1900	*
1901	* @returns VBox status.
1902	* @param PVM VM handle.
1903	* @param pRam Ram range
1904	* @param GCPhys The GC physical address.
1905	* @param pHCPtr Where to store the corresponding HC virtual address.
1906	*/
1907	DECLINLINE(int) PGMRamGCPhys2HCPtr(PVM pVM, PPGMRAMRANGE pRam, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
1908	{
1909	RTGCPHYS off = GCPhys - pRam->GCPhys;
1910	Assert(off < pRam->cb);
1911
1912	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1913	{
1914	unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
1915	/* Physical chunk in dynamically allocated range not present? */
1916	if (RT_UNLIKELY(!CTXSUFF(pRam->pavHCChunk)[idx]))
1917	{
1918	#ifdef IN_RING3
1919	int rc = pgmr3PhysGrowRange(pVM, GCPhys);
1920	#else
1921	int rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1922	#endif
1923	if (rc != VINF_SUCCESS)
1924	return rc;
1925	}
1926	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1927	return VINF_SUCCESS;
1928	}
1929	if (pRam->pvHC)
1930	{
1931	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
1932	return VINF_SUCCESS;
1933	}
1934	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1935	}
1936
1937
1938	/**
1939	* Convert GC Phys to HC Virt and HC Phys.
1940	*
1941	* @returns VBox status.
1942	* @param pPGM PGM handle.
1943	* @param GCPhys The GC physical address.
1944	* @param pHCPtr Where to store the corresponding HC virtual address.
1945	* @param pHCPhys Where to store the HC Physical address and its flags.
1946	*/
1947	DECLINLINE(int) PGMRamGCPhys2HCPtrAndHCPhysWithFlags(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr, PRTHCPHYS pHCPhys)
1948	{
1949	/*
1950	* Walk range list.
1951	*/
1952	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
1953	while (pRam)
1954	{
1955	RTGCPHYS off = GCPhys - pRam->GCPhys;
1956	if (off < pRam->cb)
1957	{
1958	unsigned iPage = off >> PAGE_SHIFT;
1959	/* Physical chunk in dynamically allocated range not present? */
1960	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
1961	{
1962	#ifdef IN_RING3
1963	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
1964	#else
1965	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1966	#endif
1967	if (rc != VINF_SUCCESS)
1968	return rc;
1969	}
1970	*pHCPhys = pRam->aHCPhys[iPage];
1971
1972	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1973	{
1974	unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
1975	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1976	return VINF_SUCCESS;
1977	}
1978	if (pRam->pvHC)
1979	{
1980	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
1981	return VINF_SUCCESS;
1982	}
1983	*pHCPtr = 0;
1984	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1985	}
1986
1987	pRam = CTXSUFF(pRam->pNext);
1988	}
1989	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1990	}
1991
1992
1993	/**
1994	* Convert GC Phys page to a page entry pointer.
1995	*
1996	* This is used by code which may have to update the flags.
1997	*
1998	* @returns VBox status.
1999	* @param pPGM PGM handle.
2000	* @param GCPhys The GC physical address.
2001	* @param ppHCPhys Where to store the pointer to the page entry.
2002	*/
2003	DECLINLINE(int) PGMRamGCPhys2PagePtr(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS *ppHCPhys)
2004	{
2005	/*
2006	* Walk range list.
2007	*/
2008	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2009	while (pRam)
2010	{
2011	RTGCPHYS off = GCPhys - pRam->GCPhys;
2012	if (off < pRam->cb)
2013	{
2014	unsigned iPage = off >> PAGE_SHIFT;
2015	/* Physical chunk in dynamically allocated range not present? */
2016	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2017	{
2018	#ifdef IN_RING3
2019	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2020	#else
2021	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2022	#endif
2023	if (rc != VINF_SUCCESS)
2024	return rc;
2025	}
2026	*ppHCPhys = &pRam->aHCPhys[iPage];
2027	return VINF_SUCCESS;
2028	}
2029
2030	pRam = CTXSUFF(pRam->pNext);
2031	}
2032	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2033	}
2034
2035
2036	/**
2037	* Convert GC Phys page to HC Phys page and flags.
2038	*
2039	* @returns VBox status.
2040	* @param pPGM PGM handle.
2041	* @param GCPhys The GC physical address.
2042	* @param pHCPhys Where to store the corresponding HC physical address of the page
2043	* and the page flags.
2044	*/
2045	DECLINLINE(int) PGMRamGCPhys2HCPhysWithFlags(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
2046	{
2047	/*
2048	* Walk range list.
2049	*/
2050	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2051	while (pRam)
2052	{
2053	RTGCPHYS off = GCPhys - pRam->GCPhys;
2054	if (off < pRam->cb)
2055	{
2056	unsigned iPage = off >> PAGE_SHIFT;
2057	/* Physical chunk in dynamically allocated range not present? */
2058	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2059	{
2060	#ifdef IN_RING3
2061	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2062	#else
2063	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2064	#endif
2065	if (rc != VINF_SUCCESS)
2066	return rc;
2067	}
2068	*pHCPhys = pRam->aHCPhys[iPage];
2069	return VINF_SUCCESS;
2070	}
2071
2072	pRam = CTXSUFF(pRam->pNext);
2073	}
2074	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2075	}
2076
2077
2078	/**
2079	* Clears flags associated with a RAM address.
2080	*
2081	* @returns VBox status code.
2082	* @param pPGM PGM handle.
2083	* @param GCPhys Guest context physical address.
2084	* @param fFlags fFlags to clear. (Bits 0-11.)
2085	*/
2086	DECLINLINE(int) PGMRamFlagsClearByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
2087	{
2088	/*
2089	* Walk range list.
2090	*/
2091	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2092	while (pRam)
2093	{
2094	RTGCPHYS off = GCPhys - pRam->GCPhys;
2095	if (off < pRam->cb)
2096	{
2097	unsigned iPage = off >> PAGE_SHIFT;
2098	/* Physical chunk in dynamically allocated range not present? */
2099	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2100	{
2101	#ifdef IN_RING3
2102	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2103	#else
2104	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2105	#endif
2106	if (rc != VINF_SUCCESS)
2107	return rc;
2108	}
2109	fFlags &= ~X86_PTE_PAE_PG_MASK;
2110	pRam->aHCPhys[iPage] &= ~(RTHCPHYS)fFlags;
2111	return VINF_SUCCESS;
2112	}
2113
2114	pRam = CTXSUFF(pRam->pNext);
2115	}
2116	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2117	}
2118
2119
2120	/**
2121	* Clears flags associated with a RAM address.
2122	*
2123	* @returns VBox status code.
2124	* @param pPGM PGM handle.
2125	* @param GCPhys Guest context physical address.
2126	* @param fFlags fFlags to clear. (Bits 0-11.)
2127	* @param ppRamHint Where to read and store the ram list hint.
2128	* The caller initializes this to NULL before the call.
2129	*/
2130	DECLINLINE(int) PGMRamFlagsClearByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
2131	{
2132	/*
2133	* Check the hint.
2134	*/
2135	PPGMRAMRANGE pRam = *ppRamHint;
2136	if (pRam)
2137	{
2138	RTGCPHYS off = GCPhys - pRam->GCPhys;
2139	if (off < pRam->cb)
2140	{
2141	unsigned iPage = off >> PAGE_SHIFT;
2142	/* Physical chunk in dynamically allocated range not present? */
2143	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2144	{
2145	#ifdef IN_RING3
2146	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2147	#else
2148	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2149	#endif
2150	if (rc != VINF_SUCCESS)
2151	return rc;
2152	}
2153	fFlags &= ~X86_PTE_PAE_PG_MASK;
2154	pRam->aHCPhys[iPage] &= ~(RTHCPHYS)fFlags;
2155	return VINF_SUCCESS;
2156	}
2157	}
2158
2159	/*
2160	* Walk range list.
2161	*/
2162	pRam = CTXSUFF(pPGM->pRamRanges);
2163	while (pRam)
2164	{
2165	RTGCPHYS off = GCPhys - pRam->GCPhys;
2166	if (off < pRam->cb)
2167	{
2168	unsigned iPage = off >> PAGE_SHIFT;
2169	/* Physical chunk in dynamically allocated range not present? */
2170	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2171	{
2172	#ifdef IN_RING3
2173	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2174	#else
2175	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2176	#endif
2177	if (rc != VINF_SUCCESS)
2178	return rc;
2179	}
2180	fFlags &= ~X86_PTE_PAE_PG_MASK;
2181	pRam->aHCPhys[iPage] &= ~(RTHCPHYS)fFlags;
2182	*ppRamHint = pRam;
2183	return VINF_SUCCESS;
2184	}
2185
2186	pRam = CTXSUFF(pRam->pNext);
2187	}
2188	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2189	}
2190
2191	/**
2192	* Sets (bitwise OR) flags associated with a RAM address.
2193	*
2194	* @returns VBox status code.
2195	* @param pPGM PGM handle.
2196	* @param GCPhys Guest context physical address.
2197	* @param fFlags fFlags to set clear. (Bits 0-11.)
2198	*/
2199	DECLINLINE(int) PGMRamFlagsSetByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
2200	{
2201	/*
2202	* Walk range list.
2203	*/
2204	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2205	while (pRam)
2206	{
2207	RTGCPHYS off = GCPhys - pRam->GCPhys;
2208	if (off < pRam->cb)
2209	{
2210	unsigned iPage = off >> PAGE_SHIFT;
2211	/* Physical chunk in dynamically allocated range not present? */
2212	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2213	{
2214	#ifdef IN_RING3
2215	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2216	#else
2217	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2218	#endif
2219	if (rc != VINF_SUCCESS)
2220	return rc;
2221	}
2222	fFlags &= ~X86_PTE_PAE_PG_MASK;
2223	pRam->aHCPhys[iPage] \|= fFlags;
2224	return VINF_SUCCESS;
2225	}
2226
2227	pRam = CTXSUFF(pRam->pNext);
2228	}
2229	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2230	}
2231
2232	/**
2233	* Sets (bitwise OR) flags associated with a RAM address.
2234	*
2235	* @returns VBox status code.
2236	* @param pPGM PGM handle.
2237	* @param GCPhys Guest context physical address.
2238	* @param fFlags fFlags to set clear. (Bits 0-11.)
2239	* @param ppRamHint Where to read and store the ram list hint.
2240	* The caller initializes this to NULL before the call.
2241	*/
2242	DECLINLINE(int) PGMRamFlagsSetByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
2243	{
2244	/*
2245	* Check the hint.
2246	*/
2247	PPGMRAMRANGE pRam = *ppRamHint;
2248	if (pRam)
2249	{
2250	RTGCPHYS off = GCPhys - pRam->GCPhys;
2251	if (off < pRam->cb)
2252	{
2253	unsigned iPage = off >> PAGE_SHIFT;
2254	/* Physical chunk in dynamically allocated range not present? */
2255	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2256	{
2257	#ifdef IN_RING3
2258	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2259	#else
2260	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2261	#endif
2262	if (rc != VINF_SUCCESS)
2263	return rc;
2264	}
2265	fFlags &= ~X86_PTE_PAE_PG_MASK;
2266	pRam->aHCPhys[iPage] \|= fFlags;
2267	return VINF_SUCCESS;
2268	}
2269	}
2270
2271	/*
2272	* Walk range list.
2273	*/
2274	pRam = CTXSUFF(pPGM->pRamRanges);
2275	while (pRam)
2276	{
2277	RTGCPHYS off = GCPhys - pRam->GCPhys;
2278	if (off < pRam->cb)
2279	{
2280	unsigned iPage = off >> PAGE_SHIFT;
2281	/* Physical chunk in dynamically allocated range not present? */
2282	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2283	{
2284	#ifdef IN_RING3
2285	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2286	#else
2287	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2288	#endif
2289	if (rc != VINF_SUCCESS)
2290	return rc;
2291	}
2292	fFlags &= ~X86_PTE_PAE_PG_MASK;
2293	pRam->aHCPhys[iPage] \|= fFlags;
2294	*ppRamHint = pRam;
2295	return VINF_SUCCESS;
2296	}
2297
2298	pRam = CTXSUFF(pRam->pNext);
2299	}
2300	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2301	}
2302
2303
2304	/**
2305	* Gets the page directory for the specified address.
2306	*
2307	* @returns Pointer to the page directory in question.
2308	* @returns NULL if the page directory is not present or on an invalid page.
2309	* @param pPGM Pointer to the PGM instance data.
2310	* @param GCPtr The address.
2311	*/
2312	DECLINLINE(PX86PDPAE) pgmGstGetPaePD(PPGM pPGM, RTGCUINTPTR GCPtr)
2313	{
2314	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2315	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2316	{
2317	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2318	return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr];
2319
2320	/* cache is out-of-sync. */
2321	PX86PDPAE pPD;
2322	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2323	if (VBOX_SUCCESS(rc))
2324	return pPD;
2325	AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2326	/* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page of some kind emualted as all 0s. */
2327	}
2328	return NULL;
2329	}
2330
2331
2332	/**
2333	* Gets the page directory entry for the specified address.
2334	*
2335	* @returns Pointer to the page directory entry in question.
2336	* @returns NULL if the page directory is not present or on an invalid page.
2337	* @param pPGM Pointer to the PGM instance data.
2338	* @param GCPtr The address.
2339	*/
2340	DECLINLINE(PX86PDEPAE) pgmGstGetPaePDEPtr(PPGM pPGM, RTGCUINTPTR GCPtr)
2341	{
2342	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2343	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2344	{
2345	const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
2346	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2347	return &CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD];
2348
2349	/* cache is out-of-sync. */
2350	PX86PDPAE pPD;
2351	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2352	if (VBOX_SUCCESS(rc))
2353	return &pPD->a[iPD];
2354	AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2355	/* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page or something which we'll emulate as all 0s. */
2356	}
2357	return NULL;
2358	}
2359
2360
2361	/**
2362	* Gets the page directory entry for the specified address.
2363	*
2364	* @returns The page directory entry in question.
2365	* @returns A non-present entry if the page directory is not present or on an invalid page.
2366	* @param pPGM Pointer to the PGM instance data.
2367	* @param GCPtr The address.
2368	*/
2369	DECLINLINE(uint64_t) pgmGstGetPaePDE(PPGM pPGM, RTGCUINTPTR GCPtr)
2370	{
2371	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2372	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2373	{
2374	const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
2375	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2376	return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD].u;
2377
2378	/* cache is out-of-sync. */
2379	PX86PDPAE pPD;
2380	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2381	if (VBOX_SUCCESS(rc))
2382	return pPD->a[iPD].u;
2383	AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2384	}
2385	return 0;
2386	}
2387
2388
2389	/**
2390	* Checks if any of the specified page flags are set for the given page.
2391	*
2392	* @returns true if any of the flags are set.
2393	* @returns false if all the flags are clear.
2394	* @param pPGM PGM handle.
2395	* @param GCPhys The GC physical address.
2396	* @param fFlags The flags to check for.
2397	*/
2398	DECLINLINE(bool) PGMRamTestFlags(PPGM pPGM, RTGCPHYS GCPhys, uint64_t fFlags)
2399	{
2400	/*
2401	* Walk range list.
2402	*/
2403	for (PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2404	pRam;
2405	pRam = CTXSUFF(pRam->pNext))
2406	{
2407	RTGCPHYS off = GCPhys - pRam->GCPhys;
2408	if (off < pRam->cb)
2409	return (pRam->aHCPhys[off >> PAGE_SHIFT] & fFlags) != 0;
2410	}
2411	return false;
2412	}
2413
2414
2415	/**
2416	* Gets the ram flags for a handler.
2417	*
2418	* @returns The ram flags.
2419	* @param pCur The physical handler in question.
2420	*/
2421	DECLINLINE(unsigned) pgmHandlerPhysicalCalcFlags(PPGMPHYSHANDLER pCur)
2422	{
2423	switch (pCur->enmType)
2424	{
2425	case PGMPHYSHANDLERTYPE_PHYSICAL:
2426	return MM_RAM_FLAGS_PHYSICAL_HANDLER;
2427
2428	case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
2429	return MM_RAM_FLAGS_PHYSICAL_HANDLER \| MM_RAM_FLAGS_PHYSICAL_WRITE;
2430
2431	case PGMPHYSHANDLERTYPE_MMIO:
2432	case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
2433	return MM_RAM_FLAGS_PHYSICAL_HANDLER \| MM_RAM_FLAGS_PHYSICAL_ALL;
2434
2435	default:
2436	AssertFatalMsgFailed(("Invalid type %d\n", pCur->enmType));
2437	}
2438	}
2439
2440
2441	/**
2442	* Clears one physical page of a virtual handler
2443	*
2444	* @param pPGM Pointer to the PGM instance.
2445	* @param pCur Virtual handler structure
2446	* @param iPage Physical page index
2447	*/
2448	DECLINLINE(void) pgmHandlerVirtualClearPage(PPGM pPGM, PPGMVIRTHANDLER pCur, unsigned iPage)
2449	{
2450	const PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
2451
2452	/*
2453	* Remove the node from the tree (it's supposed to be in the tree if we get here!).
2454	*/
2455	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2456	AssertReleaseMsg(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
2457	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2458	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
2459	#endif
2460	if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD)
2461	{
2462	/* We're the head of the alias chain. */
2463	PPGMPHYS2VIRTHANDLER pRemove = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRemove(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key); NOREF(pRemove);
2464	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2465	AssertReleaseMsg(pRemove != NULL,
2466	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2467	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
2468	AssertReleaseMsg(pRemove == pPhys2Virt,
2469	("wanted: pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n"
2470	" got: pRemove=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2471	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias,
2472	pRemove, pRemove->Core.Key, pRemove->Core.KeyLast, pRemove->offVirtHandler, pRemove->offNextAlias));
2473	#endif
2474	if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
2475	{
2476	/* Insert the next list in the alias chain into the tree. */
2477	PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2478	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2479	AssertReleaseMsg(pNext->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
2480	("pNext=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2481	pNext, pNext->Core.Key, pNext->Core.KeyLast, pNext->offVirtHandler, pNext->offNextAlias));
2482	#endif
2483	pNext->offNextAlias \|= PGMPHYS2VIRTHANDLER_IS_HEAD;
2484	bool fRc = RTAvlroGCPhysInsert(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, &pNext->Core);
2485	AssertRelease(fRc);
2486	}
2487	}
2488	else
2489	{
2490	/* Locate the previous node in the alias chain. */
2491	PPGMPHYS2VIRTHANDLER pPrev = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
2492	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2493	AssertReleaseMsg(pPrev != pPhys2Virt,
2494	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
2495	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
2496	#endif
2497	for (;;)
2498	{
2499	PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPrev + (pPrev->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2500	if (pNext == pPhys2Virt)
2501	{
2502	/* unlink. */
2503	LogFlow(("pgmHandlerVirtualClearPage: removed %p:{.offNextAlias=%#RX32} from alias chain. prev %p:{.offNextAlias=%#RX32} [%VGp-%VGp]\n",
2504	pPhys2Virt, pPhys2Virt->offNextAlias, pPrev, pPrev->offNextAlias, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
2505	if (!(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
2506	pPrev->offNextAlias &= ~PGMPHYS2VIRTHANDLER_OFF_MASK;
2507	else
2508	{
2509	PPGMPHYS2VIRTHANDLER pNewNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2510	pPrev->offNextAlias = ((intptr_t)pNewNext - (intptr_t)pPrev)
2511	\| (pPrev->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
2512	}
2513	break;
2514	}
2515
2516	/* next */
2517	if (pNext == pPrev)
2518	{
2519	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2520	AssertReleaseMsg(pNext != pPrev,
2521	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
2522	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
2523	#endif
2524	break;
2525	}
2526	pPrev = pNext;
2527	}
2528	}
2529	Log2(("PHYS2VIRT: Removing %VGp-%VGp %#RX32 %s\n",
2530	pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, HCSTRING(pCur->pszDesc)));
2531	pPhys2Virt->offNextAlias = 0;
2532	pPhys2Virt->Core.KeyLast = NIL_RTGCPHYS; /* require reinsert */
2533
2534	/*
2535	* Clear the ram flags for this page.
2536	*/
2537	int rc = PGMRamFlagsClearByGCPhys(pPGM, pPhys2Virt->Core.Key,
2538	MM_RAM_FLAGS_VIRTUAL_HANDLER \| MM_RAM_FLAGS_VIRTUAL_ALL \| MM_RAM_FLAGS_VIRTUAL_WRITE);
2539	AssertRC(rc);
2540	}
2541
2542
2543	/**
2544	* Internal worker for finding a 'in-use' shadow page give by it's physical address.
2545	*
2546	* @returns Pointer to the shadow page structure.
2547	* @param pPool The pool.
2548	* @param HCPhys The HC physical address of the shadow page.
2549	*/
2550	DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPage(PPGMPOOL pPool, RTHCPHYS HCPhys)
2551	{
2552	/*
2553	* Look up the page.
2554	*/
2555	PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, HCPhys & X86_PTE_PAE_PG_MASK);
2556	AssertFatalMsg(pPage && pPage->enmKind != PGMPOOLKIND_FREE, ("HCPhys=%VHp pPage=%p type=%d\n", HCPhys, pPage, (pPage) ? pPage->enmKind : 0));
2557	return pPage;
2558	}
2559
2560
2561	/**
2562	* Internal worker for finding a 'in-use' shadow page give by it's physical address.
2563	*
2564	* @returns Pointer to the shadow page structure.
2565	* @param pPool The pool.
2566	* @param idx The pool page index.
2567	*/
2568	DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPageByIdx(PPGMPOOL pPool, unsigned idx)
2569	{
2570	AssertFatalMsg(idx >= PGMPOOL_IDX_FIRST && idx < pPool->cCurPages, ("idx=%d\n", idx));
2571	return &pPool->aPages[idx];
2572	}
2573
2574
2575	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2576	/**
2577	* Clear references to guest physical memory.
2578	*
2579	* @param pPool The pool.
2580	* @param pPage The page.
2581	* @param pHCPhys Pointer to the aHCPhys entry in the ram range.
2582	*/
2583	DECLINLINE(void) pgmTrackDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PRTHCPHYS pHCPhys)
2584	{
2585	/*
2586	* Just deal with the simple case here.
2587	*/
2588	#ifdef LOG_ENABLED
2589	const RTHCPHYS HCPhysOrg = *pHCPhys;
2590	#endif
2591	const unsigned cRefs = *pHCPhys >> MM_RAM_FLAGS_CREFS_SHIFT;
2592	if (cRefs == 1)
2593	{
2594	Assert(pPage->idx == ((*pHCPhys >> MM_RAM_FLAGS_IDX_SHIFT) & MM_RAM_FLAGS_IDX_MASK));
2595	pHCPhys = pHCPhys & MM_RAM_FLAGS_NO_REFS_MASK;
2596	}
2597	else
2598	pgmPoolTrackPhysExtDerefGCPhys(pPool, pPage, pHCPhys);
2599	LogFlow(("pgmTrackDerefGCPhys: pHCPhys=%RHp -> %RHp\n", HCPhysOrg, pHCPhys));
2600	}
2601	#endif
2602
2603
2604	#ifdef PGMPOOL_WITH_CACHE
2605	/**
2606	* Moves the page to the head of the age list.
2607	*
2608	* This is done when the cached page is used in one way or another.
2609	*
2610	* @param pPool The pool.
2611	* @param pPage The cached page.
2612	* @todo inline in PGMInternal.h!
2613	*/
2614	DECLINLINE(void) pgmPoolCacheUsed(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
2615	{
2616	/*
2617	* Move to the head of the age list.
2618	*/
2619	if (pPage->iAgePrev != NIL_PGMPOOL_IDX)
2620	{
2621	/* unlink */
2622	pPool->aPages[pPage->iAgePrev].iAgeNext = pPage->iAgeNext;
2623	if (pPage->iAgeNext != NIL_PGMPOOL_IDX)
2624	pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->iAgePrev;
2625	else
2626	pPool->iAgeTail = pPage->iAgePrev;
2627
2628	/* insert at head */
2629	pPage->iAgePrev = NIL_PGMPOOL_IDX;
2630	pPage->iAgeNext = pPool->iAgeHead;
2631	Assert(pPage->iAgeNext != NIL_PGMPOOL_IDX); /* we would've already been head then */
2632	pPool->iAgeHead = pPage->idx;
2633	pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->idx;
2634	}
2635	}
2636	#endif /* PGMPOOL_WITH_CACHE */
2637
2638	/**
2639	* Tells if mappings are to be put into the shadow page table or not
2640	*
2641	* @returns boolean result
2642	* @param pVM VM handle.
2643	*/
2644
2645	DECLINLINE(bool) pgmMapAreMappingsEnabled(PPGM pPGM)
2646	{
2647	return !pPGM->fDisableMappings;
2648	}
2649
2650	/** @} */
2651
2652	#endif

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source: vbox/trunk/src/VBox/VMM/PGMInternal.h@ 2273

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