PGMInternal.h@ 3723

Last change on this file since 3723 was 3723, checked in by vboxsync, 17 years ago
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1	/* $Id: PGMInternal.h 3723 2007-07-19 18:46:00Z vboxsync $ */
2	/** @file
3	* PGM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 innotek GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* If you received this file as part of a commercial VirtualBox
18	* distribution, then only the terms of your commercial VirtualBox
19	* license agreement apply instead of the previous paragraph.
20	*/
21
22	#ifndef ___PGMInternal_h
23	#define ___PGMInternal_h
24
25	#include <VBox/cdefs.h>
26	#include <VBox/types.h>
27	#include <VBox/err.h>
28	#include <VBox/stam.h>
29	#include <VBox/param.h>
30	#include <VBox/vmm.h>
31	#include <VBox/mm.h>
32	#include <VBox/pdm.h>
33	#include <iprt/avl.h>
34	#include <iprt/assert.h>
35	#include <iprt/critsect.h>
36
37	#if !defined(IN_PGM_R3) && !defined(IN_PGM_R0) && !defined(IN_PGM_GC)
38	# error "Not in PGM! This is an internal header!"
39	#endif
40
41
42	/** @defgroup grp_pgm_int Internals
43	* @ingroup grp_pgm
44	* @internal
45	* @{
46	*/
47
48
49	/** @name PGM Compile Time Config
50	* @{
51	*/
52
53	/**
54	* Solve page is out of sync issues inside Guest Context (in PGMGC.cpp).
55	* Comment it if it will break something.
56	*/
57	#define PGM_OUT_OF_SYNC_IN_GC
58
59	/**
60	* Virtualize the dirty bit
61	* This also makes a half-hearted attempt at the accessed bit. For full
62	* accessed bit virtualization define PGM_SYNC_ACCESSED_BIT.
63	*/
64	#define PGM_SYNC_DIRTY_BIT
65
66	/**
67	* Fully virtualize the accessed bit.
68	* @remark This requires SYNC_DIRTY_ACCESSED_BITS to be defined!
69	*/
70	#define PGM_SYNC_ACCESSED_BIT
71
72	/**
73	* Check and skip global PDEs for non-global flushes
74	*/
75	#define PGM_SKIP_GLOBAL_PAGEDIRS_ON_NONGLOBAL_FLUSH
76
77	/**
78	* Sync N pages instead of a whole page table
79	*/
80	#define PGM_SYNC_N_PAGES
81
82	/**
83	* Number of pages to sync during a page fault
84	*
85	* When PGMPOOL_WITH_GCPHYS_TRACKING is enabled using high values here
86	* causes a lot of unnecessary extents and also is slower than taking more \#PFs.
87	*/
88	#define PGM_SYNC_NR_PAGES 8
89
90	/**
91	* Number of PGMPhysRead/Write cache entries (must be <= sizeof(uint64_t))
92	*/
93	#define PGM_MAX_PHYSCACHE_ENTRIES 64
94	#define PGM_MAX_PHYSCACHE_ENTRIES_MASK (PGM_MAX_PHYSCACHE_ENTRIES-1)
95
96	/**
97	* Enable caching of PGMR3PhysRead/WriteByte/Word/Dword
98	*/
99	#define PGM_PHYSMEMACCESS_CACHING
100
101	/*
102	* Assert Sanity.
103	*/
104	#if defined(PGM_SYNC_ACCESSED_BIT) && !defined(PGM_SYNC_DIRTY_BIT)
105	# error "PGM_SYNC_ACCESSED_BIT requires PGM_SYNC_DIRTY_BIT!"
106	#endif
107
108	/** @def PGMPOOL_WITH_CACHE
109	* Enable agressive caching using the page pool.
110	*
111	* This requires PGMPOOL_WITH_USER_TRACKING and PGMPOOL_WITH_MONITORING.
112	*/
113	#define PGMPOOL_WITH_CACHE
114
115	/** @def PGMPOOL_WITH_MIXED_PT_CR3
116	* When defined, we'll deal with 'uncachable' pages.
117	*/
118	#ifdef PGMPOOL_WITH_CACHE
119	# define PGMPOOL_WITH_MIXED_PT_CR3
120	#endif
121
122	/** @def PGMPOOL_WITH_MONITORING
123	* Monitor the guest pages which are shadowed.
124	* When this is enabled, PGMPOOL_WITH_CACHE or PGMPOOL_WITH_GCPHYS_TRACKING must
125	* be enabled as well.
126	* @remark doesn't really work without caching now. (Mixed PT/CR3 change.)
127	*/
128	#ifdef PGMPOOL_WITH_CACHE
129	# define PGMPOOL_WITH_MONITORING
130	#endif
131
132	/** @def PGMPOOL_WITH_GCPHYS_TRACKING
133	* Tracking the of shadow pages mapping guest physical pages.
134	*
135	* This is very expensive, the current cache prototype is trying to figure out
136	* whether it will be acceptable with an agressive caching policy.
137	*/
138	#if defined(PGMPOOL_WITH_CACHE) \|\| defined(PGMPOOL_WITH_MONITORING)
139	# define PGMPOOL_WITH_GCPHYS_TRACKING
140	#endif
141
142	/** @def PGMPOOL_WITH_USER_TRACKING
143	* Tracking users of shadow pages. This is required for the linking of shadow page
144	* tables and physical guest addresses.
145	*/
146	#if defined(PGMPOOL_WITH_GCPHYS_TRACKING) \|\| defined(PGMPOOL_WITH_CACHE) \|\| defined(PGMPOOL_WITH_MONITORING)
147	# define PGMPOOL_WITH_USER_TRACKING
148	#endif
149
150	/** @def PGMPOOL_CFG_MAX_GROW
151	* The maximum number of pages to add to the pool in one go.
152	*/
153	#define PGMPOOL_CFG_MAX_GROW (_256K >> PAGE_SHIFT)
154
155	/** @def VBOX_STRICT_PGM_HANDLER_VIRTUAL
156	* Enables some extra assertions for virtual handlers (mainly phys2virt related).
157	*/
158	#ifdef VBOX_STRICT
159	# define VBOX_STRICT_PGM_HANDLER_VIRTUAL
160	#endif
161	/** @} */
162
163
164	/** @name PDPTR and PML4 flags.
165	* These are placed in the three bits available for system programs in
166	* the PDPTR and PML4 entries.
167	* @{ */
168	/** The entry is a permanent one and it's must always be present.
169	* Never free such an entry. */
170	#define PGM_PLXFLAGS_PERMANENT BIT64(10)
171	/** @} */
172
173	/** @name Page directory flags.
174	* These are placed in the three bits available for system programs in
175	* the page directory entries.
176	* @{ */
177	/** Mapping (hypervisor allocated pagetable). */
178	#define PGM_PDFLAGS_MAPPING BIT64(10)
179	/** Made read-only to facilitate dirty bit tracking. */
180	#define PGM_PDFLAGS_TRACK_DIRTY BIT64(11)
181	/** @} */
182
183	/** @name Page flags.
184	* These are placed in the three bits available for system programs in
185	* the page entries.
186	* @{ */
187	/** Made read-only to facilitate dirty bit tracking. */
188	#define PGM_PTFLAGS_TRACK_DIRTY BIT64(9)
189
190	#ifndef PGM_PTFLAGS_CSAM_VALIDATED
191	/** Scanned and approved by CSAM (tm).
192	* NOTE: Must be identical to the one defined in CSAMInternal.h!!
193	* @todo Move PGM_PTFLAGS_* and PGM_PDFLAGS_* to VBox/pgm.h. */
194	#define PGM_PTFLAGS_CSAM_VALIDATED BIT64(11)
195	#endif
196	/** @} */
197
198	/** @name Defines used to indicate the shadow and guest paging in the templates.
199	* @{ */
200	#define PGM_TYPE_REAL 1
201	#define PGM_TYPE_PROT 2
202	#define PGM_TYPE_32BIT 3
203	#define PGM_TYPE_PAE 4
204	#define PGM_TYPE_AMD64 5
205	/** @} */
206
207	/** Macro for checking if the guest is using paging.
208	* @param uType PGM_TYPE_*
209	* @remark ASSUMES certain order of the PGM_TYPE_* values.
210	*/
211	#define PGM_WITH_PAGING(uType) ((uType) >= PGM_TYPE_32BIT)
212
213
214	/** @def PGM_HCPHYS_2_PTR
215	* Maps a HC physical page pool address to a virtual address.
216	*
217	* @returns VBox status code.
218	* @param pVM The VM handle.
219	* @param HCPhys The HC physical address to map to a virtual one.
220	* @param ppv Where to store the virtual address. No need to cast this.
221	*
222	* @remark In GC this uses PGMGCDynMapHCPage(), so it will consume of the
223	* small page window employeed by that function. Be careful.
224	* @remark There is no need to assert on the result.
225	*/
226	#ifdef IN_GC
227	# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) PGMGCDynMapHCPage(pVM, HCPhys, (void **)(ppv))
228	#else
229	# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) MMPagePhys2PageEx(pVM, HCPhys, (void **)(ppv))
230	#endif
231
232	/** @def PGM_GCPHYS_2_PTR
233	* Maps a GC physical page address to a virtual address.
234	*
235	* @returns VBox status code.
236	* @param pVM The VM handle.
237	* @param GCPhys The GC physical address to map to a virtual one.
238	* @param ppv Where to store the virtual address. No need to cast this.
239	*
240	* @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
241	* small page window employeed by that function. Be careful.
242	* @remark There is no need to assert on the result.
243	*/
244	#ifdef IN_GC
245	# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMGCDynMapGCPage(pVM, GCPhys, (void **)(ppv))
246	#else
247	# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1 /* one page only /, (void )(ppv)) /* @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
248	#endif
249
250	/** @def PGM_GCPHYS_2_PTR_EX
251	* Maps a unaligned GC physical page address to a virtual address.
252	*
253	* @returns VBox status code.
254	* @param pVM The VM handle.
255	* @param GCPhys The GC physical address to map to a virtual one.
256	* @param ppv Where to store the virtual address. No need to cast this.
257	*
258	* @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
259	* small page window employeed by that function. Be careful.
260	* @remark There is no need to assert on the result.
261	*/
262	#ifdef IN_GC
263	# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMGCDynMapGCPageEx(pVM, GCPhys, (void **)(ppv))
264	#else
265	# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1 /* one page only /, (void )(ppv)) /* @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
266	#endif
267
268	/** @def PGM_INVL_PG
269	* Invalidates a page when in GC does nothing in HC.
270	*
271	* @param GCVirt The virtual address of the page to invalidate.
272	*/
273	#ifdef IN_GC
274	# define PGM_INVL_PG(GCVirt) ASMInvalidatePage((void *)(GCVirt))
275	#else
276	# define PGM_INVL_PG(GCVirt) ((void)0)
277	#endif
278
279	/** @def PGM_INVL_BIG_PG
280	* Invalidates a 4MB page directory entry when in GC does nothing in HC.
281	*
282	* @param GCVirt The virtual address within the page directory to invalidate.
283	*/
284	#ifdef IN_GC
285	# define PGM_INVL_BIG_PG(GCVirt) ASMReloadCR3()
286	#else
287	# define PGM_INVL_BIG_PG(GCVirt) ((void)0)
288	#endif
289
290	/** @def PGM_INVL_GUEST_TLBS()
291	* Invalidates all guest TLBs.
292	*/
293	#ifdef IN_GC
294	# define PGM_INVL_GUEST_TLBS() ASMReloadCR3()
295	#else
296	# define PGM_INVL_GUEST_TLBS() ((void)0)
297	#endif
298
299
300	/**
301	* Structure for tracking GC Mappings.
302	*
303	* This structure is used by linked list in both GC and HC.
304	*/
305	typedef struct PGMMAPPING
306	{
307	/** Pointer to next entry. */
308	R3PTRTYPE(struct PGMMAPPING *) pNextR3;
309	/** Pointer to next entry. */
310	R0PTRTYPE(struct PGMMAPPING *) pNextR0;
311	/** Pointer to next entry. */
312	GCPTRTYPE(struct PGMMAPPING *) pNextGC;
313	/** Start Virtual address. */
314	RTGCUINTPTR GCPtr;
315	/** Last Virtual address (inclusive). */
316	RTGCUINTPTR GCPtrLast;
317	/** Range size (bytes). */
318	RTGCUINTPTR cb;
319	/** Pointer to relocation callback function. */
320	R3PTRTYPE(PFNPGMRELOCATE) pfnRelocate;
321	/** User argument to the callback. */
322	R3PTRTYPE(void *) pvUser;
323	/** Mapping description / name. For easing debugging. */
324	R3PTRTYPE(const char *) pszDesc;
325	/** Number of page tables. */
326	RTUINT cPTs;
327	#if HC_ARCH_BITS != GC_ARCH_BITS
328	RTUINT uPadding0; /*< Alignment padding. /
329	#endif
330	/** Array of page table mapping data. Each entry
331	* describes one page table. The array can be longer
332	* than the declared length.
333	*/
334	struct
335	{
336	/** The HC physical address of the page table. */
337	RTHCPHYS HCPhysPT;
338	/** The HC physical address of the first PAE page table. */
339	RTHCPHYS HCPhysPaePT0;
340	/** The HC physical address of the second PAE page table. */
341	RTHCPHYS HCPhysPaePT1;
342	/** The HC virtual address of the 32-bit page table. */
343	R3PTRTYPE(PVBOXPT) pPTR3;
344	/** The HC virtual address of the two PAE page table. (i.e 1024 entries instead of 512) */
345	R3PTRTYPE(PX86PTPAE) paPaePTsR3;
346	/** The GC virtual address of the 32-bit page table. */
347	GCPTRTYPE(PVBOXPT) pPTGC;
348	/** The GC virtual address of the two PAE page table. */
349	GCPTRTYPE(PX86PTPAE) paPaePTsGC;
350	/** The GC virtual address of the 32-bit page table. */
351	R0PTRTYPE(PVBOXPT) pPTR0;
352	/** The GC virtual address of the two PAE page table. */
353	R0PTRTYPE(PX86PTPAE) paPaePTsR0;
354	} aPTs[1];
355	} PGMMAPPING;
356	/** Pointer to structure for tracking GC Mappings. */
357	typedef struct PGMMAPPING *PPGMMAPPING;
358
359
360	/**
361	* Physical page access handler structure.
362	*
363	* This is used to keep track of physical address ranges
364	* which are being monitored in some kind of way.
365	*/
366	typedef struct PGMPHYSHANDLER
367	{
368	AVLROGCPHYSNODECORE Core;
369	/** Alignment padding. */
370	uint32_t u32Padding;
371	/** Access type. */
372	PGMPHYSHANDLERTYPE enmType;
373	/** Number of pages to update. */
374	uint32_t cPages;
375	/** Pointer to R3 callback function. */
376	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3;
377	/** User argument for R3 handlers. */
378	R3PTRTYPE(void *) pvUserR3;
379	/** Pointer to R0 callback function. */
380	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0;
381	/** User argument for R0 handlers. */
382	R0PTRTYPE(void *) pvUserR0;
383	/** Pointer to GC callback function. */
384	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC;
385	/** User argument for GC handlers. */
386	GCPTRTYPE(void *) pvUserGC;
387	/** Description / Name. For easing debugging. */
388	R3PTRTYPE(const char *) pszDesc;
389	#ifdef VBOX_WITH_STATISTICS
390	/** Profiling of this handler. */
391	STAMPROFILE Stat;
392	#endif
393	} PGMPHYSHANDLER;
394	/** Pointer to a physical page access handler structure. */
395	typedef PGMPHYSHANDLER *PPGMPHYSHANDLER;
396
397
398	/**
399	* Cache node for the physical addresses covered by a virtual handler.
400	*/
401	typedef struct PGMPHYS2VIRTHANDLER
402	{
403	/** Core node for the tree based on physical ranges. */
404	AVLROGCPHYSNODECORE Core;
405	/** Offset from this struct to the PGMVIRTHANDLER structure. */
406	RTGCINTPTR offVirtHandler;
407	/** Offset of the next alias relativer to this one.
408	* Bit 0 is used for indicating whether we're in the tree.
409	* Bit 1 is used for indicating that we're the head node.
410	*/
411	int32_t offNextAlias;
412	} PGMPHYS2VIRTHANDLER;
413	/** Pointer to a phys to virtual handler structure. */
414	typedef PGMPHYS2VIRTHANDLER *PPGMPHYS2VIRTHANDLER;
415
416	/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
417	* node is in the tree. */
418	#define PGMPHYS2VIRTHANDLER_IN_TREE BIT(0)
419	/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
420	* node is in the head of an alias chain.
421	* The PGMPHYS2VIRTHANDLER_IN_TREE is always set if this bit is set. */
422	#define PGMPHYS2VIRTHANDLER_IS_HEAD BIT(1)
423	/** The mask to apply to PGMPHYS2VIRTHANDLER::offNextAlias to get the offset. */
424	#define PGMPHYS2VIRTHANDLER_OFF_MASK (~(int32_t)3)
425
426
427	/**
428	* Virtual page access handler structure.
429	*
430	* This is used to keep track of virtual address ranges
431	* which are being monitored in some kind of way.
432	*/
433	typedef struct PGMVIRTHANDLER
434	{
435	/** Core node for the tree based on virtual ranges. */
436	AVLROGCPTRNODECORE Core;
437	/** Number of cache pages. */
438	uint32_t u32Padding;
439	/** Access type. */
440	PGMVIRTHANDLERTYPE enmType;
441	/** Number of cache pages. */
442	uint32_t cPages;
443
444	/** @todo The next two members are redundant. It adds some readability though. */
445	/** Start of the range. */
446	RTGCPTR GCPtr;
447	/** End of the range (exclusive). */
448	RTGCPTR GCPtrLast;
449	/** Size of the range (in bytes). */
450	RTGCUINTPTR cb;
451	/** Pointer to the GC callback function. */
452	GCPTRTYPE(PFNPGMGCVIRTHANDLER) pfnHandlerGC;
453	/** Pointer to the HC callback function for invalidation. */
454	HCPTRTYPE(PFNPGMHCVIRTINVALIDATE) pfnInvalidateHC;
455	/** Pointer to the HC callback function. */
456	HCPTRTYPE(PFNPGMHCVIRTHANDLER) pfnHandlerHC;
457	/** Description / Name. For easing debugging. */
458	HCPTRTYPE(const char *) pszDesc;
459	#ifdef VBOX_WITH_STATISTICS
460	/** Profiling of this handler. */
461	STAMPROFILE Stat;
462	#endif
463	/** Array of cached physical addresses for the monitored ranged. */
464	PGMPHYS2VIRTHANDLER aPhysToVirt[HC_ARCH_BITS == 32 ? 1 : 2];
465	} PGMVIRTHANDLER;
466	/** Pointer to a virtual page access handler structure. */
467	typedef PGMVIRTHANDLER *PPGMVIRTHANDLER;
468
469
470	/**
471	* Ram range for GC Phys to HC Phys conversion.
472	*
473	* Can be used for HC Virt to GC Phys and HC Virt to HC Phys
474	* conversions too, but we'll let MM handle that for now.
475	*
476	* This structure is used by linked lists in both GC and HC.
477	*/
478	typedef struct PGMRAMRANGE
479	{
480	/** Pointer to the next RAM range - for HC. */
481	HCPTRTYPE(struct PGMRAMRANGE *) pNextHC;
482	/** Pointer to the next RAM range - for GC. */
483	GCPTRTYPE(struct PGMRAMRANGE *) pNextGC;
484	/** Start of the range. Page aligned. */
485	RTGCPHYS GCPhys;
486	/** Last address in the range (inclusive). Page aligned (-1). */
487	RTGCPHYS GCPhysLast;
488	/** Size of the range. (Page aligned of course). */
489	RTGCPHYS cb;
490	/** MM_RAM_* flags */
491	uint32_t fFlags;
492
493	/** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
494	GCPTRTYPE(PRTHCPTR) pavHCChunkGC;
495	/** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
496	HCPTRTYPE(PRTHCPTR) pavHCChunkHC;
497
498	/** Start of the HC mapping of the range.
499	* For pure MMIO and dynamically allocated ranges this is NULL, while for all ranges this is a valid pointer. */
500	HCPTRTYPE(void *) pvHC;
501
502	/** Array of the flags and HC physical addresses corresponding to the range.
503	* The index is the page number in the range. The size is cb >> PAGE_SHIFT.
504	*
505	* The 12 lower bits of the physical address are flags and must be masked
506	* off to get the correct physical address.
507	*
508	* For pure MMIO ranges only the flags are valid.
509	*/
510	RTHCPHYS aHCPhys[1];
511	} PGMRAMRANGE;
512	/** Pointer to Ram range for GC Phys to HC Phys conversion. */
513	typedef PGMRAMRANGE *PPGMRAMRANGE;
514
515	/** Return hc ptr corresponding to the ram range and physical offset */
516	#define PGMRAMRANGE_GETHCPTR(pRam, off) \
517	(pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC) ? (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[(off >> PGM_DYNAMIC_CHUNK_SHIFT)] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK)) \
518	: (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
519
520	/** @todo r=bird: fix typename. */
521	/**
522	* PGMPhysRead/Write cache entry
523	*/
524	typedef struct PGMPHYSCACHE_ENTRY
525	{
526	/** HC pointer to physical page */
527	R3PTRTYPE(uint8_t *) pbHC;
528	/** GC Physical address for cache entry */
529	RTGCPHYS GCPhys;
530	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
531	RTGCPHYS u32Padding0; /*< alignment padding. /
532	#endif
533	} PGMPHYSCACHE_ENTRY;
534
535	/**
536	* PGMPhysRead/Write cache to reduce REM memory access overhead
537	*/
538	typedef struct PGMPHYSCACHE
539	{
540	/** Bitmap of valid cache entries */
541	uint64_t aEntries;
542	/** Cache entries */
543	PGMPHYSCACHE_ENTRY Entry[PGM_MAX_PHYSCACHE_ENTRIES];
544	} PGMPHYSCACHE;
545
546
547	/** @name PGM Pool Indexes.
548	* Aka. the unique shadow page identifier.
549	* @{ */
550	/** NIL page pool IDX. */
551	#define NIL_PGMPOOL_IDX 0
552	/** The first normal index. */
553	#define PGMPOOL_IDX_FIRST_SPECIAL 1
554	/** Page directory (32-bit root). */
555	#define PGMPOOL_IDX_PD 1
556	/** The extended PAE page directory (2048 entries, works as root currently). */
557	#define PGMPOOL_IDX_PAE_PD 2
558	/** Page Directory Pointer Table (PAE root, not currently used). */
559	#define PGMPOOL_IDX_PDPTR 3
560	/** Page Map Level-4 (64-bit root). */
561	#define PGMPOOL_IDX_PML4 4
562	/** The first normal index. */
563	#define PGMPOOL_IDX_FIRST 5
564	/** The last valid index. (inclusive, 14 bits) */
565	#define PGMPOOL_IDX_LAST 0x3fff
566	/** @} */
567
568	/** The NIL index for the parent chain. */
569	#define NIL_PGMPOOL_USER_INDEX ((uint16_t)0xffff)
570
571	/**
572	* Node in the chain linking a shadowed page to it's parent (user).
573	*/
574	#pragma pack(1)
575	typedef struct PGMPOOLUSER
576	{
577	/** The index to the next item in the chain. NIL_PGMPOOL_USER_INDEX is no next. */
578	uint16_t iNext;
579	/** The user page index. */
580	uint16_t iUser;
581	/** Index into the user table. */
582	uint16_t iUserTable;
583	} PGMPOOLUSER, *PPGMPOOLUSER;
584	typedef const PGMPOOLUSER *PCPGMPOOLUSER;
585	#pragma pack()
586
587
588	/** The NIL index for the phys ext chain. */
589	#define NIL_PGMPOOL_PHYSEXT_INDEX ((uint16_t)0xffff)
590
591	/**
592	* Node in the chain of physical cross reference extents.
593	*/
594	#pragma pack(1)
595	typedef struct PGMPOOLPHYSEXT
596	{
597	/** The index to the next item in the chain. NIL_PGMPOOL_PHYSEXT_INDEX is no next. */
598	uint16_t iNext;
599	/** The user page index. */
600	uint16_t aidx[3];
601	} PGMPOOLPHYSEXT, *PPGMPOOLPHYSEXT;
602	typedef const PGMPOOLPHYSEXT *PCPGMPOOLPHYSEXT;
603	#pragma pack()
604
605
606	/**
607	* The kind of page that's being shadowed.
608	*/
609	typedef enum PGMPOOLKIND
610	{
611	/** The virtual invalid 0 entry. */
612	PGMPOOLKIND_INVALID = 0,
613	/** The entry is free (=unused). */
614	PGMPOOLKIND_FREE,
615
616	/** Shw: 32-bit page table; Gst: no paging */
617	PGMPOOLKIND_32BIT_PT_FOR_PHYS,
618	/** Shw: 32-bit page table; Gst: 32-bit page table. */
619	PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT,
620	/** Shw: 32-bit page table; Gst: 4MB page. */
621	PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB,
622	/** Shw: PAE page table; Gst: no paging */
623	PGMPOOLKIND_PAE_PT_FOR_PHYS,
624	/** Shw: PAE page table; Gst: 32-bit page table. */
625	PGMPOOLKIND_PAE_PT_FOR_32BIT_PT,
626	/** Shw: PAE page table; Gst: Half of a 4MB page. */
627	PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB,
628	/** Shw: PAE page table; Gst: PAE page table. */
629	PGMPOOLKIND_PAE_PT_FOR_PAE_PT,
630	/** Shw: PAE page table; Gst: 2MB page. */
631	PGMPOOLKIND_PAE_PT_FOR_PAE_2MB,
632
633	/** Shw: PAE page directory; Gst: 32-bit page directory. */
634	PGMPOOLKIND_PAE_PD_FOR_32BIT_PD,
635	/** Shw: PAE page directory; Gst: PAE page directory. */
636	PGMPOOLKIND_PAE_PD_FOR_PAE_PD,
637
638	/** Shw: 64-bit page directory pointer table; Gst: 64-bit page directory pointer table. */
639	PGMPOOLKIND_64BIT_PDPTR_FOR_64BIT_PDPTR,
640
641	/** Shw: Root 32-bit page directory. */
642	PGMPOOLKIND_ROOT_32BIT_PD,
643	/** Shw: Root PAE page directory */
644	PGMPOOLKIND_ROOT_PAE_PD,
645	/** Shw: Root PAE page directory pointer table (legacy, 4 entries). */
646	PGMPOOLKIND_ROOT_PDPTR,
647	/** Shw: Root page map level-4 table. */
648	PGMPOOLKIND_ROOT_PML4,
649
650	/** The last valid entry. */
651	PGMPOOLKIND_LAST = PGMPOOLKIND_ROOT_PML4
652	} PGMPOOLKIND;
653
654
655	/**
656	* The tracking data for a page in the pool.
657	*/
658	typedef struct PGMPOOLPAGE
659	{
660	/** AVL node code with the (HC) physical address of this page. */
661	AVLOHCPHYSNODECORE Core;
662	/** Pointer to the HC mapping of the page. */
663	HCPTRTYPE(void *) pvPageHC;
664	/** The guest physical address. */
665	RTGCPHYS GCPhys;
666	/** The kind of page we're shadowing. (This is really a PGMPOOLKIND enum.) */
667	uint8_t enmKind;
668	uint8_t bPadding;
669	/** The index of this page. */
670	uint16_t idx;
671	/** The next entry in the list this page currently resides in.
672	* It's either in the free list or in the GCPhys hash. */
673	uint16_t iNext;
674	#ifdef PGMPOOL_WITH_USER_TRACKING
675	/** Head of the user chain. NIL_PGMPOOL_USER_INDEX if not currently in use. */
676	uint16_t iUserHead;
677	/** The number of present entries. */
678	uint16_t cPresent;
679	/** The first entry in the table which is present. */
680	uint16_t iFirstPresent;
681	#endif
682	#ifdef PGMPOOL_WITH_MONITORING
683	/** The number of modifications to the monitored page. */
684	uint16_t cModifications;
685	/** The next modified page. NIL_PGMPOOL_IDX if tail. */
686	uint16_t iModifiedNext;
687	/** The previous modified page. NIL_PGMPOOL_IDX if head. */
688	uint16_t iModifiedPrev;
689	/** The next page sharing access handler. NIL_PGMPOOL_IDX if tail. */
690	uint16_t iMonitoredNext;
691	/** The previous page sharing access handler. NIL_PGMPOOL_IDX if head. */
692	uint16_t iMonitoredPrev;
693	#endif
694	#ifdef PGMPOOL_WITH_CACHE
695	/** The next page in the age list. */
696	uint16_t iAgeNext;
697	/** The previous page in the age list. */
698	uint16_t iAgePrev;
699	#endif /* PGMPOOL_WITH_CACHE */
700	/** Used to indicate that the page is zeroed. */
701	bool fZeroed;
702	/** Used to indicate that a PT has non-global entries. */
703	bool fSeenNonGlobal;
704	/** Used to indicate that we're monitoring writes to the guest page. */
705	bool fMonitored;
706	/** Used to indicate that the page is in the cache (e.g. in the GCPhys hash).
707	* (All pages are in the age list.) */
708	bool fCached;
709	/** This is used by the R3 access handlers when invoked by an async thread.
710	* It's a hack required because of REMR3NotifyHandlerPhysicalDeregister. */
711	bool volatile fReusedFlushPending;
712	/** Used to indicate that the guest is mapping the page is also used as a CR3.
713	* In these cases the access handler acts differently and will check
714	* for mapping conflicts like the normal CR3 handler.
715	* @todo When we change the CR3 shadowing to use pool pages, this flag can be
716	* replaced by a list of pages which share access handler.
717	*/
718	bool fCR3Mix;
719	#if HC_ARCH_BITS == 64 \|\| GC_ARCH_BITS == 64
720	bool Alignment[4]; /*< Align the structure size on a 64-bit boundrary. /
721	#endif
722	} PGMPOOLPAGE, PPGMPOOLPAGE, *PPPGMPOOLPAGE;
723
724
725	#ifdef PGMPOOL_WITH_CACHE
726	/** The hash table size. */
727	# define PGMPOOL_HASH_SIZE 0x40
728	/** The hash function. */
729	# define PGMPOOL_HASH(GCPhys) ( ((GCPhys) >> PAGE_SHIFT) & (PGMPOOL_HASH_SIZE - 1) )
730	#endif
731
732
733	/**
734	* The shadow page pool instance data.
735	*
736	* It's all one big allocation made at init time, except for the
737	* pages that is. The user nodes follows immediatly after the
738	* page structures.
739	*/
740	typedef struct PGMPOOL
741	{
742	/** The VM handle - HC Ptr. */
743	HCPTRTYPE(PVM) pVMHC;
744	/** The VM handle - GC Ptr. */
745	GCPTRTYPE(PVM) pVMGC;
746	/** The max pool size. This includes the special IDs. */
747	uint16_t cMaxPages;
748	/** The current pool size. */
749	uint16_t cCurPages;
750	/** The head of the free page list. */
751	uint16_t iFreeHead;
752	/* Padding. */
753	uint16_t u16Padding;
754	#ifdef PGMPOOL_WITH_USER_TRACKING
755	/** Head of the chain of free user nodes. */
756	uint16_t iUserFreeHead;
757	/** The number of user nodes we've allocated. */
758	uint16_t cMaxUsers;
759	/** The number of present page table entries in the entire pool. */
760	uint32_t cPresent;
761	/** Pointer to the array of user nodes - GC pointer. */
762	GCPTRTYPE(PPGMPOOLUSER) paUsersGC;
763	/** Pointer to the array of user nodes - HC pointer. */
764	HCPTRTYPE(PPGMPOOLUSER) paUsersHC;
765	#endif /* PGMPOOL_WITH_USER_TRACKING */
766	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
767	/** Head of the chain of free phys ext nodes. */
768	uint16_t iPhysExtFreeHead;
769	/** The number of user nodes we've allocated. */
770	uint16_t cMaxPhysExts;
771	/** Pointer to the array of physical xref extent - GC pointer. */
772	GCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsGC;
773	/** Pointer to the array of physical xref extent nodes - HC pointer. */
774	HCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsHC;
775	#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
776	#ifdef PGMPOOL_WITH_CACHE
777	/** Hash table for GCPhys addresses. */
778	uint16_t aiHash[PGMPOOL_HASH_SIZE];
779	/** The head of the age list. */
780	uint16_t iAgeHead;
781	/** The tail of the age list. */
782	uint16_t iAgeTail;
783	/** Set if the cache is enabled. */
784	bool fCacheEnabled;
785	#endif /* PGMPOOL_WITH_CACHE */
786	#ifdef PGMPOOL_WITH_MONITORING
787	/** Head of the list of modified pages. */
788	uint16_t iModifiedHead;
789	/** The current number of modified pages. */
790	uint16_t cModifiedPages;
791	/** Access handler, GC. */
792	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnAccessHandlerGC;
793	/** Access handler, R0. */
794	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnAccessHandlerR0;
795	/** Access handler, R3. */
796	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnAccessHandlerR3;
797	/** The access handler description (HC ptr). */
798	R3PTRTYPE(const char *) pszAccessHandler;
799	#endif /* PGMPOOL_WITH_MONITORING */
800	/** The number of pages currently in use. */
801	uint16_t cUsedPages;
802	#ifdef VBOX_WITH_STATISTICS
803	/** The high wather mark for cUsedPages. */
804	uint16_t cUsedPagesHigh;
805	uint32_t Alignment1; /*< Align the next member on a 64-bit boundrary. /
806	/** Profiling pgmPoolAlloc(). */
807	STAMPROFILEADV StatAlloc;
808	/** Profiling pgmPoolClearAll(). */
809	STAMPROFILE StatClearAll;
810	/** Profiling pgmPoolFlushAllInt(). */
811	STAMPROFILE StatFlushAllInt;
812	/** Profiling pgmPoolFlushPage(). */
813	STAMPROFILE StatFlushPage;
814	/** Profiling pgmPoolFree(). */
815	STAMPROFILE StatFree;
816	/** Profiling time spent zeroing pages. */
817	STAMPROFILE StatZeroPage;
818	# ifdef PGMPOOL_WITH_USER_TRACKING
819	/** Profiling of pgmPoolTrackDeref. */
820	STAMPROFILE StatTrackDeref;
821	/** Profiling pgmTrackFlushGCPhysPT. */
822	STAMPROFILE StatTrackFlushGCPhysPT;
823	/** Profiling pgmTrackFlushGCPhysPTs. */
824	STAMPROFILE StatTrackFlushGCPhysPTs;
825	/** Profiling pgmTrackFlushGCPhysPTsSlow. */
826	STAMPROFILE StatTrackFlushGCPhysPTsSlow;
827	/** Number of times we've been out of user records. */
828	STAMCOUNTER StatTrackFreeUpOneUser;
829	# endif
830	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
831	/** Profiling deref activity related tracking GC physical pages. */
832	STAMPROFILE StatTrackDerefGCPhys;
833	/** Number of linear searches for a HCPhys in the ram ranges. */
834	STAMCOUNTER StatTrackLinearRamSearches;
835	/** The number of failing pgmPoolTrackPhysExtAlloc calls. */
836	STAMCOUNTER StamTrackPhysExtAllocFailures;
837	# endif
838	# ifdef PGMPOOL_WITH_MONITORING
839	/** Profiling the GC PT access handler. */
840	STAMPROFILE StatMonitorGC;
841	/** Times we've failed interpreting the instruction. */
842	STAMCOUNTER StatMonitorGCEmulateInstr;
843	/** Profiling the pgmPoolFlushPage calls made from the GC PT access handler. */
844	STAMPROFILE StatMonitorGCFlushPage;
845	/** Times we've detected fork(). */
846	STAMCOUNTER StatMonitorGCFork;
847	/** Profiling the GC access we've handled (except REP STOSD). */
848	STAMPROFILE StatMonitorGCHandled;
849	/** Times we've failed interpreting a patch code instruction. */
850	STAMCOUNTER StatMonitorGCIntrFailPatch1;
851	/** Times we've failed interpreting a patch code instruction during flushing. */
852	STAMCOUNTER StatMonitorGCIntrFailPatch2;
853	/** The number of times we've seen rep prefixes we can't handle. */
854	STAMCOUNTER StatMonitorGCRepPrefix;
855	/** Profiling the REP STOSD cases we've handled. */
856	STAMPROFILE StatMonitorGCRepStosd;
857
858	/** Profiling the HC PT access handler. */
859	STAMPROFILE StatMonitorHC;
860	/** Times we've failed interpreting the instruction. */
861	STAMCOUNTER StatMonitorHCEmulateInstr;
862	/** Profiling the pgmPoolFlushPage calls made from the HC PT access handler. */
863	STAMPROFILE StatMonitorHCFlushPage;
864	/** Times we've detected fork(). */
865	STAMCOUNTER StatMonitorHCFork;
866	/** Profiling the HC access we've handled (except REP STOSD). */
867	STAMPROFILE StatMonitorHCHandled;
868	/** The number of times we've seen rep prefixes we can't handle. */
869	STAMCOUNTER StatMonitorHCRepPrefix;
870	/** Profiling the REP STOSD cases we've handled. */
871	STAMPROFILE StatMonitorHCRepStosd;
872	/** The number of times we're called in an async thread an need to flush. */
873	STAMCOUNTER StatMonitorHCAsync;
874	/** The high wather mark for cModifiedPages. */
875	uint16_t cModifiedPagesHigh;
876	uint16_t Alignment2[3]; /*< Align the next member on a 64-bit boundrary. /
877	# endif
878	# ifdef PGMPOOL_WITH_CACHE
879	/** The number of cache hits. */
880	STAMCOUNTER StatCacheHits;
881	/** The number of cache misses. */
882	STAMCOUNTER StatCacheMisses;
883	/** The number of times we've got a conflict of 'kind' in the cache. */
884	STAMCOUNTER StatCacheKindMismatches;
885	/** Number of times we've been out of pages. */
886	STAMCOUNTER StatCacheFreeUpOne;
887	/** The number of cacheable allocations. */
888	STAMCOUNTER StatCacheCacheable;
889	/** The number of uncacheable allocations. */
890	STAMCOUNTER StatCacheUncacheable;
891	# endif
892	#elif HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
893	uint32_t Alignment1; /*< Align the next member on a 64-bit boundrary. /
894	#endif
895	/** The AVL tree for looking up a page by its HC physical address. */
896	AVLOHCPHYSTREE HCPhysTree;
897	uint32_t Alignment3; /*< Align the next member on a 64-bit boundrary. /
898	/** Array of pages. (cMaxPages in length)
899	* The Id is the index into thist array.
900	*/
901	PGMPOOLPAGE aPages[PGMPOOL_IDX_FIRST];
902	} PGMPOOL, PPGMPOOL, *PPPGMPOOL;
903
904
905	/** @def PGMPOOL_PAGE_2_PTR
906	* Maps a pool page pool into the current context.
907	*
908	* @returns VBox status code.
909	* @param pVM The VM handle.
910	* @param pPage The pool page.
911	*
912	* @remark In HC this uses PGMGCDynMapHCPage(), so it will consume of the
913	* small page window employeed by that function. Be careful.
914	* @remark There is no need to assert on the result.
915	*/
916	#ifdef IN_GC
917	# define PGMPOOL_PAGE_2_PTR(pVM, pPage) pgmGCPoolMapPage((pVM), (pPage))
918	#else
919	# define PGMPOOL_PAGE_2_PTR(pVM, pPage) ((pPage)->pvPageHC)
920	#endif
921
922
923	/**
924	* Trees are using self relative offsets as pointers.
925	* So, all its data, including the root pointer, must be in the heap for HC and GC
926	* to have the same layout.
927	*/
928	typedef struct PGMTREES
929	{
930	/** Physical access handlers (AVL range+offsetptr tree). */
931	AVLROGCPHYSTREE PhysHandlers;
932	/** Virtual access handlers (AVL range + GC ptr tree). */
933	AVLROGCPTRTREE VirtHandlers;
934	/** Virtual access handlers (Phys range AVL range + offsetptr tree). */
935	AVLROGCPHYSTREE PhysToVirtHandlers;
936	uint32_t auPadding[1];
937	} PGMTREES;
938	/** Pointer to PGM trees. */
939	typedef PGMTREES *PPGMTREES;
940
941
942	/** @name Paging mode macros
943	* @{ */
944	#ifdef IN_GC
945	# define PGM_CTX(a,b) a##GC##b
946	# define PGM_CTX_STR(a,b) a "GC" b
947	# define PGM_CTX_DECL(type) PGMGCDECL(type)
948	#else
949	# ifdef IN_RING3
950	# define PGM_CTX(a,b) a##R3##b
951	# define PGM_CTX_STR(a,b) a "R3" b
952	# define PGM_CTX_DECL(type) DECLCALLBACK(type)
953	# else
954	# define PGM_CTX(a,b) a##R0##b
955	# define PGM_CTX_STR(a,b) a "R0" b
956	# define PGM_CTX_DECL(type) PGMDECL(type)
957	# endif
958	#endif
959
960	#define PGM_GST_NAME_REAL(name) PGM_CTX(pgm,GstReal##name)
961	#define PGM_GST_NAME_GC_REAL_STR(name) "pgmGCGstReal" #name
962	#define PGM_GST_NAME_R0_REAL_STR(name) "pgmR0GstReal" #name
963	#define PGM_GST_NAME_PROT(name) PGM_CTX(pgm,GstProt##name)
964	#define PGM_GST_NAME_GC_PROT_STR(name) "pgmGCGstProt" #name
965	#define PGM_GST_NAME_R0_PROT_STR(name) "pgmR0GstProt" #name
966	#define PGM_GST_NAME_32BIT(name) PGM_CTX(pgm,Gst32Bit##name)
967	#define PGM_GST_NAME_GC_32BIT_STR(name) "pgmGCGst32Bit" #name
968	#define PGM_GST_NAME_R0_32BIT_STR(name) "pgmR0Gst32Bit" #name
969	#define PGM_GST_NAME_PAE(name) PGM_CTX(pgm,GstPAE##name)
970	#define PGM_GST_NAME_GC_PAE_STR(name) "pgmGCGstPAE" #name
971	#define PGM_GST_NAME_R0_PAE_STR(name) "pgmR0GstPAE" #name
972	#define PGM_GST_NAME_AMD64(name) PGM_CTX(pgm,GstAMD64##name)
973	#define PGM_GST_NAME_GC_AMD64_STR(name) "pgmGCGstAMD64" #name
974	#define PGM_GST_NAME_R0_AMD64_STR(name) "pgmR0GstAMD64" #name
975	#define PGM_GST_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Gst##name))
976	#define PGM_GST_DECL(type, name) PGM_CTX_DECL(type) PGM_GST_NAME(name)
977
978	#define PGM_SHW_NAME_32BIT(name) PGM_CTX(pgm,Shw32Bit##name)
979	#define PGM_SHW_NAME_GC_32BIT_STR(name) "pgmGCShw32Bit" #name
980	#define PGM_SHW_NAME_R0_32BIT_STR(name) "pgmR0Shw32Bit" #name
981	#define PGM_SHW_NAME_PAE(name) PGM_CTX(pgm,ShwPAE##name)
982	#define PGM_SHW_NAME_GC_PAE_STR(name) "pgmGCShwPAE" #name
983	#define PGM_SHW_NAME_R0_PAE_STR(name) "pgmR0ShwPAE" #name
984	#define PGM_SHW_NAME_AMD64(name) PGM_CTX(pgm,ShwAMD64##name)
985	#define PGM_SHW_NAME_GC_AMD64_STR(name) "pgmGCShwAMD64" #name
986	#define PGM_SHW_NAME_R0_AMD64_STR(name) "pgmR0ShwAMD64" #name
987	#define PGM_SHW_DECL(type, name) PGM_CTX_DECL(type) PGM_SHW_NAME(name)
988	#define PGM_SHW_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Shw##name))
989
990	/* Shw_Gst */
991	#define PGM_BTH_NAME_32BIT_REAL(name) PGM_CTX(pgm,Bth32BitReal##name)
992	#define PGM_BTH_NAME_32BIT_PROT(name) PGM_CTX(pgm,Bth32BitProt##name)
993	#define PGM_BTH_NAME_32BIT_32BIT(name) PGM_CTX(pgm,Bth32Bit32Bit##name)
994	#define PGM_BTH_NAME_PAE_REAL(name) PGM_CTX(pgm,BthPAEReal##name)
995	#define PGM_BTH_NAME_PAE_PROT(name) PGM_CTX(pgm,BthPAEProt##name)
996	#define PGM_BTH_NAME_PAE_32BIT(name) PGM_CTX(pgm,BthPAE32Bit##name)
997	#define PGM_BTH_NAME_PAE_PAE(name) PGM_CTX(pgm,BthPAEPAE##name)
998	#define PGM_BTH_NAME_AMD64_REAL(name) PGM_CTX(pgm,BthAMD64Real##name)
999	#define PGM_BTH_NAME_AMD64_PROT(name) PGM_CTX(pgm,BthAMD64Prot##name)
1000	#define PGM_BTH_NAME_AMD64_AMD64(name) PGM_CTX(pgm,BthAMD64AMD64##name)
1001	#define PGM_BTH_NAME_GC_32BIT_REAL_STR(name) "pgmGCBth32BitReal" #name
1002	#define PGM_BTH_NAME_GC_32BIT_PROT_STR(name) "pgmGCBth32BitProt" #name
1003	#define PGM_BTH_NAME_GC_32BIT_32BIT_STR(name) "pgmGCBth32Bit32Bit" #name
1004	#define PGM_BTH_NAME_GC_PAE_REAL_STR(name) "pgmGCBthPAEReal" #name
1005	#define PGM_BTH_NAME_GC_PAE_PROT_STR(name) "pgmGCBthPAEProt" #name
1006	#define PGM_BTH_NAME_GC_PAE_32BIT_STR(name) "pgmGCBthPAE32Bit" #name
1007	#define PGM_BTH_NAME_GC_PAE_PAE_STR(name) "pgmGCBthPAEPAE" #name
1008	#define PGM_BTH_NAME_GC_AMD64_REAL_STR(name) "pgmGCBthAMD64Real" #name
1009	#define PGM_BTH_NAME_GC_AMD64_PROT_STR(name) "pgmGCBthAMD64Prot" #name
1010	#define PGM_BTH_NAME_GC_AMD64_AMD64_STR(name) "pgmGCBthAMD64AMD64" #name
1011	#define PGM_BTH_NAME_R0_32BIT_REAL_STR(name) "pgmR0Bth32BitReal" #name
1012	#define PGM_BTH_NAME_R0_32BIT_PROT_STR(name) "pgmR0Bth32BitProt" #name
1013	#define PGM_BTH_NAME_R0_32BIT_32BIT_STR(name) "pgmR0Bth32Bit32Bit" #name
1014	#define PGM_BTH_NAME_R0_PAE_REAL_STR(name) "pgmR0BthPAEReal" #name
1015	#define PGM_BTH_NAME_R0_PAE_PROT_STR(name) "pgmR0BthPAEProt" #name
1016	#define PGM_BTH_NAME_R0_PAE_32BIT_STR(name) "pgmR0BthPAE32Bit" #name
1017	#define PGM_BTH_NAME_R0_PAE_PAE_STR(name) "pgmR0BthPAEPAE" #name
1018	#define PGM_BTH_NAME_R0_AMD64_REAL_STR(name) "pgmR0BthAMD64Real" #name
1019	#define PGM_BTH_NAME_R0_AMD64_PROT_STR(name) "pgmR0BthAMD64Prot" #name
1020	#define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name) "pgmR0BthAMD64AMD64" #name
1021	#define PGM_BTH_DECL(type, name) PGM_CTX_DECL(type) PGM_BTH_NAME(name)
1022	#define PGM_BTH_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Bth##name))
1023	/** @} */
1024
1025	/**
1026	* Data for each paging mode.
1027	*/
1028	typedef struct PGMMODEDATA
1029	{
1030	/** The guest mode type. */
1031	uint32_t uGstType;
1032	/** The shadow mode type. */
1033	uint32_t uShwType;
1034
1035	/** @name Function pointers for Shadow paging.
1036	* @{
1037	*/
1038	DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1039	DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1040	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1041	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1042	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1043	DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1044	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1045
1046	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1047	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1048	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1049	DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1050	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1051
1052	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1053	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1054	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1055	DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1056	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1057	/** @} */
1058
1059	/** @name Function pointers for Guest paging.
1060	* @{
1061	*/
1062	DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1063	DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1064	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1065	DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1066	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1067	DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1068	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1069	DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1070	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1071	HCPTRTYPE(PFNPGMR3PHYSHANDLER) pfnHCGstWriteHandlerCR3;
1072	HCPTRTYPE(const char *) pszHCGstWriteHandlerCR3;
1073
1074	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1075	DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1076	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1077	DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1078	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1079	DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1080	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1081	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1082
1083	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1084	DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1085	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1086	DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1087	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1088	DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1089	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1090	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnR0GstWriteHandlerCR3;
1091	/** @} */
1092
1093	/** @name Function pointers for Both Shadow and Guest paging.
1094	* @{
1095	*/
1096	DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1097	DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1098	DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1099	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1100	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1101	DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1102	DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1103	#ifdef VBOX_STRICT
1104	DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1105	#endif
1106
1107	DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1108	DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1109	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1110	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1111	DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1112	DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1113	#ifdef VBOX_STRICT
1114	DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1115	#endif
1116
1117	DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1118	DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1119	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1120	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1121	DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1122	DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1123	#ifdef VBOX_STRICT
1124	DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1125	#endif
1126	/** @} */
1127	} PGMMODEDATA, *PPGMMODEDATA;
1128
1129
1130
1131	/**
1132	* Converts a PGM pointer into a VM pointer.
1133	* @returns Pointer to the VM structure the PGM is part of.
1134	* @param pPGM Pointer to PGM instance data.
1135	*/
1136	#define PGM2VM(pPGM) ( (PVM)((char*)pPGM - pPGM->offVM) )
1137
1138	/**
1139	* PGM Data (part of VM)
1140	*/
1141	typedef struct PGM
1142	{
1143	/** Offset to the VM structure. */
1144	RTINT offVM;
1145
1146	/*
1147	* This will be redefined at least two more times before we're done, I'm sure.
1148	* The current code is only to get on with the coding.
1149	* - 2004-06-10: initial version, bird.
1150	* - 2004-07-02: 1st time, bird.
1151	* - 2004-10-18: 2nd time, bird.
1152	* - 2005-07-xx: 3rd time, bird.
1153	*/
1154
1155	/** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1156	GCPTRTYPE(PX86PTE) paDynPageMap32BitPTEsGC;
1157	/** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1158	GCPTRTYPE(PX86PTEPAE) paDynPageMapPaePTEsGC;
1159
1160	/** The host paging mode. (This is what SUPLib reports.) */
1161	SUPPAGINGMODE enmHostMode;
1162	/** The shadow paging mode. */
1163	PGMMODE enmShadowMode;
1164	/** The guest paging mode. */
1165	PGMMODE enmGuestMode;
1166
1167	/** The current physical address representing in the guest CR3 register. */
1168	RTGCPHYS GCPhysCR3;
1169	/** Pointer to the 5 page CR3 content mapping.
1170	* The first page is always the CR3 (in some form) while the 4 other pages
1171	* are used of the PDs in PAE mode. */
1172	RTGCPTR GCPtrCR3Mapping;
1173	/** The physical address of the currently monitored guest CR3 page.
1174	* When this value is NIL_RTGCPHYS no page is being monitored. */
1175	RTGCPHYS GCPhysGstCR3Monitored;
1176	#if HC_ARCH_BITS == 64 \|\| GC_ARCH_BITS == 64
1177	RTGCPHYS GCPhysPadding0; /*< alignment padding. /
1178	#endif
1179
1180	/** @name 32-bit Guest Paging.
1181	* @{ */
1182	/** The guest's page directory, HC pointer. */
1183	HCPTRTYPE(PVBOXPD) pGuestPDHC;
1184	/** The guest's page directory, static GC mapping. */
1185	GCPTRTYPE(PVBOXPD) pGuestPDGC;
1186	/** @} */
1187
1188	/** @name PAE Guest Paging.
1189	* @{ */
1190	/** The guest's page directory pointer table, static GC mapping. */
1191	GCPTRTYPE(PX86PDPTR) pGstPaePDPTRGC;
1192	/** The guest's page directory pointer table, HC pointer. */
1193	HCPTRTYPE(PX86PDPTR) pGstPaePDPTRHC;
1194	/** The guest's page directories, HC pointers.
1195	* These are individual pointers and doesn't have to be adjecent.
1196	* These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1197	HCPTRTYPE(PX86PDPAE) apGstPaePDsHC[4];
1198	/** The guest's page directories, static GC mapping.
1199	* Unlike the HC array the first entry can be accessed as a 2048 entry PD.
1200	* These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1201	GCPTRTYPE(PX86PDPAE) apGstPaePDsGC[4];
1202	/** The physical addresses of the guest page directories (PAE) pointed to by apGstPagePDsHC/GC. */
1203	RTGCPHYS aGCPhysGstPaePDs[4];
1204	/** The physical addresses of the monitored guest page directories (PAE). */
1205	RTGCPHYS aGCPhysGstPaePDsMonitored[4];
1206	/** @} */
1207
1208
1209	/** @name 32-bit Shadow Paging
1210	* @{ */
1211	/** The 32-Bit PD - HC Ptr. */
1212	HCPTRTYPE(PX86PD) pHC32BitPD;
1213	/** The 32-Bit PD - GC Ptr. */
1214	GCPTRTYPE(PX86PD) pGC32BitPD;
1215	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1216	uint32_t u32Padding1; /*< alignment padding. /
1217	#endif
1218	/** The Physical Address (HC) of the 32-Bit PD. */
1219	RTHCPHYS HCPhys32BitPD;
1220	/** @} */
1221
1222	/** @name PAE Shadow Paging
1223	* @{ */
1224	/** The four PDs for the low 4GB - HC Ptr.
1225	* Even though these are 4 pointers, what they point at is a single table.
1226	* Thus, it's possible to walk the 2048 entries starting where apHCPaePDs[0] points. */
1227	HCPTRTYPE(PX86PDPAE) apHCPaePDs[4];
1228	/** The four PDs for the low 4GB - GC Ptr.
1229	* Same kind of mapping as apHCPaePDs. */
1230	GCPTRTYPE(PX86PDPAE) apGCPaePDs[4];
1231	/** The Physical Address (HC) of the four PDs for the low 4GB.
1232	* These are NOT 4 contiguous pages. */
1233	RTHCPHYS aHCPhysPaePDs[4];
1234	/** The PAE PDPTR - HC Ptr. */
1235	HCPTRTYPE(PX86PDPTR) pHCPaePDPTR;
1236	/** The Physical Address (HC) of the PAE PDPTR. */
1237	RTHCPHYS HCPhysPaePDPTR;
1238	/** The PAE PDPTR - GC Ptr. */
1239	GCPTRTYPE(PX86PDPTR) pGCPaePDPTR;
1240	/** @} */
1241
1242	/** @name AMD64 Shadow Paging
1243	* Extends PAE Paging.
1244	* @{ */
1245	/** The Page Map Level 4 table - HC Ptr. */
1246	GCPTRTYPE(PX86PML4) pGCPaePML4;
1247	/** The Page Map Level 4 table - GC Ptr. */
1248	HCPTRTYPE(PX86PML4) pHCPaePML4;
1249	/** The Physical Address (HC) of the Page Map Level 4 table. */
1250	RTHCPHYS HCPhysPaePML4;
1251	/** @}*/
1252
1253	/** @name Function pointers for Shadow paging.
1254	* @{
1255	*/
1256	DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1257	DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1258	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1259	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1260	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1261	DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1262	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1263
1264	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1265	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1266	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1267	DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1268	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1269	#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1270	RTGCPTR alignment0; /*< structure size alignment. /
1271	#endif
1272
1273	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1274	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1275	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1276	DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1277	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1278
1279	/** @} */
1280
1281	/** @name Function pointers for Guest paging.
1282	* @{
1283	*/
1284	DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1285	DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1286	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1287	DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1288	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1289	DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1290	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1291	DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1292	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1293	HCPTRTYPE(PFNPGMR3PHYSHANDLER) pfnHCGstWriteHandlerCR3;
1294	HCPTRTYPE(const char *) pszHCGstWriteHandlerCR3;
1295
1296	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1297	DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1298	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1299	DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1300	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1301	DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1302	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1303	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1304
1305	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1306	DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1307	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1308	DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1309	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1310	DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1311	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1312	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnR0GstWriteHandlerCR3;
1313	/** @} */
1314
1315	/** @name Function pointers for Both Shadow and Guest paging.
1316	* @{
1317	*/
1318	DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1319	DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1320	DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1321	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1322	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1323	DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1324	DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1325	DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1326
1327	DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1328	DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1329	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1330	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1331	DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1332	DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1333	DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1334
1335	DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1336	DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1337	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1338	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1339	DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1340	DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1341	DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1342	#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1343	RTGCPTR alignment2; /*< structure size alignment. /
1344	#endif
1345	/** @} */
1346
1347	/** Pointer to SHW+GST mode data (function pointers).
1348	* The index into this table is made up from */
1349	R3PTRTYPE(PPGMMODEDATA) paModeData;
1350
1351
1352	/** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for HC.
1353	* This is sorted by physical address and contains no overlaps.
1354	* The memory locks and other conversions are managed by MM at the moment.
1355	*/
1356	HCPTRTYPE(PPGMRAMRANGE) pRamRangesHC;
1357	/** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for GC.
1358	* This is sorted by physical address and contains no overlaps.
1359	* The memory locks and other conversions are managed by MM at the moment.
1360	*/
1361	GCPTRTYPE(PPGMRAMRANGE) pRamRangesGC;
1362	/** The configured RAM size. */
1363	RTUINT cbRamSize;
1364
1365	/** PGM offset based trees - HC Ptr. */
1366	HCPTRTYPE(PPGMTREES) pTreesHC;
1367	/** PGM offset based trees - GC Ptr. */
1368	GCPTRTYPE(PPGMTREES) pTreesGC;
1369
1370	/** Linked list of GC mappings - for GC.
1371	* The list is sorted ascending on address.
1372	*/
1373	GCPTRTYPE(PPGMMAPPING) pMappingsGC;
1374	/** Linked list of GC mappings - for HC.
1375	* The list is sorted ascending on address.
1376	*/
1377	R3PTRTYPE(PPGMMAPPING) pMappingsR3;
1378	/** Linked list of GC mappings - for R0.
1379	* The list is sorted ascending on address.
1380	*/
1381	R0PTRTYPE(PPGMMAPPING) pMappingsR0;
1382
1383	/** If set no conflict checks are required. (boolean) */
1384	bool fMappingsFixed;
1385	/** If set, then no mappings are put into the shadow page table. (boolean) */
1386	bool fDisableMappings;
1387	/** Size of fixed mapping */
1388	uint32_t cbMappingFixed;
1389	/** Base address (GC) of fixed mapping */
1390	RTGCPTR GCPtrMappingFixed;
1391	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1392	uint32_t u32Padding0; /*< alignment padding. /
1393	#endif
1394
1395
1396	/** @name Intermediate Context
1397	* @{ */
1398	/** Pointer to the intermediate page directory - Normal. */
1399	HCPTRTYPE(PX86PD) pInterPD;
1400	/** Pointer to the intermedate page tables - Normal.
1401	* There are two page tables, one for the identity mapping and one for
1402	* the host context mapping (of the core code). */
1403	HCPTRTYPE(PX86PT) apInterPTs[2];
1404	/** Pointer to the intermedate page tables - PAE. */
1405	HCPTRTYPE(PX86PTPAE) apInterPaePTs[2];
1406	/** Pointer to the intermedate page directory - PAE. */
1407	HCPTRTYPE(PX86PDPAE) apInterPaePDs[4];
1408	/** Pointer to the intermedate page directory - PAE. */
1409	HCPTRTYPE(PX86PDPTR) pInterPaePDPTR;
1410	/** Pointer to the intermedate page-map level 4 - AMD64. */
1411	HCPTRTYPE(PX86PML4) pInterPaePML4;
1412	/** Pointer to the intermedate page directory - AMD64. */
1413	HCPTRTYPE(PX86PDPTR) pInterPaePDPTR64;
1414	/** The Physical Address (HC) of the intermediate Page Directory - Normal. */
1415	RTHCPHYS HCPhysInterPD;
1416	/** The Physical Address (HC) of the intermediate Page Directory Pointer Table - PAE. */
1417	RTHCPHYS HCPhysInterPaePDPTR;
1418	/** The Physical Address (HC) of the intermediate Page Map Level 4 table - AMD64. */
1419	RTHCPHYS HCPhysInterPaePML4;
1420	/** @} */
1421
1422	/** Base address of the dynamic page mapping area.
1423	* The array is MM_HYPER_DYNAMIC_SIZE bytes big.
1424	*/
1425	GCPTRTYPE(uint8_t *) pbDynPageMapBaseGC;
1426	/** The index of the last entry used in the dynamic page mapping area. */
1427	RTUINT iDynPageMapLast;
1428	/** Cache containing the last entries in the dynamic page mapping area.
1429	* The cache size is covering half of the mapping area. */
1430	RTHCPHYS aHCPhysDynPageMapCache[MM_HYPER_DYNAMIC_SIZE >> (PAGE_SHIFT + 1)];
1431
1432	/** A20 gate mask.
1433	* Our current approach to A20 emulation is to let REM do it and don't bother
1434	* anywhere else. The interesting Guests will be operating with it enabled anyway.
1435	* But whould need arrise, we'll subject physical addresses to this mask. */
1436	RTGCPHYS GCPhysA20Mask;
1437	/** A20 gate state - boolean! */
1438	RTUINT fA20Enabled;
1439
1440	/** What needs syncing (PGM_SYNC_*).
1441	* This is used to queue operations for PGMSyncCR3, PGMInvalidatePage,
1442	* PGMFlushTLB, and PGMR3Load. */
1443	RTUINT fSyncFlags;
1444
1445	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1446	RTUINT uPadding3; /*< alignment padding. /
1447	#endif
1448	/** PGM critical section.
1449	* This protects the physical & virtual access handlers, ram ranges,
1450	* and the page flag updating (some of it anyway).
1451	*/
1452	PDMCRITSECT CritSect;
1453
1454	/** Shadow Page Pool - HC Ptr. */
1455	HCPTRTYPE(PPGMPOOL) pPoolHC;
1456	/** Shadow Page Pool - GC Ptr. */
1457	GCPTRTYPE(PPGMPOOL) pPoolGC;
1458
1459	/** We're not in a state which permits writes to guest memory.
1460	* (Only used in strict builds.) */
1461	bool fNoMorePhysWrites;
1462
1463	/** Flush the cache on the next access. */
1464	bool fPhysCacheFlushPending;
1465	/** @todo r=bird: Fix member names!*/
1466	/** PGMPhysRead cache */
1467	PGMPHYSCACHE pgmphysreadcache;
1468	/** PGMPhysWrite cache */
1469	PGMPHYSCACHE pgmphyswritecache;
1470
1471	/** @name Release Statistics
1472	* @{ */
1473	/** The number of times the guest has switched mode since last reset or statistics reset. */
1474	STAMCOUNTER cGuestModeChanges;
1475	/** @} */
1476
1477	#ifdef VBOX_WITH_STATISTICS
1478	/** GC: Which statistic this \#PF should be attributed to. */
1479	GCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionGC;
1480	RTGCPTR padding0;
1481	/** HC: Which statistic this \#PF should be attributed to. */
1482	HCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionHC;
1483	RTHCPTR padding1;
1484	STAMPROFILE StatGCTrap0e; /*< GC: PGMGCTrap0eHandler() profiling. /
1485	STAMPROFILE StatTrap0eCSAM; /*< Profiling of the Trap0eHandler body when the cause is CSAM. /
1486	STAMPROFILE StatTrap0eDirtyAndAccessedBits; /*< Profiling of the Trap0eHandler body when the cause is dirty and/or accessed bit emulation. /
1487	STAMPROFILE StatTrap0eGuestTrap; /*< Profiling of the Trap0eHandler body when the cause is a guest trap. /
1488	STAMPROFILE StatTrap0eHndPhys; /*< Profiling of the Trap0eHandler body when the cause is a physical handler. /
1489	STAMPROFILE StatTrap0eHndVirt; /*< Profiling of the Trap0eHandler body when the cause is a virtual handler. /
1490	STAMPROFILE StatTrap0eHndUnhandled; /*< Profiling of the Trap0eHandler body when the cause is access outside the monitored areas of a monitored page. /
1491	STAMPROFILE StatTrap0eMisc; /*< Profiling of the Trap0eHandler body when the cause is not known. /
1492	STAMPROFILE StatTrap0eOutOfSync; /*< Profiling of the Trap0eHandler body when the cause is an out-of-sync page. /
1493	STAMPROFILE StatTrap0eOutOfSyncHndPhys; /*< Profiling of the Trap0eHandler body when the cause is an out-of-sync physical handler page. /
1494	STAMPROFILE StatTrap0eOutOfSyncHndVirt; /*< Profiling of the Trap0eHandler body when the cause is an out-of-sync virtual handler page. /
1495	STAMPROFILE StatTrap0eOutOfSyncObsHnd; /*< Profiling of the Trap0eHandler body when the cause is an obsolete handler page. /
1496	STAMPROFILE StatTrap0eSyncPT; /*< Profiling of the Trap0eHandler body when the cause is lazy syncing of a PT. /
1497
1498	STAMCOUNTER StatTrap0eMapHandler; /*< Number of traps due to access handlers in mappings. /
1499	STAMCOUNTER StatGCTrap0eConflicts; /*< GC: The number of times \#PF was caused by an undetected conflict. /
1500
1501	STAMCOUNTER StatGCTrap0eUSNotPresentRead;
1502	STAMCOUNTER StatGCTrap0eUSNotPresentWrite;
1503	STAMCOUNTER StatGCTrap0eUSWrite;
1504	STAMCOUNTER StatGCTrap0eUSReserved;
1505	STAMCOUNTER StatGCTrap0eUSRead;
1506
1507	STAMCOUNTER StatGCTrap0eSVNotPresentRead;
1508	STAMCOUNTER StatGCTrap0eSVNotPresentWrite;
1509	STAMCOUNTER StatGCTrap0eSVWrite;
1510	STAMCOUNTER StatGCTrap0eSVReserved;
1511
1512	STAMCOUNTER StatGCTrap0eUnhandled;
1513	STAMCOUNTER StatGCTrap0eMap;
1514
1515	/** GC: PGMSyncPT() profiling. */
1516	STAMPROFILE StatGCSyncPT;
1517	/** GC: The number of times PGMSyncPT() needed to allocate page tables. */
1518	STAMCOUNTER StatGCSyncPTAlloc;
1519	/** GC: The number of times PGMSyncPT() detected conflicts. */
1520	STAMCOUNTER StatGCSyncPTConflict;
1521	/** GC: The number of times PGMSyncPT() failed. */
1522	STAMCOUNTER StatGCSyncPTFailed;
1523	/** GC: PGMGCInvalidatePage() profiling. */
1524	STAMPROFILE StatGCInvalidatePage;
1525	/** GC: The number of times PGMGCInvalidatePage() was called for a 4KB page. */
1526	STAMCOUNTER StatGCInvalidatePage4KBPages;
1527	/** GC: The number of times PGMGCInvalidatePage() was called for a 4MB page. */
1528	STAMCOUNTER StatGCInvalidatePage4MBPages;
1529	/** GC: The number of times PGMGCInvalidatePage() skipped a 4MB page. */
1530	STAMCOUNTER StatGCInvalidatePage4MBPagesSkip;
1531	/** GC: The number of times PGMGCInvalidatePage() was called for a not accessed page directory. */
1532	STAMCOUNTER StatGCInvalidatePagePDNAs;
1533	/** GC: The number of times PGMGCInvalidatePage() was called for a not present page directory. */
1534	STAMCOUNTER StatGCInvalidatePagePDNPs;
1535	/** GC: The number of times PGMGCInvalidatePage() was called for a page directory containing mappings (no conflict). */
1536	STAMCOUNTER StatGCInvalidatePagePDMappings;
1537	/** GC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
1538	STAMCOUNTER StatGCInvalidatePagePDOutOfSync;
1539	/** HC: The number of times PGMGCInvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
1540	STAMCOUNTER StatGCInvalidatePageSkipped;
1541	/** GC: The number of times user page is out of sync was detected in GC. */
1542	STAMCOUNTER StatGCPageOutOfSyncUser;
1543	/** GC: The number of times supervisor page is out of sync was detected in GC. */
1544	STAMCOUNTER StatGCPageOutOfSyncSupervisor;
1545	/** GC: The number of dynamic page mapping cache hits */
1546	STAMCOUNTER StatDynMapCacheMisses;
1547	/** GC: The number of dynamic page mapping cache misses */
1548	STAMCOUNTER StatDynMapCacheHits;
1549	/** GC: The number of times pgmGCGuestPDWriteHandler() was successfully called. */
1550	STAMCOUNTER StatGCGuestCR3WriteHandled;
1551	/** GC: The number of times pgmGCGuestPDWriteHandler() was called and we had to fall back to the recompiler. */
1552	STAMCOUNTER StatGCGuestCR3WriteUnhandled;
1553	/** GC: The number of times pgmGCGuestPDWriteHandler() was called and a conflict was detected. */
1554	STAMCOUNTER StatGCGuestCR3WriteConflict;
1555	/** GC: Number of out-of-sync handled pages. */
1556	STAMCOUNTER StatHandlersOutOfSync;
1557	/** GC: Number of traps due to physical access handlers. */
1558	STAMCOUNTER StatHandlersPhysical;
1559	/** GC: Number of traps due to virtual access handlers. */
1560	STAMCOUNTER StatHandlersVirtual;
1561	/** GC: Number of traps due to virtual access handlers found by physical address. */
1562	STAMCOUNTER StatHandlersVirtualByPhys;
1563	/** GC: Number of traps due to virtual access handlers found by virtual address (without proper physical flags). */
1564	STAMCOUNTER StatHandlersVirtualUnmarked;
1565	/** GC: Number of traps due to access outside range of monitored page(s). */
1566	STAMCOUNTER StatHandlersUnhandled;
1567
1568	/** GC: The number of times pgmGCGuestROMWriteHandler() was successfully called. */
1569	STAMCOUNTER StatGCGuestROMWriteHandled;
1570	/** GC: The number of times pgmGCGuestROMWriteHandler() was called and we had to fall back to the recompiler */
1571	STAMCOUNTER StatGCGuestROMWriteUnhandled;
1572
1573	/** HC: PGMR3InvalidatePage() profiling. */
1574	STAMPROFILE StatHCInvalidatePage;
1575	/** HC: The number of times PGMR3InvalidatePage() was called for a 4KB page. */
1576	STAMCOUNTER StatHCInvalidatePage4KBPages;
1577	/** HC: The number of times PGMR3InvalidatePage() was called for a 4MB page. */
1578	STAMCOUNTER StatHCInvalidatePage4MBPages;
1579	/** HC: The number of times PGMR3InvalidatePage() skipped a 4MB page. */
1580	STAMCOUNTER StatHCInvalidatePage4MBPagesSkip;
1581	/** HC: The number of times PGMR3InvalidatePage() was called for a not accessed page directory. */
1582	STAMCOUNTER StatHCInvalidatePagePDNAs;
1583	/** HC: The number of times PGMR3InvalidatePage() was called for a not present page directory. */
1584	STAMCOUNTER StatHCInvalidatePagePDNPs;
1585	/** HC: The number of times PGMR3InvalidatePage() was called for a page directory containing mappings (no conflict). */
1586	STAMCOUNTER StatHCInvalidatePagePDMappings;
1587	/** HC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
1588	STAMCOUNTER StatHCInvalidatePagePDOutOfSync;
1589	/** HC: The number of times PGMR3InvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
1590	STAMCOUNTER StatHCInvalidatePageSkipped;
1591	/** HC: PGMR3SyncPT() profiling. */
1592	STAMPROFILE StatHCSyncPT;
1593	/** HC: pgmr3SyncPTResolveConflict() profiling (includes the entire relocation). */
1594	STAMPROFILE StatHCResolveConflict;
1595	/** HC: Number of times PGMR3CheckMappingConflicts() detected a conflict. */
1596	STAMCOUNTER StatHCDetectedConflicts;
1597	/** HC: The total number of times pgmHCGuestPDWriteHandler() was called. */
1598	STAMCOUNTER StatHCGuestPDWrite;
1599	/** HC: The number of times pgmHCGuestPDWriteHandler() detected a conflict */
1600	STAMCOUNTER StatHCGuestPDWriteConflict;
1601
1602	/** HC: The number of pages marked not present for accessed bit emulation. */
1603	STAMCOUNTER StatHCAccessedPage;
1604	/** HC: The number of pages marked read-only for dirty bit tracking. */
1605	STAMCOUNTER StatHCDirtyPage;
1606	/** HC: The number of pages marked read-only for dirty bit tracking. */
1607	STAMCOUNTER StatHCDirtyPageBig;
1608	/** HC: The number of traps generated for dirty bit tracking. */
1609	STAMCOUNTER StatHCDirtyPageTrap;
1610	/** HC: The number of pages already dirty or readonly. */
1611	STAMCOUNTER StatHCDirtyPageSkipped;
1612
1613	/** GC: The number of pages marked not present for accessed bit emulation. */
1614	STAMCOUNTER StatGCAccessedPage;
1615	/** GC: The number of pages marked read-only for dirty bit tracking. */
1616	STAMCOUNTER StatGCDirtyPage;
1617	/** GC: The number of pages marked read-only for dirty bit tracking. */
1618	STAMCOUNTER StatGCDirtyPageBig;
1619	/** GC: The number of traps generated for dirty bit tracking. */
1620	STAMCOUNTER StatGCDirtyPageTrap;
1621	/** GC: The number of pages already dirty or readonly. */
1622	STAMCOUNTER StatGCDirtyPageSkipped;
1623	/** GC: The number of pages marked dirty because of write accesses. */
1624	STAMCOUNTER StatGCDirtiedPage;
1625	/** GC: The number of pages already marked dirty because of write accesses. */
1626	STAMCOUNTER StatGCPageAlreadyDirty;
1627	/** GC: The number of real pages faults during dirty bit tracking. */
1628	STAMCOUNTER StatGCDirtyTrackRealPF;
1629
1630	/** GC: Profiling of the PGMTrackDirtyBit() body */
1631	STAMPROFILE StatGCDirtyBitTracking;
1632	/** HC: Profiling of the PGMTrackDirtyBit() body */
1633	STAMPROFILE StatHCDirtyBitTracking;
1634
1635	/** GC: Profiling of the PGMGstModifyPage() body */
1636	STAMPROFILE StatGCGstModifyPage;
1637	/** HC: Profiling of the PGMGstModifyPage() body */
1638	STAMPROFILE StatHCGstModifyPage;
1639
1640	/** GC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
1641	STAMCOUNTER StatGCSyncPagePDNAs;
1642	/** GC: The number of time we've encountered an out-of-sync PD in SyncPage. */
1643	STAMCOUNTER StatGCSyncPagePDOutOfSync;
1644	/** HC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
1645	STAMCOUNTER StatHCSyncPagePDNAs;
1646	/** HC: The number of time we've encountered an out-of-sync PD in SyncPage. */
1647	STAMCOUNTER StatHCSyncPagePDOutOfSync;
1648
1649	STAMCOUNTER StatSynPT4kGC;
1650	STAMCOUNTER StatSynPT4kHC;
1651	STAMCOUNTER StatSynPT4MGC;
1652	STAMCOUNTER StatSynPT4MHC;
1653
1654	/** Profiling of the PGMFlushTLB() body. */
1655	STAMPROFILE StatFlushTLB;
1656	/** The number of times PGMFlushTLB was called with a new CR3, non-global. (switch) */
1657	STAMCOUNTER StatFlushTLBNewCR3;
1658	/** The number of times PGMFlushTLB was called with a new CR3, global. (switch) */
1659	STAMCOUNTER StatFlushTLBNewCR3Global;
1660	/** The number of times PGMFlushTLB was called with the same CR3, non-global. (flush) */
1661	STAMCOUNTER StatFlushTLBSameCR3;
1662	/** The number of times PGMFlushTLB was called with the same CR3, global. (flush) */
1663	STAMCOUNTER StatFlushTLBSameCR3Global;
1664
1665	STAMPROFILE StatGCSyncCR3; /*< GC: PGMSyncCR3() profiling. /
1666	STAMPROFILE StatGCSyncCR3Handlers; /*< GC: Profiling of the PGMSyncCR3() update handler section. /
1667	STAMPROFILE StatGCSyncCR3HandlerVirtualReset; /*< GC: Profiling of the virtual handler resets. /
1668	STAMPROFILE StatGCSyncCR3HandlerVirtualUpdate; /*< GC: Profiling of the virtual handler updates. /
1669	STAMCOUNTER StatGCSyncCR3Global; /*< GC: The number of global CR3 syncs. /
1670	STAMCOUNTER StatGCSyncCR3NotGlobal; /*< GC: The number of non-global CR3 syncs. /
1671	STAMCOUNTER StatGCSyncCR3DstFreed; /*< GC: The number of times we've had to free a shadow entry. /
1672	STAMCOUNTER StatGCSyncCR3DstFreedSrcNP; /*< GC: The number of times we've had to free a shadow entry for which the source entry was not present. /
1673	STAMCOUNTER StatGCSyncCR3DstNotPresent; /*< GC: The number of times we've encountered a not present shadow entry for a present guest entry. /
1674	STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPD; /*< GC: The number of times a global page directory wasn't flushed. /
1675	STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPT; /*< GC: The number of times a page table with only global entries wasn't flushed. /
1676	STAMCOUNTER StatGCSyncCR3DstCacheHit; /*< GC: The number of times we got some kind of cache hit on a page table. /
1677
1678	STAMPROFILE StatHCSyncCR3; /*< HC: PGMSyncCR3() profiling. /
1679	STAMPROFILE StatHCSyncCR3Handlers; /*< HC: Profiling of the PGMSyncCR3() update handler section. /
1680	STAMPROFILE StatHCSyncCR3HandlerVirtualReset; /*< HC: Profiling of the virtual handler resets. /
1681	STAMPROFILE StatHCSyncCR3HandlerVirtualUpdate; /*< HC: Profiling of the virtual handler updates. /
1682	STAMCOUNTER StatHCSyncCR3Global; /*< HC: The number of global CR3 syncs. /
1683	STAMCOUNTER StatHCSyncCR3NotGlobal; /*< HC: The number of non-global CR3 syncs. /
1684	STAMCOUNTER StatHCSyncCR3DstFreed; /*< HC: The number of times we've had to free a shadow entry. /
1685	STAMCOUNTER StatHCSyncCR3DstFreedSrcNP; /*< HC: The number of times we've had to free a shadow entry for which the source entry was not present. /
1686	STAMCOUNTER StatHCSyncCR3DstNotPresent; /*< HC: The number of times we've encountered a not present shadow entry for a present guest entry. /
1687	STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPD; /*< HC: The number of times a global page directory wasn't flushed. /
1688	STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPT; /*< HC: The number of times a page table with only global entries wasn't flushed. /
1689	STAMCOUNTER StatHCSyncCR3DstCacheHit; /*< HC: The number of times we got some kind of cache hit on a page table. /
1690
1691	/** GC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
1692	STAMPROFILE StatVirtHandleSearchByPhysGC;
1693	/** HC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
1694	STAMPROFILE StatVirtHandleSearchByPhysHC;
1695	/** HC: The number of times PGMR3HandlerPhysicalReset is called. */
1696	STAMCOUNTER StatHandlePhysicalReset;
1697
1698	STAMPROFILE StatCheckPageFault;
1699	STAMPROFILE StatLazySyncPT;
1700	STAMPROFILE StatMapping;
1701	STAMPROFILE StatOutOfSync;
1702	STAMPROFILE StatHandlers;
1703	STAMPROFILE StatEIPHandlers;
1704	STAMPROFILE StatHCPrefetch;
1705
1706	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
1707	/** The number of first time shadowings. */
1708	STAMCOUNTER StatTrackVirgin;
1709	/** The number of times switching to cRef2, i.e. the page is being shadowed by two PTs. */
1710	STAMCOUNTER StatTrackAliased;
1711	/** The number of times we're tracking using cRef2. */
1712	STAMCOUNTER StatTrackAliasedMany;
1713	/** The number of times we're hitting pages which has overflowed cRef2. */
1714	STAMCOUNTER StatTrackAliasedLots;
1715	/** The number of times the extent list grows to long. */
1716	STAMCOUNTER StatTrackOverflows;
1717	/** Profiling of SyncPageWorkerTrackDeref (expensive). */
1718	STAMPROFILE StatTrackDeref;
1719	# endif
1720
1721	/** Allocated mbs of guest ram */
1722	STAMCOUNTER StatDynRamTotal;
1723	/** Nr of pgmr3PhysGrowRange calls. */
1724	STAMCOUNTER StatDynRamGrow;
1725
1726	STAMCOUNTER StatGCTrap0ePD[X86_PG_ENTRIES];
1727	STAMCOUNTER StatGCSyncPtPD[X86_PG_ENTRIES];
1728	STAMCOUNTER StatGCSyncPagePD[X86_PG_ENTRIES];
1729	#endif
1730	} PGM, *PPGM;
1731
1732
1733	/** @name PGM::fSyncFlags Flags
1734	* @{
1735	*/
1736	/** Updates the MM_RAM_FLAGS_VIRTUAL_HANDLER page bit. */
1737	#define PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL BIT(0)
1738	/** Always sync CR3. */
1739	#define PGM_SYNC_ALWAYS BIT(1)
1740	/** Check monitoring on next CR3 (re)load and invalidate page. */
1741	#define PGM_SYNC_MONITOR_CR3 BIT(2)
1742	/** Clear the page pool (a light weight flush). */
1743	#define PGM_SYNC_CLEAR_PGM_POOL BIT(8)
1744	/** @} */
1745
1746
1747	__BEGIN_DECLS
1748
1749	PGMGCDECL(int) pgmGCGuestPDWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void pvFault, RTGCPHYS GCPhysFault, void pvUser);
1750	PGMDECL(int) pgmGuestROMWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void pvFault, RTGCPHYS GCPhysFault, void pvUser);
1751	PGMGCDECL(int) pgmCachePTWriteGC(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
1752	int pgmR3SyncPTResolveConflict(PVM pVM, PPGMMAPPING pMapping, PVBOXPD pPDSrc, int iPDOld);
1753	PPGMMAPPING pgmGetMapping(PVM pVM, RTGCPTR GCPtr);
1754	void pgmR3MapRelocate(PVM pVM, PPGMMAPPING pMapping, int iPDOld, int iPDNew);
1755	int pgmR3ChangeMode(PVM pVM, PGMMODE enmGuestMode);
1756	int pgmLock(PVM pVM);
1757	void pgmUnlock(PVM pVM);
1758
1759	void pgmR3HandlerPhysicalUpdateAll(PVM pVM);
1760	int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER ppVirt, unsigned piPage);
1761	DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser);
1762	#ifdef VBOX_STRICT
1763	void pgmHandlerVirtualDumpPhysPages(PVM pVM);
1764	#else
1765	# define pgmHandlerVirtualDumpPhysPages(a) do { } while (0)
1766	#endif
1767	DECLCALLBACK(void) pgmR3InfoHandlers(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
1768
1769
1770	#ifdef IN_RING3
1771	int pgmr3PhysGrowRange(PVM pVM, RTGCPHYS GCPhys);
1772
1773	int pgmR3PoolInit(PVM pVM);
1774	void pgmR3PoolRelocate(PVM pVM);
1775	void pgmR3PoolReset(PVM pVM);
1776
1777	#endif
1778	#ifdef IN_GC
1779	void *pgmGCPoolMapPage(PVM pVM, PPGMPOOLPAGE pPage);
1780	#endif
1781	int pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint16_t iUserTable, PPPGMPOOLPAGE ppPage);
1782	PPGMPOOLPAGE pgmPoolGetPageByHCPhys(PVM pVM, RTHCPHYS HCPhys);
1783	void pgmPoolFree(PVM pVM, RTHCPHYS HCPhys, uint16_t iUser, uint16_t iUserTable);
1784	void pgmPoolFreeByPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint16_t iUserTable);
1785	int pgmPoolFlushPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
1786	void pgmPoolFlushAll(PVM pVM);
1787	void pgmPoolClearAll(PVM pVM);
1788	void pgmPoolTrackFlushGCPhysPT(PVM pVM, PRTHCPHYS pHCPhys, uint16_t iShw, uint16_t cRefs);
1789	void pgmPoolTrackFlushGCPhysPTs(PVM pVM, PRTHCPHYS pHCPhys, uint16_t iPhysExt);
1790	int pgmPoolTrackFlushGCPhysPTsSlow(PVM pVM, PRTHCPHYS pHCPhys);
1791	PPGMPOOLPHYSEXT pgmPoolTrackPhysExtAlloc(PVM pVM, uint16_t *piPhysExt);
1792	void pgmPoolTrackPhysExtFree(PVM pVM, uint16_t iPhysExt);
1793	void pgmPoolTrackPhysExtFreeList(PVM pVM, uint16_t iPhysExt);
1794	uint16_t pgmPoolTrackPhysExtAddref(PVM pVM, uint16_t u16, uint16_t iShwPT);
1795	void pgmPoolTrackPhysExtDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PRTHCPHYS pHCPhys);
1796	#ifdef PGMPOOL_WITH_MONITORING
1797	# ifdef IN_RING3
1798	void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTHCPTR pvAddress, PDISCPUSTATE pCpu);
1799	# else
1800	void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTGCPTR pvAddress, PDISCPUSTATE pCpu);
1801	# endif
1802	int pgmPoolMonitorChainFlush(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
1803	void pgmPoolMonitorModifiedInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
1804	void pgmPoolMonitorModifiedClearAll(PVM pVM);
1805	int pgmPoolMonitorMonitorCR3(PPGMPOOL pPool, uint16_t idxRoot, RTGCPHYS GCPhysCR3);
1806	int pgmPoolMonitorUnmonitorCR3(PPGMPOOL pPool, uint16_t idxRoot);
1807	#endif
1808
1809	__END_DECLS
1810
1811
1812	/**
1813	* Convert GC Phys to HC Phys.
1814	*
1815	* @returns VBox status.
1816	* @param pPGM PGM handle.
1817	* @param GCPhys The GC physical address.
1818	* @param pHCPhys Where to store the corresponding HC physical address.
1819	*/
1820	DECLINLINE(int) PGMRamGCPhys2HCPhys(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
1821	{
1822	/*
1823	* Walk range list.
1824	*/
1825	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
1826	while (pRam)
1827	{
1828	RTGCPHYS off = GCPhys - pRam->GCPhys;
1829	if (off < pRam->cb)
1830	{
1831	unsigned iPage = off >> PAGE_SHIFT;
1832	/* Physical chunk in dynamically allocated range not present? */
1833	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
1834	{
1835	#ifdef IN_RING3
1836	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
1837	#else
1838	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1839	#endif
1840	if (rc != VINF_SUCCESS)
1841	return rc;
1842	}
1843	*pHCPhys = (pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK) \| (off & PAGE_OFFSET_MASK);
1844	return VINF_SUCCESS;
1845	}
1846
1847	pRam = CTXSUFF(pRam->pNext);
1848	}
1849	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1850	}
1851
1852
1853	/**
1854	* Convert GC Phys to HC Virt.
1855	*
1856	* @returns VBox status.
1857	* @param pPGM PGM handle.
1858	* @param GCPhys The GC physical address.
1859	* @param pHCPtr Where to store the corresponding HC virtual address.
1860	*/
1861	DECLINLINE(int) PGMRamGCPhys2HCPtr(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
1862	{
1863	/*
1864	* Walk range list.
1865	*/
1866	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
1867	while (pRam)
1868	{
1869	RTGCPHYS off = GCPhys - pRam->GCPhys;
1870	if (off < pRam->cb)
1871	{
1872	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1873	{
1874	unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
1875	/* Physical chunk in dynamically allocated range not present? */
1876	if (RT_UNLIKELY(!CTXSUFF(pRam->pavHCChunk)[idx]))
1877	{
1878	#ifdef IN_RING3
1879	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
1880	#else
1881	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1882	#endif
1883	if (rc != VINF_SUCCESS)
1884	return rc;
1885	}
1886	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1887	return VINF_SUCCESS;
1888	}
1889	if (pRam->pvHC)
1890	{
1891	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
1892	return VINF_SUCCESS;
1893	}
1894	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1895	}
1896
1897	pRam = CTXSUFF(pRam->pNext);
1898	}
1899	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1900	}
1901
1902
1903	/**
1904	* Convert GC Phys to HC Virt.
1905	*
1906	* @returns VBox status.
1907	* @param PVM VM handle.
1908	* @param pRam Ram range
1909	* @param GCPhys The GC physical address.
1910	* @param pHCPtr Where to store the corresponding HC virtual address.
1911	*/
1912	DECLINLINE(int) PGMRamGCPhys2HCPtr(PVM pVM, PPGMRAMRANGE pRam, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
1913	{
1914	RTGCPHYS off = GCPhys - pRam->GCPhys;
1915	Assert(off < pRam->cb);
1916
1917	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1918	{
1919	unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
1920	/* Physical chunk in dynamically allocated range not present? */
1921	if (RT_UNLIKELY(!CTXSUFF(pRam->pavHCChunk)[idx]))
1922	{
1923	#ifdef IN_RING3
1924	int rc = pgmr3PhysGrowRange(pVM, GCPhys);
1925	#else
1926	int rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1927	#endif
1928	if (rc != VINF_SUCCESS)
1929	return rc;
1930	}
1931	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1932	return VINF_SUCCESS;
1933	}
1934	if (pRam->pvHC)
1935	{
1936	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
1937	return VINF_SUCCESS;
1938	}
1939	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1940	}
1941
1942
1943	/**
1944	* Convert GC Phys to HC Virt and HC Phys.
1945	*
1946	* @returns VBox status.
1947	* @param pPGM PGM handle.
1948	* @param GCPhys The GC physical address.
1949	* @param pHCPtr Where to store the corresponding HC virtual address.
1950	* @param pHCPhys Where to store the HC Physical address and its flags.
1951	*/
1952	DECLINLINE(int) PGMRamGCPhys2HCPtrAndHCPhysWithFlags(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr, PRTHCPHYS pHCPhys)
1953	{
1954	/*
1955	* Walk range list.
1956	*/
1957	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
1958	while (pRam)
1959	{
1960	RTGCPHYS off = GCPhys - pRam->GCPhys;
1961	if (off < pRam->cb)
1962	{
1963	unsigned iPage = off >> PAGE_SHIFT;
1964	/* Physical chunk in dynamically allocated range not present? */
1965	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
1966	{
1967	#ifdef IN_RING3
1968	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
1969	#else
1970	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1971	#endif
1972	if (rc != VINF_SUCCESS)
1973	return rc;
1974	}
1975	*pHCPhys = pRam->aHCPhys[iPage];
1976
1977	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1978	{
1979	unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
1980	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1981	return VINF_SUCCESS;
1982	}
1983	if (pRam->pvHC)
1984	{
1985	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
1986	return VINF_SUCCESS;
1987	}
1988	*pHCPtr = 0;
1989	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1990	}
1991
1992	pRam = CTXSUFF(pRam->pNext);
1993	}
1994	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1995	}
1996
1997
1998	/**
1999	* Convert GC Phys page to a page entry pointer.
2000	*
2001	* This is used by code which may have to update the flags.
2002	*
2003	* @returns VBox status.
2004	* @param pPGM PGM handle.
2005	* @param GCPhys The GC physical address.
2006	* @param ppHCPhys Where to store the pointer to the page entry.
2007	*/
2008	DECLINLINE(int) PGMRamGCPhys2PagePtr(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS *ppHCPhys)
2009	{
2010	/*
2011	* Walk range list.
2012	*/
2013	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2014	while (pRam)
2015	{
2016	RTGCPHYS off = GCPhys - pRam->GCPhys;
2017	if (off < pRam->cb)
2018	{
2019	unsigned iPage = off >> PAGE_SHIFT;
2020	/* Physical chunk in dynamically allocated range not present? */
2021	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2022	{
2023	#ifdef IN_RING3
2024	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2025	#else
2026	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2027	#endif
2028	if (rc != VINF_SUCCESS)
2029	return rc;
2030	}
2031	*ppHCPhys = &pRam->aHCPhys[iPage];
2032	return VINF_SUCCESS;
2033	}
2034
2035	pRam = CTXSUFF(pRam->pNext);
2036	}
2037	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2038	}
2039
2040
2041	/**
2042	* Convert GC Phys page to HC Phys page and flags.
2043	*
2044	* @returns VBox status.
2045	* @param pPGM PGM handle.
2046	* @param GCPhys The GC physical address.
2047	* @param pHCPhys Where to store the corresponding HC physical address of the page
2048	* and the page flags.
2049	*/
2050	DECLINLINE(int) PGMRamGCPhys2HCPhysWithFlags(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
2051	{
2052	/*
2053	* Walk range list.
2054	*/
2055	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2056	while (pRam)
2057	{
2058	RTGCPHYS off = GCPhys - pRam->GCPhys;
2059	if (off < pRam->cb)
2060	{
2061	unsigned iPage = off >> PAGE_SHIFT;
2062	/* Physical chunk in dynamically allocated range not present? */
2063	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2064	{
2065	#ifdef IN_RING3
2066	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2067	#else
2068	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2069	#endif
2070	if (rc != VINF_SUCCESS)
2071	return rc;
2072	}
2073	*pHCPhys = pRam->aHCPhys[iPage];
2074	return VINF_SUCCESS;
2075	}
2076
2077	pRam = CTXSUFF(pRam->pNext);
2078	}
2079	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2080	}
2081
2082
2083	/**
2084	* Clears flags associated with a RAM address.
2085	*
2086	* @returns VBox status code.
2087	* @param pPGM PGM handle.
2088	* @param GCPhys Guest context physical address.
2089	* @param fFlags fFlags to clear. (Bits 0-11.)
2090	*/
2091	DECLINLINE(int) PGMRamFlagsClearByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
2092	{
2093	/*
2094	* Walk range list.
2095	*/
2096	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2097	while (pRam)
2098	{
2099	RTGCPHYS off = GCPhys - pRam->GCPhys;
2100	if (off < pRam->cb)
2101	{
2102	unsigned iPage = off >> PAGE_SHIFT;
2103	/* Physical chunk in dynamically allocated range not present? */
2104	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2105	{
2106	#ifdef IN_RING3
2107	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2108	#else
2109	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2110	#endif
2111	if (rc != VINF_SUCCESS)
2112	return rc;
2113	}
2114	fFlags &= ~X86_PTE_PAE_PG_MASK;
2115	pRam->aHCPhys[iPage] &= ~(RTHCPHYS)fFlags;
2116	return VINF_SUCCESS;
2117	}
2118
2119	pRam = CTXSUFF(pRam->pNext);
2120	}
2121	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2122	}
2123
2124
2125	/**
2126	* Clears flags associated with a RAM address.
2127	*
2128	* @returns VBox status code.
2129	* @param pPGM PGM handle.
2130	* @param GCPhys Guest context physical address.
2131	* @param fFlags fFlags to clear. (Bits 0-11.)
2132	* @param ppRamHint Where to read and store the ram list hint.
2133	* The caller initializes this to NULL before the call.
2134	*/
2135	DECLINLINE(int) PGMRamFlagsClearByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
2136	{
2137	/*
2138	* Check the hint.
2139	*/
2140	PPGMRAMRANGE pRam = *ppRamHint;
2141	if (pRam)
2142	{
2143	RTGCPHYS off = GCPhys - pRam->GCPhys;
2144	if (off < pRam->cb)
2145	{
2146	unsigned iPage = off >> PAGE_SHIFT;
2147	/* Physical chunk in dynamically allocated range not present? */
2148	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2149	{
2150	#ifdef IN_RING3
2151	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2152	#else
2153	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2154	#endif
2155	if (rc != VINF_SUCCESS)
2156	return rc;
2157	}
2158	fFlags &= ~X86_PTE_PAE_PG_MASK;
2159	pRam->aHCPhys[iPage] &= ~(RTHCPHYS)fFlags;
2160	return VINF_SUCCESS;
2161	}
2162	}
2163
2164	/*
2165	* Walk range list.
2166	*/
2167	pRam = CTXSUFF(pPGM->pRamRanges);
2168	while (pRam)
2169	{
2170	RTGCPHYS off = GCPhys - pRam->GCPhys;
2171	if (off < pRam->cb)
2172	{
2173	unsigned iPage = off >> PAGE_SHIFT;
2174	/* Physical chunk in dynamically allocated range not present? */
2175	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2176	{
2177	#ifdef IN_RING3
2178	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2179	#else
2180	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2181	#endif
2182	if (rc != VINF_SUCCESS)
2183	return rc;
2184	}
2185	fFlags &= ~X86_PTE_PAE_PG_MASK;
2186	pRam->aHCPhys[iPage] &= ~(RTHCPHYS)fFlags;
2187	*ppRamHint = pRam;
2188	return VINF_SUCCESS;
2189	}
2190
2191	pRam = CTXSUFF(pRam->pNext);
2192	}
2193	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2194	}
2195
2196	/**
2197	* Sets (bitwise OR) flags associated with a RAM address.
2198	*
2199	* @returns VBox status code.
2200	* @param pPGM PGM handle.
2201	* @param GCPhys Guest context physical address.
2202	* @param fFlags fFlags to set clear. (Bits 0-11.)
2203	*/
2204	DECLINLINE(int) PGMRamFlagsSetByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
2205	{
2206	/*
2207	* Walk range list.
2208	*/
2209	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2210	while (pRam)
2211	{
2212	RTGCPHYS off = GCPhys - pRam->GCPhys;
2213	if (off < pRam->cb)
2214	{
2215	unsigned iPage = off >> PAGE_SHIFT;
2216	/* Physical chunk in dynamically allocated range not present? */
2217	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2218	{
2219	#ifdef IN_RING3
2220	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2221	#else
2222	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2223	#endif
2224	if (rc != VINF_SUCCESS)
2225	return rc;
2226	}
2227	fFlags &= ~X86_PTE_PAE_PG_MASK;
2228	pRam->aHCPhys[iPage] \|= fFlags;
2229	return VINF_SUCCESS;
2230	}
2231
2232	pRam = CTXSUFF(pRam->pNext);
2233	}
2234	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2235	}
2236
2237	/**
2238	* Sets (bitwise OR) flags associated with a RAM address.
2239	*
2240	* @returns VBox status code.
2241	* @param pPGM PGM handle.
2242	* @param GCPhys Guest context physical address.
2243	* @param fFlags fFlags to set clear. (Bits 0-11.)
2244	* @param ppRamHint Where to read and store the ram list hint.
2245	* The caller initializes this to NULL before the call.
2246	*/
2247	DECLINLINE(int) PGMRamFlagsSetByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
2248	{
2249	/*
2250	* Check the hint.
2251	*/
2252	PPGMRAMRANGE pRam = *ppRamHint;
2253	if (pRam)
2254	{
2255	RTGCPHYS off = GCPhys - pRam->GCPhys;
2256	if (off < pRam->cb)
2257	{
2258	unsigned iPage = off >> PAGE_SHIFT;
2259	/* Physical chunk in dynamically allocated range not present? */
2260	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2261	{
2262	#ifdef IN_RING3
2263	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2264	#else
2265	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2266	#endif
2267	if (rc != VINF_SUCCESS)
2268	return rc;
2269	}
2270	fFlags &= ~X86_PTE_PAE_PG_MASK;
2271	pRam->aHCPhys[iPage] \|= fFlags;
2272	return VINF_SUCCESS;
2273	}
2274	}
2275
2276	/*
2277	* Walk range list.
2278	*/
2279	pRam = CTXSUFF(pPGM->pRamRanges);
2280	while (pRam)
2281	{
2282	RTGCPHYS off = GCPhys - pRam->GCPhys;
2283	if (off < pRam->cb)
2284	{
2285	unsigned iPage = off >> PAGE_SHIFT;
2286	/* Physical chunk in dynamically allocated range not present? */
2287	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2288	{
2289	#ifdef IN_RING3
2290	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2291	#else
2292	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2293	#endif
2294	if (rc != VINF_SUCCESS)
2295	return rc;
2296	}
2297	fFlags &= ~X86_PTE_PAE_PG_MASK;
2298	pRam->aHCPhys[iPage] \|= fFlags;
2299	*ppRamHint = pRam;
2300	return VINF_SUCCESS;
2301	}
2302
2303	pRam = CTXSUFF(pRam->pNext);
2304	}
2305	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2306	}
2307
2308
2309	/**
2310	* Gets the page directory for the specified address.
2311	*
2312	* @returns Pointer to the page directory in question.
2313	* @returns NULL if the page directory is not present or on an invalid page.
2314	* @param pPGM Pointer to the PGM instance data.
2315	* @param GCPtr The address.
2316	*/
2317	DECLINLINE(PX86PDPAE) pgmGstGetPaePD(PPGM pPGM, RTGCUINTPTR GCPtr)
2318	{
2319	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2320	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2321	{
2322	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2323	return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr];
2324
2325	/* cache is out-of-sync. */
2326	PX86PDPAE pPD;
2327	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2328	if (VBOX_SUCCESS(rc))
2329	return pPD;
2330	AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2331	/* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page of some kind emualted as all 0s. */
2332	}
2333	return NULL;
2334	}
2335
2336
2337	/**
2338	* Gets the page directory entry for the specified address.
2339	*
2340	* @returns Pointer to the page directory entry in question.
2341	* @returns NULL if the page directory is not present or on an invalid page.
2342	* @param pPGM Pointer to the PGM instance data.
2343	* @param GCPtr The address.
2344	*/
2345	DECLINLINE(PX86PDEPAE) pgmGstGetPaePDEPtr(PPGM pPGM, RTGCUINTPTR GCPtr)
2346	{
2347	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2348	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2349	{
2350	const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
2351	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2352	return &CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD];
2353
2354	/* The cache is out-of-sync. */
2355	PX86PDPAE pPD;
2356	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2357	if (VBOX_SUCCESS(rc))
2358	return &pPD->a[iPD];
2359	AssertMsgFailed(("Impossible! rc=%Vrc PDPE=%RX64\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2360	/* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page or something which we'll emulate as all 0s. */
2361	}
2362	return NULL;
2363	}
2364
2365
2366	/**
2367	* Gets the page directory entry for the specified address.
2368	*
2369	* @returns The page directory entry in question.
2370	* @returns A non-present entry if the page directory is not present or on an invalid page.
2371	* @param pPGM Pointer to the PGM instance data.
2372	* @param GCPtr The address.
2373	*/
2374	DECLINLINE(uint64_t) pgmGstGetPaePDE(PPGM pPGM, RTGCUINTPTR GCPtr)
2375	{
2376	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2377	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2378	{
2379	const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
2380	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2381	return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD].u;
2382
2383	/* cache is out-of-sync. */
2384	PX86PDPAE pPD;
2385	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2386	if (VBOX_SUCCESS(rc))
2387	return pPD->a[iPD].u;
2388	AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2389	}
2390	return 0;
2391	}
2392
2393
2394	/**
2395	* Checks if any of the specified page flags are set for the given page.
2396	*
2397	* @returns true if any of the flags are set.
2398	* @returns false if all the flags are clear.
2399	* @param pPGM PGM handle.
2400	* @param GCPhys The GC physical address.
2401	* @param fFlags The flags to check for.
2402	*/
2403	DECLINLINE(bool) PGMRamTestFlags(PPGM pPGM, RTGCPHYS GCPhys, uint64_t fFlags)
2404	{
2405	/*
2406	* Walk range list.
2407	*/
2408	for (PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2409	pRam;
2410	pRam = CTXSUFF(pRam->pNext))
2411	{
2412	RTGCPHYS off = GCPhys - pRam->GCPhys;
2413	if (off < pRam->cb)
2414	return (pRam->aHCPhys[off >> PAGE_SHIFT] & fFlags) != 0;
2415	}
2416	return false;
2417	}
2418
2419
2420	/**
2421	* Gets the ram flags for a handler.
2422	*
2423	* @returns The ram flags.
2424	* @param pCur The physical handler in question.
2425	*/
2426	DECLINLINE(unsigned) pgmHandlerPhysicalCalcFlags(PPGMPHYSHANDLER pCur)
2427	{
2428	switch (pCur->enmType)
2429	{
2430	case PGMPHYSHANDLERTYPE_PHYSICAL:
2431	return MM_RAM_FLAGS_PHYSICAL_HANDLER;
2432
2433	case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
2434	return MM_RAM_FLAGS_PHYSICAL_HANDLER \| MM_RAM_FLAGS_PHYSICAL_WRITE;
2435
2436	case PGMPHYSHANDLERTYPE_MMIO:
2437	case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
2438	return MM_RAM_FLAGS_PHYSICAL_HANDLER \| MM_RAM_FLAGS_PHYSICAL_ALL;
2439
2440	default:
2441	AssertFatalMsgFailed(("Invalid type %d\n", pCur->enmType));
2442	}
2443	}
2444
2445
2446	/**
2447	* Clears one physical page of a virtual handler
2448	*
2449	* @param pPGM Pointer to the PGM instance.
2450	* @param pCur Virtual handler structure
2451	* @param iPage Physical page index
2452	*/
2453	DECLINLINE(void) pgmHandlerVirtualClearPage(PPGM pPGM, PPGMVIRTHANDLER pCur, unsigned iPage)
2454	{
2455	const PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
2456
2457	/*
2458	* Remove the node from the tree (it's supposed to be in the tree if we get here!).
2459	*/
2460	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2461	AssertReleaseMsg(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
2462	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2463	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
2464	#endif
2465	if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD)
2466	{
2467	/* We're the head of the alias chain. */
2468	PPGMPHYS2VIRTHANDLER pRemove = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRemove(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key); NOREF(pRemove);
2469	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2470	AssertReleaseMsg(pRemove != NULL,
2471	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2472	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
2473	AssertReleaseMsg(pRemove == pPhys2Virt,
2474	("wanted: pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n"
2475	" got: pRemove=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2476	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias,
2477	pRemove, pRemove->Core.Key, pRemove->Core.KeyLast, pRemove->offVirtHandler, pRemove->offNextAlias));
2478	#endif
2479	if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
2480	{
2481	/* Insert the next list in the alias chain into the tree. */
2482	PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2483	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2484	AssertReleaseMsg(pNext->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
2485	("pNext=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2486	pNext, pNext->Core.Key, pNext->Core.KeyLast, pNext->offVirtHandler, pNext->offNextAlias));
2487	#endif
2488	pNext->offNextAlias \|= PGMPHYS2VIRTHANDLER_IS_HEAD;
2489	bool fRc = RTAvlroGCPhysInsert(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, &pNext->Core);
2490	AssertRelease(fRc);
2491	}
2492	}
2493	else
2494	{
2495	/* Locate the previous node in the alias chain. */
2496	PPGMPHYS2VIRTHANDLER pPrev = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
2497	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2498	AssertReleaseMsg(pPrev != pPhys2Virt,
2499	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
2500	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
2501	#endif
2502	for (;;)
2503	{
2504	PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPrev + (pPrev->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2505	if (pNext == pPhys2Virt)
2506	{
2507	/* unlink. */
2508	LogFlow(("pgmHandlerVirtualClearPage: removed %p:{.offNextAlias=%#RX32} from alias chain. prev %p:{.offNextAlias=%#RX32} [%VGp-%VGp]\n",
2509	pPhys2Virt, pPhys2Virt->offNextAlias, pPrev, pPrev->offNextAlias, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
2510	if (!(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
2511	pPrev->offNextAlias &= ~PGMPHYS2VIRTHANDLER_OFF_MASK;
2512	else
2513	{
2514	PPGMPHYS2VIRTHANDLER pNewNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2515	pPrev->offNextAlias = ((intptr_t)pNewNext - (intptr_t)pPrev)
2516	\| (pPrev->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
2517	}
2518	break;
2519	}
2520
2521	/* next */
2522	if (pNext == pPrev)
2523	{
2524	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2525	AssertReleaseMsg(pNext != pPrev,
2526	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
2527	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
2528	#endif
2529	break;
2530	}
2531	pPrev = pNext;
2532	}
2533	}
2534	Log2(("PHYS2VIRT: Removing %VGp-%VGp %#RX32 %s\n",
2535	pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, HCSTRING(pCur->pszDesc)));
2536	pPhys2Virt->offNextAlias = 0;
2537	pPhys2Virt->Core.KeyLast = NIL_RTGCPHYS; /* require reinsert */
2538
2539	/*
2540	* Clear the ram flags for this page.
2541	*/
2542	int rc = PGMRamFlagsClearByGCPhys(pPGM, pPhys2Virt->Core.Key,
2543	MM_RAM_FLAGS_VIRTUAL_HANDLER \| MM_RAM_FLAGS_VIRTUAL_ALL \| MM_RAM_FLAGS_VIRTUAL_WRITE);
2544	AssertRC(rc);
2545	}
2546
2547
2548	/**
2549	* Internal worker for finding a 'in-use' shadow page give by it's physical address.
2550	*
2551	* @returns Pointer to the shadow page structure.
2552	* @param pPool The pool.
2553	* @param HCPhys The HC physical address of the shadow page.
2554	*/
2555	DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPage(PPGMPOOL pPool, RTHCPHYS HCPhys)
2556	{
2557	/*
2558	* Look up the page.
2559	*/
2560	PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, HCPhys & X86_PTE_PAE_PG_MASK);
2561	AssertFatalMsg(pPage && pPage->enmKind != PGMPOOLKIND_FREE, ("HCPhys=%VHp pPage=%p type=%d\n", HCPhys, pPage, (pPage) ? pPage->enmKind : 0));
2562	return pPage;
2563	}
2564
2565
2566	/**
2567	* Internal worker for finding a 'in-use' shadow page give by it's physical address.
2568	*
2569	* @returns Pointer to the shadow page structure.
2570	* @param pPool The pool.
2571	* @param idx The pool page index.
2572	*/
2573	DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPageByIdx(PPGMPOOL pPool, unsigned idx)
2574	{
2575	AssertFatalMsg(idx >= PGMPOOL_IDX_FIRST && idx < pPool->cCurPages, ("idx=%d\n", idx));
2576	return &pPool->aPages[idx];
2577	}
2578
2579
2580	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2581	/**
2582	* Clear references to guest physical memory.
2583	*
2584	* @param pPool The pool.
2585	* @param pPage The page.
2586	* @param pHCPhys Pointer to the aHCPhys entry in the ram range.
2587	*/
2588	DECLINLINE(void) pgmTrackDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PRTHCPHYS pHCPhys)
2589	{
2590	/*
2591	* Just deal with the simple case here.
2592	*/
2593	#ifdef LOG_ENABLED
2594	const RTHCPHYS HCPhysOrg = *pHCPhys;
2595	#endif
2596	const unsigned cRefs = *pHCPhys >> MM_RAM_FLAGS_CREFS_SHIFT;
2597	if (cRefs == 1)
2598	{
2599	Assert(pPage->idx == ((*pHCPhys >> MM_RAM_FLAGS_IDX_SHIFT) & MM_RAM_FLAGS_IDX_MASK));
2600	pHCPhys = pHCPhys & MM_RAM_FLAGS_NO_REFS_MASK;
2601	}
2602	else
2603	pgmPoolTrackPhysExtDerefGCPhys(pPool, pPage, pHCPhys);
2604	LogFlow(("pgmTrackDerefGCPhys: pHCPhys=%RHp -> %RHp\n", HCPhysOrg, pHCPhys));
2605	}
2606	#endif
2607
2608
2609	#ifdef PGMPOOL_WITH_CACHE
2610	/**
2611	* Moves the page to the head of the age list.
2612	*
2613	* This is done when the cached page is used in one way or another.
2614	*
2615	* @param pPool The pool.
2616	* @param pPage The cached page.
2617	* @todo inline in PGMInternal.h!
2618	*/
2619	DECLINLINE(void) pgmPoolCacheUsed(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
2620	{
2621	/*
2622	* Move to the head of the age list.
2623	*/
2624	if (pPage->iAgePrev != NIL_PGMPOOL_IDX)
2625	{
2626	/* unlink */
2627	pPool->aPages[pPage->iAgePrev].iAgeNext = pPage->iAgeNext;
2628	if (pPage->iAgeNext != NIL_PGMPOOL_IDX)
2629	pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->iAgePrev;
2630	else
2631	pPool->iAgeTail = pPage->iAgePrev;
2632
2633	/* insert at head */
2634	pPage->iAgePrev = NIL_PGMPOOL_IDX;
2635	pPage->iAgeNext = pPool->iAgeHead;
2636	Assert(pPage->iAgeNext != NIL_PGMPOOL_IDX); /* we would've already been head then */
2637	pPool->iAgeHead = pPage->idx;
2638	pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->idx;
2639	}
2640	}
2641	#endif /* PGMPOOL_WITH_CACHE */
2642
2643	/**
2644	* Tells if mappings are to be put into the shadow page table or not
2645	*
2646	* @returns boolean result
2647	* @param pVM VM handle.
2648	*/
2649
2650	DECLINLINE(bool) pgmMapAreMappingsEnabled(PPGM pPGM)
2651	{
2652	return !pPGM->fDisableMappings;
2653	}
2654
2655	/** @} */
2656
2657	#endif

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source: vbox/trunk/src/VBox/VMM/PGMInternal.h@ 3723

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