PGMInternal.h@ 4689

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1	/* $Id: PGMInternal.h 4689 2007-09-11 09:18:54Z vboxsync $ */
2	/** @file
3	* PGM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 innotek GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___PGMInternal_h
19	#define ___PGMInternal_h
20
21	#include <VBox/cdefs.h>
22	#include <VBox/types.h>
23	#include <VBox/err.h>
24	#include <VBox/stam.h>
25	#include <VBox/param.h>
26	#include <VBox/vmm.h>
27	#include <VBox/mm.h>
28	#include <VBox/pdmcritsect.h>
29	#include <VBox/pdmapi.h>
30	#include <VBox/dis.h>
31	#include <VBox/dbgf.h>
32	#include <VBox/log.h>
33	#include <iprt/avl.h>
34	#include <iprt/assert.h>
35	#include <iprt/critsect.h>
36
37	#if !defined(IN_PGM_R3) && !defined(IN_PGM_R0) && !defined(IN_PGM_GC)
38	# error "Not in PGM! This is an internal header!"
39	#endif
40
41
42	/** @defgroup grp_pgm_int Internals
43	* @ingroup grp_pgm
44	* @internal
45	* @{
46	*/
47
48
49	/** @name PGM Compile Time Config
50	* @{
51	*/
52
53	/**
54	* Solve page is out of sync issues inside Guest Context (in PGMGC.cpp).
55	* Comment it if it will break something.
56	*/
57	#define PGM_OUT_OF_SYNC_IN_GC
58
59	/**
60	* Virtualize the dirty bit
61	* This also makes a half-hearted attempt at the accessed bit. For full
62	* accessed bit virtualization define PGM_SYNC_ACCESSED_BIT.
63	*/
64	#define PGM_SYNC_DIRTY_BIT
65
66	/**
67	* Fully virtualize the accessed bit.
68	* @remark This requires SYNC_DIRTY_ACCESSED_BITS to be defined!
69	*/
70	#define PGM_SYNC_ACCESSED_BIT
71
72	/**
73	* Check and skip global PDEs for non-global flushes
74	*/
75	#define PGM_SKIP_GLOBAL_PAGEDIRS_ON_NONGLOBAL_FLUSH
76
77	/**
78	* Sync N pages instead of a whole page table
79	*/
80	#define PGM_SYNC_N_PAGES
81
82	/**
83	* Number of pages to sync during a page fault
84	*
85	* When PGMPOOL_WITH_GCPHYS_TRACKING is enabled using high values here
86	* causes a lot of unnecessary extents and also is slower than taking more \#PFs.
87	*/
88	#define PGM_SYNC_NR_PAGES 8
89
90	/**
91	* Number of PGMPhysRead/Write cache entries (must be <= sizeof(uint64_t))
92	*/
93	#define PGM_MAX_PHYSCACHE_ENTRIES 64
94	#define PGM_MAX_PHYSCACHE_ENTRIES_MASK (PGM_MAX_PHYSCACHE_ENTRIES-1)
95
96	/**
97	* Enable caching of PGMR3PhysRead/WriteByte/Word/Dword
98	*/
99	#define PGM_PHYSMEMACCESS_CACHING
100
101	/*
102	* Assert Sanity.
103	*/
104	#if defined(PGM_SYNC_ACCESSED_BIT) && !defined(PGM_SYNC_DIRTY_BIT)
105	# error "PGM_SYNC_ACCESSED_BIT requires PGM_SYNC_DIRTY_BIT!"
106	#endif
107
108	/** @def PGMPOOL_WITH_CACHE
109	* Enable agressive caching using the page pool.
110	*
111	* This requires PGMPOOL_WITH_USER_TRACKING and PGMPOOL_WITH_MONITORING.
112	*/
113	#define PGMPOOL_WITH_CACHE
114
115	/** @def PGMPOOL_WITH_MIXED_PT_CR3
116	* When defined, we'll deal with 'uncachable' pages.
117	*/
118	#ifdef PGMPOOL_WITH_CACHE
119	# define PGMPOOL_WITH_MIXED_PT_CR3
120	#endif
121
122	/** @def PGMPOOL_WITH_MONITORING
123	* Monitor the guest pages which are shadowed.
124	* When this is enabled, PGMPOOL_WITH_CACHE or PGMPOOL_WITH_GCPHYS_TRACKING must
125	* be enabled as well.
126	* @remark doesn't really work without caching now. (Mixed PT/CR3 change.)
127	*/
128	#ifdef PGMPOOL_WITH_CACHE
129	# define PGMPOOL_WITH_MONITORING
130	#endif
131
132	/** @def PGMPOOL_WITH_GCPHYS_TRACKING
133	* Tracking the of shadow pages mapping guest physical pages.
134	*
135	* This is very expensive, the current cache prototype is trying to figure out
136	* whether it will be acceptable with an agressive caching policy.
137	*/
138	#if defined(PGMPOOL_WITH_CACHE) \|\| defined(PGMPOOL_WITH_MONITORING)
139	# define PGMPOOL_WITH_GCPHYS_TRACKING
140	#endif
141
142	/** @def PGMPOOL_WITH_USER_TRACKNG
143	* Tracking users of shadow pages. This is required for the linking of shadow page
144	* tables and physical guest addresses.
145	*/
146	#if defined(PGMPOOL_WITH_GCPHYS_TRACKING) \|\| defined(PGMPOOL_WITH_CACHE) \|\| defined(PGMPOOL_WITH_MONITORING)
147	# define PGMPOOL_WITH_USER_TRACKING
148	#endif
149
150	/** @def PGMPOOL_CFG_MAX_GROW
151	* The maximum number of pages to add to the pool in one go.
152	*/
153	#define PGMPOOL_CFG_MAX_GROW (_256K >> PAGE_SHIFT)
154
155	/** @def VBOX_STRICT_PGM_HANDLER_VIRTUAL
156	* Enables some extra assertions for virtual handlers (mainly phys2virt related).
157	*/
158	#ifdef VBOX_STRICT
159	# define VBOX_STRICT_PGM_HANDLER_VIRTUAL
160	#endif
161	/** @} */
162
163
164	/** @name PDPTR and PML4 flags.
165	* These are placed in the three bits available for system programs in
166	* the PDPTR and PML4 entries.
167	* @{ */
168	/** The entry is a permanent one and it's must always be present.
169	* Never free such an entry. */
170	#define PGM_PLXFLAGS_PERMANENT BIT64(10)
171	/** @} */
172
173	/** @name Page directory flags.
174	* These are placed in the three bits available for system programs in
175	* the page directory entries.
176	* @{ */
177	/** Mapping (hypervisor allocated pagetable). */
178	#define PGM_PDFLAGS_MAPPING BIT64(10)
179	/** Made read-only to facilitate dirty bit tracking. */
180	#define PGM_PDFLAGS_TRACK_DIRTY BIT64(11)
181	/** @} */
182
183	/** @name Page flags.
184	* These are placed in the three bits available for system programs in
185	* the page entries.
186	* @{ */
187	/** Made read-only to facilitate dirty bit tracking. */
188	#define PGM_PTFLAGS_TRACK_DIRTY BIT64(9)
189
190	#ifndef PGM_PTFLAGS_CSAM_VALIDATED
191	/** Scanned and approved by CSAM (tm).
192	* NOTE: Must be identical to the one defined in CSAMInternal.h!!
193	* @todo Move PGM_PTFLAGS_* and PGM_PDFLAGS_* to VBox/pgm.h. */
194	#define PGM_PTFLAGS_CSAM_VALIDATED BIT64(11)
195	#endif
196	/** @} */
197
198	/** @name Defines used to indicate the shadow and guest paging in the templates.
199	* @{ */
200	#define PGM_TYPE_REAL 1
201	#define PGM_TYPE_PROT 2
202	#define PGM_TYPE_32BIT 3
203	#define PGM_TYPE_PAE 4
204	#define PGM_TYPE_AMD64 5
205	/** @} */
206
207	/** Macro for checking if the guest is using paging.
208	* @param uType PGM_TYPE_*
209	* @remark ASSUMES certain order of the PGM_TYPE_* values.
210	*/
211	#define PGM_WITH_PAGING(uType) ((uType) >= PGM_TYPE_32BIT)
212
213
214	/** @def PGM_HCPHYS_2_PTR
215	* Maps a HC physical page pool address to a virtual address.
216	*
217	* @returns VBox status code.
218	* @param pVM The VM handle.
219	* @param HCPhys The HC physical address to map to a virtual one.
220	* @param ppv Where to store the virtual address. No need to cast this.
221	*
222	* @remark In GC this uses PGMGCDynMapHCPage(), so it will consume of the
223	* small page window employeed by that function. Be careful.
224	* @remark There is no need to assert on the result.
225	*/
226	#ifdef IN_GC
227	# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) PGMGCDynMapHCPage(pVM, HCPhys, (void **)(ppv))
228	#else
229	# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) MMPagePhys2PageEx(pVM, HCPhys, (void **)(ppv))
230	#endif
231
232	/** @def PGM_GCPHYS_2_PTR
233	* Maps a GC physical page address to a virtual address.
234	*
235	* @returns VBox status code.
236	* @param pVM The VM handle.
237	* @param GCPhys The GC physical address to map to a virtual one.
238	* @param ppv Where to store the virtual address. No need to cast this.
239	*
240	* @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
241	* small page window employeed by that function. Be careful.
242	* @remark There is no need to assert on the result.
243	*/
244	#ifdef IN_GC
245	# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMGCDynMapGCPage(pVM, GCPhys, (void **)(ppv))
246	#else
247	# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1 /* one page only /, (void )(ppv)) /* @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
248	#endif
249
250	/** @def PGM_GCPHYS_2_PTR_EX
251	* Maps a unaligned GC physical page address to a virtual address.
252	*
253	* @returns VBox status code.
254	* @param pVM The VM handle.
255	* @param GCPhys The GC physical address to map to a virtual one.
256	* @param ppv Where to store the virtual address. No need to cast this.
257	*
258	* @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
259	* small page window employeed by that function. Be careful.
260	* @remark There is no need to assert on the result.
261	*/
262	#ifdef IN_GC
263	# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMGCDynMapGCPageEx(pVM, GCPhys, (void **)(ppv))
264	#else
265	# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1 /* one page only /, (void )(ppv)) /* @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
266	#endif
267
268	/** @def PGM_INVL_PG
269	* Invalidates a page when in GC does nothing in HC.
270	*
271	* @param GCVirt The virtual address of the page to invalidate.
272	*/
273	#ifdef IN_GC
274	# define PGM_INVL_PG(GCVirt) ASMInvalidatePage((void *)(GCVirt))
275	#else
276	# define PGM_INVL_PG(GCVirt) ((void)0)
277	#endif
278
279	/** @def PGM_INVL_BIG_PG
280	* Invalidates a 4MB page directory entry when in GC does nothing in HC.
281	*
282	* @param GCVirt The virtual address within the page directory to invalidate.
283	*/
284	#ifdef IN_GC
285	# define PGM_INVL_BIG_PG(GCVirt) ASMReloadCR3()
286	#else
287	# define PGM_INVL_BIG_PG(GCVirt) ((void)0)
288	#endif
289
290	/** @def PGM_INVL_GUEST_TLBS()
291	* Invalidates all guest TLBs.
292	*/
293	#ifdef IN_GC
294	# define PGM_INVL_GUEST_TLBS() ASMReloadCR3()
295	#else
296	# define PGM_INVL_GUEST_TLBS() ((void)0)
297	#endif
298
299
300	/**
301	* Structure for tracking GC Mappings.
302	*
303	* This structure is used by linked list in both GC and HC.
304	*/
305	typedef struct PGMMAPPING
306	{
307	/** Pointer to next entry. */
308	R3PTRTYPE(struct PGMMAPPING *) pNextR3;
309	/** Pointer to next entry. */
310	R0PTRTYPE(struct PGMMAPPING *) pNextR0;
311	/** Pointer to next entry. */
312	GCPTRTYPE(struct PGMMAPPING *) pNextGC;
313	/** Start Virtual address. */
314	RTGCUINTPTR GCPtr;
315	/** Last Virtual address (inclusive). */
316	RTGCUINTPTR GCPtrLast;
317	/** Range size (bytes). */
318	RTGCUINTPTR cb;
319	/** Pointer to relocation callback function. */
320	R3PTRTYPE(PFNPGMRELOCATE) pfnRelocate;
321	/** User argument to the callback. */
322	R3PTRTYPE(void *) pvUser;
323	/** Mapping description / name. For easing debugging. */
324	R3PTRTYPE(const char *) pszDesc;
325	/** Number of page tables. */
326	RTUINT cPTs;
327	#if HC_ARCH_BITS != GC_ARCH_BITS
328	RTUINT uPadding0; /*< Alignment padding. /
329	#endif
330	/** Array of page table mapping data. Each entry
331	* describes one page table. The array can be longer
332	* than the declared length.
333	*/
334	struct
335	{
336	/** The HC physical address of the page table. */
337	RTHCPHYS HCPhysPT;
338	/** The HC physical address of the first PAE page table. */
339	RTHCPHYS HCPhysPaePT0;
340	/** The HC physical address of the second PAE page table. */
341	RTHCPHYS HCPhysPaePT1;
342	/** The HC virtual address of the 32-bit page table. */
343	R3PTRTYPE(PVBOXPT) pPTR3;
344	/** The HC virtual address of the two PAE page table. (i.e 1024 entries instead of 512) */
345	R3PTRTYPE(PX86PTPAE) paPaePTsR3;
346	/** The GC virtual address of the 32-bit page table. */
347	GCPTRTYPE(PVBOXPT) pPTGC;
348	/** The GC virtual address of the two PAE page table. */
349	GCPTRTYPE(PX86PTPAE) paPaePTsGC;
350	/** The GC virtual address of the 32-bit page table. */
351	R0PTRTYPE(PVBOXPT) pPTR0;
352	/** The GC virtual address of the two PAE page table. */
353	R0PTRTYPE(PX86PTPAE) paPaePTsR0;
354	} aPTs[1];
355	} PGMMAPPING;
356	/** Pointer to structure for tracking GC Mappings. */
357	typedef struct PGMMAPPING *PPGMMAPPING;
358
359
360	/**
361	* Physical page access handler structure.
362	*
363	* This is used to keep track of physical address ranges
364	* which are being monitored in some kind of way.
365	*/
366	typedef struct PGMPHYSHANDLER
367	{
368	AVLROGCPHYSNODECORE Core;
369	/** Alignment padding. */
370	uint32_t u32Padding;
371	/** Access type. */
372	PGMPHYSHANDLERTYPE enmType;
373	/** Number of pages to update. */
374	uint32_t cPages;
375	/** Pointer to R3 callback function. */
376	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3;
377	/** User argument for R3 handlers. */
378	R3PTRTYPE(void *) pvUserR3;
379	/** Pointer to R0 callback function. */
380	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0;
381	/** User argument for R0 handlers. */
382	R0PTRTYPE(void *) pvUserR0;
383	/** Pointer to GC callback function. */
384	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC;
385	/** User argument for GC handlers. */
386	GCPTRTYPE(void *) pvUserGC;
387	/** Description / Name. For easing debugging. */
388	R3PTRTYPE(const char *) pszDesc;
389	#ifdef VBOX_WITH_STATISTICS
390	/** Profiling of this handler. */
391	STAMPROFILE Stat;
392	#endif
393	} PGMPHYSHANDLER;
394	/** Pointer to a physical page access handler structure. */
395	typedef PGMPHYSHANDLER *PPGMPHYSHANDLER;
396
397
398	/**
399	* Cache node for the physical addresses covered by a virtual handler.
400	*/
401	typedef struct PGMPHYS2VIRTHANDLER
402	{
403	/** Core node for the tree based on physical ranges. */
404	AVLROGCPHYSNODECORE Core;
405	/** Offset from this struct to the PGMVIRTHANDLER structure. */
406	RTGCINTPTR offVirtHandler;
407	/** Offset of the next alias relativer to this one.
408	* Bit 0 is used for indicating whether we're in the tree.
409	* Bit 1 is used for indicating that we're the head node.
410	*/
411	int32_t offNextAlias;
412	} PGMPHYS2VIRTHANDLER;
413	/** Pointer to a phys to virtual handler structure. */
414	typedef PGMPHYS2VIRTHANDLER *PPGMPHYS2VIRTHANDLER;
415
416	/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
417	* node is in the tree. */
418	#define PGMPHYS2VIRTHANDLER_IN_TREE BIT(0)
419	/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
420	* node is in the head of an alias chain.
421	* The PGMPHYS2VIRTHANDLER_IN_TREE is always set if this bit is set. */
422	#define PGMPHYS2VIRTHANDLER_IS_HEAD BIT(1)
423	/** The mask to apply to PGMPHYS2VIRTHANDLER::offNextAlias to get the offset. */
424	#define PGMPHYS2VIRTHANDLER_OFF_MASK (~(int32_t)3)
425
426
427	/**
428	* Virtual page access handler structure.
429	*
430	* This is used to keep track of virtual address ranges
431	* which are being monitored in some kind of way.
432	*/
433	typedef struct PGMVIRTHANDLER
434	{
435	/** Core node for the tree based on virtual ranges. */
436	AVLROGCPTRNODECORE Core;
437	/** Number of cache pages. */
438	uint32_t u32Padding;
439	/** Access type. */
440	PGMVIRTHANDLERTYPE enmType;
441	/** Number of cache pages. */
442	uint32_t cPages;
443
444	/** @todo The next two members are redundant. It adds some readability though. */
445	/** Start of the range. */
446	RTGCPTR GCPtr;
447	/** End of the range (exclusive). */
448	RTGCPTR GCPtrLast;
449	/** Size of the range (in bytes). */
450	RTGCUINTPTR cb;
451	/** Pointer to the GC callback function. */
452	GCPTRTYPE(PFNPGMGCVIRTHANDLER) pfnHandlerGC;
453	/** Pointer to the HC callback function for invalidation. */
454	HCPTRTYPE(PFNPGMHCVIRTINVALIDATE) pfnInvalidateHC;
455	/** Pointer to the HC callback function. */
456	HCPTRTYPE(PFNPGMHCVIRTHANDLER) pfnHandlerHC;
457	/** Description / Name. For easing debugging. */
458	HCPTRTYPE(const char *) pszDesc;
459	#ifdef VBOX_WITH_STATISTICS
460	/** Profiling of this handler. */
461	STAMPROFILE Stat;
462	#endif
463	/** Array of cached physical addresses for the monitored ranged. */
464	PGMPHYS2VIRTHANDLER aPhysToVirt[HC_ARCH_BITS == 32 ? 1 : 2];
465	} PGMVIRTHANDLER;
466	/** Pointer to a virtual page access handler structure. */
467	typedef PGMVIRTHANDLER *PPGMVIRTHANDLER;
468
469
470	/**
471	* A Physical Guest Page tracking structure.
472	*
473	* The format of this structure is complicated because we have to fit a lot
474	* of information into as few bits as possible. The format is also subject
475	* to change (there is one comming up soon). Which means that for we'll be
476	* using PGM_PAGE_GET_* and PGM_PAGE_SET_* macros for all accessess to the
477	* structure.
478	*/
479	typedef struct PGMPAGE
480	{
481	/** The physical address and a whole lot of other stuff. All bits are used! */
482	RTHCPHYS HCPhys;
483	uint32_t u32A;
484	uint32_t u32B;
485	} PGMPAGE;
486	/** Pointer to a physical guest page. */
487	typedef PGMPAGE *PPGMPAGE;
488	/** Pointer to a const physical guest page. */
489	typedef const PGMPAGE *PCPGMPAGE;
490	/** Pointer to a physical guest page pointer. */
491	typedef PPGMPAGE *PPPGMPAGE;
492
493
494	/**
495	* Gets the host physical address of the guest page.
496	* @returns host physical address (RTHCPHYS).
497	* @param pPage Pointer to the physical guest page tracking structure.
498	*/
499	#define PGM_PAGE_GET_HCPHYS(pPage) ( (pPage)->HCPhys & UINT64_C(0x0000fffffffff000) )
500
501	/**
502	* Checks if the page is 'reserved'.
503	* @returns true/false.
504	* @param pPage Pointer to the physical guest page tracking structure.
505	*/
506	#define PGM_PAGE_IS_RESERVED(pPage) ( !!((pPage)->HCPhys & MM_RAM_FLAGS_RESERVED) )
507
508
509	/**
510	* Ram range for GC Phys to HC Phys conversion.
511	*
512	* Can be used for HC Virt to GC Phys and HC Virt to HC Phys
513	* conversions too, but we'll let MM handle that for now.
514	*
515	* This structure is used by linked lists in both GC and HC.
516	*/
517	typedef struct PGMRAMRANGE
518	{
519	/** Pointer to the next RAM range - for HC. */
520	HCPTRTYPE(struct PGMRAMRANGE *) pNextHC;
521	/** Pointer to the next RAM range - for GC. */
522	GCPTRTYPE(struct PGMRAMRANGE *) pNextGC;
523	/** Start of the range. Page aligned. */
524	RTGCPHYS GCPhys;
525	/** Last address in the range (inclusive). Page aligned (-1). */
526	RTGCPHYS GCPhysLast;
527	/** Size of the range. (Page aligned of course). */
528	RTGCPHYS cb;
529	/** MM_RAM_* flags */
530	uint32_t fFlags;
531
532	/** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
533	GCPTRTYPE(PRTHCPTR) pavHCChunkGC;
534	/** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
535	HCPTRTYPE(PRTHCPTR) pavHCChunkHC;
536
537	/** Start of the HC mapping of the range.
538	* For pure MMIO and dynamically allocated ranges this is NULL, while for all ranges this is a valid pointer. */
539	HCPTRTYPE(void *) pvHC;
540
541	/** Array of physical guest page tracking structures. */
542	PGMPAGE aPages[1];
543	} PGMRAMRANGE;
544	/** Pointer to Ram range for GC Phys to HC Phys conversion. */
545	typedef PGMRAMRANGE *PPGMRAMRANGE;
546
547	/** Return hc ptr corresponding to the ram range and physical offset */
548	#define PGMRAMRANGE_GETHCPTR(pRam, off) \
549	(pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC) ? (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[(off >> PGM_DYNAMIC_CHUNK_SHIFT)] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK)) \
550	: (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
551
552	/** @todo r=bird: fix typename. */
553	/**
554	* PGMPhysRead/Write cache entry
555	*/
556	typedef struct PGMPHYSCACHE_ENTRY
557	{
558	/** HC pointer to physical page */
559	R3PTRTYPE(uint8_t *) pbHC;
560	/** GC Physical address for cache entry */
561	RTGCPHYS GCPhys;
562	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
563	RTGCPHYS u32Padding0; /*< alignment padding. /
564	#endif
565	} PGMPHYSCACHE_ENTRY;
566
567	/**
568	* PGMPhysRead/Write cache to reduce REM memory access overhead
569	*/
570	typedef struct PGMPHYSCACHE
571	{
572	/** Bitmap of valid cache entries */
573	uint64_t aEntries;
574	/** Cache entries */
575	PGMPHYSCACHE_ENTRY Entry[PGM_MAX_PHYSCACHE_ENTRIES];
576	} PGMPHYSCACHE;
577
578
579	/** Pointer to an allocation chunk ring-3 mapping. */
580	typedef struct PGMCHUNKR3MAP *PPGMCHUNKR3MAP;
581	/** Pointer to an allocation chunk ring-3 mapping pointer. */
582	typedef PPGMCHUNKR3MAP *PPPGMCHUNKR3MAP;
583
584	/**
585	* Ring-3 tracking structore for an allocation chunk ring-3 mapping.
586	*
587	* The primary tree (Core) uses the chunk id as key.
588	* The secondary tree (AgeCore) is used for ageing and uses ageing sequence number as key.
589	*/
590	typedef struct PGMCHUNKR3MAP
591	{
592	/** The key is the chunk id. */
593	AVLU32NODECORE Core;
594	/** The key is the ageing sequence number. */
595	AVLLU32NODECORE AgeCore;
596	/** The current age thingy. */
597	uint32_t iAge;
598	/** The current reference count. */
599	uint32_t volatile cRefs;
600	/** The current permanent reference count. */
601	uint32_t volatile cPermRefs;
602	/** The mapping address. */
603	void *pv;
604	} PGMCHUNKR3MAP;
605
606	/**
607	* Allocation chunk ring-3 mapping TLB entry.
608	*/
609	typedef struct PGMCHUNKR3MAPTLBE
610	{
611	/** The chunk id. */
612	uint32_t idChunk;
613	#if HC_ARCH_BITS == 64
614	uint32_t u32Padding; /*< alignment padding. /
615	#endif
616	/** The chunk map. */
617	HCPTRTYPE(PPGMCHUNKR3MAP) pChunk;
618	} PGMCHUNKR3MAPTLBE;
619	/** Pointer to the an allocation chunk ring-3 mapping TLB entry. */
620	typedef PGMCHUNKR3MAPTLBE *PPGMCHUNKR3MAPTLBE;
621
622	/** The number of TLB entries in PGMCHUNKR3TLB. */
623	#define PGMCHUNKR3MAPTLB_ENTRIES 32
624
625	/**
626	* Allocation chunk ring-3 mapping TLB.
627	*
628	* @remarks We use a TLB to speed up lookups by avoiding walking the AVL.
629	* At first glance this might look kinda odd since AVL trees are
630	* supposed to give the most optimial lookup times of all trees
631	* due to their balancing. However, take a tree with 1023 nodes
632	* in it, that's 10 levels, meaning that most searches has to go
633	* down 9 levels before they find what they want. This isn't fast
634	* compared to a TLB hit. There is the factor of cache misses,
635	* and of course the problem with trees and branch prediction.
636	* This is why we use TLBs in front of most of the trees.
637	*
638	* @todo Generalize this TLB + AVL stuff, shouldn't be all that
639	* difficult when we switch to inlined AVL trees (from kStuff).
640	*/
641	typedef struct PGMCHUNKR3MAPTLB
642	{
643	/** The TLB entries. */
644	PGMCHUNKR3MAPTLBE aEntries[PGMCHUNKR3MAPTLB_ENTRIES];
645	} PGMCHUNKR3MAPTLB;
646
647
648	/**
649	* Ring-3 guest page mapping TLB entry.
650	* @remarks used in ring-0 as well at the moment.
651	*/
652	typedef struct PGMPAGER3MAPTLBE
653	{
654	/** The page id. */
655	uint32_t idPage;
656	#if HC_ARCH_BITS == 64
657	uint32_t u32Padding; /*< alignment padding. /
658	#endif
659	/** The guest page. */
660	HCPTRTYPE(PPGMPAGE) pPage;
661	/** Pointer to the page mapping tracking structure, PGMCHUNKR3MAP. */
662	HCPTRTYPE(PPGMCHUNKR3MAP) pMap;
663	/** The address */
664	HCPTRTYPE(void *) pv;
665	} PGMPAGER3MAPTLBE;
666	/** Pointer to an entry in the HC physical TLB. */
667	typedef PGMPAGER3MAPTLBE *PPGMPAGER3MAPTLBE;
668
669
670	/** The number of entries in the ring-3 guest page mapping TLB. */
671	#define PGMPAGER3MAPTLB_ENTRIES 64
672
673	/**
674	* Ring-3 guest page mapping TLB.
675	* @remarks used in ring-0 as well at the moment.
676	*/
677	typedef struct PGMPAGER3MAPTLB
678	{
679	/** The TLB entries. */
680	PGMPAGER3MAPTLBE aEntries[PGMPAGER3MAPTLB_ENTRIES];
681	} PGMPAGER3MAPTLB;
682	/** Pointer to the ring-3 guest page mapping TLB. */
683	typedef PGMPAGER3MAPTLB *PPGMPAGER3MAPTLB;
684
685
686
687
688	/** @name PGM Pool Indexes.
689	* Aka. the unique shadow page identifier.
690	* @{ */
691	/** NIL page pool IDX. */
692	#define NIL_PGMPOOL_IDX 0
693	/** The first normal index. */
694	#define PGMPOOL_IDX_FIRST_SPECIAL 1
695	/** Page directory (32-bit root). */
696	#define PGMPOOL_IDX_PD 1
697	/** The extended PAE page directory (2048 entries, works as root currently). */
698	#define PGMPOOL_IDX_PAE_PD 2
699	/** Page Directory Pointer Table (PAE root, not currently used). */
700	#define PGMPOOL_IDX_PDPTR 3
701	/** Page Map Level-4 (64-bit root). */
702	#define PGMPOOL_IDX_PML4 4
703	/** The first normal index. */
704	#define PGMPOOL_IDX_FIRST 5
705	/** The last valid index. (inclusive, 14 bits) */
706	#define PGMPOOL_IDX_LAST 0x3fff
707	/** @} */
708
709	/** The NIL index for the parent chain. */
710	#define NIL_PGMPOOL_USER_INDEX ((uint16_t)0xffff)
711
712	/**
713	* Node in the chain linking a shadowed page to it's parent (user).
714	*/
715	#pragma pack(1)
716	typedef struct PGMPOOLUSER
717	{
718	/** The index to the next item in the chain. NIL_PGMPOOL_USER_INDEX is no next. */
719	uint16_t iNext;
720	/** The user page index. */
721	uint16_t iUser;
722	/** Index into the user table. */
723	uint16_t iUserTable;
724	} PGMPOOLUSER, *PPGMPOOLUSER;
725	typedef const PGMPOOLUSER *PCPGMPOOLUSER;
726	#pragma pack()
727
728
729	/** The NIL index for the phys ext chain. */
730	#define NIL_PGMPOOL_PHYSEXT_INDEX ((uint16_t)0xffff)
731
732	/**
733	* Node in the chain of physical cross reference extents.
734	*/
735	#pragma pack(1)
736	typedef struct PGMPOOLPHYSEXT
737	{
738	/** The index to the next item in the chain. NIL_PGMPOOL_PHYSEXT_INDEX is no next. */
739	uint16_t iNext;
740	/** The user page index. */
741	uint16_t aidx[3];
742	} PGMPOOLPHYSEXT, *PPGMPOOLPHYSEXT;
743	typedef const PGMPOOLPHYSEXT *PCPGMPOOLPHYSEXT;
744	#pragma pack()
745
746
747	/**
748	* The kind of page that's being shadowed.
749	*/
750	typedef enum PGMPOOLKIND
751	{
752	/** The virtual invalid 0 entry. */
753	PGMPOOLKIND_INVALID = 0,
754	/** The entry is free (=unused). */
755	PGMPOOLKIND_FREE,
756
757	/** Shw: 32-bit page table; Gst: no paging */
758	PGMPOOLKIND_32BIT_PT_FOR_PHYS,
759	/** Shw: 32-bit page table; Gst: 32-bit page table. */
760	PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT,
761	/** Shw: 32-bit page table; Gst: 4MB page. */
762	PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB,
763	/** Shw: PAE page table; Gst: no paging */
764	PGMPOOLKIND_PAE_PT_FOR_PHYS,
765	/** Shw: PAE page table; Gst: 32-bit page table. */
766	PGMPOOLKIND_PAE_PT_FOR_32BIT_PT,
767	/** Shw: PAE page table; Gst: Half of a 4MB page. */
768	PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB,
769	/** Shw: PAE page table; Gst: PAE page table. */
770	PGMPOOLKIND_PAE_PT_FOR_PAE_PT,
771	/** Shw: PAE page table; Gst: 2MB page. */
772	PGMPOOLKIND_PAE_PT_FOR_PAE_2MB,
773
774	/** Shw: PAE page directory; Gst: 32-bit page directory. */
775	PGMPOOLKIND_PAE_PD_FOR_32BIT_PD,
776	/** Shw: PAE page directory; Gst: PAE page directory. */
777	PGMPOOLKIND_PAE_PD_FOR_PAE_PD,
778
779	/** Shw: 64-bit page directory pointer table; Gst: 64-bit page directory pointer table. */
780	PGMPOOLKIND_64BIT_PDPTR_FOR_64BIT_PDPTR,
781
782	/** Shw: Root 32-bit page directory. */
783	PGMPOOLKIND_ROOT_32BIT_PD,
784	/** Shw: Root PAE page directory */
785	PGMPOOLKIND_ROOT_PAE_PD,
786	/** Shw: Root PAE page directory pointer table (legacy, 4 entries). */
787	PGMPOOLKIND_ROOT_PDPTR,
788	/** Shw: Root page map level-4 table. */
789	PGMPOOLKIND_ROOT_PML4,
790
791	/** The last valid entry. */
792	PGMPOOLKIND_LAST = PGMPOOLKIND_ROOT_PML4
793	} PGMPOOLKIND;
794
795
796	/**
797	* The tracking data for a page in the pool.
798	*/
799	typedef struct PGMPOOLPAGE
800	{
801	/** AVL node code with the (HC) physical address of this page. */
802	AVLOHCPHYSNODECORE Core;
803	/** Pointer to the HC mapping of the page. */
804	HCPTRTYPE(void *) pvPageHC;
805	/** The guest physical address. */
806	RTGCPHYS GCPhys;
807	/** The kind of page we're shadowing. (This is really a PGMPOOLKIND enum.) */
808	uint8_t enmKind;
809	uint8_t bPadding;
810	/** The index of this page. */
811	uint16_t idx;
812	/** The next entry in the list this page currently resides in.
813	* It's either in the free list or in the GCPhys hash. */
814	uint16_t iNext;
815	#ifdef PGMPOOL_WITH_USER_TRACKING
816	/** Head of the user chain. NIL_PGMPOOL_USER_INDEX if not currently in use. */
817	uint16_t iUserHead;
818	/** The number of present entries. */
819	uint16_t cPresent;
820	/** The first entry in the table which is present. */
821	uint16_t iFirstPresent;
822	#endif
823	#ifdef PGMPOOL_WITH_MONITORING
824	/** The number of modifications to the monitored page. */
825	uint16_t cModifications;
826	/** The next modified page. NIL_PGMPOOL_IDX if tail. */
827	uint16_t iModifiedNext;
828	/** The previous modified page. NIL_PGMPOOL_IDX if head. */
829	uint16_t iModifiedPrev;
830	/** The next page sharing access handler. NIL_PGMPOOL_IDX if tail. */
831	uint16_t iMonitoredNext;
832	/** The previous page sharing access handler. NIL_PGMPOOL_IDX if head. */
833	uint16_t iMonitoredPrev;
834	#endif
835	#ifdef PGMPOOL_WITH_CACHE
836	/** The next page in the age list. */
837	uint16_t iAgeNext;
838	/** The previous page in the age list. */
839	uint16_t iAgePrev;
840	#endif /* PGMPOOL_WITH_CACHE */
841	/** Used to indicate that the page is zeroed. */
842	bool fZeroed;
843	/** Used to indicate that a PT has non-global entries. */
844	bool fSeenNonGlobal;
845	/** Used to indicate that we're monitoring writes to the guest page. */
846	bool fMonitored;
847	/** Used to indicate that the page is in the cache (e.g. in the GCPhys hash).
848	* (All pages are in the age list.) */
849	bool fCached;
850	/** This is used by the R3 access handlers when invoked by an async thread.
851	* It's a hack required because of REMR3NotifyHandlerPhysicalDeregister. */
852	bool volatile fReusedFlushPending;
853	/** Used to indicate that the guest is mapping the page is also used as a CR3.
854	* In these cases the access handler acts differently and will check
855	* for mapping conflicts like the normal CR3 handler.
856	* @todo When we change the CR3 shadowing to use pool pages, this flag can be
857	* replaced by a list of pages which share access handler.
858	*/
859	bool fCR3Mix;
860	#if HC_ARCH_BITS == 64 \|\| GC_ARCH_BITS == 64
861	bool Alignment[4]; /*< Align the structure size on a 64-bit boundrary. /
862	#endif
863	} PGMPOOLPAGE, PPGMPOOLPAGE, *PPPGMPOOLPAGE;
864
865
866	#ifdef PGMPOOL_WITH_CACHE
867	/** The hash table size. */
868	# define PGMPOOL_HASH_SIZE 0x40
869	/** The hash function. */
870	# define PGMPOOL_HASH(GCPhys) ( ((GCPhys) >> PAGE_SHIFT) & (PGMPOOL_HASH_SIZE - 1) )
871	#endif
872
873
874	/**
875	* The shadow page pool instance data.
876	*
877	* It's all one big allocation made at init time, except for the
878	* pages that is. The user nodes follows immediatly after the
879	* page structures.
880	*/
881	typedef struct PGMPOOL
882	{
883	/** The VM handle - HC Ptr. */
884	HCPTRTYPE(PVM) pVMHC;
885	/** The VM handle - GC Ptr. */
886	GCPTRTYPE(PVM) pVMGC;
887	/** The max pool size. This includes the special IDs. */
888	uint16_t cMaxPages;
889	/** The current pool size. */
890	uint16_t cCurPages;
891	/** The head of the free page list. */
892	uint16_t iFreeHead;
893	/* Padding. */
894	uint16_t u16Padding;
895	#ifdef PGMPOOL_WITH_USER_TRACKING
896	/** Head of the chain of free user nodes. */
897	uint16_t iUserFreeHead;
898	/** The number of user nodes we've allocated. */
899	uint16_t cMaxUsers;
900	/** The number of present page table entries in the entire pool. */
901	uint32_t cPresent;
902	/** Pointer to the array of user nodes - GC pointer. */
903	GCPTRTYPE(PPGMPOOLUSER) paUsersGC;
904	/** Pointer to the array of user nodes - HC pointer. */
905	HCPTRTYPE(PPGMPOOLUSER) paUsersHC;
906	#endif /* PGMPOOL_WITH_USER_TRACKING */
907	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
908	/** Head of the chain of free phys ext nodes. */
909	uint16_t iPhysExtFreeHead;
910	/** The number of user nodes we've allocated. */
911	uint16_t cMaxPhysExts;
912	/** Pointer to the array of physical xref extent - GC pointer. */
913	GCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsGC;
914	/** Pointer to the array of physical xref extent nodes - HC pointer. */
915	HCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsHC;
916	#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
917	#ifdef PGMPOOL_WITH_CACHE
918	/** Hash table for GCPhys addresses. */
919	uint16_t aiHash[PGMPOOL_HASH_SIZE];
920	/** The head of the age list. */
921	uint16_t iAgeHead;
922	/** The tail of the age list. */
923	uint16_t iAgeTail;
924	/** Set if the cache is enabled. */
925	bool fCacheEnabled;
926	#endif /* PGMPOOL_WITH_CACHE */
927	#ifdef PGMPOOL_WITH_MONITORING
928	/** Head of the list of modified pages. */
929	uint16_t iModifiedHead;
930	/** The current number of modified pages. */
931	uint16_t cModifiedPages;
932	/** Access handler, GC. */
933	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnAccessHandlerGC;
934	/** Access handler, R0. */
935	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnAccessHandlerR0;
936	/** Access handler, R3. */
937	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnAccessHandlerR3;
938	/** The access handler description (HC ptr). */
939	R3PTRTYPE(const char *) pszAccessHandler;
940	#endif /* PGMPOOL_WITH_MONITORING */
941	/** The number of pages currently in use. */
942	uint16_t cUsedPages;
943	#ifdef VBOX_WITH_STATISTICS
944	/** The high wather mark for cUsedPages. */
945	uint16_t cUsedPagesHigh;
946	uint32_t Alignment1; /*< Align the next member on a 64-bit boundrary. /
947	/** Profiling pgmPoolAlloc(). */
948	STAMPROFILEADV StatAlloc;
949	/** Profiling pgmPoolClearAll(). */
950	STAMPROFILE StatClearAll;
951	/** Profiling pgmPoolFlushAllInt(). */
952	STAMPROFILE StatFlushAllInt;
953	/** Profiling pgmPoolFlushPage(). */
954	STAMPROFILE StatFlushPage;
955	/** Profiling pgmPoolFree(). */
956	STAMPROFILE StatFree;
957	/** Profiling time spent zeroing pages. */
958	STAMPROFILE StatZeroPage;
959	# ifdef PGMPOOL_WITH_USER_TRACKING
960	/** Profiling of pgmPoolTrackDeref. */
961	STAMPROFILE StatTrackDeref;
962	/** Profiling pgmTrackFlushGCPhysPT. */
963	STAMPROFILE StatTrackFlushGCPhysPT;
964	/** Profiling pgmTrackFlushGCPhysPTs. */
965	STAMPROFILE StatTrackFlushGCPhysPTs;
966	/** Profiling pgmTrackFlushGCPhysPTsSlow. */
967	STAMPROFILE StatTrackFlushGCPhysPTsSlow;
968	/** Number of times we've been out of user records. */
969	STAMCOUNTER StatTrackFreeUpOneUser;
970	# endif
971	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
972	/** Profiling deref activity related tracking GC physical pages. */
973	STAMPROFILE StatTrackDerefGCPhys;
974	/** Number of linear searches for a HCPhys in the ram ranges. */
975	STAMCOUNTER StatTrackLinearRamSearches;
976	/** The number of failing pgmPoolTrackPhysExtAlloc calls. */
977	STAMCOUNTER StamTrackPhysExtAllocFailures;
978	# endif
979	# ifdef PGMPOOL_WITH_MONITORING
980	/** Profiling the GC PT access handler. */
981	STAMPROFILE StatMonitorGC;
982	/** Times we've failed interpreting the instruction. */
983	STAMCOUNTER StatMonitorGCEmulateInstr;
984	/** Profiling the pgmPoolFlushPage calls made from the GC PT access handler. */
985	STAMPROFILE StatMonitorGCFlushPage;
986	/** Times we've detected fork(). */
987	STAMCOUNTER StatMonitorGCFork;
988	/** Profiling the GC access we've handled (except REP STOSD). */
989	STAMPROFILE StatMonitorGCHandled;
990	/** Times we've failed interpreting a patch code instruction. */
991	STAMCOUNTER StatMonitorGCIntrFailPatch1;
992	/** Times we've failed interpreting a patch code instruction during flushing. */
993	STAMCOUNTER StatMonitorGCIntrFailPatch2;
994	/** The number of times we've seen rep prefixes we can't handle. */
995	STAMCOUNTER StatMonitorGCRepPrefix;
996	/** Profiling the REP STOSD cases we've handled. */
997	STAMPROFILE StatMonitorGCRepStosd;
998
999	/** Profiling the HC PT access handler. */
1000	STAMPROFILE StatMonitorHC;
1001	/** Times we've failed interpreting the instruction. */
1002	STAMCOUNTER StatMonitorHCEmulateInstr;
1003	/** Profiling the pgmPoolFlushPage calls made from the HC PT access handler. */
1004	STAMPROFILE StatMonitorHCFlushPage;
1005	/** Times we've detected fork(). */
1006	STAMCOUNTER StatMonitorHCFork;
1007	/** Profiling the HC access we've handled (except REP STOSD). */
1008	STAMPROFILE StatMonitorHCHandled;
1009	/** The number of times we've seen rep prefixes we can't handle. */
1010	STAMCOUNTER StatMonitorHCRepPrefix;
1011	/** Profiling the REP STOSD cases we've handled. */
1012	STAMPROFILE StatMonitorHCRepStosd;
1013	/** The number of times we're called in an async thread an need to flush. */
1014	STAMCOUNTER StatMonitorHCAsync;
1015	/** The high wather mark for cModifiedPages. */
1016	uint16_t cModifiedPagesHigh;
1017	uint16_t Alignment2[3]; /*< Align the next member on a 64-bit boundrary. /
1018	# endif
1019	# ifdef PGMPOOL_WITH_CACHE
1020	/** The number of cache hits. */
1021	STAMCOUNTER StatCacheHits;
1022	/** The number of cache misses. */
1023	STAMCOUNTER StatCacheMisses;
1024	/** The number of times we've got a conflict of 'kind' in the cache. */
1025	STAMCOUNTER StatCacheKindMismatches;
1026	/** Number of times we've been out of pages. */
1027	STAMCOUNTER StatCacheFreeUpOne;
1028	/** The number of cacheable allocations. */
1029	STAMCOUNTER StatCacheCacheable;
1030	/** The number of uncacheable allocations. */
1031	STAMCOUNTER StatCacheUncacheable;
1032	# endif
1033	#elif HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1034	uint32_t Alignment1; /*< Align the next member on a 64-bit boundrary. /
1035	#endif
1036	/** The AVL tree for looking up a page by its HC physical address. */
1037	AVLOHCPHYSTREE HCPhysTree;
1038	uint32_t Alignment3; /*< Align the next member on a 64-bit boundrary. /
1039	/** Array of pages. (cMaxPages in length)
1040	* The Id is the index into thist array.
1041	*/
1042	PGMPOOLPAGE aPages[PGMPOOL_IDX_FIRST];
1043	} PGMPOOL, PPGMPOOL, *PPPGMPOOL;
1044
1045
1046	/** @def PGMPOOL_PAGE_2_PTR
1047	* Maps a pool page pool into the current context.
1048	*
1049	* @returns VBox status code.
1050	* @param pVM The VM handle.
1051	* @param pPage The pool page.
1052	*
1053	* @remark In HC this uses PGMGCDynMapHCPage(), so it will consume of the
1054	* small page window employeed by that function. Be careful.
1055	* @remark There is no need to assert on the result.
1056	*/
1057	#ifdef IN_GC
1058	# define PGMPOOL_PAGE_2_PTR(pVM, pPage) pgmGCPoolMapPage((pVM), (pPage))
1059	#else
1060	# define PGMPOOL_PAGE_2_PTR(pVM, pPage) ((pPage)->pvPageHC)
1061	#endif
1062
1063
1064	/**
1065	* Trees are using self relative offsets as pointers.
1066	* So, all its data, including the root pointer, must be in the heap for HC and GC
1067	* to have the same layout.
1068	*/
1069	typedef struct PGMTREES
1070	{
1071	/** Physical access handlers (AVL range+offsetptr tree). */
1072	AVLROGCPHYSTREE PhysHandlers;
1073	/** Virtual access handlers (AVL range + GC ptr tree). */
1074	AVLROGCPTRTREE VirtHandlers;
1075	/** Virtual access handlers (Phys range AVL range + offsetptr tree). */
1076	AVLROGCPHYSTREE PhysToVirtHandlers;
1077	uint32_t auPadding[1];
1078	} PGMTREES;
1079	/** Pointer to PGM trees. */
1080	typedef PGMTREES *PPGMTREES;
1081
1082
1083	/** @name Paging mode macros
1084	* @{ */
1085	#ifdef IN_GC
1086	# define PGM_CTX(a,b) a##GC##b
1087	# define PGM_CTX_STR(a,b) a "GC" b
1088	# define PGM_CTX_DECL(type) PGMGCDECL(type)
1089	#else
1090	# ifdef IN_RING3
1091	# define PGM_CTX(a,b) a##R3##b
1092	# define PGM_CTX_STR(a,b) a "R3" b
1093	# define PGM_CTX_DECL(type) DECLCALLBACK(type)
1094	# else
1095	# define PGM_CTX(a,b) a##R0##b
1096	# define PGM_CTX_STR(a,b) a "R0" b
1097	# define PGM_CTX_DECL(type) PGMDECL(type)
1098	# endif
1099	#endif
1100
1101	#define PGM_GST_NAME_REAL(name) PGM_CTX(pgm,GstReal##name)
1102	#define PGM_GST_NAME_GC_REAL_STR(name) "pgmGCGstReal" #name
1103	#define PGM_GST_NAME_R0_REAL_STR(name) "pgmR0GstReal" #name
1104	#define PGM_GST_NAME_PROT(name) PGM_CTX(pgm,GstProt##name)
1105	#define PGM_GST_NAME_GC_PROT_STR(name) "pgmGCGstProt" #name
1106	#define PGM_GST_NAME_R0_PROT_STR(name) "pgmR0GstProt" #name
1107	#define PGM_GST_NAME_32BIT(name) PGM_CTX(pgm,Gst32Bit##name)
1108	#define PGM_GST_NAME_GC_32BIT_STR(name) "pgmGCGst32Bit" #name
1109	#define PGM_GST_NAME_R0_32BIT_STR(name) "pgmR0Gst32Bit" #name
1110	#define PGM_GST_NAME_PAE(name) PGM_CTX(pgm,GstPAE##name)
1111	#define PGM_GST_NAME_GC_PAE_STR(name) "pgmGCGstPAE" #name
1112	#define PGM_GST_NAME_R0_PAE_STR(name) "pgmR0GstPAE" #name
1113	#define PGM_GST_NAME_AMD64(name) PGM_CTX(pgm,GstAMD64##name)
1114	#define PGM_GST_NAME_GC_AMD64_STR(name) "pgmGCGstAMD64" #name
1115	#define PGM_GST_NAME_R0_AMD64_STR(name) "pgmR0GstAMD64" #name
1116	#define PGM_GST_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Gst##name))
1117	#define PGM_GST_DECL(type, name) PGM_CTX_DECL(type) PGM_GST_NAME(name)
1118
1119	#define PGM_SHW_NAME_32BIT(name) PGM_CTX(pgm,Shw32Bit##name)
1120	#define PGM_SHW_NAME_GC_32BIT_STR(name) "pgmGCShw32Bit" #name
1121	#define PGM_SHW_NAME_R0_32BIT_STR(name) "pgmR0Shw32Bit" #name
1122	#define PGM_SHW_NAME_PAE(name) PGM_CTX(pgm,ShwPAE##name)
1123	#define PGM_SHW_NAME_GC_PAE_STR(name) "pgmGCShwPAE" #name
1124	#define PGM_SHW_NAME_R0_PAE_STR(name) "pgmR0ShwPAE" #name
1125	#define PGM_SHW_NAME_AMD64(name) PGM_CTX(pgm,ShwAMD64##name)
1126	#define PGM_SHW_NAME_GC_AMD64_STR(name) "pgmGCShwAMD64" #name
1127	#define PGM_SHW_NAME_R0_AMD64_STR(name) "pgmR0ShwAMD64" #name
1128	#define PGM_SHW_DECL(type, name) PGM_CTX_DECL(type) PGM_SHW_NAME(name)
1129	#define PGM_SHW_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Shw##name))
1130
1131	/* Shw_Gst */
1132	#define PGM_BTH_NAME_32BIT_REAL(name) PGM_CTX(pgm,Bth32BitReal##name)
1133	#define PGM_BTH_NAME_32BIT_PROT(name) PGM_CTX(pgm,Bth32BitProt##name)
1134	#define PGM_BTH_NAME_32BIT_32BIT(name) PGM_CTX(pgm,Bth32Bit32Bit##name)
1135	#define PGM_BTH_NAME_PAE_REAL(name) PGM_CTX(pgm,BthPAEReal##name)
1136	#define PGM_BTH_NAME_PAE_PROT(name) PGM_CTX(pgm,BthPAEProt##name)
1137	#define PGM_BTH_NAME_PAE_32BIT(name) PGM_CTX(pgm,BthPAE32Bit##name)
1138	#define PGM_BTH_NAME_PAE_PAE(name) PGM_CTX(pgm,BthPAEPAE##name)
1139	#define PGM_BTH_NAME_AMD64_REAL(name) PGM_CTX(pgm,BthAMD64Real##name)
1140	#define PGM_BTH_NAME_AMD64_PROT(name) PGM_CTX(pgm,BthAMD64Prot##name)
1141	#define PGM_BTH_NAME_AMD64_AMD64(name) PGM_CTX(pgm,BthAMD64AMD64##name)
1142	#define PGM_BTH_NAME_GC_32BIT_REAL_STR(name) "pgmGCBth32BitReal" #name
1143	#define PGM_BTH_NAME_GC_32BIT_PROT_STR(name) "pgmGCBth32BitProt" #name
1144	#define PGM_BTH_NAME_GC_32BIT_32BIT_STR(name) "pgmGCBth32Bit32Bit" #name
1145	#define PGM_BTH_NAME_GC_PAE_REAL_STR(name) "pgmGCBthPAEReal" #name
1146	#define PGM_BTH_NAME_GC_PAE_PROT_STR(name) "pgmGCBthPAEProt" #name
1147	#define PGM_BTH_NAME_GC_PAE_32BIT_STR(name) "pgmGCBthPAE32Bit" #name
1148	#define PGM_BTH_NAME_GC_PAE_PAE_STR(name) "pgmGCBthPAEPAE" #name
1149	#define PGM_BTH_NAME_GC_AMD64_REAL_STR(name) "pgmGCBthAMD64Real" #name
1150	#define PGM_BTH_NAME_GC_AMD64_PROT_STR(name) "pgmGCBthAMD64Prot" #name
1151	#define PGM_BTH_NAME_GC_AMD64_AMD64_STR(name) "pgmGCBthAMD64AMD64" #name
1152	#define PGM_BTH_NAME_R0_32BIT_REAL_STR(name) "pgmR0Bth32BitReal" #name
1153	#define PGM_BTH_NAME_R0_32BIT_PROT_STR(name) "pgmR0Bth32BitProt" #name
1154	#define PGM_BTH_NAME_R0_32BIT_32BIT_STR(name) "pgmR0Bth32Bit32Bit" #name
1155	#define PGM_BTH_NAME_R0_PAE_REAL_STR(name) "pgmR0BthPAEReal" #name
1156	#define PGM_BTH_NAME_R0_PAE_PROT_STR(name) "pgmR0BthPAEProt" #name
1157	#define PGM_BTH_NAME_R0_PAE_32BIT_STR(name) "pgmR0BthPAE32Bit" #name
1158	#define PGM_BTH_NAME_R0_PAE_PAE_STR(name) "pgmR0BthPAEPAE" #name
1159	#define PGM_BTH_NAME_R0_AMD64_REAL_STR(name) "pgmR0BthAMD64Real" #name
1160	#define PGM_BTH_NAME_R0_AMD64_PROT_STR(name) "pgmR0BthAMD64Prot" #name
1161	#define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name) "pgmR0BthAMD64AMD64" #name
1162	#define PGM_BTH_DECL(type, name) PGM_CTX_DECL(type) PGM_BTH_NAME(name)
1163	#define PGM_BTH_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Bth##name))
1164	/** @} */
1165
1166	/**
1167	* Data for each paging mode.
1168	*/
1169	typedef struct PGMMODEDATA
1170	{
1171	/** The guest mode type. */
1172	uint32_t uGstType;
1173	/** The shadow mode type. */
1174	uint32_t uShwType;
1175
1176	/** @name Function pointers for Shadow paging.
1177	* @{
1178	*/
1179	DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1180	DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1181	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1182	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1183	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1184	DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1185	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1186
1187	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1188	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1189	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1190	DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1191	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1192
1193	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1194	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1195	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1196	DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1197	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1198	/** @} */
1199
1200	/** @name Function pointers for Guest paging.
1201	* @{
1202	*/
1203	DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1204	DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1205	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1206	DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1207	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1208	DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1209	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1210	DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1211	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1212	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHCGstWriteHandlerCR3;
1213	R3PTRTYPE(const char *) pszHCGstWriteHandlerCR3;
1214
1215	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1216	DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1217	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1218	DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1219	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1220	DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1221	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1222	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1223
1224	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1225	DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1226	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1227	DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1228	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1229	DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1230	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1231	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnR0GstWriteHandlerCR3;
1232	/** @} */
1233
1234	/** @name Function pointers for Both Shadow and Guest paging.
1235	* @{
1236	*/
1237	DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1238	DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1239	DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1240	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1241	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1242	DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1243	DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1244	#ifdef VBOX_STRICT
1245	DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1246	#endif
1247
1248	DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1249	DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1250	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1251	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1252	DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1253	DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1254	#ifdef VBOX_STRICT
1255	DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1256	#endif
1257
1258	DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1259	DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1260	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1261	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1262	DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1263	DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1264	#ifdef VBOX_STRICT
1265	DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1266	#endif
1267	/** @} */
1268	} PGMMODEDATA, *PPGMMODEDATA;
1269
1270
1271
1272	/**
1273	* Converts a PGM pointer into a VM pointer.
1274	* @returns Pointer to the VM structure the PGM is part of.
1275	* @param pPGM Pointer to PGM instance data.
1276	*/
1277	#define PGM2VM(pPGM) ( (PVM)((char*)pPGM - pPGM->offVM) )
1278
1279	/**
1280	* PGM Data (part of VM)
1281	*/
1282	typedef struct PGM
1283	{
1284	/** Offset to the VM structure. */
1285	RTINT offVM;
1286
1287	/*
1288	* This will be redefined at least two more times before we're done, I'm sure.
1289	* The current code is only to get on with the coding.
1290	* - 2004-06-10: initial version, bird.
1291	* - 2004-07-02: 1st time, bird.
1292	* - 2004-10-18: 2nd time, bird.
1293	* - 2005-07-xx: 3rd time, bird.
1294	*/
1295
1296	/** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1297	GCPTRTYPE(PX86PTE) paDynPageMap32BitPTEsGC;
1298	/** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1299	GCPTRTYPE(PX86PTEPAE) paDynPageMapPaePTEsGC;
1300
1301	/** The host paging mode. (This is what SUPLib reports.) */
1302	SUPPAGINGMODE enmHostMode;
1303	/** The shadow paging mode. */
1304	PGMMODE enmShadowMode;
1305	/** The guest paging mode. */
1306	PGMMODE enmGuestMode;
1307
1308	/** The current physical address representing in the guest CR3 register. */
1309	RTGCPHYS GCPhysCR3;
1310	/** Pointer to the 5 page CR3 content mapping.
1311	* The first page is always the CR3 (in some form) while the 4 other pages
1312	* are used of the PDs in PAE mode. */
1313	RTGCPTR GCPtrCR3Mapping;
1314	/** The physical address of the currently monitored guest CR3 page.
1315	* When this value is NIL_RTGCPHYS no page is being monitored. */
1316	RTGCPHYS GCPhysGstCR3Monitored;
1317	#if HC_ARCH_BITS == 64 \|\| GC_ARCH_BITS == 64
1318	RTGCPHYS GCPhysPadding0; /*< alignment padding. /
1319	#endif
1320
1321	/** @name 32-bit Guest Paging.
1322	* @{ */
1323	/** The guest's page directory, HC pointer. */
1324	HCPTRTYPE(PVBOXPD) pGuestPDHC;
1325	/** The guest's page directory, static GC mapping. */
1326	GCPTRTYPE(PVBOXPD) pGuestPDGC;
1327	/** @} */
1328
1329	/** @name PAE Guest Paging.
1330	* @{ */
1331	/** The guest's page directory pointer table, static GC mapping. */
1332	GCPTRTYPE(PX86PDPTR) pGstPaePDPTRGC;
1333	/** The guest's page directory pointer table, HC pointer. */
1334	HCPTRTYPE(PX86PDPTR) pGstPaePDPTRHC;
1335	/** The guest's page directories, HC pointers.
1336	* These are individual pointers and doesn't have to be adjecent.
1337	* These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1338	HCPTRTYPE(PX86PDPAE) apGstPaePDsHC[4];
1339	/** The guest's page directories, static GC mapping.
1340	* Unlike the HC array the first entry can be accessed as a 2048 entry PD.
1341	* These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1342	GCPTRTYPE(PX86PDPAE) apGstPaePDsGC[4];
1343	/** The physical addresses of the guest page directories (PAE) pointed to by apGstPagePDsHC/GC. */
1344	RTGCPHYS aGCPhysGstPaePDs[4];
1345	/** The physical addresses of the monitored guest page directories (PAE). */
1346	RTGCPHYS aGCPhysGstPaePDsMonitored[4];
1347	/** @} */
1348
1349
1350	/** @name 32-bit Shadow Paging
1351	* @{ */
1352	/** The 32-Bit PD - HC Ptr. */
1353	HCPTRTYPE(PX86PD) pHC32BitPD;
1354	/** The 32-Bit PD - GC Ptr. */
1355	GCPTRTYPE(PX86PD) pGC32BitPD;
1356	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1357	uint32_t u32Padding1; /*< alignment padding. /
1358	#endif
1359	/** The Physical Address (HC) of the 32-Bit PD. */
1360	RTHCPHYS HCPhys32BitPD;
1361	/** @} */
1362
1363	/** @name PAE Shadow Paging
1364	* @{ */
1365	/** The four PDs for the low 4GB - HC Ptr.
1366	* Even though these are 4 pointers, what they point at is a single table.
1367	* Thus, it's possible to walk the 2048 entries starting where apHCPaePDs[0] points. */
1368	HCPTRTYPE(PX86PDPAE) apHCPaePDs[4];
1369	/** The four PDs for the low 4GB - GC Ptr.
1370	* Same kind of mapping as apHCPaePDs. */
1371	GCPTRTYPE(PX86PDPAE) apGCPaePDs[4];
1372	/** The Physical Address (HC) of the four PDs for the low 4GB.
1373	* These are NOT 4 contiguous pages. */
1374	RTHCPHYS aHCPhysPaePDs[4];
1375	/** The PAE PDPTR - HC Ptr. */
1376	HCPTRTYPE(PX86PDPTR) pHCPaePDPTR;
1377	/** The Physical Address (HC) of the PAE PDPTR. */
1378	RTHCPHYS HCPhysPaePDPTR;
1379	/** The PAE PDPTR - GC Ptr. */
1380	GCPTRTYPE(PX86PDPTR) pGCPaePDPTR;
1381	/** @} */
1382
1383	/** @name AMD64 Shadow Paging
1384	* Extends PAE Paging.
1385	* @{ */
1386	/** The Page Map Level 4 table - HC Ptr. */
1387	GCPTRTYPE(PX86PML4) pGCPaePML4;
1388	/** The Page Map Level 4 table - GC Ptr. */
1389	HCPTRTYPE(PX86PML4) pHCPaePML4;
1390	/** The Physical Address (HC) of the Page Map Level 4 table. */
1391	RTHCPHYS HCPhysPaePML4;
1392	/** @}*/
1393
1394	/** @name Function pointers for Shadow paging.
1395	* @{
1396	*/
1397	DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1398	DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1399	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1400	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1401	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1402	DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1403	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1404
1405	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1406	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1407	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1408	DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1409	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1410	#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1411	RTGCPTR alignment0; /*< structure size alignment. /
1412	#endif
1413
1414	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1415	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1416	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1417	DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1418	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1419
1420	/** @} */
1421
1422	/** @name Function pointers for Guest paging.
1423	* @{
1424	*/
1425	DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1426	DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1427	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1428	DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1429	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1430	DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1431	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1432	DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1433	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1434	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHCGstWriteHandlerCR3;
1435	R3PTRTYPE(const char *) pszHCGstWriteHandlerCR3;
1436
1437	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1438	DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1439	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1440	DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1441	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1442	DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1443	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1444	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1445
1446	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1447	DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1448	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1449	DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1450	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1451	DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1452	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1453	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnR0GstWriteHandlerCR3;
1454	/** @} */
1455
1456	/** @name Function pointers for Both Shadow and Guest paging.
1457	* @{
1458	*/
1459	DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1460	DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1461	DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1462	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1463	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1464	DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1465	DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1466	DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1467
1468	DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1469	DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1470	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1471	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1472	DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1473	DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1474	DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1475
1476	DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1477	DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1478	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1479	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1480	DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1481	DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1482	DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1483	#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1484	RTGCPTR alignment2; /*< structure size alignment. /
1485	#endif
1486	/** @} */
1487
1488	/** Pointer to SHW+GST mode data (function pointers).
1489	* The index into this table is made up from */
1490	R3PTRTYPE(PPGMMODEDATA) paModeData;
1491
1492
1493	/** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for HC.
1494	* This is sorted by physical address and contains no overlaps.
1495	* The memory locks and other conversions are managed by MM at the moment.
1496	*/
1497	HCPTRTYPE(PPGMRAMRANGE) pRamRangesHC;
1498	/** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for GC.
1499	* This is sorted by physical address and contains no overlaps.
1500	* The memory locks and other conversions are managed by MM at the moment.
1501	*/
1502	GCPTRTYPE(PPGMRAMRANGE) pRamRangesGC;
1503	/** The configured RAM size. */
1504	RTUINT cbRamSize;
1505
1506	/** PGM offset based trees - HC Ptr. */
1507	HCPTRTYPE(PPGMTREES) pTreesHC;
1508	/** PGM offset based trees - GC Ptr. */
1509	GCPTRTYPE(PPGMTREES) pTreesGC;
1510
1511	/** Linked list of GC mappings - for GC.
1512	* The list is sorted ascending on address.
1513	*/
1514	GCPTRTYPE(PPGMMAPPING) pMappingsGC;
1515	/** Linked list of GC mappings - for HC.
1516	* The list is sorted ascending on address.
1517	*/
1518	R3PTRTYPE(PPGMMAPPING) pMappingsR3;
1519	/** Linked list of GC mappings - for R0.
1520	* The list is sorted ascending on address.
1521	*/
1522	R0PTRTYPE(PPGMMAPPING) pMappingsR0;
1523
1524	/** If set no conflict checks are required. (boolean) */
1525	bool fMappingsFixed;
1526	/** If set, then no mappings are put into the shadow page table. (boolean) */
1527	bool fDisableMappings;
1528	/** Size of fixed mapping */
1529	uint32_t cbMappingFixed;
1530	/** Base address (GC) of fixed mapping */
1531	RTGCPTR GCPtrMappingFixed;
1532	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1533	uint32_t u32Padding0; /*< alignment padding. /
1534	#endif
1535
1536
1537	/** @name Intermediate Context
1538	* @{ */
1539	/** Pointer to the intermediate page directory - Normal. */
1540	HCPTRTYPE(PX86PD) pInterPD;
1541	/** Pointer to the intermedate page tables - Normal.
1542	* There are two page tables, one for the identity mapping and one for
1543	* the host context mapping (of the core code). */
1544	HCPTRTYPE(PX86PT) apInterPTs[2];
1545	/** Pointer to the intermedate page tables - PAE. */
1546	HCPTRTYPE(PX86PTPAE) apInterPaePTs[2];
1547	/** Pointer to the intermedate page directory - PAE. */
1548	HCPTRTYPE(PX86PDPAE) apInterPaePDs[4];
1549	/** Pointer to the intermedate page directory - PAE. */
1550	HCPTRTYPE(PX86PDPTR) pInterPaePDPTR;
1551	/** Pointer to the intermedate page-map level 4 - AMD64. */
1552	HCPTRTYPE(PX86PML4) pInterPaePML4;
1553	/** Pointer to the intermedate page directory - AMD64. */
1554	HCPTRTYPE(PX86PDPTR) pInterPaePDPTR64;
1555	/** The Physical Address (HC) of the intermediate Page Directory - Normal. */
1556	RTHCPHYS HCPhysInterPD;
1557	/** The Physical Address (HC) of the intermediate Page Directory Pointer Table - PAE. */
1558	RTHCPHYS HCPhysInterPaePDPTR;
1559	/** The Physical Address (HC) of the intermediate Page Map Level 4 table - AMD64. */
1560	RTHCPHYS HCPhysInterPaePML4;
1561	/** @} */
1562
1563	/** Base address of the dynamic page mapping area.
1564	* The array is MM_HYPER_DYNAMIC_SIZE bytes big.
1565	*/
1566	GCPTRTYPE(uint8_t *) pbDynPageMapBaseGC;
1567	/** The index of the last entry used in the dynamic page mapping area. */
1568	RTUINT iDynPageMapLast;
1569	/** Cache containing the last entries in the dynamic page mapping area.
1570	* The cache size is covering half of the mapping area. */
1571	RTHCPHYS aHCPhysDynPageMapCache[MM_HYPER_DYNAMIC_SIZE >> (PAGE_SHIFT + 1)];
1572
1573	/** A20 gate mask.
1574	* Our current approach to A20 emulation is to let REM do it and don't bother
1575	* anywhere else. The interesting Guests will be operating with it enabled anyway.
1576	* But whould need arrise, we'll subject physical addresses to this mask. */
1577	RTGCPHYS GCPhysA20Mask;
1578	/** A20 gate state - boolean! */
1579	RTUINT fA20Enabled;
1580
1581	/** What needs syncing (PGM_SYNC_*).
1582	* This is used to queue operations for PGMSyncCR3, PGMInvalidatePage,
1583	* PGMFlushTLB, and PGMR3Load. */
1584	RTUINT fSyncFlags;
1585
1586	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1587	RTUINT uPadding3; /*< alignment padding. /
1588	#endif
1589	/** PGM critical section.
1590	* This protects the physical & virtual access handlers, ram ranges,
1591	* and the page flag updating (some of it anyway).
1592	*/
1593	PDMCRITSECT CritSect;
1594
1595	/** Shadow Page Pool - HC Ptr. */
1596	HCPTRTYPE(PPGMPOOL) pPoolHC;
1597	/** Shadow Page Pool - GC Ptr. */
1598	GCPTRTYPE(PPGMPOOL) pPoolGC;
1599
1600	/** We're not in a state which permits writes to guest memory.
1601	* (Only used in strict builds.) */
1602	bool fNoMorePhysWrites;
1603
1604	/** Flush the cache on the next access. */
1605	bool fPhysCacheFlushPending;
1606	/** @todo r=bird: Fix member names!*/
1607	/** PGMPhysRead cache */
1608	PGMPHYSCACHE pgmphysreadcache;
1609	/** PGMPhysWrite cache */
1610	PGMPHYSCACHE pgmphyswritecache;
1611
1612	/**
1613	* Data associated with managing the ring-3 mappings of the allocation chunks.
1614	*/
1615	struct
1616	{
1617	/** The chunk tree, ordered by chunk id. */
1618	HCPTRTYPE(PAVLU32NODECORE) pTree;
1619	/** The chunk mapping TLB. */
1620	PGMCHUNKR3MAPTLB Tlb;
1621	/** The number of mapped chunks. */
1622	uint32_t c;
1623	/** The maximum number of mapped chunks.
1624	* @cfgm PGM/MaxRing3Chunks */
1625	uint32_t cMax;
1626	/** The chunk age tree, ordered by ageing sequence number. */
1627	HCPTRTYPE(PAVLLU32NODECORE) pAgeTree;
1628	/** The current time. */
1629	uint32_t iNow;
1630	/** Number of pgmR3PhysChunkFindUnmapCandidate calls left to the next ageing. */
1631	uint32_t AgeingCountdown;
1632	} ChunkR3Map;
1633
1634	/**
1635	* The page mapping TLB for ring-3 and (for the time being) ring-0.
1636	*/
1637	PGMPAGER3MAPTLB PhysTlbHC;
1638
1639	/** @name Release Statistics
1640	* @{ */
1641	/** The number of times the guest has switched mode since last reset or statistics reset. */
1642	STAMCOUNTER cGuestModeChanges;
1643	/** @} */
1644
1645	#ifdef VBOX_WITH_STATISTICS
1646	/** GC: Which statistic this \#PF should be attributed to. */
1647	GCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionGC;
1648	RTGCPTR padding0;
1649	/** HC: Which statistic this \#PF should be attributed to. */
1650	HCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionHC;
1651	RTHCPTR padding1;
1652	STAMPROFILE StatGCTrap0e; /*< GC: PGMGCTrap0eHandler() profiling. /
1653	STAMPROFILE StatTrap0eCSAM; /*< Profiling of the Trap0eHandler body when the cause is CSAM. /
1654	STAMPROFILE StatTrap0eDirtyAndAccessedBits; /*< Profiling of the Trap0eHandler body when the cause is dirty and/or accessed bit emulation. /
1655	STAMPROFILE StatTrap0eGuestTrap; /*< Profiling of the Trap0eHandler body when the cause is a guest trap. /
1656	STAMPROFILE StatTrap0eHndPhys; /*< Profiling of the Trap0eHandler body when the cause is a physical handler. /
1657	STAMPROFILE StatTrap0eHndVirt; /*< Profiling of the Trap0eHandler body when the cause is a virtual handler. /
1658	STAMPROFILE StatTrap0eHndUnhandled; /*< Profiling of the Trap0eHandler body when the cause is access outside the monitored areas of a monitored page. /
1659	STAMPROFILE StatTrap0eMisc; /*< Profiling of the Trap0eHandler body when the cause is not known. /
1660	STAMPROFILE StatTrap0eOutOfSync; /*< Profiling of the Trap0eHandler body when the cause is an out-of-sync page. /
1661	STAMPROFILE StatTrap0eOutOfSyncHndPhys; /*< Profiling of the Trap0eHandler body when the cause is an out-of-sync physical handler page. /
1662	STAMPROFILE StatTrap0eOutOfSyncHndVirt; /*< Profiling of the Trap0eHandler body when the cause is an out-of-sync virtual handler page. /
1663	STAMPROFILE StatTrap0eOutOfSyncObsHnd; /*< Profiling of the Trap0eHandler body when the cause is an obsolete handler page. /
1664	STAMPROFILE StatTrap0eSyncPT; /*< Profiling of the Trap0eHandler body when the cause is lazy syncing of a PT. /
1665
1666	STAMCOUNTER StatTrap0eMapHandler; /*< Number of traps due to access handlers in mappings. /
1667	STAMCOUNTER StatGCTrap0eConflicts; /*< GC: The number of times \#PF was caused by an undetected conflict. /
1668
1669	STAMCOUNTER StatGCTrap0eUSNotPresentRead;
1670	STAMCOUNTER StatGCTrap0eUSNotPresentWrite;
1671	STAMCOUNTER StatGCTrap0eUSWrite;
1672	STAMCOUNTER StatGCTrap0eUSReserved;
1673	STAMCOUNTER StatGCTrap0eUSRead;
1674
1675	STAMCOUNTER StatGCTrap0eSVNotPresentRead;
1676	STAMCOUNTER StatGCTrap0eSVNotPresentWrite;
1677	STAMCOUNTER StatGCTrap0eSVWrite;
1678	STAMCOUNTER StatGCTrap0eSVReserved;
1679
1680	STAMCOUNTER StatGCTrap0eUnhandled;
1681	STAMCOUNTER StatGCTrap0eMap;
1682
1683	/** GC: PGMSyncPT() profiling. */
1684	STAMPROFILE StatGCSyncPT;
1685	/** GC: The number of times PGMSyncPT() needed to allocate page tables. */
1686	STAMCOUNTER StatGCSyncPTAlloc;
1687	/** GC: The number of times PGMSyncPT() detected conflicts. */
1688	STAMCOUNTER StatGCSyncPTConflict;
1689	/** GC: The number of times PGMSyncPT() failed. */
1690	STAMCOUNTER StatGCSyncPTFailed;
1691	/** GC: PGMGCInvalidatePage() profiling. */
1692	STAMPROFILE StatGCInvalidatePage;
1693	/** GC: The number of times PGMGCInvalidatePage() was called for a 4KB page. */
1694	STAMCOUNTER StatGCInvalidatePage4KBPages;
1695	/** GC: The number of times PGMGCInvalidatePage() was called for a 4MB page. */
1696	STAMCOUNTER StatGCInvalidatePage4MBPages;
1697	/** GC: The number of times PGMGCInvalidatePage() skipped a 4MB page. */
1698	STAMCOUNTER StatGCInvalidatePage4MBPagesSkip;
1699	/** GC: The number of times PGMGCInvalidatePage() was called for a not accessed page directory. */
1700	STAMCOUNTER StatGCInvalidatePagePDNAs;
1701	/** GC: The number of times PGMGCInvalidatePage() was called for a not present page directory. */
1702	STAMCOUNTER StatGCInvalidatePagePDNPs;
1703	/** GC: The number of times PGMGCInvalidatePage() was called for a page directory containing mappings (no conflict). */
1704	STAMCOUNTER StatGCInvalidatePagePDMappings;
1705	/** GC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
1706	STAMCOUNTER StatGCInvalidatePagePDOutOfSync;
1707	/** HC: The number of times PGMGCInvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
1708	STAMCOUNTER StatGCInvalidatePageSkipped;
1709	/** GC: The number of times user page is out of sync was detected in GC. */
1710	STAMCOUNTER StatGCPageOutOfSyncUser;
1711	/** GC: The number of times supervisor page is out of sync was detected in GC. */
1712	STAMCOUNTER StatGCPageOutOfSyncSupervisor;
1713	/** GC: The number of dynamic page mapping cache hits */
1714	STAMCOUNTER StatDynMapCacheMisses;
1715	/** GC: The number of dynamic page mapping cache misses */
1716	STAMCOUNTER StatDynMapCacheHits;
1717	/** GC: The number of times pgmGCGuestPDWriteHandler() was successfully called. */
1718	STAMCOUNTER StatGCGuestCR3WriteHandled;
1719	/** GC: The number of times pgmGCGuestPDWriteHandler() was called and we had to fall back to the recompiler. */
1720	STAMCOUNTER StatGCGuestCR3WriteUnhandled;
1721	/** GC: The number of times pgmGCGuestPDWriteHandler() was called and a conflict was detected. */
1722	STAMCOUNTER StatGCGuestCR3WriteConflict;
1723	/** GC: Number of out-of-sync handled pages. */
1724	STAMCOUNTER StatHandlersOutOfSync;
1725	/** GC: Number of traps due to physical access handlers. */
1726	STAMCOUNTER StatHandlersPhysical;
1727	/** GC: Number of traps due to virtual access handlers. */
1728	STAMCOUNTER StatHandlersVirtual;
1729	/** GC: Number of traps due to virtual access handlers found by physical address. */
1730	STAMCOUNTER StatHandlersVirtualByPhys;
1731	/** GC: Number of traps due to virtual access handlers found by virtual address (without proper physical flags). */
1732	STAMCOUNTER StatHandlersVirtualUnmarked;
1733	/** GC: Number of traps due to access outside range of monitored page(s). */
1734	STAMCOUNTER StatHandlersUnhandled;
1735
1736	/** GC: The number of times pgmGCGuestROMWriteHandler() was successfully called. */
1737	STAMCOUNTER StatGCGuestROMWriteHandled;
1738	/** GC: The number of times pgmGCGuestROMWriteHandler() was called and we had to fall back to the recompiler */
1739	STAMCOUNTER StatGCGuestROMWriteUnhandled;
1740
1741	/** HC: PGMR3InvalidatePage() profiling. */
1742	STAMPROFILE StatHCInvalidatePage;
1743	/** HC: The number of times PGMR3InvalidatePage() was called for a 4KB page. */
1744	STAMCOUNTER StatHCInvalidatePage4KBPages;
1745	/** HC: The number of times PGMR3InvalidatePage() was called for a 4MB page. */
1746	STAMCOUNTER StatHCInvalidatePage4MBPages;
1747	/** HC: The number of times PGMR3InvalidatePage() skipped a 4MB page. */
1748	STAMCOUNTER StatHCInvalidatePage4MBPagesSkip;
1749	/** HC: The number of times PGMR3InvalidatePage() was called for a not accessed page directory. */
1750	STAMCOUNTER StatHCInvalidatePagePDNAs;
1751	/** HC: The number of times PGMR3InvalidatePage() was called for a not present page directory. */
1752	STAMCOUNTER StatHCInvalidatePagePDNPs;
1753	/** HC: The number of times PGMR3InvalidatePage() was called for a page directory containing mappings (no conflict). */
1754	STAMCOUNTER StatHCInvalidatePagePDMappings;
1755	/** HC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
1756	STAMCOUNTER StatHCInvalidatePagePDOutOfSync;
1757	/** HC: The number of times PGMR3InvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
1758	STAMCOUNTER StatHCInvalidatePageSkipped;
1759	/** HC: PGMR3SyncPT() profiling. */
1760	STAMPROFILE StatHCSyncPT;
1761	/** HC: pgmr3SyncPTResolveConflict() profiling (includes the entire relocation). */
1762	STAMPROFILE StatHCResolveConflict;
1763	/** HC: Number of times PGMR3CheckMappingConflicts() detected a conflict. */
1764	STAMCOUNTER StatHCDetectedConflicts;
1765	/** HC: The total number of times pgmHCGuestPDWriteHandler() was called. */
1766	STAMCOUNTER StatHCGuestPDWrite;
1767	/** HC: The number of times pgmHCGuestPDWriteHandler() detected a conflict */
1768	STAMCOUNTER StatHCGuestPDWriteConflict;
1769
1770	/** HC: The number of pages marked not present for accessed bit emulation. */
1771	STAMCOUNTER StatHCAccessedPage;
1772	/** HC: The number of pages marked read-only for dirty bit tracking. */
1773	STAMCOUNTER StatHCDirtyPage;
1774	/** HC: The number of pages marked read-only for dirty bit tracking. */
1775	STAMCOUNTER StatHCDirtyPageBig;
1776	/** HC: The number of traps generated for dirty bit tracking. */
1777	STAMCOUNTER StatHCDirtyPageTrap;
1778	/** HC: The number of pages already dirty or readonly. */
1779	STAMCOUNTER StatHCDirtyPageSkipped;
1780
1781	/** GC: The number of pages marked not present for accessed bit emulation. */
1782	STAMCOUNTER StatGCAccessedPage;
1783	/** GC: The number of pages marked read-only for dirty bit tracking. */
1784	STAMCOUNTER StatGCDirtyPage;
1785	/** GC: The number of pages marked read-only for dirty bit tracking. */
1786	STAMCOUNTER StatGCDirtyPageBig;
1787	/** GC: The number of traps generated for dirty bit tracking. */
1788	STAMCOUNTER StatGCDirtyPageTrap;
1789	/** GC: The number of pages already dirty or readonly. */
1790	STAMCOUNTER StatGCDirtyPageSkipped;
1791	/** GC: The number of pages marked dirty because of write accesses. */
1792	STAMCOUNTER StatGCDirtiedPage;
1793	/** GC: The number of pages already marked dirty because of write accesses. */
1794	STAMCOUNTER StatGCPageAlreadyDirty;
1795	/** GC: The number of real pages faults during dirty bit tracking. */
1796	STAMCOUNTER StatGCDirtyTrackRealPF;
1797
1798	/** GC: Profiling of the PGMTrackDirtyBit() body */
1799	STAMPROFILE StatGCDirtyBitTracking;
1800	/** HC: Profiling of the PGMTrackDirtyBit() body */
1801	STAMPROFILE StatHCDirtyBitTracking;
1802
1803	/** GC: Profiling of the PGMGstModifyPage() body */
1804	STAMPROFILE StatGCGstModifyPage;
1805	/** HC: Profiling of the PGMGstModifyPage() body */
1806	STAMPROFILE StatHCGstModifyPage;
1807
1808	/** GC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
1809	STAMCOUNTER StatGCSyncPagePDNAs;
1810	/** GC: The number of time we've encountered an out-of-sync PD in SyncPage. */
1811	STAMCOUNTER StatGCSyncPagePDOutOfSync;
1812	/** HC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
1813	STAMCOUNTER StatHCSyncPagePDNAs;
1814	/** HC: The number of time we've encountered an out-of-sync PD in SyncPage. */
1815	STAMCOUNTER StatHCSyncPagePDOutOfSync;
1816
1817	STAMCOUNTER StatSynPT4kGC;
1818	STAMCOUNTER StatSynPT4kHC;
1819	STAMCOUNTER StatSynPT4MGC;
1820	STAMCOUNTER StatSynPT4MHC;
1821
1822	/** Profiling of the PGMFlushTLB() body. */
1823	STAMPROFILE StatFlushTLB;
1824	/** The number of times PGMFlushTLB was called with a new CR3, non-global. (switch) */
1825	STAMCOUNTER StatFlushTLBNewCR3;
1826	/** The number of times PGMFlushTLB was called with a new CR3, global. (switch) */
1827	STAMCOUNTER StatFlushTLBNewCR3Global;
1828	/** The number of times PGMFlushTLB was called with the same CR3, non-global. (flush) */
1829	STAMCOUNTER StatFlushTLBSameCR3;
1830	/** The number of times PGMFlushTLB was called with the same CR3, global. (flush) */
1831	STAMCOUNTER StatFlushTLBSameCR3Global;
1832
1833	STAMPROFILE StatGCSyncCR3; /*< GC: PGMSyncCR3() profiling. /
1834	STAMPROFILE StatGCSyncCR3Handlers; /*< GC: Profiling of the PGMSyncCR3() update handler section. /
1835	STAMPROFILE StatGCSyncCR3HandlerVirtualReset; /*< GC: Profiling of the virtual handler resets. /
1836	STAMPROFILE StatGCSyncCR3HandlerVirtualUpdate; /*< GC: Profiling of the virtual handler updates. /
1837	STAMCOUNTER StatGCSyncCR3Global; /*< GC: The number of global CR3 syncs. /
1838	STAMCOUNTER StatGCSyncCR3NotGlobal; /*< GC: The number of non-global CR3 syncs. /
1839	STAMCOUNTER StatGCSyncCR3DstFreed; /*< GC: The number of times we've had to free a shadow entry. /
1840	STAMCOUNTER StatGCSyncCR3DstFreedSrcNP; /*< GC: The number of times we've had to free a shadow entry for which the source entry was not present. /
1841	STAMCOUNTER StatGCSyncCR3DstNotPresent; /*< GC: The number of times we've encountered a not present shadow entry for a present guest entry. /
1842	STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPD; /*< GC: The number of times a global page directory wasn't flushed. /
1843	STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPT; /*< GC: The number of times a page table with only global entries wasn't flushed. /
1844	STAMCOUNTER StatGCSyncCR3DstCacheHit; /*< GC: The number of times we got some kind of cache hit on a page table. /
1845
1846	STAMPROFILE StatHCSyncCR3; /*< HC: PGMSyncCR3() profiling. /
1847	STAMPROFILE StatHCSyncCR3Handlers; /*< HC: Profiling of the PGMSyncCR3() update handler section. /
1848	STAMPROFILE StatHCSyncCR3HandlerVirtualReset; /*< HC: Profiling of the virtual handler resets. /
1849	STAMPROFILE StatHCSyncCR3HandlerVirtualUpdate; /*< HC: Profiling of the virtual handler updates. /
1850	STAMCOUNTER StatHCSyncCR3Global; /*< HC: The number of global CR3 syncs. /
1851	STAMCOUNTER StatHCSyncCR3NotGlobal; /*< HC: The number of non-global CR3 syncs. /
1852	STAMCOUNTER StatHCSyncCR3DstFreed; /*< HC: The number of times we've had to free a shadow entry. /
1853	STAMCOUNTER StatHCSyncCR3DstFreedSrcNP; /*< HC: The number of times we've had to free a shadow entry for which the source entry was not present. /
1854	STAMCOUNTER StatHCSyncCR3DstNotPresent; /*< HC: The number of times we've encountered a not present shadow entry for a present guest entry. /
1855	STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPD; /*< HC: The number of times a global page directory wasn't flushed. /
1856	STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPT; /*< HC: The number of times a page table with only global entries wasn't flushed. /
1857	STAMCOUNTER StatHCSyncCR3DstCacheHit; /*< HC: The number of times we got some kind of cache hit on a page table. /
1858
1859	/** GC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
1860	STAMPROFILE StatVirtHandleSearchByPhysGC;
1861	/** HC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
1862	STAMPROFILE StatVirtHandleSearchByPhysHC;
1863	/** HC: The number of times PGMR3HandlerPhysicalReset is called. */
1864	STAMCOUNTER StatHandlePhysicalReset;
1865
1866	STAMPROFILE StatCheckPageFault;
1867	STAMPROFILE StatLazySyncPT;
1868	STAMPROFILE StatMapping;
1869	STAMPROFILE StatOutOfSync;
1870	STAMPROFILE StatHandlers;
1871	STAMPROFILE StatEIPHandlers;
1872	STAMPROFILE StatHCPrefetch;
1873
1874	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
1875	/** The number of first time shadowings. */
1876	STAMCOUNTER StatTrackVirgin;
1877	/** The number of times switching to cRef2, i.e. the page is being shadowed by two PTs. */
1878	STAMCOUNTER StatTrackAliased;
1879	/** The number of times we're tracking using cRef2. */
1880	STAMCOUNTER StatTrackAliasedMany;
1881	/** The number of times we're hitting pages which has overflowed cRef2. */
1882	STAMCOUNTER StatTrackAliasedLots;
1883	/** The number of times the extent list grows to long. */
1884	STAMCOUNTER StatTrackOverflows;
1885	/** Profiling of SyncPageWorkerTrackDeref (expensive). */
1886	STAMPROFILE StatTrackDeref;
1887	# endif
1888
1889	/** Allocated mbs of guest ram */
1890	STAMCOUNTER StatDynRamTotal;
1891	/** Nr of pgmr3PhysGrowRange calls. */
1892	STAMCOUNTER StatDynRamGrow;
1893
1894	STAMCOUNTER StatGCTrap0ePD[X86_PG_ENTRIES];
1895	STAMCOUNTER StatGCSyncPtPD[X86_PG_ENTRIES];
1896	STAMCOUNTER StatGCSyncPagePD[X86_PG_ENTRIES];
1897	#endif
1898	} PGM, *PPGM;
1899
1900
1901	/** @name PGM::fSyncFlags Flags
1902	* @{
1903	*/
1904	/** Updates the MM_RAM_FLAGS_VIRTUAL_HANDLER page bit. */
1905	#define PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL BIT(0)
1906	/** Always sync CR3. */
1907	#define PGM_SYNC_ALWAYS BIT(1)
1908	/** Check monitoring on next CR3 (re)load and invalidate page. */
1909	#define PGM_SYNC_MONITOR_CR3 BIT(2)
1910	/** Clear the page pool (a light weight flush). */
1911	#define PGM_SYNC_CLEAR_PGM_POOL BIT(8)
1912	/** @} */
1913
1914
1915	__BEGIN_DECLS
1916
1917	PGMGCDECL(int) pgmGCGuestPDWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void pvFault, RTGCPHYS GCPhysFault, void pvUser);
1918	PGMDECL(int) pgmGuestROMWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void pvFault, RTGCPHYS GCPhysFault, void pvUser);
1919	PGMGCDECL(int) pgmCachePTWriteGC(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
1920	int pgmR3SyncPTResolveConflict(PVM pVM, PPGMMAPPING pMapping, PVBOXPD pPDSrc, int iPDOld);
1921	PPGMMAPPING pgmGetMapping(PVM pVM, RTGCPTR GCPtr);
1922	void pgmR3MapRelocate(PVM pVM, PPGMMAPPING pMapping, int iPDOld, int iPDNew);
1923	int pgmR3ChangeMode(PVM pVM, PGMMODE enmGuestMode);
1924	int pgmLock(PVM pVM);
1925	void pgmUnlock(PVM pVM);
1926
1927	void pgmR3HandlerPhysicalUpdateAll(PVM pVM);
1928	int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER ppVirt, unsigned piPage);
1929	DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser);
1930	#ifdef VBOX_STRICT
1931	void pgmHandlerVirtualDumpPhysPages(PVM pVM);
1932	#else
1933	# define pgmHandlerVirtualDumpPhysPages(a) do { } while (0)
1934	#endif
1935	DECLCALLBACK(void) pgmR3InfoHandlers(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
1936
1937
1938	#ifdef IN_RING3
1939	int pgmr3PhysGrowRange(PVM pVM, RTGCPHYS GCPhys);
1940
1941	int pgmR3PoolInit(PVM pVM);
1942	void pgmR3PoolRelocate(PVM pVM);
1943	void pgmR3PoolReset(PVM pVM);
1944
1945	#endif
1946	#ifdef IN_GC
1947	void *pgmGCPoolMapPage(PVM pVM, PPGMPOOLPAGE pPage);
1948	#endif
1949	int pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint16_t iUserTable, PPPGMPOOLPAGE ppPage);
1950	PPGMPOOLPAGE pgmPoolGetPageByHCPhys(PVM pVM, RTHCPHYS HCPhys);
1951	void pgmPoolFree(PVM pVM, RTHCPHYS HCPhys, uint16_t iUser, uint16_t iUserTable);
1952	void pgmPoolFreeByPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint16_t iUserTable);
1953	int pgmPoolFlushPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
1954	void pgmPoolFlushAll(PVM pVM);
1955	void pgmPoolClearAll(PVM pVM);
1956	void pgmPoolTrackFlushGCPhysPT(PVM pVM, PPGMPAGE pPhysPage, uint16_t iShw, uint16_t cRefs);
1957	void pgmPoolTrackFlushGCPhysPTs(PVM pVM, PPGMPAGE pPhysPage, uint16_t iPhysExt);
1958	int pgmPoolTrackFlushGCPhysPTsSlow(PVM pVM, PPGMPAGE pPhysPage);
1959	PPGMPOOLPHYSEXT pgmPoolTrackPhysExtAlloc(PVM pVM, uint16_t *piPhysExt);
1960	void pgmPoolTrackPhysExtFree(PVM pVM, uint16_t iPhysExt);
1961	void pgmPoolTrackPhysExtFreeList(PVM pVM, uint16_t iPhysExt);
1962	uint16_t pgmPoolTrackPhysExtAddref(PVM pVM, uint16_t u16, uint16_t iShwPT);
1963	void pgmPoolTrackPhysExtDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPoolPage, PPGMPAGE pPhysPage);
1964	#ifdef PGMPOOL_WITH_MONITORING
1965	# ifdef IN_RING3
1966	void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTHCPTR pvAddress, PDISCPUSTATE pCpu);
1967	# else
1968	void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTGCPTR pvAddress, PDISCPUSTATE pCpu);
1969	# endif
1970	int pgmPoolMonitorChainFlush(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
1971	void pgmPoolMonitorModifiedInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
1972	void pgmPoolMonitorModifiedClearAll(PVM pVM);
1973	int pgmPoolMonitorMonitorCR3(PPGMPOOL pPool, uint16_t idxRoot, RTGCPHYS GCPhysCR3);
1974	int pgmPoolMonitorUnmonitorCR3(PPGMPOOL pPool, uint16_t idxRoot);
1975	#endif
1976
1977	__END_DECLS
1978
1979
1980	/**
1981	* Gets the PGMPAGE structure for a guest page.
1982	*
1983	* @returns Pointer to the page on success.
1984	* @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
1985	*
1986	* @param pPGM PGM handle.
1987	* @param GCPhys The GC physical address.
1988	*/
1989	DECLINLINE(PPGMPAGE) pgmPhysGetPage(PPGM pPGM, RTGCPHYS GCPhys)
1990	{
1991	/*
1992	* Optimize for the first range.
1993	*/
1994	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
1995	RTGCPHYS off = GCPhys - pRam->GCPhys;
1996	if (RT_UNLIKELY(off >= pRam->cb))
1997	{
1998	do
1999	{
2000	pRam = CTXSUFF(pRam->pNext);
2001	if (RT_UNLIKELY(!pRam))
2002	return NULL;
2003	off = GCPhys - pRam->GCPhys;
2004	} while (off >= pRam->cb);
2005	}
2006	return &pRam->aPages[off >> PAGE_SHIFT];
2007	}
2008
2009
2010	/**
2011	* Gets the PGMPAGE structure for a guest page.
2012	*
2013	* Old Phys code: Will make sure the page is present.
2014	*
2015	* @returns VBox status code.
2016	* @retval VINF_SUCCESS and a valid *ppPage on success.
2017	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if the address isn't valid.
2018	*
2019	* @param pPGM PGM handle.
2020	* @param GCPhys The GC physical address.
2021	* @param ppPage Where to store the page poitner on success.
2022	*/
2023	DECLINLINE(int) pgmPhysGetPageEx(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGE ppPage)
2024	{
2025	/*
2026	* Optimize for the first range.
2027	*/
2028	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2029	RTGCPHYS off = GCPhys - pRam->GCPhys;
2030	if (RT_UNLIKELY(off >= pRam->cb))
2031	{
2032	do
2033	{
2034	pRam = CTXSUFF(pRam->pNext);
2035	if (RT_UNLIKELY(!pRam))
2036	{
2037	ppPage = NULL; / avoid incorrect and very annoying GCC warnings */
2038	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2039	}
2040	off = GCPhys - pRam->GCPhys;
2041	} while (off >= pRam->cb);
2042	}
2043	*ppPage = &pRam->aPages[off >> PAGE_SHIFT];
2044	#ifndef NEW_PHYS_CODE
2045
2046	/*
2047	* Make sure it's present.
2048	*/
2049	if (RT_UNLIKELY( !PGM_PAGE_GET_HCPHYS(*ppPage)
2050	&& (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)))
2051	{
2052	#ifdef IN_RING3
2053	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2054	#else
2055	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2056	#endif
2057	if (VBOX_FAILURE(rc))
2058	{
2059	ppPage = NULL; / avoid incorrect and very annoying GCC warnings */
2060	return rc;
2061	}
2062	Assert(rc == VINF_SUCCESS);
2063	}
2064	#endif
2065	return VINF_SUCCESS;
2066	}
2067
2068
2069
2070
2071	/**
2072	* Gets the PGMPAGE structure for a guest page.
2073	*
2074	* Old Phys code: Will make sure the page is present.
2075	*
2076	* @returns VBox status code.
2077	* @retval VINF_SUCCESS and a valid *ppPage on success.
2078	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if the address isn't valid.
2079	*
2080	* @param pPGM PGM handle.
2081	* @param GCPhys The GC physical address.
2082	* @param ppPage Where to store the page poitner on success.
2083	* @param ppRamHint Where to read and store the ram list hint.
2084	* The caller initializes this to NULL before the call.
2085	*/
2086	DECLINLINE(int) pgmPhysGetPageWithHintEx(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGE ppPage, PPGMRAMRANGE *ppRamHint)
2087	{
2088	RTGCPHYS off;
2089	PPGMRAMRANGE pRam = *ppRamHint;
2090	if ( !pRam
2091	\|\| RT_UNLIKELY((off = GCPhys - pRam->GCPhys) >= pRam->cb))
2092	{
2093	pRam = CTXSUFF(pPGM->pRamRanges);
2094	off = GCPhys - pRam->GCPhys;
2095	if (RT_UNLIKELY(off >= pRam->cb))
2096	{
2097	do
2098	{
2099	pRam = CTXSUFF(pRam->pNext);
2100	if (RT_UNLIKELY(!pRam))
2101	{
2102	ppPage = NULL; / Kill the incorrect and extremely annoying GCC warnings. */
2103	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2104	}
2105	off = GCPhys - pRam->GCPhys;
2106	} while (off >= pRam->cb);
2107	}
2108	*ppRamHint = pRam;
2109	}
2110	*ppPage = &pRam->aPages[off >> PAGE_SHIFT];
2111	#ifndef NEW_PHYS_CODE
2112
2113	/*
2114	* Make sure it's present.
2115	*/
2116	if (RT_UNLIKELY( !PGM_PAGE_GET_HCPHYS(*ppPage)
2117	&& (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)))
2118	{
2119	#ifdef IN_RING3
2120	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2121	#else
2122	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2123	#endif
2124	if (VBOX_FAILURE(rc))
2125	{
2126	ppPage = NULL; / Shut up annoying smart ass. */
2127	return rc;
2128	}
2129	Assert(rc == VINF_SUCCESS);
2130	}
2131	#endif
2132	return VINF_SUCCESS;
2133	}
2134
2135
2136	/**
2137	* Gets the PGMPAGE structure for a guest page together with the PGMRAMRANGE.
2138	*
2139	* @returns Pointer to the page on success.
2140	* @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
2141	*
2142	* @param pPGM PGM handle.
2143	* @param GCPhys The GC physical address.
2144	* @param ppRam Where to store the pointer to the PGMRAMRANGE.
2145	*/
2146	DECLINLINE(PPGMPAGE) pgmPhysGetPageAndRange(PPGM pPGM, RTGCPHYS GCPhys, PPGMRAMRANGE *ppRam)
2147	{
2148	/*
2149	* Optimize for the first range.
2150	*/
2151	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2152	RTGCPHYS off = GCPhys - pRam->GCPhys;
2153	if (RT_UNLIKELY(off >= pRam->cb))
2154	{
2155	do
2156	{
2157	pRam = CTXSUFF(pRam->pNext);
2158	if (RT_UNLIKELY(!pRam))
2159	return NULL;
2160	off = GCPhys - pRam->GCPhys;
2161	} while (off >= pRam->cb);
2162	}
2163	*ppRam = pRam;
2164	return &pRam->aPages[off >> PAGE_SHIFT];
2165	}
2166
2167
2168
2169
2170	/**
2171	* Gets the PGMPAGE structure for a guest page together with the PGMRAMRANGE.
2172	*
2173	* @returns Pointer to the page on success.
2174	* @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
2175	*
2176	* @param pPGM PGM handle.
2177	* @param GCPhys The GC physical address.
2178	* @param ppPage Where to store the pointer to the PGMPAGE structure.
2179	* @param ppRam Where to store the pointer to the PGMRAMRANGE structure.
2180	*/
2181	DECLINLINE(int) pgmPhysGetPageAndRangeEx(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGE ppPage, PPGMRAMRANGE *ppRam)
2182	{
2183	/*
2184	* Optimize for the first range.
2185	*/
2186	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2187	RTGCPHYS off = GCPhys - pRam->GCPhys;
2188	if (RT_UNLIKELY(off >= pRam->cb))
2189	{
2190	do
2191	{
2192	pRam = CTXSUFF(pRam->pNext);
2193	if (RT_UNLIKELY(!pRam))
2194	{
2195	ppRam = NULL; / Shut up silly GCC warnings. */
2196	ppPage = NULL; / ditto */
2197	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2198	}
2199	off = GCPhys - pRam->GCPhys;
2200	} while (off >= pRam->cb);
2201	}
2202	*ppRam = pRam;
2203	*ppPage = &pRam->aPages[off >> PAGE_SHIFT];
2204	#ifndef NEW_PHYS_CODE
2205
2206	/*
2207	* Make sure it's present.
2208	*/
2209	if (RT_UNLIKELY( !PGM_PAGE_GET_HCPHYS(*ppPage)
2210	&& (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)))
2211	{
2212	#ifdef IN_RING3
2213	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2214	#else
2215	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2216	#endif
2217	if (VBOX_FAILURE(rc))
2218	{
2219	ppPage = NULL; / Shut up silly GCC warnings. */
2220	ppPage = NULL; / ditto */
2221	return rc;
2222	}
2223	Assert(rc == VINF_SUCCESS);
2224
2225	}
2226	#endif
2227	return VINF_SUCCESS;
2228	}
2229
2230
2231	/**
2232	* Convert GC Phys to HC Phys.
2233	*
2234	* @returns VBox status.
2235	* @param pPGM PGM handle.
2236	* @param GCPhys The GC physical address.
2237	* @param pHCPhys Where to store the corresponding HC physical address.
2238	*
2239	* @deprecated Doesn't deal with zero, shared or write monitored pages.
2240	* Avoid when writing new code!
2241	*/
2242	DECLINLINE(int) pgmRamGCPhys2HCPhys(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
2243	{
2244	PPGMPAGE pPage;
2245	int rc = pgmPhysGetPageEx(pPGM, GCPhys, &pPage);
2246	if (VBOX_FAILURE(rc))
2247	return rc;
2248	*pHCPhys = PGM_PAGE_GET_HCPHYS(pPage) \| (GCPhys & PAGE_OFFSET_MASK);
2249	return VINF_SUCCESS;
2250	}
2251
2252
2253	#ifndef NEW_PHYS_CODE
2254	/**
2255	* Convert GC Phys to HC Virt.
2256	*
2257	* @returns VBox status.
2258	* @param pPGM PGM handle.
2259	* @param GCPhys The GC physical address.
2260	* @param pHCPtr Where to store the corresponding HC virtual address.
2261	*
2262	* @deprecated This will be eliminated by PGMPhysGCPhys2CCPtr.
2263	*/
2264	DECLINLINE(int) pgmRamGCPhys2HCPtr(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
2265	{
2266	PPGMRAMRANGE pRam;
2267	PPGMPAGE pPage;
2268	int rc = pgmPhysGetPageAndRangeEx(pPGM, GCPhys, &pPage, &pRam);
2269	if (VBOX_FAILURE(rc))
2270	{
2271	pHCPtr = 0; / Shut up silly GCC warnings. */
2272	return rc;
2273	}
2274	RTGCPHYS off = GCPhys - pRam->GCPhys;
2275
2276	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
2277	{
2278	unsigned iChunk = off >> PGM_DYNAMIC_CHUNK_SHIFT;
2279	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
2280	return VINF_SUCCESS;
2281	}
2282	if (pRam->pvHC)
2283	{
2284	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
2285	return VINF_SUCCESS;
2286	}
2287	pHCPtr = 0; / Shut up silly GCC warnings. */
2288	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2289	}
2290	#endif /* !NEW_PHYS_CODE */
2291
2292
2293	/**
2294	* Convert GC Phys to HC Virt.
2295	*
2296	* @returns VBox status.
2297	* @param PVM VM handle.
2298	* @param pRam Ram range
2299	* @param GCPhys The GC physical address.
2300	* @param pHCPtr Where to store the corresponding HC virtual address.
2301	*
2302	* @deprecated This will be eliminated. Don't use it.
2303	*/
2304	DECLINLINE(int) pgmRamGCPhys2HCPtrWithRange(PVM pVM, PPGMRAMRANGE pRam, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
2305	{
2306	RTGCPHYS off = GCPhys - pRam->GCPhys;
2307	Assert(off < pRam->cb);
2308
2309	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
2310	{
2311	unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
2312	/* Physical chunk in dynamically allocated range not present? */
2313	if (RT_UNLIKELY(!CTXSUFF(pRam->pavHCChunk)[idx]))
2314	{
2315	#ifdef IN_RING3
2316	int rc = pgmr3PhysGrowRange(pVM, GCPhys);
2317	#else
2318	int rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2319	#endif
2320	if (rc != VINF_SUCCESS)
2321	{
2322	pHCPtr = 0; / GCC crap */
2323	return rc;
2324	}
2325	}
2326	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
2327	return VINF_SUCCESS;
2328	}
2329	if (pRam->pvHC)
2330	{
2331	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
2332	return VINF_SUCCESS;
2333	}
2334	pHCPtr = 0; / GCC crap */
2335	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2336	}
2337
2338
2339	/**
2340	* Convert GC Phys to HC Virt and HC Phys.
2341	*
2342	* @returns VBox status.
2343	* @param pPGM PGM handle.
2344	* @param GCPhys The GC physical address.
2345	* @param pHCPtr Where to store the corresponding HC virtual address.
2346	* @param pHCPhys Where to store the HC Physical address and its flags.
2347	*
2348	* @deprecated Will go away or be changed. Only user is MapCR3. MapCR3 will have to do ring-3
2349	* and ring-0 locking of the CR3 in a lazy fashion I'm fear... or perhaps not. we'll see.
2350	*/
2351	DECLINLINE(int) pgmRamGCPhys2HCPtrAndHCPhysWithFlags(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr, PRTHCPHYS pHCPhys)
2352	{
2353	PPGMRAMRANGE pRam;
2354	PPGMPAGE pPage;
2355	int rc = pgmPhysGetPageAndRangeEx(pPGM, GCPhys, &pPage, &pRam);
2356	if (VBOX_FAILURE(rc))
2357	{
2358	pHCPtr = 0; / Shut up crappy GCC warnings */
2359	pHCPhys = 0; / ditto */
2360	return rc;
2361	}
2362	RTGCPHYS off = GCPhys - pRam->GCPhys;
2363
2364	pHCPhys = pPage->HCPhys; /* @todo PAGE FLAGS */
2365	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
2366	{
2367	unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
2368	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
2369	return VINF_SUCCESS;
2370	}
2371	if (pRam->pvHC)
2372	{
2373	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
2374	return VINF_SUCCESS;
2375	}
2376	*pHCPtr = 0;
2377	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2378	}
2379
2380
2381	/**
2382	* Clears flags associated with a RAM address.
2383	*
2384	* @returns VBox status code.
2385	* @param pPGM PGM handle.
2386	* @param GCPhys Guest context physical address.
2387	* @param fFlags fFlags to clear. (Bits 0-11.)
2388	*/
2389	DECLINLINE(int) pgmRamFlagsClearByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
2390	{
2391	PPGMPAGE pPage;
2392	int rc = pgmPhysGetPageEx(pPGM, GCPhys, &pPage);
2393	if (VBOX_FAILURE(rc))
2394	return rc;
2395
2396	fFlags &= ~X86_PTE_PAE_PG_MASK;
2397	pPage->HCPhys &= ~(RTHCPHYS)fFlags; /** @todo PAGE FLAGS */
2398	return VINF_SUCCESS;
2399	}
2400
2401
2402	/**
2403	* Clears flags associated with a RAM address.
2404	*
2405	* @returns VBox status code.
2406	* @param pPGM PGM handle.
2407	* @param GCPhys Guest context physical address.
2408	* @param fFlags fFlags to clear. (Bits 0-11.)
2409	* @param ppRamHint Where to read and store the ram list hint.
2410	* The caller initializes this to NULL before the call.
2411	*/
2412	DECLINLINE(int) pgmRamFlagsClearByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
2413	{
2414	PPGMPAGE pPage;
2415	int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, ppRamHint);
2416	if (VBOX_FAILURE(rc))
2417	return rc;
2418
2419	fFlags &= ~X86_PTE_PAE_PG_MASK;
2420	pPage->HCPhys &= ~(RTHCPHYS)fFlags; /** @todo PAGE FLAGS */
2421	return VINF_SUCCESS;
2422	}
2423
2424	/**
2425	* Sets (bitwise OR) flags associated with a RAM address.
2426	*
2427	* @returns VBox status code.
2428	* @param pPGM PGM handle.
2429	* @param GCPhys Guest context physical address.
2430	* @param fFlags fFlags to set clear. (Bits 0-11.)
2431	*/
2432	DECLINLINE(int) pgmRamFlagsSetByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
2433	{
2434	PPGMPAGE pPage;
2435	int rc = pgmPhysGetPageEx(pPGM, GCPhys, &pPage);
2436	if (VBOX_FAILURE(rc))
2437	return rc;
2438
2439	fFlags &= ~X86_PTE_PAE_PG_MASK;
2440	pPage->HCPhys \|= fFlags; /** @todo PAGE FLAGS */
2441	return VINF_SUCCESS;
2442	}
2443
2444
2445	/**
2446	* Sets (bitwise OR) flags associated with a RAM address.
2447	*
2448	* @returns VBox status code.
2449	* @param pPGM PGM handle.
2450	* @param GCPhys Guest context physical address.
2451	* @param fFlags fFlags to set clear. (Bits 0-11.)
2452	* @param ppRamHint Where to read and store the ram list hint.
2453	* The caller initializes this to NULL before the call.
2454	*/
2455	DECLINLINE(int) pgmRamFlagsSetByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
2456	{
2457	PPGMPAGE pPage;
2458	int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, ppRamHint);
2459	if (VBOX_FAILURE(rc))
2460	return rc;
2461
2462	fFlags &= ~X86_PTE_PAE_PG_MASK;
2463	pPage->HCPhys \|= fFlags; /** @todo PAGE FLAGS */
2464	return VINF_SUCCESS;
2465	}
2466
2467
2468	/**
2469	* Gets the page directory for the specified address.
2470	*
2471	* @returns Pointer to the page directory in question.
2472	* @returns NULL if the page directory is not present or on an invalid page.
2473	* @param pPGM Pointer to the PGM instance data.
2474	* @param GCPtr The address.
2475	*/
2476	DECLINLINE(PX86PDPAE) pgmGstGetPaePD(PPGM pPGM, RTGCUINTPTR GCPtr)
2477	{
2478	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2479	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2480	{
2481	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2482	return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr];
2483
2484	/* cache is out-of-sync. */
2485	PX86PDPAE pPD;
2486	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2487	if (VBOX_SUCCESS(rc))
2488	return pPD;
2489	AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2490	/* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page of some kind emualted as all 0s. */
2491	}
2492	return NULL;
2493	}
2494
2495
2496	/**
2497	* Gets the page directory entry for the specified address.
2498	*
2499	* @returns Pointer to the page directory entry in question.
2500	* @returns NULL if the page directory is not present or on an invalid page.
2501	* @param pPGM Pointer to the PGM instance data.
2502	* @param GCPtr The address.
2503	*/
2504	DECLINLINE(PX86PDEPAE) pgmGstGetPaePDEPtr(PPGM pPGM, RTGCUINTPTR GCPtr)
2505	{
2506	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2507	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2508	{
2509	const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
2510	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2511	return &CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD];
2512
2513	/* The cache is out-of-sync. */
2514	PX86PDPAE pPD;
2515	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2516	if (VBOX_SUCCESS(rc))
2517	return &pPD->a[iPD];
2518	AssertMsgFailed(("Impossible! rc=%Vrc PDPE=%RX64\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2519	/* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page or something which we'll emulate as all 0s. */
2520	}
2521	return NULL;
2522	}
2523
2524
2525	/**
2526	* Gets the page directory entry for the specified address.
2527	*
2528	* @returns The page directory entry in question.
2529	* @returns A non-present entry if the page directory is not present or on an invalid page.
2530	* @param pPGM Pointer to the PGM instance data.
2531	* @param GCPtr The address.
2532	*/
2533	DECLINLINE(uint64_t) pgmGstGetPaePDE(PPGM pPGM, RTGCUINTPTR GCPtr)
2534	{
2535	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2536	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2537	{
2538	const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
2539	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2540	return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD].u;
2541
2542	/* cache is out-of-sync. */
2543	PX86PDPAE pPD;
2544	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2545	if (VBOX_SUCCESS(rc))
2546	return pPD->a[iPD].u;
2547	AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2548	}
2549	return 0;
2550	}
2551
2552
2553	/**
2554	* Checks if any of the specified page flags are set for the given page.
2555	*
2556	* @returns true if any of the flags are set.
2557	* @returns false if all the flags are clear.
2558	* @param pPGM PGM handle.
2559	* @param GCPhys The GC physical address.
2560	* @param fFlags The flags to check for.
2561	*/
2562	DECLINLINE(bool) pgmRamTestFlags(PPGM pPGM, RTGCPHYS GCPhys, uint64_t fFlags)
2563	{
2564	PPGMPAGE pPage = pgmPhysGetPage(pPGM, GCPhys);
2565	return pPage
2566	&& (pPage->HCPhys & fFlags) != 0; /** @todo PAGE FLAGS */
2567	}
2568
2569
2570	/**
2571	* Gets the ram flags for a handler.
2572	*
2573	* @returns The ram flags.
2574	* @param pCur The physical handler in question.
2575	*/
2576	DECLINLINE(unsigned) pgmHandlerPhysicalCalcFlags(PPGMPHYSHANDLER pCur)
2577	{
2578	switch (pCur->enmType)
2579	{
2580	case PGMPHYSHANDLERTYPE_PHYSICAL:
2581	return MM_RAM_FLAGS_PHYSICAL_HANDLER;
2582
2583	case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
2584	return MM_RAM_FLAGS_PHYSICAL_HANDLER \| MM_RAM_FLAGS_PHYSICAL_WRITE;
2585
2586	case PGMPHYSHANDLERTYPE_MMIO:
2587	case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
2588	return MM_RAM_FLAGS_PHYSICAL_HANDLER \| MM_RAM_FLAGS_PHYSICAL_ALL;
2589
2590	default:
2591	AssertFatalMsgFailed(("Invalid type %d\n", pCur->enmType));
2592	}
2593	}
2594
2595
2596	/**
2597	* Clears one physical page of a virtual handler
2598	*
2599	* @param pPGM Pointer to the PGM instance.
2600	* @param pCur Virtual handler structure
2601	* @param iPage Physical page index
2602	*/
2603	DECLINLINE(void) pgmHandlerVirtualClearPage(PPGM pPGM, PPGMVIRTHANDLER pCur, unsigned iPage)
2604	{
2605	const PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
2606
2607	/*
2608	* Remove the node from the tree (it's supposed to be in the tree if we get here!).
2609	*/
2610	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2611	AssertReleaseMsg(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
2612	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2613	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
2614	#endif
2615	if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD)
2616	{
2617	/* We're the head of the alias chain. */
2618	PPGMPHYS2VIRTHANDLER pRemove = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRemove(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key); NOREF(pRemove);
2619	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2620	AssertReleaseMsg(pRemove != NULL,
2621	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2622	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
2623	AssertReleaseMsg(pRemove == pPhys2Virt,
2624	("wanted: pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n"
2625	" got: pRemove=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2626	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias,
2627	pRemove, pRemove->Core.Key, pRemove->Core.KeyLast, pRemove->offVirtHandler, pRemove->offNextAlias));
2628	#endif
2629	if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
2630	{
2631	/* Insert the next list in the alias chain into the tree. */
2632	PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2633	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2634	AssertReleaseMsg(pNext->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
2635	("pNext=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2636	pNext, pNext->Core.Key, pNext->Core.KeyLast, pNext->offVirtHandler, pNext->offNextAlias));
2637	#endif
2638	pNext->offNextAlias \|= PGMPHYS2VIRTHANDLER_IS_HEAD;
2639	bool fRc = RTAvlroGCPhysInsert(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, &pNext->Core);
2640	AssertRelease(fRc);
2641	}
2642	}
2643	else
2644	{
2645	/* Locate the previous node in the alias chain. */
2646	PPGMPHYS2VIRTHANDLER pPrev = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
2647	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2648	AssertReleaseMsg(pPrev != pPhys2Virt,
2649	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
2650	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
2651	#endif
2652	for (;;)
2653	{
2654	PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPrev + (pPrev->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2655	if (pNext == pPhys2Virt)
2656	{
2657	/* unlink. */
2658	LogFlow(("pgmHandlerVirtualClearPage: removed %p:{.offNextAlias=%#RX32} from alias chain. prev %p:{.offNextAlias=%#RX32} [%VGp-%VGp]\n",
2659	pPhys2Virt, pPhys2Virt->offNextAlias, pPrev, pPrev->offNextAlias, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
2660	if (!(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
2661	pPrev->offNextAlias &= ~PGMPHYS2VIRTHANDLER_OFF_MASK;
2662	else
2663	{
2664	PPGMPHYS2VIRTHANDLER pNewNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2665	pPrev->offNextAlias = ((intptr_t)pNewNext - (intptr_t)pPrev)
2666	\| (pPrev->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
2667	}
2668	break;
2669	}
2670
2671	/* next */
2672	if (pNext == pPrev)
2673	{
2674	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2675	AssertReleaseMsg(pNext != pPrev,
2676	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
2677	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
2678	#endif
2679	break;
2680	}
2681	pPrev = pNext;
2682	}
2683	}
2684	Log2(("PHYS2VIRT: Removing %VGp-%VGp %#RX32 %s\n",
2685	pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, HCSTRING(pCur->pszDesc)));
2686	pPhys2Virt->offNextAlias = 0;
2687	pPhys2Virt->Core.KeyLast = NIL_RTGCPHYS; /* require reinsert */
2688
2689	/*
2690	* Clear the ram flags for this page.
2691	*/
2692	int rc = pgmRamFlagsClearByGCPhys(pPGM, pPhys2Virt->Core.Key,
2693	MM_RAM_FLAGS_VIRTUAL_HANDLER \| MM_RAM_FLAGS_VIRTUAL_ALL \| MM_RAM_FLAGS_VIRTUAL_WRITE);
2694	AssertRC(rc);
2695	}
2696
2697
2698	/**
2699	* Internal worker for finding a 'in-use' shadow page give by it's physical address.
2700	*
2701	* @returns Pointer to the shadow page structure.
2702	* @param pPool The pool.
2703	* @param HCPhys The HC physical address of the shadow page.
2704	*/
2705	DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPage(PPGMPOOL pPool, RTHCPHYS HCPhys)
2706	{
2707	/*
2708	* Look up the page.
2709	*/
2710	PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, HCPhys & X86_PTE_PAE_PG_MASK);
2711	AssertFatalMsg(pPage && pPage->enmKind != PGMPOOLKIND_FREE, ("HCPhys=%VHp pPage=%p type=%d\n", HCPhys, pPage, (pPage) ? pPage->enmKind : 0));
2712	return pPage;
2713	}
2714
2715
2716	/**
2717	* Internal worker for finding a 'in-use' shadow page give by it's physical address.
2718	*
2719	* @returns Pointer to the shadow page structure.
2720	* @param pPool The pool.
2721	* @param idx The pool page index.
2722	*/
2723	DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPageByIdx(PPGMPOOL pPool, unsigned idx)
2724	{
2725	AssertFatalMsg(idx >= PGMPOOL_IDX_FIRST && idx < pPool->cCurPages, ("idx=%d\n", idx));
2726	return &pPool->aPages[idx];
2727	}
2728
2729
2730	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2731	/**
2732	* Clear references to guest physical memory.
2733	*
2734	* @param pPool The pool.
2735	* @param pPoolPage The pool page.
2736	* @param pPhysPage The physical guest page tracking structure.
2737	*/
2738	DECLINLINE(void) pgmTrackDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPoolPage, PPGMPAGE pPhysPage)
2739	{
2740	/*
2741	* Just deal with the simple case here.
2742	*/
2743	#ifdef LOG_ENABLED
2744	const RTHCPHYS HCPhysOrg = pPhysPage->HCPhys; /** @todo PAGE FLAGS */
2745	#endif
2746	const unsigned cRefs = pPhysPage->HCPhys >> MM_RAM_FLAGS_CREFS_SHIFT; /** @todo PAGE FLAGS */
2747	if (cRefs == 1)
2748	{
2749	Assert(pPoolPage->idx == ((pPhysPage->HCPhys >> MM_RAM_FLAGS_IDX_SHIFT) & MM_RAM_FLAGS_IDX_MASK));
2750	pPhysPage->HCPhys = pPhysPage->HCPhys & MM_RAM_FLAGS_NO_REFS_MASK;
2751	}
2752	else
2753	pgmPoolTrackPhysExtDerefGCPhys(pPool, pPoolPage, pPhysPage);
2754	LogFlow(("pgmTrackDerefGCPhys: HCPhys=%RHp -> %RHp\n", HCPhysOrg, pPhysPage->HCPhys));
2755	}
2756	#endif
2757
2758
2759	#ifdef PGMPOOL_WITH_CACHE
2760	/**
2761	* Moves the page to the head of the age list.
2762	*
2763	* This is done when the cached page is used in one way or another.
2764	*
2765	* @param pPool The pool.
2766	* @param pPage The cached page.
2767	* @todo inline in PGMInternal.h!
2768	*/
2769	DECLINLINE(void) pgmPoolCacheUsed(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
2770	{
2771	/*
2772	* Move to the head of the age list.
2773	*/
2774	if (pPage->iAgePrev != NIL_PGMPOOL_IDX)
2775	{
2776	/* unlink */
2777	pPool->aPages[pPage->iAgePrev].iAgeNext = pPage->iAgeNext;
2778	if (pPage->iAgeNext != NIL_PGMPOOL_IDX)
2779	pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->iAgePrev;
2780	else
2781	pPool->iAgeTail = pPage->iAgePrev;
2782
2783	/* insert at head */
2784	pPage->iAgePrev = NIL_PGMPOOL_IDX;
2785	pPage->iAgeNext = pPool->iAgeHead;
2786	Assert(pPage->iAgeNext != NIL_PGMPOOL_IDX); /* we would've already been head then */
2787	pPool->iAgeHead = pPage->idx;
2788	pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->idx;
2789	}
2790	}
2791	#endif /* PGMPOOL_WITH_CACHE */
2792
2793	/**
2794	* Tells if mappings are to be put into the shadow page table or not
2795	*
2796	* @returns boolean result
2797	* @param pVM VM handle.
2798	*/
2799
2800	DECLINLINE(bool) pgmMapAreMappingsEnabled(PPGM pPGM)
2801	{
2802	return !pPGM->fDisableMappings;
2803	}
2804
2805	/** @} */
2806
2807	#endif

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source: vbox/trunk/src/VBox/VMM/PGMInternal.h@ 4689

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