PGMMap.cpp@ 1575

Last change on this file since 1575 was 1575, checked in by vboxsync, 18 years ago
Check for hypervisor area & intermediate mapping conflicts too.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 39.9 KB

Line
1	/* $Id: PGMMap.cpp 1575 2007-03-20 10:23:17Z vboxsync $ */
2	/** @file
3	* PGM - Page Manager, Guest Context Mappings.
4	*/
5
6	/*
7	* Copyright (C) 2006 InnoTek Systemberatung GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* If you received this file as part of a commercial VirtualBox
18	* distribution, then only the terms of your commercial VirtualBox
19	* license agreement apply instead of the previous paragraph.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_PGM
27	#include <VBox/dbgf.h>
28	#include <VBox/pgm.h>
29	#include "PGMInternal.h"
30	#include <VBox/vm.h>
31
32	#include <VBox/log.h>
33	#include <VBox/err.h>
34	#include <iprt/asm.h>
35	#include <iprt/assert.h>
36	#include <iprt/string.h>
37
38
39	/*******************************************************************************
40	* Internal Functions *
41	*******************************************************************************/
42	static void pgmR3MapClearPDEs(PPGM pPGM, PPGMMAPPING pMap, int iOldPDE);
43	static void pgmR3MapSetPDEs(PVM pVM, PPGMMAPPING pMap, int iNewPDE);
44	static DECLCALLBACK(int) pgmR3DumpMappingsPhysicalCB(PAVLROGCPHYSNODECORE pNode, void *pvUser);
45	static int pgmR3MapIntermediateCheckOne(PVM pVM, uintptr_t uAddress, unsigned cPages, PX86PT pPTDefault, PX86PTPAE pPTPaeDefault);
46	static void pgmR3MapIntermediateDoOne(PVM pVM, uintptr_t uAddress, RTHCPHYS HCPhys, unsigned cPages, PX86PT pPTDefault, PX86PTPAE pPTPaeDefault);
47
48
49
50	/**
51	* Creates a page table based mapping in GC.
52	*
53	* @returns VBox status code.
54	* @param pVM VM Handle.
55	* @param GCPtr Virtual Address. (Page table aligned!)
56	* @param cb Size of the range. Must be a 4MB aligned!
57	* @param pfnRelocate Relocation callback function.
58	* @param pvUser User argument to the callback.
59	* @param pszDesc Pointer to description string. This must not be freed.
60	*/
61	PGMR3DECL(int) PGMR3MapPT(PVM pVM, RTGCPTR GCPtr, size_t cb, PFNPGMRELOCATE pfnRelocate, void pvUser, const char pszDesc)
62	{
63	LogFlow(("PGMR3MapPT: GCPtr=%#x cb=%d pfnRelocate=%p pvUser=%p pszDesc=%s\n", GCPtr, cb, pfnRelocate, pvUser, pszDesc));
64	AssertMsg(pVM->pgm.s.pInterPD && pVM->pgm.s.pHC32BitPD, ("Paging isn't initialized, init order problems!\n"));
65
66	/*
67	* Validate input.
68	*/
69	if (cb < _2M \|\| cb > 64 * _1M)
70	{
71	AssertMsgFailed(("Serious? cb=%d\n", cb));
72	return VERR_INVALID_PARAMETER;
73	}
74	cb = RT_ALIGN_Z(cb, _4M);
75	RTGCPTR GCPtrLast = GCPtr + cb - 1;
76	if (GCPtrLast < GCPtr)
77	{
78	AssertMsgFailed(("Range wraps! GCPtr=%x GCPtrLast=%x\n", GCPtr, GCPtrLast));
79	return VERR_INVALID_PARAMETER;
80	}
81	if (pVM->pgm.s.fMappingsFixed)
82	{
83	AssertMsgFailed(("Mappings are fixed! It's not possible to add new mappings at this time!\n"));
84	return VERR_PGM_MAPPINGS_FIXED;
85	}
86	if (!pfnRelocate)
87	{
88	AssertMsgFailed(("Callback is required\n"));
89	return VERR_INVALID_PARAMETER;
90	}
91
92	/*
93	* Find list location.
94	*/
95	PPGMMAPPING pPrev = NULL;
96	PPGMMAPPING pCur = pVM->pgm.s.pMappingsHC;
97	while (pCur)
98	{
99	if (pCur->GCPtrLast >= GCPtr && pCur->GCPtr <= GCPtrLast)
100	{
101	AssertMsgFailed(("Address is already in use by %s. req %#x-%#x take %#x-%#x\n",
102	pCur->pszDesc, GCPtr, GCPtrLast, pCur->GCPtr, pCur->GCPtrLast));
103	LogRel(("VERR_PGM_MAPPING_CONFLICT: Address is already in use by %s. req %#x-%#x take %#x-%#x\n",pCur->pszDesc, GCPtr, GCPtrLast, pCur->GCPtr, pCur->GCPtrLast));
104	return VERR_PGM_MAPPING_CONFLICT;
105	}
106	if (pCur->GCPtr > GCPtr)
107	break;
108	pPrev = pCur;
109	pCur = pCur->pNextHC;
110	}
111	/** @todo this needs fixing, the function must relocate on conflict, not fail! */
112
113	/*
114	* Check for conflicts with intermediate mappings.
115	*/
116	const unsigned iPageDir = GCPtr >> PGDIR_SHIFT;
117	const unsigned cPTs = cb >> PGDIR_SHIFT;
118	unsigned i;
119	for (i = 0; i < cPTs; i++)
120	{
121	if (pVM->pgm.s.pInterPD->a[iPageDir + i].n.u1Present)
122	{
123	AssertMsgFailed(("Address %#x is already in use by an intermediate mapping.\n", GCPtr + (i << PAGE_SHIFT)));
124	LogRel(("VERR_PGM_MAPPING_CONFLICT: Address %#x is already in use by an intermediate mapping.\n", GCPtr + (i << PAGE_SHIFT)));
125	return VERR_PGM_MAPPING_CONFLICT;
126	}
127	}
128	/** @todo AMD64: add check in PAE structures too, so we can remove all the 32-Bit paging stuff there. */
129
130	/*
131	* Allocate and initialize the new list node.
132	*/
133	PPGMMAPPING pNew;
134	int rc = MMHyperAlloc(pVM, RT_OFFSETOF(PGMMAPPING, aPTs[cPTs]), 0, MM_TAG_PGM, (void **)&pNew);
135	if (VBOX_FAILURE(rc))
136	return rc;
137	pNew->GCPtr = GCPtr;
138	pNew->GCPtrLast = GCPtrLast;
139	pNew->cb = cb;
140	pNew->pszDesc = pszDesc;
141	pNew->pfnRelocate = pfnRelocate;
142	pNew->pvUser = pvUser;
143	pNew->cPTs = cPTs;
144
145	/*
146	* Allocate page tables and insert them into the page directories.
147	* (One 32-bit PT and two PAE PTs.)
148	*/
149	uint8_t *pbPTs;
150	rc = MMHyperAlloc(pVM, PAGE_SIZE * 3 * cPTs, PAGE_SIZE, MM_TAG_PGM, (void **)&pbPTs);
151	if (VBOX_FAILURE(rc))
152	{
153	MMHyperFree(pVM, pNew);
154	return VERR_NO_MEMORY;
155	}
156
157	/*
158	* Init the page tables and insert them into the page directories.
159	*/
160	Log4(("PGMR3MapPT: GCPtr=%VGv cPTs=%u pbPTs=%p\n", GCPtr, cPTs, pbPTs));
161	for (i = 0; i < cPTs; i++)
162	{
163	/*
164	* 32-bit.
165	*/
166	pNew->aPTs[i].pPTHC = (PVBOXPT)pbPTs;
167	pNew->aPTs[i].pPTGC = MMHyperHC2GC(pVM, pNew->aPTs[i].pPTHC);
168	pNew->aPTs[i].HCPhysPT = MMR3HyperHCVirt2HCPhys(pVM, pNew->aPTs[i].pPTHC);
169	pbPTs += PAGE_SIZE;
170	Log4(("PGMR3MapPT: i=%d: pPTHC=%p pPTGC=%p HCPhysPT=%RHp\n",
171	i, pNew->aPTs[i].pPTHC, pNew->aPTs[i].pPTGC, pNew->aPTs[i].HCPhysPT));
172
173	/*
174	* PAE.
175	*/
176	pNew->aPTs[i].HCPhysPaePT0 = MMR3HyperHCVirt2HCPhys(pVM, pbPTs);
177	pNew->aPTs[i].HCPhysPaePT1 = MMR3HyperHCVirt2HCPhys(pVM, pbPTs + PAGE_SIZE);
178	pNew->aPTs[i].paPaePTsHC = (PX86PTPAE)pbPTs;
179	pNew->aPTs[i].paPaePTsGC = MMHyperHC2GC(pVM, pbPTs);
180	pbPTs += PAGE_SIZE * 2;
181	Log4(("PGMR3MapPT: i=%d: paPaePTsHC=%p paPaePTsGC=%p HCPhysPaePT0=%RHp HCPhysPaePT1=%RHp\n",
182	i, pNew->aPTs[i].paPaePTsHC, pNew->aPTs[i].paPaePTsGC, pNew->aPTs[i].HCPhysPaePT0, pNew->aPTs[i].HCPhysPaePT1));
183	}
184	pgmR3MapSetPDEs(pVM, pNew, iPageDir);
185
186	/*
187	* Insert the new mapping.
188	*/
189	pNew->pNextHC = pCur;
190	pNew->pNextGC = pCur ? MMHyperHC2GC(pVM, pCur) : 0;
191	if (pPrev)
192	{
193	pPrev->pNextHC = pNew;
194	pPrev->pNextGC = MMHyperHC2GC(pVM, pNew);
195	}
196	else
197	{
198	pVM->pgm.s.pMappingsHC = pNew;
199	pVM->pgm.s.pMappingsGC = MMHyperHC2GC(pVM, pNew);
200	}
201
202	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
203	return VINF_SUCCESS;
204	}
205
206
207	/**
208	* Removes a page table based mapping.
209	*
210	* @returns VBox status code.
211	* @param pVM VM Handle.
212	* @param GCPtr Virtual Address. (Page table aligned!)
213	*/
214	PGMR3DECL(int) PGMR3UnmapPT(PVM pVM, RTGCPTR GCPtr)
215	{
216	LogFlow(("PGMR3UnmapPT: GCPtr=%#x\n", GCPtr));
217
218	/*
219	* Find it.
220	*/
221	PPGMMAPPING pPrev = NULL;
222	PPGMMAPPING pCur = pVM->pgm.s.pMappingsHC;
223	while (pCur)
224	{
225	if (pCur->GCPtr == GCPtr)
226	{
227	/*
228	* Unlink it.
229	*/
230	if (pPrev)
231	{
232	pPrev->pNextHC = pCur->pNextHC;
233	pPrev->pNextGC = pCur->pNextGC;
234	}
235	else
236	{
237	pVM->pgm.s.pMappingsHC = pCur->pNextHC;
238	pVM->pgm.s.pMappingsGC = pCur->pNextGC;
239	}
240
241	/*
242	* Free the page table memory, clear page directory entries
243	* and free the page tables and node memory.
244	*/
245	MMHyperFree(pVM, pCur->aPTs[0].pPTHC);
246	pgmR3MapClearPDEs(&pVM->pgm.s, pCur, pCur->GCPtr >> PGDIR_SHIFT);
247	MMHyperFree(pVM, pCur);
248
249	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
250	return VINF_SUCCESS;
251	}
252
253	/* done? */
254	if (pCur->GCPtr > GCPtr)
255	break;
256
257	/* next */
258	pPrev = pCur;
259	pCur = pCur->pNextHC;
260	}
261
262	AssertMsgFailed(("No mapping for %#x found!\n", GCPtr));
263	return VERR_INVALID_PARAMETER;
264	}
265
266
267	/**
268	* Gets the size of the current guest mappings if they were to be
269	* put next to oneanother.
270	*
271	* @returns VBox status code.
272	* @param pVM The VM.
273	* @param pcb Where to store the size.
274	*/
275	PGMR3DECL(int) PGMR3MappingsSize(PVM pVM, size_t *pcb)
276	{
277	size_t cb = 0;
278	for (PPGMMAPPING pCur = pVM->pgm.s.pMappingsHC; pCur; pCur = pCur->pNextHC)
279	cb += pCur->cb;
280
281	*pcb = cb;
282	Log(("PGMR3MappingsSize: return %d (%#x) bytes\n", cb, cb));
283	return VINF_SUCCESS;
284	}
285
286
287	/**
288	* Fixes the guest context mappings in a range reserved from the Guest OS.
289	*
290	* @returns VBox status code.
291	* @param pVM The VM.
292	* @param GCPtrBase The address of the reserved range of guest memory.
293	* @param cb The size of the range starting at GCPtrBase.
294	*/
295	PGMR3DECL(int) PGMR3MappingsFix(PVM pVM, RTGCPTR GCPtrBase, size_t cb)
296	{
297	Log(("PGMR3MappingsFix: GCPtrBase=%#x cb=%#x\n", GCPtrBase, cb));
298
299	/*
300	* This is all or nothing at all. So, a tiny bit of paranoia first.
301	*/
302	if (GCPtrBase & PAGE_OFFSET_MASK_BIG)
303	{
304	AssertMsgFailed(("GCPtrBase (%#x) has to be aligned on a 4MB address!\n", GCPtrBase));
305	return VERR_INVALID_PARAMETER;
306	}
307	if (!cb \|\| (cb & PAGE_OFFSET_MASK_BIG))
308	{
309	AssertMsgFailed(("cb (%#x) is 0 or not aligned on a 4MB address!\n", cb));
310	return VERR_INVALID_PARAMETER;
311	}
312
313	/*
314	* Before we do anything we'll do a forced PD sync to try make sure any
315	* pending relocations because of these mappings have been resolved.
316	*/
317	PGMSyncCR3(pVM, CPUMGetGuestCR0(pVM), CPUMGetGuestCR3(pVM), CPUMGetGuestCR4(pVM), true);
318
319	/*
320	* Check that it's not conflicting with a core code mapping in the intermediate page table.
321	*/
322	unsigned iPDNew = GCPtrBase >> PGDIR_SHIFT;
323	unsigned i = cb >> PGDIR_SHIFT;
324	while (i-- > 0)
325	{
326	if (pVM->pgm.s.pInterPD->a[iPDNew + i].n.u1Present)
327	{
328	/* Check that it's not one or our mappings. */
329	PPGMMAPPING pCur = pVM->pgm.s.pMappingsHC;
330	while (pCur)
331	{
332	if (iPDNew + i - (pCur->GCPtr >> PGDIR_SHIFT) < (pCur->cb >> PGDIR_SHIFT))
333	break;
334	pCur = pCur->pNextHC;
335	}
336	if (!pCur)
337	{
338	LogRel(("PGMR3MappingsFix: Conflicts with intermediate PDE %#x (GCPtrBase=%VGv cb=%#zx). The guest should retry.\n",
339	iPDNew + i, GCPtrBase, cb));
340	return VERR_PGM_MAPPINGS_FIX_CONFLICT;
341	}
342	}
343	}
344
345	/*
346	* Loop the mappings and check that they all agree on their new locations.
347	*/
348	RTGCPTR GCPtrCur = GCPtrBase;
349	PPGMMAPPING pCur = pVM->pgm.s.pMappingsHC;
350	while (pCur)
351	{
352	if (!pCur->pfnRelocate(pVM, pCur->GCPtr, GCPtrCur, PGMRELOCATECALL_SUGGEST, pCur->pvUser))
353	{
354	AssertMsgFailed(("The suggested fixed address %#x was rejected by '%s'!\n", GCPtrCur, pCur->pszDesc));
355	return VERR_PGM_MAPPINGS_FIX_REJECTED;
356	}
357	/* next */
358	GCPtrCur += pCur->cb;
359	pCur = pCur->pNextHC;
360	}
361	if (GCPtrCur > GCPtrBase + cb)
362	{
363	AssertMsgFailed(("cb (%#x) is less than the required range %#x!\n", cb, GCPtrCur - GCPtrBase));
364	return VERR_PGM_MAPPINGS_FIX_TOO_SMALL;
365	}
366
367	/*
368	* Loop the table assigning the mappings to the passed in memory
369	* and call their relocator callback.
370	*/
371	GCPtrCur = GCPtrBase;
372	pCur = pVM->pgm.s.pMappingsHC;
373	while (pCur)
374	{
375	unsigned iPDOld = pCur->GCPtr >> PGDIR_SHIFT;
376	iPDNew = GCPtrCur >> PGDIR_SHIFT;
377
378	/*
379	* Relocate the page table(s).
380	*/
381	pgmR3MapClearPDEs(&pVM->pgm.s, pCur, iPDOld);
382	pgmR3MapSetPDEs(pVM, pCur, iPDNew);
383
384	/*
385	* Update the entry.
386	*/
387	pCur->GCPtr = GCPtrCur;
388	pCur->GCPtrLast = GCPtrCur + pCur->cb - 1;
389
390	/*
391	* Callback to execute the relocation.
392	*/
393	pCur->pfnRelocate(pVM, iPDOld << PGDIR_SHIFT, iPDNew << PGDIR_SHIFT, PGMRELOCATECALL_RELOCATE, pCur->pvUser);
394
395	/*
396	* Advance.
397	*/
398	GCPtrCur += pCur->cb;
399	pCur = pCur->pNextHC;
400	}
401
402	/*
403	* Turn off CR3 updating monitoring.
404	*/
405	int rc2 = PGM_GST_PFN(UnmonitorCR3, pVM)(pVM);
406	AssertRC(rc2);
407
408	/*
409	* Mark the mappings as fixed and return.
410	*/
411	pVM->pgm.s.fMappingsFixed = true;
412	pVM->pgm.s.GCPtrMappingFixed = GCPtrBase;
413	pVM->pgm.s.cbMappingFixed = cb;
414	pVM->pgm.s.fSyncFlags &= ~PGM_SYNC_MONITOR_CR3;
415	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
416	return VINF_SUCCESS;
417	}
418
419
420	/**
421	* Unfixes the mappings.
422	* After calling this function mapping conflict detection will be enabled.
423	*
424	* @returns VBox status code.
425	* @param pVM The VM.
426	*/
427	PGMR3DECL(int) PGMR3MappingsUnfix(PVM pVM)
428	{
429	Log(("PGMR3MappingsUnfix: fMappingsFixed=%d\n", pVM->pgm.s.fMappingsFixed));
430	pVM->pgm.s.fMappingsFixed = false;
431	pVM->pgm.s.GCPtrMappingFixed = 0;
432	pVM->pgm.s.cbMappingFixed = 0;
433	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
434
435	/*
436	* Re-enable the CR3 monitoring.
437	*
438	* Paranoia: We flush the page pool before doing that because Windows
439	* is using the CR3 page both as a PD and a PT, e.g. the pool may
440	* be monitoring it.
441	*/
442	#ifdef PGMPOOL_WITH_MONITORING
443	pgmPoolFlushAll(pVM);
444	#endif
445	int rc = PGM_GST_PFN(MonitorCR3, pVM)(pVM, pVM->pgm.s.GCPhysCR3);
446	AssertRC(rc);
447
448	return VINF_SUCCESS;
449	}
450
451
452	/**
453	* Map pages into the intermediate context (switcher code).
454	* These pages are mapped at both the give virtual address and at
455	* the physical address (for identity mapping).
456	*
457	* @returns VBox status code.
458	* @param pVM The virtual machine.
459	* @param Addr Intermediate context address of the mapping.
460	* @param HCPhys Start of the range of physical pages. This must be entriely below 4GB!
461	* @param cbPages Number of bytes to map.
462	*
463	* @remark This API shall not be used to anything but mapping the switcher code.
464	*/
465	PGMR3DECL(int) PGMR3MapIntermediate(PVM pVM, RTUINTPTR Addr, RTHCPHYS HCPhys, unsigned cbPages)
466	{
467	size_t cbHyper;
468	RTGCPTR pvHyperGC;
469
470	LogFlow(("PGMR3MapIntermediate: Addr=%RTptr HCPhys=%VHp cbPages=%#x\n", Addr, HCPhys, cbPages));
471
472	/*
473	* Adjust input.
474	*/
475	cbPages += (uint32_t)HCPhys & PAGE_OFFSET_MASK;
476	cbPages = RT_ALIGN(cbPages, PAGE_SIZE);
477	HCPhys &= X86_PTE_PAE_PG_MASK;
478	Addr &= PAGE_BASE_MASK;
479	/* We only care about the first 4GB, because on AMD64 we'll be repeating them all over the address space. */
480	uint32_t uAddress = (uint32_t)Addr;
481
482	/*
483	* Assert input and state.
484	*/
485	AssertMsg(pVM->pgm.s.offVM, ("Bad init order\n"));
486	AssertMsg(pVM->pgm.s.pInterPD, ("Bad init order, paging.\n"));
487	AssertMsg(cbPages <= (512 << PAGE_SHIFT), ("The mapping is too big %d bytes\n", cbPages));
488	AssertMsg(HCPhys < _4G && HCPhys + cbPages < _4G, ("Addr=%RTptr HCPhys=%VHp cbPages=%d\n", Addr, HCPhys, cbPages));
489
490	/*
491	* Check for internal conflicts between the virtual address and the physical address.
492	*/
493	if ( uAddress != HCPhys
494	&& ( uAddress < HCPhys
495	? HCPhys - uAddress < cbPages
496	: uAddress - HCPhys < cbPages
497	)
498	)
499	{
500	AssertMsgFailed(("Addr=%RTptr HCPhys=%VHp cbPages=%d\n", Addr, HCPhys, cbPages));
501	LogRel(("Addr=%RTptr HCPhys=%VHp cbPages=%d\n", Addr, HCPhys, cbPages));
502	return VERR_PGM_MAPPINGS_FIX_CONFLICT; /** @todo new error code */
503	}
504
505	/* The intermediate mapping must not conflict with our default hypervisor address. */
506	pvHyperGC = MMHyperGetArea(pVM, &cbHyper);
507	if ( uAddress < pvHyperGC
508	? uAddress + cbPages > pvHyperGC
509	: pvHyperGC + cbHyper > uAddress
510	)
511	{
512	AssertMsgFailed(("Addr=%RTptr HyperGC=%VGv cbPages=%d\n", Addr, pvHyperGC, cbPages));
513	LogRel(("Addr=%RTptr HyperGC=%VGv cbPages=%d\n", Addr, pvHyperGC, cbPages));
514	return VERR_PGM_MAPPINGS_FIX_CONFLICT; /** @todo new error code */
515	}
516
517	const unsigned cPages = cbPages >> PAGE_SHIFT;
518	int rc = pgmR3MapIntermediateCheckOne(pVM, uAddress, cPages, pVM->pgm.s.apInterPTs[0], pVM->pgm.s.apInterPaePTs[0]);
519	if (VBOX_FAILURE(rc))
520	return rc;
521	rc = pgmR3MapIntermediateCheckOne(pVM, (uintptr_t)HCPhys, cPages, pVM->pgm.s.apInterPTs[1], pVM->pgm.s.apInterPaePTs[1]);
522	if (VBOX_FAILURE(rc))
523	return rc;
524
525	/*
526	* Everythings fine, do the mapping.
527	*/
528	pgmR3MapIntermediateDoOne(pVM, uAddress, HCPhys, cPages, pVM->pgm.s.apInterPTs[0], pVM->pgm.s.apInterPaePTs[0]);
529	pgmR3MapIntermediateDoOne(pVM, (uintptr_t)HCPhys, HCPhys, cPages, pVM->pgm.s.apInterPTs[1], pVM->pgm.s.apInterPaePTs[1]);
530
531	return VINF_SUCCESS;
532	}
533
534
535	/**
536	* Validates that there are no conflicts for this mapping into the intermediate context.
537	*
538	* @returns VBox status code.
539	* @param pVM VM handle.
540	* @param uAddress Address of the mapping.
541	* @param cPages Number of pages.
542	* @param pPTDefault Pointer to the default page table for this mapping.
543	* @param pPTPaeDefault Pointer to the default page table for this mapping.
544	*/
545	static int pgmR3MapIntermediateCheckOne(PVM pVM, uintptr_t uAddress, unsigned cPages, PX86PT pPTDefault, PX86PTPAE pPTPaeDefault)
546	{
547	AssertMsg((uAddress >> X86_PD_SHIFT) + cPages <= 1024, ("64-bit fixme\n"));
548
549	/*
550	* Check that the ranges are available.
551	* (This codes doesn't have to be fast.)
552	*/
553	while (cPages > 0)
554	{
555	/*
556	* 32-Bit.
557	*/
558	unsigned iPDE = (uAddress >> X86_PD_SHIFT) & X86_PD_MASK;
559	unsigned iPTE = (uAddress >> X86_PT_SHIFT) & X86_PT_MASK;
560	PX86PT pPT = pPTDefault;
561	if (pVM->pgm.s.pInterPD->a[iPDE].u)
562	{
563	RTHCPHYS HCPhysPT = pVM->pgm.s.pInterPD->a[iPDE].u & X86_PDE_PG_MASK;
564	if (HCPhysPT == MMPage2Phys(pVM, pVM->pgm.s.apInterPTs[0]))
565	pPT = pVM->pgm.s.apInterPTs[0];
566	else if (HCPhysPT == MMPage2Phys(pVM, pVM->pgm.s.apInterPTs[1]))
567	pPT = pVM->pgm.s.apInterPTs[1];
568	else
569	{
570	/** @todo this must be handled with a relocation of the conflicting mapping!
571	* Which of course cannot be done because we're in the middle of the initialization. bad design! */
572	AssertMsgFailed(("Conflict between core code and PGMR3Mapping(). uAddress=%VHv\n", uAddress));
573	LogRel(("Conflict between core code and PGMR3Mapping(). uAddress=%VHv\n", uAddress));
574	return VERR_PGM_MAPPINGS_FIX_CONFLICT; /** @todo error codes! */
575	}
576	}
577	if (pPT->a[iPTE].u)
578	{
579	AssertMsgFailed(("Conflict iPTE=%#x iPDE=%#x uAddress=%VHv pPT->a[iPTE].u=%RX32\n", iPTE, iPDE, uAddress, pPT->a[iPTE].u));
580	LogRel(("Conflict iPTE=%#x iPDE=%#x uAddress=%VHv pPT->a[iPTE].u=%RX32\n",
581	iPTE, iPDE, uAddress, pPT->a[iPTE].u));
582	return VERR_PGM_MAPPINGS_FIX_CONFLICT; /** @todo error codes! */
583	}
584
585	/*
586	* PAE.
587	*/
588	const unsigned iPDPE= (uAddress >> X86_PDPTR_SHIFT) & X86_PDPTR_MASK;
589	iPDE = (uAddress >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
590	iPTE = (uAddress >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK;
591	Assert(iPDPE < 4);
592	Assert(pVM->pgm.s.apInterPaePDs[iPDPE]);
593	PX86PTPAE pPTPae = pPTPaeDefault;
594	if (pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u)
595	{
596	RTHCPHYS HCPhysPT = pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u & X86_PDE_PAE_PG_MASK;
597	if (HCPhysPT == MMPage2Phys(pVM, pVM->pgm.s.apInterPaePTs[0]))
598	pPTPae = pVM->pgm.s.apInterPaePTs[0];
599	else if (HCPhysPT == MMPage2Phys(pVM, pVM->pgm.s.apInterPaePTs[0]))
600	pPTPae = pVM->pgm.s.apInterPaePTs[1];
601	else
602	{
603	/** @todo this must be handled with a relocation of the conflicting mapping!
604	* Which of course cannot be done because we're in the middle of the initialization. bad design! */
605	AssertMsgFailed(("Conflict between core code and PGMR3Mapping(). uAddress=%VHv\n", uAddress));
606	LogRel(("Conflict between core code and PGMR3Mapping(). uAddress=%VHv\n", uAddress));
607	return VERR_PGM_MAPPINGS_FIX_CONFLICT; /** @todo error codes! */
608	}
609	}
610	if (pPTPae->a[iPTE].u)
611	{
612	AssertMsgFailed(("Conflict iPTE=%#x iPDE=%#x uAddress=%VHv pPTPae->a[iPTE].u=%#RX64\n", iPTE, iPDE, uAddress, pPTPae->a[iPTE].u));
613	LogRel(("Conflict iPTE=%#x iPDE=%#x uAddress=%VHv pPTPae->a[iPTE].u=%#RX64\n",
614	iPTE, iPDE, uAddress, pPTPae->a[iPTE].u));
615	return VERR_PGM_MAPPINGS_FIX_CONFLICT; /** @todo error codes! */
616	}
617
618	/* next */
619	uAddress += PAGE_SIZE;
620	cPages--;
621	}
622
623	return VINF_SUCCESS;
624	}
625
626
627
628	/**
629	* Sets up the intermediate page tables for a verified mapping.
630	*
631	* @param pVM VM handle.
632	* @param uAddress Address of the mapping.
633	* @param HCPhys The physical address of the page range.
634	* @param cPages Number of pages.
635	* @param pPTDefault Pointer to the default page table for this mapping.
636	* @param pPTPaeDefault Pointer to the default page table for this mapping.
637	*/
638	static void pgmR3MapIntermediateDoOne(PVM pVM, uintptr_t uAddress, RTHCPHYS HCPhys, unsigned cPages, PX86PT pPTDefault, PX86PTPAE pPTPaeDefault)
639	{
640	while (cPages > 0)
641	{
642	/*
643	* 32-Bit.
644	*/
645	unsigned iPDE = (uAddress >> X86_PD_SHIFT) & X86_PD_MASK;
646	unsigned iPTE = (uAddress >> X86_PT_SHIFT) & X86_PT_MASK;
647	PX86PT pPT;
648	if (pVM->pgm.s.pInterPD->a[iPDE].u)
649	pPT = (PX86PT)MMPagePhys2Page(pVM, pVM->pgm.s.pInterPD->a[iPDE].u & X86_PDE_PG_MASK);
650	else
651	{
652	pVM->pgm.s.pInterPD->a[iPDE].u = X86_PDE_P \| X86_PDE_A \| X86_PDE_RW
653	\| (uint32_t)MMPage2Phys(pVM, pPTDefault);
654	pPT = pPTDefault;
655	}
656	pPT->a[iPTE].u = X86_PTE_P \| X86_PTE_RW \| X86_PTE_A \| X86_PTE_D \| (uint32_t)HCPhys;
657
658	/*
659	* PAE
660	*/
661	const unsigned iPDPE= (uAddress >> X86_PDPTR_SHIFT) & X86_PDPTR_MASK;
662	iPDE = (uAddress >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
663	iPTE = (uAddress >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK;
664	Assert(iPDPE < 4);
665	Assert(pVM->pgm.s.apInterPaePDs[iPDPE]);
666	PX86PTPAE pPTPae;
667	if (pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u)
668	pPTPae = (PX86PTPAE)MMPagePhys2Page(pVM, pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u & X86_PDE_PAE_PG_MASK);
669	else
670	{
671	pPTPae = pPTPaeDefault;
672	pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u = X86_PDE_P \| X86_PDE_A \| X86_PDE_RW
673	\| MMPage2Phys(pVM, pPTPaeDefault);
674	}
675	pPTPae->a[iPTE].u = X86_PTE_P \| X86_PTE_RW \| X86_PTE_A \| X86_PTE_D \| HCPhys;
676
677	/* next */
678	cPages--;
679	HCPhys += PAGE_SIZE;
680	uAddress += PAGE_SIZE;
681	}
682	}
683
684
685	/**
686	* Clears all PDEs involved with the mapping.
687	*
688	* @param pPGM Pointer to the PGM instance data.
689	* @param pMap Pointer to the mapping in question.
690	* @param iOldPDE The index of the 32-bit PDE corresponding to the base of the mapping.
691	*/
692	static void pgmR3MapClearPDEs(PPGM pPGM, PPGMMAPPING pMap, int iOldPDE)
693	{
694	unsigned i = pMap->cPTs;
695	iOldPDE += i;
696	while (i-- > 0)
697	{
698	iOldPDE--;
699
700	/*
701	* 32-bit.
702	*/
703	pPGM->pInterPD->a[iOldPDE].u = 0;
704	pPGM->pHC32BitPD->a[iOldPDE].u = 0;
705
706	/*
707	* PAE.
708	*/
709	const int iPD = iOldPDE / 256;
710	int iPDE = iOldPDE * 2 % 512;
711	pPGM->apInterPaePDs[iPD]->a[iPDE].u = 0;
712	pPGM->apHCPaePDs[iPD]->a[iPDE].u = 0;
713	iPDE++;
714	pPGM->apInterPaePDs[iPD]->a[iPDE].u = 0;
715	pPGM->apHCPaePDs[iPD]->a[iPDE].u = 0;
716	}
717	}
718
719
720	/**
721	* Sets all PDEs involved with the mapping.
722	*
723	* @param pVM The VM handle.
724	* @param pMap Pointer to the mapping in question.
725	* @param iNewPDE The index of the 32-bit PDE corresponding to the base of the mapping.
726	*/
727	static void pgmR3MapSetPDEs(PVM pVM, PPGMMAPPING pMap, int iNewPDE)
728	{
729	PPGM pPGM = &pVM->pgm.s;
730
731	/* If mappings are not supposed to be put in the shadow page table, then this function is a nop. */
732	if (!pgmMapAreMappingsEnabled(&pVM->pgm.s))
733	return;
734
735	/*
736	* Init the page tables and insert them into the page directories.
737	*/
738	unsigned i = pMap->cPTs;
739	iNewPDE += i;
740	while (i-- > 0)
741	{
742	iNewPDE--;
743
744	/*
745	* 32-bit.
746	*/
747	if (pPGM->pHC32BitPD->a[iNewPDE].n.u1Present)
748	pgmPoolFree(pVM, pPGM->pHC32BitPD->a[iNewPDE].n.u1Present & X86_PDE_PG_MASK, PGMPOOL_IDX_PD, iNewPDE);
749	X86PDE Pde;
750	/* Default mapping page directory flags are read/write and supervisor; individual page attributes determine the final flags */
751	Pde.u = PGM_PDFLAGS_MAPPING \| X86_PDE_P \| X86_PDE_A \| X86_PDE_RW \| X86_PDE_US \| (uint32_t)pMap->aPTs[i].HCPhysPT;
752	pPGM->pInterPD->a[iNewPDE] = Pde;
753	pPGM->pHC32BitPD->a[iNewPDE] = Pde;
754
755	/*
756	* PAE.
757	*/
758	const int iPD = iNewPDE / 256;
759	int iPDE = iNewPDE * 2 % 512;
760	if (pPGM->apHCPaePDs[iPD]->a[iPDE].n.u1Present)
761	pgmPoolFree(pVM, pPGM->apHCPaePDs[iPD]->a[iPDE].n.u1Present & X86_PDE_PAE_PG_MASK, PGMPOOL_IDX_PAE_PD, iNewPDE * 2);
762	X86PDEPAE PdePae0;
763	PdePae0.u = PGM_PDFLAGS_MAPPING \| X86_PDE_P \| X86_PDE_A \| X86_PDE_RW \| X86_PDE_US \| pMap->aPTs[i].HCPhysPaePT0;
764	pPGM->apInterPaePDs[iPD]->a[iPDE] = PdePae0;
765	pPGM->apHCPaePDs[iPD]->a[iPDE] = PdePae0;
766
767	iPDE++;
768	if (pPGM->apHCPaePDs[iPD]->a[iPDE].n.u1Present)
769	pgmPoolFree(pVM, pPGM->apHCPaePDs[iPD]->a[iPDE].n.u1Present & X86_PDE_PAE_PG_MASK, PGMPOOL_IDX_PAE_PD, iNewPDE * 2 + 1);
770	X86PDEPAE PdePae1;
771	PdePae1.u = PGM_PDFLAGS_MAPPING \| X86_PDE_P \| X86_PDE_A \| X86_PDE_RW \| X86_PDE_US \| pMap->aPTs[i].HCPhysPaePT1;
772	pPGM->apInterPaePDs[iPD]->a[iPDE] = PdePae1;
773	pPGM->apHCPaePDs[iPD]->a[iPDE] = PdePae1;
774	}
775	}
776
777	/**
778	* Relocates a mapping to a new address.
779	*
780	* @param pVM VM handle.
781	* @param pMapping The mapping to relocate.
782	* @param iPDOld Old page directory index.
783	* @param iPDNew New page directory index.
784	*/
785	void pgmR3MapRelocate(PVM pVM, PPGMMAPPING pMapping, int iPDOld, int iPDNew)
786	{
787	Log(("PGM: Relocating %s from %#x to %#x\n", pMapping->pszDesc, iPDOld << PGDIR_SHIFT, iPDNew << PGDIR_SHIFT));
788	Assert(((unsigned)iPDOld << PGDIR_SHIFT) == pMapping->GCPtr);
789
790	/*
791	* Relocate the page table(s).
792	*/
793	pgmR3MapClearPDEs(&pVM->pgm.s, pMapping, iPDOld);
794	pgmR3MapSetPDEs(pVM, pMapping, iPDNew);
795
796	/*
797	* Update and resort the mapping list.
798	*/
799
800	/* Find previous mapping for pMapping, put result into pPrevMap. */
801	PPGMMAPPING pPrevMap = NULL;
802	PPGMMAPPING pCur = pVM->pgm.s.pMappingsHC;
803	while (pCur && pCur != pMapping)
804	{
805	/* next */
806	pPrevMap = pCur;
807	pCur = pCur->pNextHC;
808	}
809	Assert(pCur);
810
811	/* Find mapping which >= than pMapping. */
812	RTGCPTR GCPtrNew = iPDNew << PGDIR_SHIFT;
813	PPGMMAPPING pPrev = NULL;
814	pCur = pVM->pgm.s.pMappingsHC;
815	while (pCur && pCur->GCPtr < GCPtrNew)
816	{
817	/* next */
818	pPrev = pCur;
819	pCur = pCur->pNextHC;
820	}
821
822	if (pCur != pMapping && pPrev != pMapping)
823	{
824	/*
825	* Unlink.
826	*/
827	if (pPrevMap)
828	{
829	pPrevMap->pNextHC = pMapping->pNextHC;
830	pPrevMap->pNextGC = pMapping->pNextGC;
831	}
832	else
833	{
834	pVM->pgm.s.pMappingsHC = pMapping->pNextHC;
835	pVM->pgm.s.pMappingsGC = pMapping->pNextGC;
836	}
837
838	/*
839	* Link
840	*/
841	pMapping->pNextHC = pCur;
842	if (pPrev)
843	{
844	pMapping->pNextGC = pPrev->pNextGC;
845	pPrev->pNextHC = pMapping;
846	pPrev->pNextGC = MMHyperHC2GC(pVM, pMapping);
847	}
848	else
849	{
850	pMapping->pNextGC = pVM->pgm.s.pMappingsGC;
851	pVM->pgm.s.pMappingsHC = pMapping;
852	pVM->pgm.s.pMappingsGC = MMHyperHC2GC(pVM, pMapping);
853	}
854	}
855
856	/*
857	* Update the entry.
858	*/
859	pMapping->GCPtr = GCPtrNew;
860	pMapping->GCPtrLast = GCPtrNew + pMapping->cb - 1;
861
862	/*
863	* Callback to execute the relocation.
864	*/
865	pMapping->pfnRelocate(pVM, iPDOld << PGDIR_SHIFT, iPDNew << PGDIR_SHIFT, PGMRELOCATECALL_RELOCATE, pMapping->pvUser);
866	}
867
868
869	/**
870	* Resolves a conflict between a page table based GC mapping and
871	* the Guest OS page tables.
872	*
873	* @returns VBox status code.
874	* @param pVM VM Handle.
875	* @param pMapping The mapping which conflicts.
876	* @param pPDSrc The page directory of the guest OS.
877	* @param iPDOld The index to the start of the current mapping.
878	*/
879	int pgmR3SyncPTResolveConflict(PVM pVM, PPGMMAPPING pMapping, PVBOXPD pPDSrc, int iPDOld)
880	{
881	STAM_PROFILE_START(&pVM->pgm.s.StatHCResolveConflict, a);
882
883	/*
884	* Scan for free page directory entries.
885	*
886	* Note that we do not support mappings at the very end of the
887	* address space since that will break our GCPtrEnd assumptions.
888	*/
889	const unsigned cPTs = pMapping->cPTs;
890	unsigned iPDNew = ELEMENTS(pPDSrc->a) - cPTs; /* (+ 1 - 1) */
891	while (iPDNew-- > 0)
892	{
893	if (pPDSrc->a[iPDNew].n.u1Present)
894	continue;
895	if (cPTs > 1)
896	{
897	bool fOk = true;
898	for (unsigned i = 1; fOk && i < cPTs; i++)
899	if (pPDSrc->a[iPDNew + i].n.u1Present)
900	fOk = false;
901	if (!fOk)
902	continue;
903	}
904
905	/*
906	* Check that it's not conflicting with an intermediate page table mapping.
907	*/
908	bool fOk = true;
909	unsigned i = cPTs;
910	while (fOk && i-- > 0)
911	fOk = !pVM->pgm.s.pInterPD->a[iPDNew + i].n.u1Present;
912	if (!fOk)
913	continue;
914	/** @todo AMD64 should check the PAE directories and skip the 32bit stuff. */
915
916	/*
917	* Ask the mapping.
918	*/
919	if (pMapping->pfnRelocate(pVM, iPDOld << PGDIR_SHIFT, iPDNew << PGDIR_SHIFT, PGMRELOCATECALL_SUGGEST, pMapping->pvUser))
920	{
921	pgmR3MapRelocate(pVM, pMapping, iPDOld, iPDNew);
922	STAM_PROFILE_STOP(&pVM->pgm.s.StatHCResolveConflict, a);
923	return VINF_SUCCESS;
924	}
925	}
926
927	STAM_PROFILE_STOP(&pVM->pgm.s.StatHCResolveConflict, a);
928	AssertMsgFailed(("Failed to relocate page table mapping '%s' from %#x! (cPTs=%d)\n", pMapping->pszDesc, iPDOld << PGDIR_SHIFT, cPTs));
929	return VERR_PGM_NO_HYPERVISOR_ADDRESS;
930	}
931
932
933
934	/**
935	* Checks guest PD for conflicts with VMM GC mappings.
936	*
937	* @returns true if conflict detected.
938	* @returns false if not.
939	* @param pVM The virtual machine.
940	* @param cr3 Guest context CR3 register.
941	* @param fRawR0 Whether RawR0 is enabled or not.
942	*/
943	PGMR3DECL(bool) PGMR3MapHasConflicts(PVM pVM, uint32_t cr3, bool fRawR0) /** @todo how many HasConflict constructs do we really need? */
944	{
945	/*
946	* Can skip this if mappings are safely fixed.
947	*/
948	if (pVM->pgm.s.fMappingsFixed)
949	return false;
950
951	/*
952	* Resolve the page directory.
953	*/
954	PVBOXPD pPD = pVM->pgm.s.pGuestPDHC; /** @todo Fix PAE! */
955	Assert(pPD);
956	Assert(pPD == (PVBOXPD)MMPhysGCPhys2HCVirt(pVM, cr3 & X86_CR3_PAGE_MASK, sizeof(*pPD)));
957
958	/*
959	* Iterate mappings.
960	*/
961	for (PPGMMAPPING pCur = pVM->pgm.s.pMappingsHC; pCur; pCur = pCur->pNextHC)
962	{
963	unsigned iPDE = pCur->GCPtr >> PGDIR_SHIFT;
964	unsigned iPT = pCur->cPTs;
965	while (iPT-- > 0)
966	if ( pPD->a[iPDE + iPT].n.u1Present /** @todo PGMGstGetPDE. */
967	&& (fRawR0 \|\| pPD->a[iPDE + iPT].n.u1User))
968	{
969	STAM_COUNTER_INC(&pVM->pgm.s.StatHCDetectedConflicts);
970	#if 1
971	Log(("PGMR3HasMappingConflicts: Conflict was detected at %VGv for mapping %s\n"
972	" iPDE=%#x iPT=%#x PDE=%VGp.\n",
973	(iPT + iPDE) << PGDIR_SHIFT, pCur->pszDesc,
974	iPDE, iPT, pPD->a[iPDE + iPT].au32[0]));
975	#else
976	AssertMsgFailed(("PGMR3HasMappingConflicts: Conflict was detected at %VGv for mapping %s\n"
977	" iPDE=%#x iPT=%#x PDE=%VGp.\n",
978	(iPT + iPDE) << PGDIR_SHIFT, pCur->pszDesc,
979	iPDE, iPT, pPD->a[iPDE + iPT].au32[0]));
980	#endif
981	return true;
982	}
983	}
984
985	return false;
986	}
987
988
989	/**
990	* Read memory from the guest mappings.
991	*
992	* This will use the page tables associated with the mappings to
993	* read the memory. This means that not all kind of memory is readable
994	* since we don't necessarily know how to convert that physical address
995	* to a HC virtual one.
996	*
997	* @returns VBox status.
998	* @param pVM VM handle.
999	* @param pvDst The destination address (HC of course).
1000	* @param GCPtrSrc The source address (GC virtual address).
1001	* @param cb Number of bytes to read.
1002	*/
1003	PGMR3DECL(int) PGMR3MapRead(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
1004	{
1005	/** @todo remove this simplicity hack */
1006	/*
1007	* Simplicity over speed... Chop the request up into chunks
1008	* which don't cross pages.
1009	*/
1010	if (cb + (GCPtrSrc & PAGE_OFFSET_MASK) > PAGE_SIZE)
1011	{
1012	for (;;)
1013	{
1014	unsigned cbRead = RT_MIN(cb, PAGE_SIZE - (GCPtrSrc & PAGE_OFFSET_MASK));
1015	int rc = PGMR3MapRead(pVM, pvDst, GCPtrSrc, cbRead);
1016	if (VBOX_FAILURE(rc))
1017	return rc;
1018	cb -= cbRead;
1019	if (!cb)
1020	break;
1021	pvDst = (char *)pvDst + cbRead;
1022	GCPtrSrc += cbRead;
1023	}
1024	return VINF_SUCCESS;
1025	}
1026
1027	/*
1028	* Find the mapping.
1029	*/
1030	PPGMMAPPING pCur = CTXSUFF(pVM->pgm.s.pMappings);
1031	while (pCur)
1032	{
1033	RTGCUINTPTR off = (RTGCUINTPTR)GCPtrSrc - (RTGCUINTPTR)pCur->GCPtr;
1034	if (off < pCur->cb)
1035	{
1036	if (off + cb > pCur->cb)
1037	{
1038	AssertMsgFailed(("Invalid page range %VGv LB%#x. mapping '%s' %VGv to %VGv\n",
1039	GCPtrSrc, cb, pCur->pszDesc, pCur->GCPtr, pCur->GCPtrLast));
1040	return VERR_INVALID_PARAMETER;
1041	}
1042
1043	unsigned iPT = off >> PGDIR_SHIFT;
1044	unsigned iPTE = (off >> PAGE_SHIFT) & PTE_MASK;
1045	while (cb > 0 && iPTE < ELEMENTS(CTXSUFF(pCur->aPTs[iPT].pPT)->a))
1046	{
1047	if (!CTXSUFF(pCur->aPTs[iPT].paPaePTs)[iPTE / 512].a[iPTE % 512].n.u1Present)
1048	return VERR_PAGE_NOT_PRESENT;
1049	RTHCPHYS HCPhys = CTXSUFF(pCur->aPTs[iPT].paPaePTs)[iPTE / 512].a[iPTE % 512].u & X86_PTE_PAE_PG_MASK;
1050
1051	/*
1052	* Get the virtual page from the physical one.
1053	*/
1054	void *pvPage;
1055	int rc = MMR3HCPhys2HCVirt(pVM, HCPhys, &pvPage);
1056	if (VBOX_FAILURE(rc))
1057	return rc;
1058
1059	memcpy(pvDst, (char *)pvPage + (GCPtrSrc & PAGE_OFFSET_MASK), cb);
1060	return VINF_SUCCESS;
1061	}
1062	}
1063
1064	/* next */
1065	pCur = CTXSUFF(pCur->pNext);
1066	}
1067
1068	return VERR_INVALID_POINTER;
1069	}
1070
1071
1072	/**
1073	* Dumps one virtual handler range.
1074	*
1075	* @returns 0
1076	* @param pNode Pointer to a PGMVIRTHANDLER.
1077	* @param pvUser Pointer to command helper functions.
1078	*/
1079	static DECLCALLBACK(int) pgmVirtHandlerDump(PAVLROGCPTRNODECORE pNode, void *pvUser)
1080	{
1081	PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1082
1083	switch (pCur->enmType)
1084	{
1085	case PGMVIRTHANDLERTYPE_EIP:
1086	RTLogPrintf("EIP %RGv-%RGv size %RGv %s\n", pCur->GCPtr, pCur->GCPtrLast, pCur->cb, pCur->pszDesc);
1087	break;
1088	case PGMVIRTHANDLERTYPE_NORMAL:
1089	RTLogPrintf("NORMAL %RGv-%RGv size %RGv %s\n", pCur->GCPtr, pCur->GCPtrLast, pCur->cb, pCur->pszDesc);
1090	break;
1091	case PGMVIRTHANDLERTYPE_WRITE:
1092	RTLogPrintf("WRITE %RGv-%RGv size %RGv %s\n", pCur->GCPtr, pCur->GCPtrLast, pCur->cb, pCur->pszDesc);
1093	break;
1094	case PGMVIRTHANDLERTYPE_HYPERVISOR:
1095	RTLogPrintf("WRITEHYP %RGv-%RGv size %RGv %s\n", pCur->GCPtr, pCur->GCPtrLast, pCur->cb, pCur->pszDesc);
1096	break;
1097	case PGMVIRTHANDLERTYPE_ALL:
1098	RTLogPrintf("ALL %RGv-%RGv size %RGv %s\n", pCur->GCPtr, pCur->GCPtrLast, pCur->cb, pCur->pszDesc);
1099	break;
1100	}
1101	if (pCur->enmType != PGMVIRTHANDLERTYPE_HYPERVISOR)
1102	for (unsigned i = 0; i < pCur->cPages; i++)
1103	RTLogPrintf("Physical page %#05d %VGp\n", i, pCur->aPhysToVirt[i].Core.Key);
1104	return 0;
1105	}
1106
1107	/**
1108	* Dumps the current mappings to the log
1109	*
1110	* @returns VBox status.
1111	* @param pVM Pointer to the current VM (if any).
1112	*
1113	*/
1114	PGMR3DECL(void) PGMR3DumpMappings(PVM pVM)
1115	{
1116	/*
1117	* Print message about the fixedness of the mappings and dump them.
1118	*/
1119	RTLogPrintf(pVM->pgm.s.fMappingsFixed ? "\nThe mappings are FIXED.\n" : "\nThe mappings are FLOATING.\n");
1120
1121	PPGMMAPPING pCur;
1122	for (pCur = pVM->pgm.s.pMappingsHC; pCur; pCur = pCur->pNextHC)
1123	RTLogPrintf("%VGv - %VGv %s\n", pCur->GCPtr, pCur->GCPtrLast, pCur->pszDesc);
1124
1125	/** @todo The handler stuff is totally alien here. This should be converted into a 'info' function. */
1126	RTLogPrintf("\nVirtual handlers:\n");
1127	RTAvlroGCPtrDoWithAll(&pVM->pgm.s.pTreesHC->VirtHandlers, true, pgmVirtHandlerDump, pVM);
1128
1129	RTLogPrintf("\n"
1130	"Physical handlers: (PhysHandlers=%d (%#x))\n"
1131	"From - To (incl) HandlerHC UserHC HandlerHC UserHC HandlerGC UserGC Type Description\n",
1132	pVM->pgm.s.pTreesHC->PhysHandlers, pVM->pgm.s.pTreesHC->PhysHandlers);
1133	RTAvlroGCPhysDoWithAll(&pVM->pgm.s.pTreesHC->PhysHandlers, true, pgmR3DumpMappingsPhysicalCB, NULL);
1134	}
1135
1136
1137	/**
1138	* Dumps one physical handler range.
1139	*
1140	* @returns 0
1141	* @param pNode Pointer to a PGMPHYSHANDLER.
1142	* @param pvUser Ignored.
1143	*/
1144	static DECLCALLBACK(int) pgmR3DumpMappingsPhysicalCB(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1145	{
1146	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)pNode; NOREF(pvUser);
1147	const char *pszType;
1148	switch (pCur->enmType)
1149	{
1150	case PGMPHYSHANDLERTYPE_MMIO: pszType = "MMIO "; break;
1151	case PGMPHYSHANDLERTYPE_PHYSICAL: pszType = "Natural"; break;
1152	case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE: pszType = "Write "; break;
1153	case PGMPHYSHANDLERTYPE_PHYSICAL_ALL: pszType = "All "; break;
1154	default: pszType = "????"; break;
1155	}
1156	RTLogPrintf("%VGp - %VGp %VHv %VHv %VHv %VHv %VGv %VGv %s %s\n",
1157	pCur->Core.Key, pCur->Core.KeyLast, pCur->pfnHandlerR3, pCur->pvUserR3, pCur->pfnHandlerR0, pCur->pvUserR0,
1158	pCur->pfnHandlerGC, pCur->pvUserGC, pszType, pCur->pszDesc);
1159	return 0;
1160	}
1161

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/src/VBox/VMM/PGMMap.cpp@ 1575

Download in other formats: