PGMShw.h@ 17558

Last change on this file since 17558 was 17558, checked in by vboxsync, 16 years ago
Fixed shadow mode reinit (again)
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 9.9 KB

Line
1	/* $Id: PGMShw.h 17558 2009-03-09 09:52:37Z vboxsync $ */
2	/** @file
3	* VBox - Page Manager / Monitor, Shadow Paging Template.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22	/*******************************************************************************
23	* Defined Constants And Macros *
24	*******************************************************************************/
25	#undef SHWPT
26	#undef PSHWPT
27	#undef SHWPTE
28	#undef PSHWPTE
29	#undef SHWPD
30	#undef PSHWPD
31	#undef SHWPDE
32	#undef PSHWPDE
33	#undef SHW_PDE_PG_MASK
34	#undef SHW_PD_SHIFT
35	#undef SHW_PD_MASK
36	#undef SHW_PTE_PG_MASK
37	#undef SHW_PT_SHIFT
38	#undef SHW_PT_MASK
39	#undef SHW_TOTAL_PD_ENTRIES
40	#undef SHW_PDPT_SHIFT
41	#undef SHW_PDPT_MASK
42	#undef SHW_PDPE_PG_MASK
43	#undef SHW_POOL_ROOT_IDX
44
45	#if PGM_SHW_TYPE == PGM_TYPE_32BIT
46	# define SHWPT X86PT
47	# define PSHWPT PX86PT
48	# define SHWPTE X86PTE
49	# define PSHWPTE PX86PTE
50	# define SHWPD X86PD
51	# define PSHWPD PX86PD
52	# define SHWPDE X86PDE
53	# define PSHWPDE PX86PDE
54	# define SHW_PDE_PG_MASK X86_PDE_PG_MASK
55	# define SHW_PD_SHIFT X86_PD_SHIFT
56	# define SHW_PD_MASK X86_PD_MASK
57	# define SHW_TOTAL_PD_ENTRIES X86_PG_ENTRIES
58	# define SHW_PTE_PG_MASK X86_PTE_PG_MASK
59	# define SHW_PT_SHIFT X86_PT_SHIFT
60	# define SHW_PT_MASK X86_PT_MASK
61	# define SHW_POOL_ROOT_IDX PGMPOOL_IDX_PD
62
63	#elif PGM_SHW_TYPE == PGM_TYPE_EPT
64	# define SHWPT EPTPT
65	# define PSHWPT PEPTPT
66	# define SHWPTE EPTPTE
67	# define PSHWPTE PEPTPTE
68	# define SHWPD EPTPD
69	# define PSHWPD PEPTPD
70	# define SHWPDE EPTPDE
71	# define PSHWPDE PEPTPDE
72	# define SHW_PDE_PG_MASK EPT_PDE_PG_MASK
73	# define SHW_PD_SHIFT EPT_PD_SHIFT
74	# define SHW_PD_MASK EPT_PD_MASK
75	# define SHW_PTE_PG_MASK EPT_PTE_PG_MASK
76	# define SHW_PT_SHIFT EPT_PT_SHIFT
77	# define SHW_PT_MASK EPT_PT_MASK
78	# define SHW_PDPT_SHIFT EPT_PDPT_SHIFT
79	# define SHW_PDPT_MASK EPT_PDPT_MASK
80	# define SHW_PDPE_PG_MASK EPT_PDPE_PG_MASK
81	# define SHW_TOTAL_PD_ENTRIES (EPT_PG_AMD64_ENTRIES*EPT_PG_AMD64_PDPE_ENTRIES)
82	# define SHW_POOL_ROOT_IDX PGMPOOL_IDX_NESTED_ROOT /* do not use! exception is real mode & protected mode without paging. */
83
84	#else
85	# define SHWPT X86PTPAE
86	# define PSHWPT PX86PTPAE
87	# define SHWPTE X86PTEPAE
88	# define PSHWPTE PX86PTEPAE
89	# define SHWPD X86PDPAE
90	# define PSHWPD PX86PDPAE
91	# define SHWPDE X86PDEPAE
92	# define PSHWPDE PX86PDEPAE
93	# define SHW_PDE_PG_MASK X86_PDE_PAE_PG_MASK
94	# define SHW_PD_SHIFT X86_PD_PAE_SHIFT
95	# define SHW_PD_MASK X86_PD_PAE_MASK
96	# define SHW_PTE_PG_MASK X86_PTE_PAE_PG_MASK
97	# define SHW_PT_SHIFT X86_PT_PAE_SHIFT
98	# define SHW_PT_MASK X86_PT_PAE_MASK
99
100	# if PGM_SHW_TYPE == PGM_TYPE_AMD64
101	# define SHW_PDPT_SHIFT X86_PDPT_SHIFT
102	# define SHW_PDPT_MASK X86_PDPT_MASK_AMD64
103	# define SHW_PDPE_PG_MASK X86_PDPE_PG_MASK
104	# define SHW_TOTAL_PD_ENTRIES (X86_PG_AMD64_ENTRIES*X86_PG_AMD64_PDPE_ENTRIES)
105	# define SHW_POOL_ROOT_IDX PGMPOOL_IDX_AMD64_CR3
106
107	# else /* 32 bits PAE mode */
108	# define SHW_PDPT_SHIFT X86_PDPT_SHIFT
109	# define SHW_PDPT_MASK X86_PDPT_MASK_PAE
110	# define SHW_PDPE_PG_MASK X86_PDPE_PG_MASK
111	# define SHW_TOTAL_PD_ENTRIES (X86_PG_PAE_ENTRIES*X86_PG_PAE_PDPE_ENTRIES)
112	# ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
113	# define SHW_POOL_ROOT_IDX PGMPOOL_IDX_PDPT
114	# else
115	# define SHW_POOL_ROOT_IDX PGMPOOL_IDX_PAE_PD
116	# endif
117
118	# endif
119	#endif
120
121
122	/*******************************************************************************
123	* Internal Functions *
124	*******************************************************************************/
125	__BEGIN_DECLS
126	/* r3 */
127	PGM_SHW_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0);
128	PGM_SHW_DECL(int, Enter)(PVM pVM);
129	PGM_SHW_DECL(int, Relocate)(PVM pVM, RTGCPTR offDelta);
130	PGM_SHW_DECL(int, Exit)(PVM pVM);
131
132	/* all */
133	PGM_SHW_DECL(int, GetPage)(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
134	PGM_SHW_DECL(int, ModifyPage)(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
135	__END_DECLS
136
137
138	/**
139	* Initializes the guest bit of the paging mode data.
140	*
141	* @returns VBox status code.
142	* @param pVM The VM handle.
143	* @param fResolveGCAndR0 Indicate whether or not GC and Ring-0 symbols can be resolved now.
144	* This is used early in the init process to avoid trouble with PDM
145	* not being initialized yet.
146	*/
147	PGM_SHW_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0)
148	{
149	Assert(pModeData->uShwType == PGM_SHW_TYPE \|\| pModeData->uShwType == PGM_TYPE_NESTED);
150
151	/* Ring-3 */
152	pModeData->pfnR3ShwRelocate = PGM_SHW_NAME(Relocate);
153	pModeData->pfnR3ShwExit = PGM_SHW_NAME(Exit);
154	pModeData->pfnR3ShwGetPage = PGM_SHW_NAME(GetPage);
155	pModeData->pfnR3ShwModifyPage = PGM_SHW_NAME(ModifyPage);
156
157	if (fResolveGCAndR0)
158	{
159	int rc;
160
161	#if PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */
162	/* GC */
163	rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_SHW_NAME_RC_STR(GetPage), &pModeData->pfnRCShwGetPage);
164	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_SHW_NAME_RC_STR(GetPage), rc), rc);
165	rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_SHW_NAME_RC_STR(ModifyPage), &pModeData->pfnRCShwModifyPage);
166	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_SHW_NAME_RC_STR(ModifyPage), rc), rc);
167	#endif /* Not AMD64 shadow paging. */
168
169	/* Ring-0 */
170	rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_SHW_NAME_R0_STR(GetPage), &pModeData->pfnR0ShwGetPage);
171	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_SHW_NAME_R0_STR(GetPage), rc), rc);
172	rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_SHW_NAME_R0_STR(ModifyPage), &pModeData->pfnR0ShwModifyPage);
173	AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_SHW_NAME_R0_STR(ModifyPage), rc), rc);
174	}
175	return VINF_SUCCESS;
176	}
177
178	/**
179	* Enters the shadow mode.
180	*
181	* @returns VBox status code.
182	* @param pVM VM handle.
183	*/
184	PGM_SHW_DECL(int, Enter)(PVM pVM)
185	{
186	#ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
187	# if PGM_SHW_TYPE == PGM_TYPE_NESTED \|\| PGM_SHW_TYPE == PGM_TYPE_EPT
188	RTGCPHYS GCPhysCR3 = RT_BIT_64(63);
189	PPGMPOOLPAGE pNewShwPageCR3;
190	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
191
192	Assert(HWACCMIsNestedPagingActive(pVM));
193
194	/* Free the old CR3 root. */
195	if (pVM->pgm.s.CTX_SUFF(pShwPageCR3))
196	{
197	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
198
199	/* Mark the page as unlocked; allow flushing again. */
200	pgmPoolUnlockPage(pPool, pVM->pgm.s.CTX_SUFF(pShwPageCR3));
201
202	pgmPoolFreeByPage(pPool, pVM->pgm.s.CTX_SUFF(pShwPageCR3), pVM->pgm.s.iShwUser, pVM->pgm.s.iShwUserTable);
203	pVM->pgm.s.pShwPageCR3R3 = 0;
204	pVM->pgm.s.pShwPageCR3R0 = 0;
205	pVM->pgm.s.pShwPageCR3RC = 0;
206	pVM->pgm.s.iShwUser = 0;
207	pVM->pgm.s.iShwUserTable = 0;
208	}
209
210	int rc = pgmPoolAlloc(pVM, GCPhysCR3, PGMPOOLKIND_ROOT_NESTED, PGMPOOL_IDX_NESTED_ROOT, GCPhysCR3 >> PAGE_SHIFT, &pNewShwPageCR3);
211	AssertFatal(rc == VINF_SUCCESS);
212
213	/* Mark the page as locked; disallow flushing. */
214	pgmPoolLockPage(pPool, pNewShwPageCR3);
215
216	pVM->pgm.s.iShwUser = PGMPOOL_IDX_NESTED_ROOT;
217	pVM->pgm.s.iShwUserTable = GCPhysCR3 >> PAGE_SHIFT;
218	pVM->pgm.s.pShwPageCR3R3 = pNewShwPageCR3;
219
220	pVM->pgm.s.pShwPageCR3RC = MMHyperCCToRC(pVM, pVM->pgm.s.pShwPageCR3R3);
221	pVM->pgm.s.pShwPageCR3R0 = MMHyperCCToR0(pVM, pVM->pgm.s.pShwPageCR3R3);
222
223	Log(("Enter nested shadow paging mode: root %RHv phys %RHp\n", pVM->pgm.s.pShwPageCR3R3, pVM->pgm.s.CTX_SUFF(pShwPageCR3)->Core.Key));
224	# endif
225	#else
226	# if PGM_SHW_TYPE == PGM_TYPE_NESTED
227	# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
228	pVM->pgm.s.pShwRootR0 = (R0PTRTYPE(void *))pVM->pgm.s.pShwNestedRootR0;
229	# else
230	pVM->pgm.s.pShwRootR3 = (R3PTRTYPE(void *))pVM->pgm.s.pShwNestedRootR3;
231	# endif
232	pVM->pgm.s.HCPhysShwCR3 = pVM->pgm.s.HCPhysShwNestedRoot;
233
234	CPUMSetHyperCR3(pVM, PGMGetHyperCR3(pVM));
235	# endif
236	#endif
237
238	return VINF_SUCCESS;
239	}
240
241
242	/**
243	* Relocate any GC pointers related to shadow mode paging.
244	*
245	* @returns VBox status code.
246	* @param pVM The VM handle.
247	* @param offDelta The reloation offset.
248	*/
249	PGM_SHW_DECL(int, Relocate)(PVM pVM, RTGCPTR offDelta)
250	{
251	/* nothing special to do here - InitData does the job. */
252	return VINF_SUCCESS;
253	}
254
255
256	/**
257	* Exits the shadow mode.
258	*
259	* @returns VBox status code.
260	* @param pVM VM handle.
261	*/
262	PGM_SHW_DECL(int, Exit)(PVM pVM)
263	{
264	#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
265	# if PGM_SHW_TYPE == PGM_TYPE_NESTED
266	Assert(HWACCMIsNestedPagingActive(pVM));
267	pVM->pgm.s.pShwRootR3 = 0;
268	# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
269	pVM->pgm.s.pShwRootR0 = 0;
270	# endif
271	pVM->pgm.s.HCPhysShwCR3 = 0;
272
273	Log(("Leave nested shadow paging mode\n"));
274	# endif
275	#endif
276	return VINF_SUCCESS;
277	}
278
279
280

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source: vbox/trunk/src/VBox/VMM/PGMShw.h@ 17558

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