VirtualBox

source: vbox/trunk/src/VBox/VMM/REMInternal.h@ 14806

Last change on this file since 14806 was 13565, checked in by vboxsync, 16 years ago

#1865: REM (VMM bits) - moved EMFlushREMTBs to REMFlushTBs, deleted dead REMGC.cpp.
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1/* $Id: REMInternal.h 13565 2008-10-24 17:48:59Z vboxsync $ */
2/** @file
3 * REM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22#ifndef ___REMInternal_h
23#define ___REMInternal_h
24
25#include <VBox/cdefs.h>
26#include <VBox/types.h>
27#include <VBox/cpum.h>
28#include <VBox/stam.h>
29#include <VBox/pgm.h>
30#ifdef REM_INCLUDE_CPU_H
31# include "target-i386/cpu.h"
32#endif
33
34
35
36/** @defgroup grp_rem_int Internals
37 * @ingroup grp_rem
38 * @internal
39 * @{
40 */
41
42/** The saved state version number. */
43#define REM_SAVED_STATE_VERSION_VER1_6 6
44#define REM_SAVED_STATE_VERSION 7
45
46
47/** @def REM_MONITOR_CODE_PAGES
48 * Enable to monitor code pages that have been translated by the recompiler. */
49/** Currently broken and interferes with CSAM monitoring (see #2784) */
50////#define REM_MONITOR_CODE_PAGES
51#ifdef DOXYGEN_RUNNING
52# define REM_MONITOR_CODE_PAGES
53#endif
54
55typedef enum REMHANDLERNOTIFICATIONKIND
56{
57 /** The usual invalid 0 entry. */
58 REMHANDLERNOTIFICATIONKIND_INVALID = 0,
59 /** REMR3NotifyHandlerPhysicalRegister. */
60 REMHANDLERNOTIFICATIONKIND_PHYSICAL_REGISTER,
61 /** REMR3NotifyHandlerPhysicalDeregister. */
62 REMHANDLERNOTIFICATIONKIND_PHYSICAL_DEREGISTER,
63 /** REMR3NotifyHandlerPhysicalModify. */
64 REMHANDLERNOTIFICATIONKIND_PHYSICAL_MODIFY,
65 /** The usual 32-bit hack. */
66 REMHANDLERNOTIFICATIONKIND_32BIT_HACK = 0x7fffffff
67} REMHANDLERNOTIFICATIONKIND;
68
69
70/**
71 * A recorded handler notificiation.
72 */
73typedef struct REMHANDLERNOTIFICATION
74{
75 /** The notification kind. */
76 REMHANDLERNOTIFICATIONKIND enmKind;
77 uint32_t padding;
78 /** Type specific data. */
79 union
80 {
81 struct
82 {
83 RTGCPHYS GCPhys;
84 RTGCPHYS cb;
85 PGMPHYSHANDLERTYPE enmType;
86 bool fHasHCHandler;
87 } PhysicalRegister;
88
89 struct
90 {
91 RTGCPHYS GCPhys;
92 RTGCPHYS cb;
93 PGMPHYSHANDLERTYPE enmType;
94 bool fHasHCHandler;
95 bool fRestoreAsRAM;
96 } PhysicalDeregister;
97
98 struct
99 {
100 RTGCPHYS GCPhysOld;
101 RTGCPHYS GCPhysNew;
102 RTGCPHYS cb;
103 PGMPHYSHANDLERTYPE enmType;
104 bool fHasHCHandler;
105 bool fRestoreAsRAM;
106 } PhysicalModify;
107 uint64_t padding[5];
108 } u;
109} REMHANDLERNOTIFICATION, *PREMHANDLERNOTIFICATION;
110
111/**
112 * Dynamically allocated guest RAM chunk information
113 * HC virt to GC Phys
114 *
115 * A RAM chunk can spawn two chunk regions as we don't align them on chunk boundaries.
116 */
117typedef struct REMCHUNKINFO
118{
119 RTHCUINTPTR pChunk1;
120 RTHCUINTPTR pChunk2;
121 RTGCPHYS GCPhys1;
122 RTGCPHYS GCPhys2;
123} REMCHUNKINFO, *PREMCHUNKINFO;
124
125/** Maximum number of external guest RAM/ROM registrations. */
126#define REM_MAX_PHYS_REGISTRATIONS 16
127
128/**
129 * Registration record for external guest RAM & ROM
130 */
131typedef struct REMPHYSREGISTRATION
132{
133 RTGCPHYS GCPhys;
134 RTHCUINTPTR HCVirt;
135 RTUINT cb;
136#if HC_ARCH_BITS == 64
137 uint32_t u32Padding;
138#endif
139} REMPHYSREGISTRATION, *PREMPHYSREGISTRATION;
140
141/**
142 * Converts a REM pointer into a VM pointer.
143 * @returns Pointer to the VM structure the REM is part of.
144 * @param pREM Pointer to REM instance data.
145 */
146#define REM2VM(pREM) ( (PVM)((char*)pREM - pREM->offVM) )
147
148
149/**
150 * REM Data (part of VM)
151 */
152typedef struct REM
153{
154 /** Offset to the VM structure. */
155 RTINT offVM;
156 /** Alignment padding. */
157 RTUINT uPadding0;
158
159 /** Cached guest cpu context pointer. */
160 R3PTRTYPE(PCPUMCTX) pCtx;
161
162 /** In REM mode.
163 * I.e. the correct CPU state and some other bits are with REM. */
164 bool fInREM;
165 /** In REMR3State. */
166 bool fInStateSync;
167
168 /** Set when the translation blocks cache need to be flushed. */
169 bool fFlushTBs;
170
171 /** Ignore all that can be ignored. */
172 bool fIgnoreAll;
173 /** Ignore CR3 load notifications from the REM. */
174 bool fIgnoreCR3Load;
175 /** Ignore invlpg notifications from the REM. */
176 bool fIgnoreInvlPg;
177 /** Ignore CR0, CR4 and EFER load. */
178 bool fIgnoreCpuMode;
179 /** Ignore set page. */
180 bool fIgnoreSetPage;
181
182 /** Number of times REMR3CanExecuteRaw has been called.
183 * It is used to prevent rescheduling on the first call. */
184 RTUINT cCanExecuteRaw;
185
186 /** Pending interrupt (~0 -> nothing). */
187 RTUINT u32PendingInterrupt;
188
189#if HC_ARCH_BITS == 64
190 /** Alignment padding. */
191 uint32_t u32Padding;
192#endif
193 /** Number of recorded invlpg instructions. */
194 RTUINT cInvalidatedPages;
195 /** Array of recorded invlpg instruction.
196 * These instructions are replayed when entering REM. */
197 RTGCPTR aGCPtrInvalidatedPages[48];
198 /** The number of recorded handler notifications. */
199 RTUINT volatile cHandlerNotifications;
200 RTUINT padding0; /**< Padding. */
201 /** Array of recorded handler noticications.
202 * These are replayed when entering REM. */
203 REMHANDLERNOTIFICATION aHandlerNotifications[32];
204
205 /** Pointer to an array of hc virt to gc phys records. */
206 R3PTRTYPE(PREMCHUNKINFO) paHCVirtToGCPhys;
207 /** Pointer to a GC Phys to HC Virt lookup table. */
208 R3PTRTYPE(PRTHCUINTPTR) paGCPhysToHCVirt;
209
210 /** Array of external RAM and ROM registrations (excluding guest RAM). */
211 REMPHYSREGISTRATION aPhysReg[REM_MAX_PHYS_REGISTRATIONS];
212 /** Number of external RAM and ROM registrations (excluding guest RAM). */
213 RTUINT cPhysRegistrations;
214
215 /** MMIO memory type.
216 * This is used to register MMIO physical access handlers. */
217 RTINT iMMIOMemType;
218 /** Handler memory type.
219 * This is used to register non-MMIO physical access handlers which are executed in HC. */
220 RTINT iHandlerMemType;
221
222 /** Pending exception */
223 uint32_t uPendingException;
224 /** Pending exception's EIP */
225 uint32_t uPendingExcptEIP;
226 /** Pending exception's CR2 */
227 uint32_t uPendingExcptCR2;
228 /** Nr of pending exceptions */
229 uint32_t cPendingExceptions;
230
231 /** Pending rc. */
232 RTINT rc;
233
234 /** Time spent in QEMU. */
235 STAMPROFILEADV StatsInQEMU;
236 /** Time spent in rawmode.c. */
237 STAMPROFILEADV StatsInRAWEx;
238 /** Time spent switching state. */
239 STAMPROFILE StatsState;
240 /** Time spent switching state back. */
241 STAMPROFILE StatsStateBack;
242
243#if HC_ARCH_BITS != 32
244 /** Padding the CPUX86State structure to 32 byte. */
245 uint32_t abPadding[HC_ARCH_BITS == 32 ? 0 : 4];
246#endif
247
248#ifdef VBOX_WITH_NEW_RECOMPILER
249#if GC_ARCH_BITS == 32
250# define REM_ENV_SIZE (HC_ARCH_BITS == 32 ? 0xff00 : 0xff00)
251#else
252# define REM_ENV_SIZE (HC_ARCH_BITS == 32 ? 0xff00 : 0xff00)
253#endif
254#else /* !VBOX_WITH_NEW_RECOMPILER */
255#if GC_ARCH_BITS == 32
256# define REM_ENV_SIZE (HC_ARCH_BITS == 32 ? 0x6550 : 0xb4a0)
257#else
258# define REM_ENV_SIZE (HC_ARCH_BITS == 32 ? 0x9440 : 0xd4a0)
259#endif
260#endif /* !VBOX_WITH_NEW_RECOMILER */
261
262 /** Recompiler CPU state. */
263#ifdef REM_INCLUDE_CPU_H
264 CPUX86State Env;
265#else
266 struct FakeEnv
267 {
268 char achPadding[REM_ENV_SIZE];
269 } Env;
270#endif /* !REM_INCLUDE_CPU_H */
271} REM;
272
273/** Pointer to the REM Data. */
274typedef REM *PREM;
275
276
277#ifdef REM_INCLUDE_CPU_H
278bool remR3CanExecuteRaw(CPUState *env, RTGCPTR eip, unsigned fFlags, int *piException);
279void remR3CSAMCheckEIP(CPUState *env, RTGCPTR GCPtrCode);
280bool remR3GetOpcode(CPUState *env, RTGCPTR GCPtrInstr, uint8_t *pu8Byte);
281bool remR3DisasInstr(CPUState *env, int f32BitCode, char *pszPrefix);
282bool remR3DisasBlock(CPUState *env, int f32BitCode, int nrInstructions, char *pszPrefix);
283void remR3FlushPage(CPUState *env, RTGCPTR GCPtr);
284void remR3SetPage(CPUState *env, CPUTLBEntry *pRead, CPUTLBEntry *pWrite, int prot, int is_user);
285void remR3FlushTLB(CPUState *env, bool fGlobal);
286void remR3ProtectCode(CPUState *env, RTGCPTR GCPtr);
287void remR3ChangeCpuMode(CPUState *env);
288void remR3DmaRun(CPUState *env);
289void remR3TimersRun(CPUState *env);
290int remR3NotifyTrap(CPUState *env, uint32_t uTrap, uint32_t uErrorCode, uint32_t pvNextEIP);
291void remR3TrapStat(CPUState *env, uint32_t uTrap);
292void remR3CpuId(CPUState *env, unsigned uOperator, void *pvEAX, void *pvEBX, void *pvECX, void *pvEDX);
293void remR3RecordCall(CPUState *env);
294#endif /* REM_INCLUDE_CPU_H */
295void remR3TrapClear(PVM pVM);
296void remR3RaiseRC(PVM pVM, int rc);
297void remR3DumpLnxSyscall(PVM pVM);
298void remR3DumpOBsdSyscall(PVM pVM);
299
300
301/** @todo r=bird: clean up the RAWEx stats. */
302/* temporary hacks */
303#define RAWEx_ProfileStart(a, b) remR3ProfileStart(b)
304#define RAWEx_ProfileStop(a, b) remR3ProfileStop(b)
305
306
307#ifdef VBOX_WITH_STATISTICS
308
309# define STATS_EMULATE_SINGLE_INSTR 1
310# define STATS_QEMU_COMPILATION 2
311# define STATS_QEMU_RUN_EMULATED_CODE 3
312# define STATS_QEMU_TOTAL 4
313# define STATS_QEMU_RUN_TIMERS 5
314# define STATS_TLB_LOOKUP 6
315# define STATS_IRQ_HANDLING 7
316# define STATS_RAW_CHECK 8
317
318void remR3ProfileStart(int statcode);
319void remR3ProfileStop(int statcode);
320
321#else /* !VBOX_WITH_STATISTICS */
322# define remR3ProfileStart(c)
323# define remR3ProfileStop(c)
324#endif /* !VBOX_WITH_STATISTICS */
325
326/** @} */
327
328#endif
329
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