VirtualBox

source: vbox/trunk/src/VBox/VMM/REMInternal.h@ 8213

Last change on this file since 8213 was 8155, checked in by vboxsync, 17 years ago

The Big Sun Rebranding Header Change

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File size: 9.7 KB
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1/* $Id: REMInternal.h 8155 2008-04-18 15:16:47Z vboxsync $ */
2/** @file
3 * REM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22#ifndef ___REMInternal_h
23#define ___REMInternal_h
24
25#include <VBox/cdefs.h>
26#include <VBox/types.h>
27#include <VBox/cpum.h>
28#include <VBox/stam.h>
29#include <VBox/pgm.h>
30#ifdef REM_INCLUDE_CPU_H
31# include "target-i386/cpu.h"
32#endif
33
34
35#if !defined(IN_REM_R3) && !defined(IN_REM_R0) && !defined(IN_REM_GC)
36# error "Not in REM! This is an internal header!"
37#endif
38
39/** @defgroup grp_rem_int Internals
40 * @ingroup grp_rem
41 * @internal
42 * @{
43 */
44
45/** The saved state version number. */
46#define REM_SAVED_STATE_VERSION 6
47
48
49/** @def REM_MONITOR_CODE_PAGES
50 * Enable to monitor code pages that have been translated by the recompiler. */
51#define REM_MONITOR_CODE_PAGES
52
53typedef enum REMHANDLERNOTIFICATIONKIND
54{
55 /** The usual invalid 0 entry. */
56 REMHANDLERNOTIFICATIONKIND_INVALID = 0,
57 /** REMR3NotifyHandlerPhysicalRegister. */
58 REMHANDLERNOTIFICATIONKIND_PHYSICAL_REGISTER,
59 /** REMR3NotifyHandlerPhysicalDeregister. */
60 REMHANDLERNOTIFICATIONKIND_PHYSICAL_DEREGISTER,
61 /** REMR3NotifyHandlerPhysicalModify. */
62 REMHANDLERNOTIFICATIONKIND_PHYSICAL_MODIFY,
63 /** The usual 32-bit hack. */
64 REMHANDLERNOTIFICATIONKIND_32BIT_HACK = 0x7fffffff
65} REMHANDLERNOTIFICATIONKIND;
66
67
68/**
69 * A recorded handler notificiation.
70 */
71typedef struct REMHANDLERNOTIFICATION
72{
73 /** The notification kind. */
74 REMHANDLERNOTIFICATIONKIND enmKind;
75 uint32_t padding;
76 /** Type specific data. */
77 union
78 {
79 struct
80 {
81 RTGCPHYS GCPhys;
82 RTGCPHYS cb;
83 PGMPHYSHANDLERTYPE enmType;
84 bool fHasHCHandler;
85 } PhysicalRegister;
86
87 struct
88 {
89 RTGCPHYS GCPhys;
90 RTGCPHYS cb;
91 PGMPHYSHANDLERTYPE enmType;
92 bool fHasHCHandler;
93 bool fRestoreAsRAM;
94 } PhysicalDeregister;
95
96 struct
97 {
98 RTGCPHYS GCPhysOld;
99 RTGCPHYS GCPhysNew;
100 RTGCPHYS cb;
101 PGMPHYSHANDLERTYPE enmType;
102 bool fHasHCHandler;
103 bool fRestoreAsRAM;
104 } PhysicalModify;
105 uint64_t padding[5];
106 } u;
107} REMHANDLERNOTIFICATION, *PREMHANDLERNOTIFICATION;
108
109/**
110 * Dynamically allocated guest RAM chunk information
111 * HC virt to GC Phys
112 *
113 * A RAM chunk can spawn two chunk regions as we don't align them on chunk boundaries.
114 */
115typedef struct REMCHUNKINFO
116{
117 RTHCUINTPTR pChunk1;
118 RTHCUINTPTR pChunk2;
119 RTGCPHYS GCPhys1;
120 RTGCPHYS GCPhys2;
121} REMCHUNKINFO, *PREMCHUNKINFO;
122
123/** Maximum number of external guest RAM/ROM registrations. */
124#define REM_MAX_PHYS_REGISTRATIONS 16
125
126/**
127 * Registration record for external guest RAM & ROM
128 */
129typedef struct REMPHYSREGISTRATION
130{
131 RTGCPHYS GCPhys;
132 RTHCUINTPTR HCVirt;
133 RTUINT cb;
134#if HC_ARCH_BITS == 64
135 uint32_t u32Padding;
136#endif
137} REMPHYSREGISTRATION, *PREMPHYSREGISTRATION;
138
139/**
140 * Converts a REM pointer into a VM pointer.
141 * @returns Pointer to the VM structure the REM is part of.
142 * @param pREM Pointer to REM instance data.
143 */
144#define REM2VM(pREM) ( (PVM)((char*)pREM - pREM->offVM) )
145
146
147/**
148 * REM Data (part of VM)
149 */
150typedef struct REM
151{
152 /** Offset to the VM structure. */
153 RTINT offVM;
154 /** Alignment padding. */
155 RTUINT uPadding0;
156
157 /** Cached guest cpu context pointer. */
158 R3PTRTYPE(PCPUMCTX) pCtx;
159
160 /** In REM mode.
161 * I.e. the correct CPU state and some other bits are with REM. */
162 bool fInREM;
163 /** In REMR3State. */
164 bool fInStateSync;
165
166 /** Ignore all that can be ignored. */
167 bool fIgnoreAll;
168 /** Ignore CR3 load notifications from the REM. */
169 bool fIgnoreCR3Load;
170 /** Ignore invlpg notifications from the REM. */
171 bool fIgnoreInvlPg;
172 /** Ignore CR0, CR4 and EFER load. */
173 bool fIgnoreCpuMode;
174 /** Ignore set page. */
175 bool fIgnoreSetPage;
176
177 /** Number of times REMR3CanExecuteRaw has been called.
178 * It is used to prevent rescheduling on the first call. */
179 RTUINT cCanExecuteRaw;
180
181 /** Pending interrupt (~0 -> nothing). */
182 RTUINT u32PendingInterrupt;
183
184#if HC_ARCH_BITS == 64
185 /** Alignment padding. */
186 uint32_t u32Padding;
187#endif
188 /** Number of recorded invlpg instructions. */
189 RTUINT cInvalidatedPages;
190 /** Array of recorded invlpg instruction.
191 * These instructions are replayed when entering REM. */
192 RTGCPTR aGCPtrInvalidatedPages[48];
193 /** The number of recorded handler notifications. */
194 RTUINT volatile cHandlerNotifications;
195 RTUINT padding0; /**< Padding. */
196 /** Array of recorded handler noticications.
197 * These are replayed when entering REM. */
198 REMHANDLERNOTIFICATION aHandlerNotifications[32];
199
200 /** Pointer to an array of hc virt to gc phys records. */
201 R3PTRTYPE(PREMCHUNKINFO) paHCVirtToGCPhys;
202 /** Pointer to a GC Phys to HC Virt lookup table. */
203 R3PTRTYPE(PRTHCUINTPTR) paGCPhysToHCVirt;
204
205 /** Array of external RAM and ROM registrations (excluding guest RAM). */
206 REMPHYSREGISTRATION aPhysReg[REM_MAX_PHYS_REGISTRATIONS];
207 /** Number of external RAM and ROM registrations (excluding guest RAM). */
208 RTUINT cPhysRegistrations;
209
210 /** MMIO memory type.
211 * This is used to register MMIO physical access handlers. */
212 RTINT iMMIOMemType;
213 /** Handler memory type.
214 * This is used to register non-MMIO physical access handlers which are executed in HC. */
215 RTINT iHandlerMemType;
216
217 /** Pending exception */
218 uint32_t uPendingException;
219 /** Pending exception's EIP */
220 uint32_t uPendingExcptEIP;
221 /** Pending exception's CR2 */
222 uint32_t uPendingExcptCR2;
223 /** Nr of pending exceptions */
224 uint32_t cPendingExceptions;
225
226 /** Pending rc. */
227 RTINT rc;
228
229 /** Time spent in QEMU. */
230 STAMPROFILEADV StatsInQEMU;
231 /** Time spent in rawmode.c. */
232 STAMPROFILEADV StatsInRAWEx;
233 /** Time spent switching state. */
234 STAMPROFILE StatsState;
235 /** Time spent switching state back. */
236 STAMPROFILE StatsStateBack;
237
238#if HC_ARCH_BITS != 32
239 /** Padding the CPUX86State structure to 32 byte. */
240 uint32_t abPadding[HC_ARCH_BITS == 32 ? 0 : 4];
241#endif
242
243#define REM_ENV_SIZE (HC_ARCH_BITS == 32 ? 0x6440 : 0xb4a0)
244 /** Recompiler CPU state. */
245#ifdef REM_INCLUDE_CPU_H
246 CPUX86State Env;
247#else
248 struct FakeEnv
249 {
250 char achPadding[REM_ENV_SIZE];
251 } Env;
252#endif
253} REM;
254
255/** Pointer to the REM Data. */
256typedef REM *PREM;
257
258
259#ifdef REM_INCLUDE_CPU_H
260bool remR3CanExecuteRaw(CPUState *env, RTGCPTR eip, unsigned fFlags, int *piException);
261void remR3CSAMCheckEIP(CPUState *env, RTGCPTR GCPtrCode);
262bool remR3GetOpcode(CPUState *env, RTGCPTR GCPtrInstr, uint8_t *pu8Byte);
263bool remR3DisasInstr(CPUState *env, int f32BitCode, char *pszPrefix);
264bool remR3DisasBlock(CPUState *env, int f32BitCode, int nrInstructions, char *pszPrefix);
265void remR3FlushPage(CPUState *env, RTGCPTR GCPtr);
266void remR3SetPage(CPUState *env, CPUTLBEntry *pRead, CPUTLBEntry *pWrite, int prot, int is_user);
267void remR3FlushTLB(CPUState *env, bool fGlobal);
268void remR3ProtectCode(CPUState *env, RTGCPTR GCPtr);
269void remR3ChangeCpuMode(CPUState *env);
270void remR3DmaRun(CPUState *env);
271void remR3TimersRun(CPUState *env);
272int remR3NotifyTrap(CPUState *env, uint32_t uTrap, uint32_t uErrorCode, uint32_t pvNextEIP);
273void remR3TrapStat(CPUState *env, uint32_t uTrap);
274void remR3CpuId(CPUState *env, unsigned uOperator, void *pvEAX, void *pvEBX, void *pvECX, void *pvEDX);
275void remR3RecordCall(CPUState *env);
276#endif
277void remR3TrapClear(PVM pVM);
278void remR3RaiseRC(PVM pVM, int rc);
279void remR3DumpLnxSyscall(PVM pVM);
280void remR3DumpOBsdSyscall(PVM pVM);
281
282
283/** @todo r=bird: clean up the RAWEx stats. */
284/* temporary hacks */
285#define RAWEx_ProfileStart(a, b) remR3ProfileStart(b)
286#define RAWEx_ProfileStop(a, b) remR3ProfileStop(b)
287
288
289#ifdef VBOX_WITH_STATISTICS
290
291#define STATS_EMULATE_SINGLE_INSTR 1
292#define STATS_QEMU_COMPILATION 2
293#define STATS_QEMU_RUN_EMULATED_CODE 3
294#define STATS_QEMU_TOTAL 4
295#define STATS_QEMU_RUN_TIMERS 5
296#define STATS_TLB_LOOKUP 6
297#define STATS_IRQ_HANDLING 7
298#define STATS_RAW_CHECK 8
299
300
301void remR3ProfileStart(int statcode);
302void remR3ProfileStop(int statcode);
303#else
304#define remR3ProfileStart(c)
305#define remR3ProfileStop(c)
306#endif
307
308/** @} */
309
310#endif
311
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