VirtualBox

source: vbox/trunk/src/VBox/VMM/TRPM.cpp@ 348

Last change on this file since 348 was 348, checked in by vboxsync, 18 years ago

Bumped SSM version
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 67.4 KB
Line 
1/* $Id: TRPM.cpp 348 2007-01-26 09:38:22Z vboxsync $ */
2/** @file
3 * TRPM - The Trap Monitor
4 */
5
6/*
7 * Copyright (C) 2006 InnoTek Systemberatung GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License as published by the Free Software Foundation,
13 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14 * distribution. VirtualBox OSE is distributed in the hope that it will
15 * be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * If you received this file as part of a commercial VirtualBox
18 * distribution, then only the terms of your commercial VirtualBox
19 * license agreement apply instead of the previous paragraph.
20 */
21
22
23/** @page pg_trpm TRPM - The Trap Monitor
24 *
25 * The Trap Monitor (TRPM) is responsible for all trap and interrupt
26 * handling in the VMM.
27 *
28 * Interrupts occuring in GC will be routed to the HC and reassert there. TRPM
29 * makes the assumption that the VMM or Guest will not cause hardware
30 * interrupts to occur.
31 *
32 * Traps will be passed to a list of registered trap handlers which will
33 * check and see if they are the responsible part for the trap. If no handler
34 * was found the default action is to pass the trap on the Guest OS. Trap
35 * handlers may raise a Guest OS trap as a result of the trap handling.
36 * Statistics will be maintained so the trap handler list can be resorted
37 * every now and then to examin handlers in the optimal order.
38 *
39 * If a trap happens inside the VMM (Guest Context) the TRPM will take the
40 * shortest path back to Ring-3 Host Context and brutally destroy the VM.
41 *
42 * The TRPM will have interfaces to enable devices to assert interrupts
43 * in the guest, these interfaces are multithreaded and availble from
44 * all contexts. This is to allow devices to have use worker threads.
45 *
46 */
47
48
49
50/*******************************************************************************
51* Header Files *
52*******************************************************************************/
53#define LOG_GROUP LOG_GROUP_TRPM
54#include <VBox/trpm.h>
55#include <VBox/cpum.h>
56#include <VBox/selm.h>
57#include <VBox/pdm.h>
58#include <VBox/pgm.h>
59#include <VBox/mm.h>
60#include <VBox/stam.h>
61#include <VBox/csam.h>
62#include <VBox/patm.h>
63#include "TRPMInternal.h"
64#include <VBox/vm.h>
65#include <VBox/em.h>
66#include <VBox/rem.h>
67#include <VBox/hwaccm.h>
68
69#include <VBox/err.h>
70#include <VBox/param.h>
71#include <VBox/log.h>
72#include <iprt/assert.h>
73#include <iprt/asm.h>
74#include <iprt/string.h>
75#include <iprt/alloc.h>
76
77
78/*******************************************************************************
79* Structures and Typedefs *
80*******************************************************************************/
81/**
82 * Trap handler function.
83 * @todo need to specialize this as we go along.
84 */
85typedef enum TRPMHANDLER
86{
87 /** Generic Interrupt handler. */
88 TRPM_HANDLER_INT = 0,
89 /** Generic Trap handler. */
90 TRPM_HANDLER_TRAP,
91 /** Trap 8 (\#DF) handler. */
92 TRPM_HANDLER_TRAP_08,
93 /** Trap 12 (\#MC) handler. */
94 TRPM_HANDLER_TRAP_12,
95 /** Max. */
96 TRPM_HANDLER_MAX
97} TRPMHANDLER, *PTRPMHANDLER;
98
99/** First interrupt handler. Used for validating input. */
100#define TRPM_HANDLER_INT_BASE 0x20
101
102
103/*******************************************************************************
104* Global Variables *
105*******************************************************************************/
106/** Preinitialized IDT.
107 * The u16OffsetLow is a value of the TRPMHANDLER enum which TRPMR3Relocate()
108 * will use to pick the right address. The u16SegSel is always VMM CS.
109 */
110static VBOXIDTE_GENERIC g_aIdt[256] =
111{
112/* special trap handler - still, this is an interrupt gate not a trap gate... */
113#define IDTE_TRAP(enm) { (unsigned)enm, 0, 0, VBOX_IDTE_TYPE1, VBOX_IDTE_TYPE2_INT_32, 0, 1, 0 }
114/* generic trap handler. */
115#define IDTE_TRAP_GEN() IDTE_TRAP(TRPM_HANDLER_TRAP)
116/* special interrupt handler. */
117#define IDTE_INT(enm) { (unsigned)enm, 0, 0, VBOX_IDTE_TYPE1, VBOX_IDTE_TYPE2_INT_32, 0, 1, 0 }
118/* generic interrupt handler. */
119#define IDTE_INT_GEN() IDTE_INT(TRPM_HANDLER_INT)
120/* special task gate IDT entry (for critical exceptions like #DF). */
121#define IDTE_TASK(enm) { (unsigned)enm, 0, 0, VBOX_IDTE_TYPE1, VBOX_IDTE_TYPE2_TASK, 0, 1, 0 }
122/* draft, fixme later when the handler is written. */
123#define IDTE_RESERVED() { 0, 0, 0, 0, 0, 0, 0, 0 }
124
125 /* N - M M - T - C - D i */
126 /* o - n o - y - o - e p */
127 /* - e n - p - d - s t */
128 /* - i - e - e - c . */
129 /* - c - - - r */
130 /* ============================================================= */
131 IDTE_TRAP_GEN(), /* 0 - #DE - F - N - Divide error */
132 IDTE_TRAP_GEN(), /* 1 - #DB - F/T - N - Single step, INT 1 instruction */
133#ifdef VBOX_WITH_NMI
134 IDTE_TRAP_GEN(), /* 2 - - I - N - Non-Maskable Interrupt (NMI) */
135#else
136 IDTE_INT_GEN(), /* 2 - - I - N - Non-Maskable Interrupt (NMI) */
137#endif
138 IDTE_TRAP_GEN(), /* 3 - #BP - T - N - Breakpoint, INT 3 instruction. */
139 IDTE_TRAP_GEN(), /* 4 - #OF - T - N - Overflow, INTO instruction. */
140 IDTE_TRAP_GEN(), /* 5 - #BR - F - N - BOUND Range Exceeded, BOUND instruction. */
141 IDTE_TRAP_GEN(), /* 6 - #UD - F - N - Undefined(/Invalid) Opcode. */
142 IDTE_TRAP_GEN(), /* 7 - #NM - F - N - Device not available, FP or (F)WAIT instruction. */
143 IDTE_TASK(TRPM_HANDLER_TRAP_08), /* 8 - #DF - A - 0 - Double fault. */
144 IDTE_TRAP_GEN(), /* 9 - - F - N - Coprocessor Segment Overrun (obsolete). */
145 IDTE_TRAP_GEN(), /* a - #TS - F - Y - Invalid TSS, Taskswitch or TSS access. */
146 IDTE_TRAP_GEN(), /* b - #NP - F - Y - Segment not present. */
147 IDTE_TRAP_GEN(), /* c - #SS - F - Y - Stack-Segment fault. */
148 IDTE_TRAP_GEN(), /* d - #GP - F - Y - General protection fault. */
149 IDTE_TRAP_GEN(), /* e - #PF - F - Y - Page fault. - interrupt gate!!! */
150 IDTE_RESERVED(), /* f - - - - Intel Reserved. Do not use. */
151 IDTE_TRAP_GEN(), /* 10 - #MF - F - N - x86 FPU Floating-Point Error (Math fault), FP or (F)WAIT instruction. */
152 IDTE_TRAP_GEN(), /* 11 - #AC - F - 0 - Alignment Check. */
153 IDTE_TRAP(TRPM_HANDLER_TRAP_12), /* 12 - #MC - A - N - Machine Check. */
154 IDTE_TRAP_GEN(), /* 13 - #XF - F - N - SIMD Floating-Point Exception. */
155 IDTE_RESERVED(), /* 14 - - - - Intel Reserved. Do not use. */
156 IDTE_RESERVED(), /* 15 - - - - Intel Reserved. Do not use. */
157 IDTE_RESERVED(), /* 16 - - - - Intel Reserved. Do not use. */
158 IDTE_RESERVED(), /* 17 - - - - Intel Reserved. Do not use. */
159 IDTE_RESERVED(), /* 18 - - - - Intel Reserved. Do not use. */
160 IDTE_RESERVED(), /* 19 - - - - Intel Reserved. Do not use. */
161 IDTE_RESERVED(), /* 1a - - - - Intel Reserved. Do not use. */
162 IDTE_RESERVED(), /* 1b - - - - Intel Reserved. Do not use. */
163 IDTE_RESERVED(), /* 1c - - - - Intel Reserved. Do not use. */
164 IDTE_RESERVED(), /* 1d - - - - Intel Reserved. Do not use. */
165 IDTE_RESERVED(), /* 1e - - - - Intel Reserved. Do not use. */
166 IDTE_RESERVED(), /* 1f - - - - Intel Reserved. Do not use. */
167 IDTE_INT_GEN(), /* 20 - - I - - User defined Interrupts, external of INT n. */
168 IDTE_INT_GEN(), /* 21 - - I - - User defined Interrupts, external of INT n. */
169 IDTE_INT_GEN(), /* 22 - - I - - User defined Interrupts, external of INT n. */
170 IDTE_INT_GEN(), /* 23 - - I - - User defined Interrupts, external of INT n. */
171 IDTE_INT_GEN(), /* 24 - - I - - User defined Interrupts, external of INT n. */
172 IDTE_INT_GEN(), /* 25 - - I - - User defined Interrupts, external of INT n. */
173 IDTE_INT_GEN(), /* 26 - - I - - User defined Interrupts, external of INT n. */
174 IDTE_INT_GEN(), /* 27 - - I - - User defined Interrupts, external of INT n. */
175 IDTE_INT_GEN(), /* 28 - - I - - User defined Interrupts, external of INT n. */
176 IDTE_INT_GEN(), /* 29 - - I - - User defined Interrupts, external of INT n. */
177 IDTE_INT_GEN(), /* 2a - - I - - User defined Interrupts, external of INT n. */
178 IDTE_INT_GEN(), /* 2b - - I - - User defined Interrupts, external of INT n. */
179 IDTE_INT_GEN(), /* 2c - - I - - User defined Interrupts, external of INT n. */
180 IDTE_INT_GEN(), /* 2d - - I - - User defined Interrupts, external of INT n. */
181 IDTE_INT_GEN(), /* 2e - - I - - User defined Interrupts, external of INT n. */
182 IDTE_INT_GEN(), /* 2f - - I - - User defined Interrupts, external of INT n. */
183 IDTE_INT_GEN(), /* 30 - - I - - User defined Interrupts, external of INT n. */
184 IDTE_INT_GEN(), /* 31 - - I - - User defined Interrupts, external of INT n. */
185 IDTE_INT_GEN(), /* 32 - - I - - User defined Interrupts, external of INT n. */
186 IDTE_INT_GEN(), /* 33 - - I - - User defined Interrupts, external of INT n. */
187 IDTE_INT_GEN(), /* 34 - - I - - User defined Interrupts, external of INT n. */
188 IDTE_INT_GEN(), /* 35 - - I - - User defined Interrupts, external of INT n. */
189 IDTE_INT_GEN(), /* 36 - - I - - User defined Interrupts, external of INT n. */
190 IDTE_INT_GEN(), /* 37 - - I - - User defined Interrupts, external of INT n. */
191 IDTE_INT_GEN(), /* 38 - - I - - User defined Interrupts, external of INT n. */
192 IDTE_INT_GEN(), /* 39 - - I - - User defined Interrupts, external of INT n. */
193 IDTE_INT_GEN(), /* 3a - - I - - User defined Interrupts, external of INT n. */
194 IDTE_INT_GEN(), /* 3b - - I - - User defined Interrupts, external of INT n. */
195 IDTE_INT_GEN(), /* 3c - - I - - User defined Interrupts, external of INT n. */
196 IDTE_INT_GEN(), /* 3d - - I - - User defined Interrupts, external of INT n. */
197 IDTE_INT_GEN(), /* 3e - - I - - User defined Interrupts, external of INT n. */
198 IDTE_INT_GEN(), /* 3f - - I - - User defined Interrupts, external of INT n. */
199 IDTE_INT_GEN(), /* 40 - - I - - User defined Interrupts, external of INT n. */
200 IDTE_INT_GEN(), /* 41 - - I - - User defined Interrupts, external of INT n. */
201 IDTE_INT_GEN(), /* 42 - - I - - User defined Interrupts, external of INT n. */
202 IDTE_INT_GEN(), /* 43 - - I - - User defined Interrupts, external of INT n. */
203 IDTE_INT_GEN(), /* 44 - - I - - User defined Interrupts, external of INT n. */
204 IDTE_INT_GEN(), /* 45 - - I - - User defined Interrupts, external of INT n. */
205 IDTE_INT_GEN(), /* 46 - - I - - User defined Interrupts, external of INT n. */
206 IDTE_INT_GEN(), /* 47 - - I - - User defined Interrupts, external of INT n. */
207 IDTE_INT_GEN(), /* 48 - - I - - User defined Interrupts, external of INT n. */
208 IDTE_INT_GEN(), /* 49 - - I - - User defined Interrupts, external of INT n. */
209 IDTE_INT_GEN(), /* 4a - - I - - User defined Interrupts, external of INT n. */
210 IDTE_INT_GEN(), /* 4b - - I - - User defined Interrupts, external of INT n. */
211 IDTE_INT_GEN(), /* 4c - - I - - User defined Interrupts, external of INT n. */
212 IDTE_INT_GEN(), /* 4d - - I - - User defined Interrupts, external of INT n. */
213 IDTE_INT_GEN(), /* 4e - - I - - User defined Interrupts, external of INT n. */
214 IDTE_INT_GEN(), /* 4f - - I - - User defined Interrupts, external of INT n. */
215 IDTE_INT_GEN(), /* 50 - - I - - User defined Interrupts, external of INT n. */
216 IDTE_INT_GEN(), /* 51 - - I - - User defined Interrupts, external of INT n. */
217 IDTE_INT_GEN(), /* 52 - - I - - User defined Interrupts, external of INT n. */
218 IDTE_INT_GEN(), /* 53 - - I - - User defined Interrupts, external of INT n. */
219 IDTE_INT_GEN(), /* 54 - - I - - User defined Interrupts, external of INT n. */
220 IDTE_INT_GEN(), /* 55 - - I - - User defined Interrupts, external of INT n. */
221 IDTE_INT_GEN(), /* 56 - - I - - User defined Interrupts, external of INT n. */
222 IDTE_INT_GEN(), /* 57 - - I - - User defined Interrupts, external of INT n. */
223 IDTE_INT_GEN(), /* 58 - - I - - User defined Interrupts, external of INT n. */
224 IDTE_INT_GEN(), /* 59 - - I - - User defined Interrupts, external of INT n. */
225 IDTE_INT_GEN(), /* 5a - - I - - User defined Interrupts, external of INT n. */
226 IDTE_INT_GEN(), /* 5b - - I - - User defined Interrupts, external of INT n. */
227 IDTE_INT_GEN(), /* 5c - - I - - User defined Interrupts, external of INT n. */
228 IDTE_INT_GEN(), /* 5d - - I - - User defined Interrupts, external of INT n. */
229 IDTE_INT_GEN(), /* 5e - - I - - User defined Interrupts, external of INT n. */
230 IDTE_INT_GEN(), /* 5f - - I - - User defined Interrupts, external of INT n. */
231 IDTE_INT_GEN(), /* 60 - - I - - User defined Interrupts, external of INT n. */
232 IDTE_INT_GEN(), /* 61 - - I - - User defined Interrupts, external of INT n. */
233 IDTE_INT_GEN(), /* 62 - - I - - User defined Interrupts, external of INT n. */
234 IDTE_INT_GEN(), /* 63 - - I - - User defined Interrupts, external of INT n. */
235 IDTE_INT_GEN(), /* 64 - - I - - User defined Interrupts, external of INT n. */
236 IDTE_INT_GEN(), /* 65 - - I - - User defined Interrupts, external of INT n. */
237 IDTE_INT_GEN(), /* 66 - - I - - User defined Interrupts, external of INT n. */
238 IDTE_INT_GEN(), /* 67 - - I - - User defined Interrupts, external of INT n. */
239 IDTE_INT_GEN(), /* 68 - - I - - User defined Interrupts, external of INT n. */
240 IDTE_INT_GEN(), /* 69 - - I - - User defined Interrupts, external of INT n. */
241 IDTE_INT_GEN(), /* 6a - - I - - User defined Interrupts, external of INT n. */
242 IDTE_INT_GEN(), /* 6b - - I - - User defined Interrupts, external of INT n. */
243 IDTE_INT_GEN(), /* 6c - - I - - User defined Interrupts, external of INT n. */
244 IDTE_INT_GEN(), /* 6d - - I - - User defined Interrupts, external of INT n. */
245 IDTE_INT_GEN(), /* 6e - - I - - User defined Interrupts, external of INT n. */
246 IDTE_INT_GEN(), /* 6f - - I - - User defined Interrupts, external of INT n. */
247 IDTE_INT_GEN(), /* 70 - - I - - User defined Interrupts, external of INT n. */
248 IDTE_INT_GEN(), /* 71 - - I - - User defined Interrupts, external of INT n. */
249 IDTE_INT_GEN(), /* 72 - - I - - User defined Interrupts, external of INT n. */
250 IDTE_INT_GEN(), /* 73 - - I - - User defined Interrupts, external of INT n. */
251 IDTE_INT_GEN(), /* 74 - - I - - User defined Interrupts, external of INT n. */
252 IDTE_INT_GEN(), /* 75 - - I - - User defined Interrupts, external of INT n. */
253 IDTE_INT_GEN(), /* 76 - - I - - User defined Interrupts, external of INT n. */
254 IDTE_INT_GEN(), /* 77 - - I - - User defined Interrupts, external of INT n. */
255 IDTE_INT_GEN(), /* 78 - - I - - User defined Interrupts, external of INT n. */
256 IDTE_INT_GEN(), /* 79 - - I - - User defined Interrupts, external of INT n. */
257 IDTE_INT_GEN(), /* 7a - - I - - User defined Interrupts, external of INT n. */
258 IDTE_INT_GEN(), /* 7b - - I - - User defined Interrupts, external of INT n. */
259 IDTE_INT_GEN(), /* 7c - - I - - User defined Interrupts, external of INT n. */
260 IDTE_INT_GEN(), /* 7d - - I - - User defined Interrupts, external of INT n. */
261 IDTE_INT_GEN(), /* 7e - - I - - User defined Interrupts, external of INT n. */
262 IDTE_INT_GEN(), /* 7f - - I - - User defined Interrupts, external of INT n. */
263 IDTE_INT_GEN(), /* 80 - - I - - User defined Interrupts, external of INT n. */
264 IDTE_INT_GEN(), /* 81 - - I - - User defined Interrupts, external of INT n. */
265 IDTE_INT_GEN(), /* 82 - - I - - User defined Interrupts, external of INT n. */
266 IDTE_INT_GEN(), /* 83 - - I - - User defined Interrupts, external of INT n. */
267 IDTE_INT_GEN(), /* 84 - - I - - User defined Interrupts, external of INT n. */
268 IDTE_INT_GEN(), /* 85 - - I - - User defined Interrupts, external of INT n. */
269 IDTE_INT_GEN(), /* 86 - - I - - User defined Interrupts, external of INT n. */
270 IDTE_INT_GEN(), /* 87 - - I - - User defined Interrupts, external of INT n. */
271 IDTE_INT_GEN(), /* 88 - - I - - User defined Interrupts, external of INT n. */
272 IDTE_INT_GEN(), /* 89 - - I - - User defined Interrupts, external of INT n. */
273 IDTE_INT_GEN(), /* 8a - - I - - User defined Interrupts, external of INT n. */
274 IDTE_INT_GEN(), /* 8b - - I - - User defined Interrupts, external of INT n. */
275 IDTE_INT_GEN(), /* 8c - - I - - User defined Interrupts, external of INT n. */
276 IDTE_INT_GEN(), /* 8d - - I - - User defined Interrupts, external of INT n. */
277 IDTE_INT_GEN(), /* 8e - - I - - User defined Interrupts, external of INT n. */
278 IDTE_INT_GEN(), /* 8f - - I - - User defined Interrupts, external of INT n. */
279 IDTE_INT_GEN(), /* 90 - - I - - User defined Interrupts, external of INT n. */
280 IDTE_INT_GEN(), /* 91 - - I - - User defined Interrupts, external of INT n. */
281 IDTE_INT_GEN(), /* 92 - - I - - User defined Interrupts, external of INT n. */
282 IDTE_INT_GEN(), /* 93 - - I - - User defined Interrupts, external of INT n. */
283 IDTE_INT_GEN(), /* 94 - - I - - User defined Interrupts, external of INT n. */
284 IDTE_INT_GEN(), /* 95 - - I - - User defined Interrupts, external of INT n. */
285 IDTE_INT_GEN(), /* 96 - - I - - User defined Interrupts, external of INT n. */
286 IDTE_INT_GEN(), /* 97 - - I - - User defined Interrupts, external of INT n. */
287 IDTE_INT_GEN(), /* 98 - - I - - User defined Interrupts, external of INT n. */
288 IDTE_INT_GEN(), /* 99 - - I - - User defined Interrupts, external of INT n. */
289 IDTE_INT_GEN(), /* 9a - - I - - User defined Interrupts, external of INT n. */
290 IDTE_INT_GEN(), /* 9b - - I - - User defined Interrupts, external of INT n. */
291 IDTE_INT_GEN(), /* 9c - - I - - User defined Interrupts, external of INT n. */
292 IDTE_INT_GEN(), /* 9d - - I - - User defined Interrupts, external of INT n. */
293 IDTE_INT_GEN(), /* 9e - - I - - User defined Interrupts, external of INT n. */
294 IDTE_INT_GEN(), /* 9f - - I - - User defined Interrupts, external of INT n. */
295 IDTE_INT_GEN(), /* a0 - - I - - User defined Interrupts, external of INT n. */
296 IDTE_INT_GEN(), /* a1 - - I - - User defined Interrupts, external of INT n. */
297 IDTE_INT_GEN(), /* a2 - - I - - User defined Interrupts, external of INT n. */
298 IDTE_INT_GEN(), /* a3 - - I - - User defined Interrupts, external of INT n. */
299 IDTE_INT_GEN(), /* a4 - - I - - User defined Interrupts, external of INT n. */
300 IDTE_INT_GEN(), /* a5 - - I - - User defined Interrupts, external of INT n. */
301 IDTE_INT_GEN(), /* a6 - - I - - User defined Interrupts, external of INT n. */
302 IDTE_INT_GEN(), /* a7 - - I - - User defined Interrupts, external of INT n. */
303 IDTE_INT_GEN(), /* a8 - - I - - User defined Interrupts, external of INT n. */
304 IDTE_INT_GEN(), /* a9 - - I - - User defined Interrupts, external of INT n. */
305 IDTE_INT_GEN(), /* aa - - I - - User defined Interrupts, external of INT n. */
306 IDTE_INT_GEN(), /* ab - - I - - User defined Interrupts, external of INT n. */
307 IDTE_INT_GEN(), /* ac - - I - - User defined Interrupts, external of INT n. */
308 IDTE_INT_GEN(), /* ad - - I - - User defined Interrupts, external of INT n. */
309 IDTE_INT_GEN(), /* ae - - I - - User defined Interrupts, external of INT n. */
310 IDTE_INT_GEN(), /* af - - I - - User defined Interrupts, external of INT n. */
311 IDTE_INT_GEN(), /* b0 - - I - - User defined Interrupts, external of INT n. */
312 IDTE_INT_GEN(), /* b1 - - I - - User defined Interrupts, external of INT n. */
313 IDTE_INT_GEN(), /* b2 - - I - - User defined Interrupts, external of INT n. */
314 IDTE_INT_GEN(), /* b3 - - I - - User defined Interrupts, external of INT n. */
315 IDTE_INT_GEN(), /* b4 - - I - - User defined Interrupts, external of INT n. */
316 IDTE_INT_GEN(), /* b5 - - I - - User defined Interrupts, external of INT n. */
317 IDTE_INT_GEN(), /* b6 - - I - - User defined Interrupts, external of INT n. */
318 IDTE_INT_GEN(), /* b7 - - I - - User defined Interrupts, external of INT n. */
319 IDTE_INT_GEN(), /* b8 - - I - - User defined Interrupts, external of INT n. */
320 IDTE_INT_GEN(), /* b9 - - I - - User defined Interrupts, external of INT n. */
321 IDTE_INT_GEN(), /* ba - - I - - User defined Interrupts, external of INT n. */
322 IDTE_INT_GEN(), /* bb - - I - - User defined Interrupts, external of INT n. */
323 IDTE_INT_GEN(), /* bc - - I - - User defined Interrupts, external of INT n. */
324 IDTE_INT_GEN(), /* bd - - I - - User defined Interrupts, external of INT n. */
325 IDTE_INT_GEN(), /* be - - I - - User defined Interrupts, external of INT n. */
326 IDTE_INT_GEN(), /* bf - - I - - User defined Interrupts, external of INT n. */
327 IDTE_INT_GEN(), /* c0 - - I - - User defined Interrupts, external of INT n. */
328 IDTE_INT_GEN(), /* c1 - - I - - User defined Interrupts, external of INT n. */
329 IDTE_INT_GEN(), /* c2 - - I - - User defined Interrupts, external of INT n. */
330 IDTE_INT_GEN(), /* c3 - - I - - User defined Interrupts, external of INT n. */
331 IDTE_INT_GEN(), /* c4 - - I - - User defined Interrupts, external of INT n. */
332 IDTE_INT_GEN(), /* c5 - - I - - User defined Interrupts, external of INT n. */
333 IDTE_INT_GEN(), /* c6 - - I - - User defined Interrupts, external of INT n. */
334 IDTE_INT_GEN(), /* c7 - - I - - User defined Interrupts, external of INT n. */
335 IDTE_INT_GEN(), /* c8 - - I - - User defined Interrupts, external of INT n. */
336 IDTE_INT_GEN(), /* c9 - - I - - User defined Interrupts, external of INT n. */
337 IDTE_INT_GEN(), /* ca - - I - - User defined Interrupts, external of INT n. */
338 IDTE_INT_GEN(), /* cb - - I - - User defined Interrupts, external of INT n. */
339 IDTE_INT_GEN(), /* cc - - I - - User defined Interrupts, external of INT n. */
340 IDTE_INT_GEN(), /* cd - - I - - User defined Interrupts, external of INT n. */
341 IDTE_INT_GEN(), /* ce - - I - - User defined Interrupts, external of INT n. */
342 IDTE_INT_GEN(), /* cf - - I - - User defined Interrupts, external of INT n. */
343 IDTE_INT_GEN(), /* d0 - - I - - User defined Interrupts, external of INT n. */
344 IDTE_INT_GEN(), /* d1 - - I - - User defined Interrupts, external of INT n. */
345 IDTE_INT_GEN(), /* d2 - - I - - User defined Interrupts, external of INT n. */
346 IDTE_INT_GEN(), /* d3 - - I - - User defined Interrupts, external of INT n. */
347 IDTE_INT_GEN(), /* d4 - - I - - User defined Interrupts, external of INT n. */
348 IDTE_INT_GEN(), /* d5 - - I - - User defined Interrupts, external of INT n. */
349 IDTE_INT_GEN(), /* d6 - - I - - User defined Interrupts, external of INT n. */
350 IDTE_INT_GEN(), /* d7 - - I - - User defined Interrupts, external of INT n. */
351 IDTE_INT_GEN(), /* d8 - - I - - User defined Interrupts, external of INT n. */
352 IDTE_INT_GEN(), /* d9 - - I - - User defined Interrupts, external of INT n. */
353 IDTE_INT_GEN(), /* da - - I - - User defined Interrupts, external of INT n. */
354 IDTE_INT_GEN(), /* db - - I - - User defined Interrupts, external of INT n. */
355 IDTE_INT_GEN(), /* dc - - I - - User defined Interrupts, external of INT n. */
356 IDTE_INT_GEN(), /* dd - - I - - User defined Interrupts, external of INT n. */
357 IDTE_INT_GEN(), /* de - - I - - User defined Interrupts, external of INT n. */
358 IDTE_INT_GEN(), /* df - - I - - User defined Interrupts, external of INT n. */
359 IDTE_INT_GEN(), /* e0 - - I - - User defined Interrupts, external of INT n. */
360 IDTE_INT_GEN(), /* e1 - - I - - User defined Interrupts, external of INT n. */
361 IDTE_INT_GEN(), /* e2 - - I - - User defined Interrupts, external of INT n. */
362 IDTE_INT_GEN(), /* e3 - - I - - User defined Interrupts, external of INT n. */
363 IDTE_INT_GEN(), /* e4 - - I - - User defined Interrupts, external of INT n. */
364 IDTE_INT_GEN(), /* e5 - - I - - User defined Interrupts, external of INT n. */
365 IDTE_INT_GEN(), /* e6 - - I - - User defined Interrupts, external of INT n. */
366 IDTE_INT_GEN(), /* e7 - - I - - User defined Interrupts, external of INT n. */
367 IDTE_INT_GEN(), /* e8 - - I - - User defined Interrupts, external of INT n. */
368 IDTE_INT_GEN(), /* e9 - - I - - User defined Interrupts, external of INT n. */
369 IDTE_INT_GEN(), /* ea - - I - - User defined Interrupts, external of INT n. */
370 IDTE_INT_GEN(), /* eb - - I - - User defined Interrupts, external of INT n. */
371 IDTE_INT_GEN(), /* ec - - I - - User defined Interrupts, external of INT n. */
372 IDTE_INT_GEN(), /* ed - - I - - User defined Interrupts, external of INT n. */
373 IDTE_INT_GEN(), /* ee - - I - - User defined Interrupts, external of INT n. */
374 IDTE_INT_GEN(), /* ef - - I - - User defined Interrupts, external of INT n. */
375 IDTE_INT_GEN(), /* f0 - - I - - User defined Interrupts, external of INT n. */
376 IDTE_INT_GEN(), /* f1 - - I - - User defined Interrupts, external of INT n. */
377 IDTE_INT_GEN(), /* f2 - - I - - User defined Interrupts, external of INT n. */
378 IDTE_INT_GEN(), /* f3 - - I - - User defined Interrupts, external of INT n. */
379 IDTE_INT_GEN(), /* f4 - - I - - User defined Interrupts, external of INT n. */
380 IDTE_INT_GEN(), /* f5 - - I - - User defined Interrupts, external of INT n. */
381 IDTE_INT_GEN(), /* f6 - - I - - User defined Interrupts, external of INT n. */
382 IDTE_INT_GEN(), /* f7 - - I - - User defined Interrupts, external of INT n. */
383 IDTE_INT_GEN(), /* f8 - - I - - User defined Interrupts, external of INT n. */
384 IDTE_INT_GEN(), /* f9 - - I - - User defined Interrupts, external of INT n. */
385 IDTE_INT_GEN(), /* fa - - I - - User defined Interrupts, external of INT n. */
386 IDTE_INT_GEN(), /* fb - - I - - User defined Interrupts, external of INT n. */
387 IDTE_INT_GEN(), /* fc - - I - - User defined Interrupts, external of INT n. */
388 IDTE_INT_GEN(), /* fd - - I - - User defined Interrupts, external of INT n. */
389 IDTE_INT_GEN(), /* fe - - I - - User defined Interrupts, external of INT n. */
390 IDTE_INT_GEN(), /* ff - - I - - User defined Interrupts, external of INT n. */
391#undef IDTE_TRAP
392#undef IDTE_TRAP_GEN
393#undef IDTE_INT
394#undef IDTE_INT_GEN
395#undef IDTE_TASK
396#undef IDTE_UNUSED
397#undef IDTE_RESERVED
398};
399
400
401/**
402 * Enable or disable tracking of Guest's IDT.
403 * @{
404 */
405#define TRPM_TRACK_GUEST_IDT_CHANGES
406/** @} */
407
408/**
409 * Enable or disable tracking of Shadow IDT.
410 * @{
411 */
412#define TRPM_TRACK_SHADOW_IDT_CHANGES
413/** @} */
414
415/** TRPM saved state version. */
416#define TRPM_SAVED_STATE_VERSION 7
417
418
419/*******************************************************************************
420* Internal Functions *
421*******************************************************************************/
422static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM);
423static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t u32Version);
424static DECLCALLBACK(int) trpmGuestIDTWriteHandler(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
425
426
427/**
428 * Initializes the Trap Manager
429 *
430 * @returns VBox status code.
431 * @param pVM The VM to operate on.
432 */
433TRPMR3DECL(int) TRPMR3Init(PVM pVM)
434{
435 LogFlow(("TRPMR3Init\n"));
436 /*
437 * Assert sizes and alignments.
438 */
439 AssertRelease(!(RT_OFFSETOF(VM, trpm.s) & 31));
440 AssertRelease(!(RT_OFFSETOF(VM, trpm.s.aIdt) & 15));
441 AssertRelease(sizeof(pVM->trpm.s) <= sizeof(pVM->trpm.padding));
442 AssertRelease(ELEMENTS(pVM->trpm.s.aGuestTrapHandler) == sizeof(pVM->trpm.s.au32IdtPatched)*8);
443
444 /*
445 * Initialize members.
446 */
447 pVM->trpm.s.offVM = RT_OFFSETOF(VM, trpm);
448 pVM->trpm.s.uActiveVector = ~0;
449 pVM->trpm.s.GuestIdtr.pIdt = ~0;
450 pVM->trpm.s.GCPtrIdt = ~0;
451 pVM->trpm.s.fDisableMonitoring = false;
452
453 /*
454 * Initialize the IDT.
455 * The handler addresses will be set in the TRPMR3Relocate() function.
456 */
457 Assert(sizeof(pVM->trpm.s.aIdt) == sizeof(g_aIdt));
458 memcpy(&pVM->trpm.s.aIdt[0], &g_aIdt[0], sizeof(pVM->trpm.s.aIdt));
459
460 /*
461 * Register the saved state data unit.
462 */
463 int rc = SSMR3RegisterInternal(pVM, "trpm", 1, TRPM_SAVED_STATE_VERSION, sizeof(TRPM),
464 NULL, trpmR3Save, NULL,
465 NULL, trpmR3Load, NULL);
466 if (VBOX_FAILURE(rc))
467 return rc;
468
469 /*
470 * Statistics.
471 */
472 STAM_REG(pVM, &pVM->trpm.s.StatGCWriteGuestIDT, STAMTYPE_COUNTER, "/TRPM/GC/Write/Guest/IDT", STAMUNIT_OCCURENCES, "The number of writes to the Guest IDT.");
473
474 STAM_REG(pVM, &pVM->trpm.s.StatSyncIDT, STAMTYPE_PROFILE, "/PROF/TRPM/SyncIDT", STAMUNIT_TICKS_PER_CALL, "Profiling of TRPMR3SyncIDT().");
475
476 /* traps */
477 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x00], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/00", STAMUNIT_TICKS_PER_CALL, "#DE - Divide error.");
478 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x01], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/01", STAMUNIT_TICKS_PER_CALL, "#DB - Debug (single step and more).");
479 //STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x02], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/02", STAMUNIT_TICKS_PER_CALL, "NMI");
480 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x03], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/03", STAMUNIT_TICKS_PER_CALL, "#BP - Breakpoint.");
481 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x04], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/04", STAMUNIT_TICKS_PER_CALL, "#OF - Overflow.");
482 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x05], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/05", STAMUNIT_TICKS_PER_CALL, "#BR - Bound range exceeded.");
483 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x06], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/06", STAMUNIT_TICKS_PER_CALL, "#UD - Undefined opcode.");
484 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x07], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/07", STAMUNIT_TICKS_PER_CALL, "#NM - Device not available (FPU).");
485 //STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x08], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/08", STAMUNIT_TICKS_PER_CALL, "#DF - Double fault.");
486 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x09], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/09", STAMUNIT_TICKS_PER_CALL, "#?? - Coprocessor segment overrun (obsolete).");
487 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0a], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0a", STAMUNIT_TICKS_PER_CALL, "#TS - Task switch fault.");
488 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0b], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0b", STAMUNIT_TICKS_PER_CALL, "#NP - Segemnt not present.");
489 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0c], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0c", STAMUNIT_TICKS_PER_CALL, "#SS - Stack segment fault.");
490 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0d], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0d", STAMUNIT_TICKS_PER_CALL, "#GP - General protection fault.");
491 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0e], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0e", STAMUNIT_TICKS_PER_CALL, "#PF - Page fault.");
492 //STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0f], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0f", STAMUNIT_TICKS_PER_CALL, "Reserved.");
493 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x10], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/10", STAMUNIT_TICKS_PER_CALL, "#MF - Math fault..");
494 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x11], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/11", STAMUNIT_TICKS_PER_CALL, "#AC - Alignment check.");
495 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x12], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/12", STAMUNIT_TICKS_PER_CALL, "#MC - Machine check.");
496 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x13], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/13", STAMUNIT_TICKS_PER_CALL, "#XF - SIMD Floating-Point Exception.");
497
498#ifdef VBOX_WITH_STATISTICS
499 rc = MMHyperAlloc(pVM, sizeof(STAMCOUNTER) * 255, 8, MM_TAG_STAM, (void **)&pVM->trpm.s.paStatForwardedIRQR3);
500 AssertRCReturn(rc, rc);
501 pVM->trpm.s.paStatForwardedIRQGC = MMHyperR3ToGC(pVM, pVM->trpm.s.paStatForwardedIRQR3);
502 pVM->trpm.s.paStatForwardedIRQR0 = MMHyperR3ToR0(pVM, pVM->trpm.s.paStatForwardedIRQR3);
503 for (unsigned i = 0; i < 255; i++)
504 STAMR3RegisterF(pVM, &pVM->trpm.s.paStatForwardedIRQR3[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "Forwarded interrupts.",
505 i < 0x20 ? "/TRPM/ForwardRaw/TRAP/%02X" : "/TRPM/ForwardRaw/IRQ/%02X", i);
506#endif
507 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailNoHandler, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/NoHandler", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
508 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailPatchAddr, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/PatchAddr", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
509
510 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailGC, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/GC", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
511 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailHC, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/HC", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
512
513 /*
514 * Default action when entering raw mode for the first time
515 */
516 VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
517 return 0;
518}
519
520
521/**
522 * Applies relocations to data and code managed by this component.
523 *
524 * This function will be called at init and whenever the VMM need
525 * to relocate itself inside the GC.
526 *
527 * @param pVM The VM handle.
528 * @param offDelta Relocation delta relative to old location.
529 */
530TRPMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
531{
532 LogFlow(("TRPMR3Relocate\n"));
533 /*
534 * Get the trap handler addresses.
535 *
536 * If VMMGC.gc is screwed, so are we. We'll assert here since it elsewise
537 * would make init order impossible if we should assert the presence of these
538 * exports in TRPMR3Init().
539 */
540 RTGCPTR aGCPtrs[TRPM_HANDLER_MAX] = {0};
541 int rc;
542 rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerInterupt", &aGCPtrs[TRPM_HANDLER_INT]);
543 AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerInterupt in VMMGC.gc!\n"));
544
545 rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerGeneric", &aGCPtrs[TRPM_HANDLER_TRAP]);
546 AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerGeneric in VMMGC.gc!\n"));
547
548 rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerTrap08", &aGCPtrs[TRPM_HANDLER_TRAP_08]);
549 AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerTrap08 in VMMGC.gc!\n"));
550
551 rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerTrap12", &aGCPtrs[TRPM_HANDLER_TRAP_12]);
552 AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerTrap12 in VMMGC.gc!\n"));
553
554 RTSEL SelCS = CPUMGetHyperCS(pVM);
555
556 /*
557 * Iterate the idt and set the addresses.
558 */
559 PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[0];
560 PVBOXIDTE_GENERIC pIdteTemplate = &g_aIdt[0];
561 for (unsigned i = 0; i < ELEMENTS(pVM->trpm.s.aIdt); i++, pIdte++, pIdteTemplate++)
562 {
563 if ( pIdte->Gen.u1Present
564 && !ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], i)
565 )
566 {
567 Assert(pIdteTemplate->u16OffsetLow < TRPM_HANDLER_MAX);
568 RTGCPTR Offset = aGCPtrs[pIdteTemplate->u16OffsetLow];
569 switch (pIdteTemplate->u16OffsetLow)
570 {
571 /*
572 * Generic handlers have different entrypoints for each possible
573 * vector number. These entrypoints makes a sort of an array with
574 * 8 byte entries where the vector number is the index.
575 * See TRPMGCHandlersA.asm for details.
576 */
577 case TRPM_HANDLER_INT:
578 case TRPM_HANDLER_TRAP:
579 Offset += i * 8;
580 break;
581 case TRPM_HANDLER_TRAP_12:
582 break;
583 case TRPM_HANDLER_TRAP_08:
584 /* Handle #DF Task Gate in special way. */
585 pIdte->Gen.u16SegSel = SELMGetTrap8Selector(pVM);
586 pIdte->Gen.u16OffsetLow = 0;
587 pIdte->Gen.u16OffsetHigh = 0;
588 SELMSetTrap8EIP(pVM, Offset);
589 continue;
590 }
591 /* (non-task gates only ) */
592 pIdte->Gen.u16OffsetLow = Offset & 0xffff;
593 pIdte->Gen.u16OffsetHigh = Offset >> 16;
594 pIdte->Gen.u16SegSel = SelCS;
595 }
596 }
597
598 /*
599 * Update IDTR (limit is including!).
600 */
601 CPUMSetHyperIDTR(pVM, VM_GUEST_ADDR(pVM, &pVM->trpm.s.aIdt[0]), sizeof(pVM->trpm.s.aIdt)-1);
602
603 if (!pVM->trpm.s.fDisableMonitoring)
604 {
605#ifdef TRPM_TRACK_SHADOW_IDT_CHANGES
606 if (pVM->trpm.s.GCPtrIdt != ~0U)
607 {
608 rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GCPtrIdt);
609 AssertRC(rc);
610 }
611 pVM->trpm.s.GCPtrIdt = VM_GUEST_ADDR(pVM, &pVM->trpm.s.aIdt[0]);
612 rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_HYPERVISOR, pVM->trpm.s.GCPtrIdt, pVM->trpm.s.GCPtrIdt + sizeof(pVM->trpm.s.aIdt) - 1,
613 0, 0, "trpmgcShadowIDTWriteHandler", 0, "Shadow IDT write access handler");
614 AssertRC(rc);
615#endif
616 }
617
618 /* Relocate IDT handlers for forwarding guest traps/interrupts. */
619 for (uint32_t iTrap = 0; iTrap < ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++)
620 {
621 if (pVM->trpm.s.aGuestTrapHandler[iTrap])
622 {
623 Log(("TRPMR3Relocate: iGate=%2X Handler %VGv -> %VGv\n", iTrap, pVM->trpm.s.aGuestTrapHandler[iTrap], pVM->trpm.s.aGuestTrapHandler[iTrap] + offDelta));
624 pVM->trpm.s.aGuestTrapHandler[iTrap] += offDelta;
625 }
626
627 if (ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], iTrap))
628 {
629 PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
630 RTGCPTR pHandler = (pIdte->Gen.u16OffsetHigh << 16) | pIdte->Gen.u16OffsetLow;
631
632 Log(("TRPMR3Relocate: *iGate=%2X Handler %VGv -> %VGv\n", iTrap, pHandler, pHandler + offDelta));
633 pHandler += offDelta;
634
635 pIdte->Gen.u16OffsetHigh = pHandler >> 16;
636 pIdte->Gen.u16OffsetLow = pHandler & 0xFFFF;
637
638 }
639 }
640
641 pVM->trpm.s.paStatForwardedIRQGC += offDelta;
642 pVM->trpm.s.paStatForwardedIRQR0 = MMHyperR3ToR0(pVM, pVM->trpm.s.paStatForwardedIRQR3);
643}
644
645
646/**
647 * Terminates the Trap Manager
648 *
649 * @returns VBox status code.
650 * @param pVM The VM to operate on.
651 */
652TRPMR3DECL(int) TRPMR3Term(PVM pVM)
653{
654 NOREF(pVM);
655 return 0;
656}
657
658
659/**
660 * The VM is being reset.
661 *
662 * For the TRPM component this means that any IDT write monitors
663 * needs to be removed, any pending trap cleared, and the IDT reset.
664 *
665 * @param pVM VM handle.
666 */
667TRPMR3DECL(void) TRPMR3Reset(PVM pVM)
668{
669 /*
670 * Deregister any virtual handlers.
671 */
672#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
673 if (pVM->trpm.s.GuestIdtr.pIdt != ~0U)
674 {
675 int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);
676 AssertRC(rc);
677 pVM->trpm.s.GuestIdtr.pIdt = ~0U;
678 }
679 pVM->trpm.s.GuestIdtr.cbIdt = 0;
680#endif
681
682 /*
683 * Reinitialize other members calling the relocator to get things right.
684 */
685 pVM->trpm.s.uActiveVector = ~0;
686 memcpy(&pVM->trpm.s.aIdt[0], &g_aIdt[0], sizeof(pVM->trpm.s.aIdt));
687 memset(pVM->trpm.s.aGuestTrapHandler, 0, sizeof(pVM->trpm.s.aGuestTrapHandler));
688 TRPMR3Relocate(pVM, 0);
689
690 /*
691 * Default action when entering raw mode for the first time
692 */
693 VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
694}
695
696
697/**
698 * Execute state save operation.
699 *
700 * @returns VBox status code.
701 * @param pVM VM Handle.
702 * @param pSSM SSM operation handle.
703 */
704static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM)
705{
706 LogFlow(("trpmR3Save:\n"));
707
708 /*
709 * Active and saved traps.
710 */
711 PTRPM pTrpm = &pVM->trpm.s;
712 SSMR3PutUInt(pSSM, pTrpm->uActiveVector);
713 SSMR3PutUInt(pSSM, pTrpm->fActiveSoftwareInterrupt);
714 SSMR3PutGCUInt(pSSM, pTrpm->uActiveErrorCode);
715 SSMR3PutGCUIntPtr(pSSM, pTrpm->uActiveCR2);
716 SSMR3PutGCUInt(pSSM, pTrpm->uSavedVector);
717 SSMR3PutUInt(pSSM, pTrpm->fSavedSoftwareInterrupt);
718 SSMR3PutGCUInt(pSSM, pTrpm->uSavedErrorCode);
719 SSMR3PutGCUIntPtr(pSSM, pTrpm->uSavedCR2);
720 SSMR3PutGCUInt(pSSM, pTrpm->uPrevVector);
721 SSMR3PutGCUInt(pSSM, pTrpm->fDisableMonitoring);
722 SSMR3PutUInt(pSSM, VM_FF_ISSET(pVM, VM_FF_TRPM_SYNC_IDT));
723 SSMR3PutMem(pSSM, &pTrpm->au32IdtPatched[0], sizeof(pTrpm->au32IdtPatched));
724 SSMR3PutU32(pSSM, ~0); /* separator. */
725
726 /*
727 * Save any trampoline gates.
728 */
729 for (uint32_t iTrap = 0; iTrap < ELEMENTS(pTrpm->aGuestTrapHandler); iTrap++)
730 {
731 if (pTrpm->aGuestTrapHandler[iTrap])
732 {
733 SSMR3PutU32(pSSM, iTrap);
734 SSMR3PutGCPtr(pSSM, pTrpm->aGuestTrapHandler[iTrap]);
735 SSMR3PutMem(pSSM, &pTrpm->aIdt[iTrap], sizeof(pTrpm->aIdt[iTrap]));
736 }
737 }
738
739 return SSMR3PutU32(pSSM, ~0); /* terminator */
740}
741
742
743/**
744 * Execute state load operation.
745 *
746 * @returns VBox status code.
747 * @param pVM VM Handle.
748 * @param pSSM SSM operation handle.
749 * @param u32Version Data layout version.
750 */
751static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t u32Version)
752{
753 LogFlow(("trpmR3Load:\n"));
754
755 /*
756 * Validate version.
757 */
758 if (u32Version != TRPM_SAVED_STATE_VERSION)
759 {
760 Log(("trpmR3Load: Invalid version u32Version=%d!\n", u32Version));
761 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
762 }
763
764 /*
765 * Call the reset function to kick out any handled gates and other potential trouble.
766 */
767 TRPMR3Reset(pVM);
768
769 /*
770 * Active and saved traps.
771 */
772 PTRPM pTrpm = &pVM->trpm.s;
773 SSMR3GetUInt(pSSM, &pTrpm->uActiveVector);
774 SSMR3GetUInt(pSSM, &pTrpm->fActiveSoftwareInterrupt);
775 SSMR3GetGCUInt(pSSM, &pTrpm->uActiveErrorCode);
776 SSMR3GetGCUIntPtr(pSSM, &pTrpm->uActiveCR2);
777 SSMR3GetGCUInt(pSSM, &pTrpm->uSavedVector);
778 SSMR3GetUInt(pSSM, &pTrpm->fSavedSoftwareInterrupt);
779 SSMR3GetGCUInt(pSSM, &pTrpm->uSavedErrorCode);
780 SSMR3GetGCUIntPtr(pSSM, &pTrpm->uSavedCR2);
781 SSMR3GetGCUInt(pSSM, &pTrpm->uPrevVector);
782 SSMR3GetGCUInt(pSSM, &pTrpm->fDisableMonitoring);
783
784 RTUINT fSyncIDT;
785 int rc = SSMR3GetUInt(pSSM, &fSyncIDT);
786 if (VBOX_FAILURE(rc))
787 return rc;
788 if (fSyncIDT & ~1)
789 {
790 AssertMsgFailed(("fSyncIDT=%#x\n", fSyncIDT));
791 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
792 }
793 if (fSyncIDT)
794 VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
795 /* else: cleared by reset call above. */
796
797 SSMR3GetMem(pSSM, &pTrpm->au32IdtPatched[0], sizeof(pTrpm->au32IdtPatched));
798
799 /* check the separator */
800 uint32_t u32Sep;
801 rc = SSMR3GetU32(pSSM, &u32Sep);
802 if (VBOX_FAILURE(rc))
803 return rc;
804 if (u32Sep != (uint32_t)~0)
805 {
806 AssertMsgFailed(("u32Sep=%#x (first)\n", u32Sep));
807 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
808 }
809
810 /*
811 * Restore any trampoline gates.
812 */
813 for (;;)
814 {
815 /* gate number / terminator */
816 uint32_t iTrap;
817 rc = SSMR3GetU32(pSSM, &iTrap);
818 if (VBOX_FAILURE(rc))
819 return rc;
820 if (iTrap == (uint32_t)~0)
821 break;
822 if ( iTrap >= ELEMENTS(pTrpm->aIdt)
823 || pTrpm->aGuestTrapHandler[iTrap])
824 {
825 AssertMsgFailed(("iTrap=%#x\n", iTrap));
826 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
827 }
828
829 /* restore the IDT entry. */
830 RTGCPTR GCPtrHandler;
831 SSMR3GetGCPtr(pSSM, &GCPtrHandler);
832 VBOXIDTE Idte;
833 rc = SSMR3GetMem(pSSM, &Idte, sizeof(Idte));
834 if (VBOX_FAILURE(rc))
835 return rc;
836 Assert(GCPtrHandler);
837 pTrpm->aIdt[iTrap] = Idte;
838 }
839
840 return VINF_SUCCESS;
841}
842
843
844/**
845 * Check if gate handlers were updated
846 * (callback for the VM_FF_TRPM_SYNC_IDT forced action).
847 *
848 * @returns VBox status code.
849 * @param pVM The VM handle.
850 */
851TRPMR3DECL(int) TRPMR3SyncIDT(PVM pVM)
852{
853 STAM_PROFILE_START(&pVM->trpm.s.StatSyncIDT, a);
854 const bool fRawRing0 = EMIsRawRing0Enabled(pVM);
855 int rc;
856
857 if (pVM->trpm.s.fDisableMonitoring)
858 {
859 VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
860 return VINF_SUCCESS; /* Nothing to do */
861 }
862
863 if (fRawRing0 && CSAMIsEnabled(pVM))
864 {
865 /* Clear all handlers */
866 /** @todo inefficient, but simple */
867 for (unsigned iGate=0;iGate<256;iGate++)
868 TRPMR3SetGuestTrapHandler(pVM, iGate, TRPM_INVALID_HANDLER);
869
870 /* Scan them all (only the first time) */
871 CSAMR3CheckGates(pVM, 0, 256);
872 }
873
874 /*
875 * Get the IDTR.
876 */
877 VBOXIDTR IDTR;
878 IDTR.pIdt = CPUMGetGuestIDTR(pVM, &IDTR.cbIdt);
879 if (!IDTR.cbIdt)
880 {
881 Log(("No IDT entries...\n"));
882 return DBGFSTOP(pVM);
883 }
884
885#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
886 /*
887 * Check if Guest's IDTR has changed.
888 */
889 if ( IDTR.pIdt != pVM->trpm.s.GuestIdtr.pIdt
890 || IDTR.cbIdt != pVM->trpm.s.GuestIdtr.cbIdt)
891 {
892 Log(("TRPMR3UpdateFromCPUM: Guest's IDT is changed to pIdt=%08X cbIdt=%08X\n", IDTR.pIdt, IDTR.cbIdt));
893
894 /*
895 * [Re]Register write virtual handler for guest's IDT.
896 */
897 if (pVM->trpm.s.GuestIdtr.pIdt != ~0U)
898 {
899 rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);
900 AssertRCReturn(rc, rc);
901 }
902 /* limit is including */
903 rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, IDTR.pIdt, IDTR.pIdt + IDTR.cbIdt /* already inclusive */,
904 0, trpmGuestIDTWriteHandler, "trpmgcGuestIDTWriteHandler", 0, "Guest IDT write access handler");
905 AssertRCReturn(rc, rc);
906
907 /* Update saved Guest IDTR. */
908 pVM->trpm.s.GuestIdtr = IDTR;
909 }
910#endif
911
912 /*
913 * Sync the interrupt gate.
914 * Should probably check/sync the others too, but for now we'll handle that in #GP.
915 */
916 X86DESC Idte3;
917 rc = PGMPhysReadGCPtr(pVM, &Idte3, IDTR.pIdt + sizeof(Idte3) * 3, sizeof(Idte3));
918 if (VBOX_FAILURE(rc))
919 {
920 AssertMsgRC(rc, ("Failed to read IDT[3]! rc=%Vrc\n", rc));
921 return DBGFSTOP(pVM);
922 }
923 AssertRCReturn(rc, rc);
924 if (fRawRing0)
925 pVM->trpm.s.aIdt[3].Gen.u2DPL = RT_MAX(Idte3.Gen.u2Dpl, 1);
926 else
927 pVM->trpm.s.aIdt[3].Gen.u2DPL = Idte3.Gen.u2Dpl;
928
929 /*
930 * Clear the FF and we're done.
931 */
932 VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
933 STAM_PROFILE_STOP(&pVM->trpm.s.StatSyncIDT, a);
934 return VINF_SUCCESS;
935}
936
937
938/**
939 * Disable IDT monitoring and syncing
940 *
941 * @param pVM The VM to operate on.
942 */
943TRPMR3DECL(void) TRPMR3DisableMonitoring(PVM pVM)
944{
945 /*
946 * Deregister any virtual handlers.
947 */
948#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
949 if (pVM->trpm.s.GuestIdtr.pIdt != ~0U)
950 {
951 int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);
952 AssertRC(rc);
953 pVM->trpm.s.GuestIdtr.pIdt = ~0U;
954 }
955 pVM->trpm.s.GuestIdtr.cbIdt = 0;
956#endif
957
958#ifdef TRPM_TRACK_SHADOW_IDT_CHANGES
959 if (pVM->trpm.s.GCPtrIdt != ~0U)
960 {
961 int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GCPtrIdt);
962 AssertRC(rc);
963 pVM->trpm.s.GCPtrIdt = ~0U;
964 }
965#endif
966
967 VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
968
969 pVM->trpm.s.fDisableMonitoring = true;
970}
971
972
973/**
974 * \#PF Handler callback for virtual access handler ranges.
975 *
976 * Important to realize that a physical page in a range can have aliases, and
977 * for ALL and WRITE handlers these will also trigger.
978 *
979 * @returns VINF_SUCCESS if the handler have carried out the operation.
980 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
981 * @param pVM VM Handle.
982 * @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
983 * @param pvPtr The HC mapping of that address.
984 * @param pvBuf What the guest is reading/writing.
985 * @param cbBuf How much it's reading/writing.
986 * @param enmAccessType The access type.
987 * @param pvUser User argument.
988 */
989static DECLCALLBACK(int) trpmGuestIDTWriteHandler(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
990{
991 Assert(enmAccessType == PGMACCESSTYPE_WRITE);
992 Log(("trpmGuestIDTWriteHandler: write to %VGv size %d\n", GCPtr, cbBuf));
993 VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
994 return VINF_PGM_HANDLER_DO_DEFAULT;
995}
996
997
998/**
999 * Clear passthrough interrupt gate handler (reset to default handler)
1000 *
1001 * @returns VBox status code.
1002 * @param pVM The VM to operate on.
1003 * @param iTrap Trap/interrupt gate number.
1004 */
1005TRPMR3DECL(int) trpmR3ClearPassThroughHandler(PVM pVM, unsigned iTrap)
1006{
1007 /** @todo cleanup trpmR3ClearPassThroughHandler()! */
1008 RTGCPTR aGCPtrs[TRPM_HANDLER_MAX];
1009 int rc;
1010
1011 memset(aGCPtrs, 0, sizeof(aGCPtrs));
1012
1013 rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerInterupt", &aGCPtrs[TRPM_HANDLER_INT]);
1014 AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerInterupt in VMMGC.gc!\n"));
1015
1016 if ( iTrap < TRPM_HANDLER_INT_BASE
1017 || iTrap >= ELEMENTS(pVM->trpm.s.aIdt))
1018 {
1019 AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %#x!\n", iTrap));
1020 return VERR_INVALID_PARAMETER;
1021 }
1022 memcpy(&pVM->trpm.s.aIdt[iTrap], &g_aIdt[iTrap], sizeof(pVM->trpm.s.aIdt[0]));
1023
1024 /* Unmark it for relocation purposes. */
1025 ASMBitClear(&pVM->trpm.s.au32IdtPatched[0], iTrap);
1026
1027 RTSEL SelCS = CPUMGetHyperCS(pVM);
1028 PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1029 PVBOXIDTE_GENERIC pIdteTemplate = &g_aIdt[iTrap];
1030 if (pIdte->Gen.u1Present)
1031 {
1032 Assert(pIdteTemplate->u16OffsetLow == TRPM_HANDLER_INT);
1033 Assert(sizeof(RTGCPTR) <= sizeof(aGCPtrs[0]));
1034 RTGCPTR Offset = (RTGCPTR)aGCPtrs[pIdteTemplate->u16OffsetLow];
1035
1036 /*
1037 * Generic handlers have different entrypoints for each possible
1038 * vector number. These entrypoints make a sort of an array with
1039 * 8 byte entries where the vector number is the index.
1040 * See TRPMGCHandlersA.asm for details.
1041 */
1042 Offset += iTrap * 8;
1043
1044 if (pIdte->Gen.u5Type2 != VBOX_IDTE_TYPE2_TASK)
1045 {
1046 pIdte->Gen.u16OffsetLow = Offset & 0xffff;
1047 pIdte->Gen.u16OffsetHigh = Offset >> 16;
1048 pIdte->Gen.u16SegSel = SelCS;
1049 }
1050 }
1051
1052 return VINF_SUCCESS;
1053}
1054
1055
1056/**
1057 * Check if address is a gate handler (interrupt or trap).
1058 *
1059 * @returns gate nr or ~0 is not found
1060 *
1061 * @param pVM VM handle.
1062 * @param GCPtr GC address to check.
1063 */
1064TRPMR3DECL(uint32_t) TRPMR3QueryGateByHandler(PVM pVM, RTGCPTR GCPtr)
1065{
1066 for (uint32_t iTrap = 0; iTrap < ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++)
1067 {
1068 if (pVM->trpm.s.aGuestTrapHandler[iTrap] == GCPtr)
1069 return iTrap;
1070
1071 /* redundant */
1072 if (ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], iTrap))
1073 {
1074 PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1075 RTGCPTR pHandler = (pIdte->Gen.u16OffsetHigh << 16) | pIdte->Gen.u16OffsetLow;
1076
1077 if (pHandler == GCPtr)
1078 return iTrap;
1079 }
1080 }
1081 return ~0;
1082}
1083
1084
1085/**
1086 * Get guest trap/interrupt gate handler
1087 *
1088 * @returns Guest trap handler address or TRPM_INVALID_HANDLER if none installed
1089 * @param pVM The VM to operate on.
1090 * @param iTrap Interrupt/trap number.
1091 */
1092TRPMR3DECL(RTGCPTR) TRPMR3GetGuestTrapHandler(PVM pVM, unsigned iTrap)
1093{
1094 AssertReturn(iTrap < ELEMENTS(pVM->trpm.s.aIdt), TRPM_INVALID_HANDLER);
1095
1096 return pVM->trpm.s.aGuestTrapHandler[iTrap];
1097}
1098
1099
1100/**
1101 * Set guest trap/interrupt gate handler
1102 * Used for setting up trap gates used for kernel calls.
1103 *
1104 * @returns VBox status code.
1105 * @param pVM The VM to operate on.
1106 * @param iTrap Interrupt/trap number.
1107 * @param pHandler GC handler pointer
1108 */
1109TRPMR3DECL(int) TRPMR3SetGuestTrapHandler(PVM pVM, unsigned iTrap, RTGCPTR pHandler)
1110{
1111 /*
1112 * Validate.
1113 */
1114 if (iTrap >= ELEMENTS(pVM->trpm.s.aIdt))
1115 {
1116 AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %d!\n", iTrap));
1117 return VERR_INVALID_PARAMETER;
1118 }
1119
1120 AssertReturn(pHandler == TRPM_INVALID_HANDLER || PATMIsPatchGCAddr(pVM, pHandler), VERR_INVALID_PARAMETER);
1121
1122 uint16_t cbIDT;
1123 RTGCPTR GCPtrIDT = CPUMGetGuestIDTR(pVM, &cbIDT);
1124 if (iTrap * sizeof(VBOXIDTE) >= cbIDT)
1125 return VERR_INVALID_PARAMETER; /* Silently ignore out of range requests. */
1126
1127 if (pHandler == TRPM_INVALID_HANDLER)
1128 {
1129 /* clear trap handler */
1130 Log(("TRPMR3SetGuestTrapHandler: clear handler %x\n", iTrap));
1131
1132 if (ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], iTrap))
1133 trpmR3ClearPassThroughHandler(pVM, iTrap);
1134
1135 pVM->trpm.s.aGuestTrapHandler[iTrap] = TRPM_INVALID_HANDLER;
1136 return VINF_SUCCESS;
1137 }
1138
1139 /*
1140 * Read the guest IDT entry.
1141 */
1142 VBOXIDTE GuestIdte;
1143 int rc = PGMPhysReadGCPtr(pVM, &GuestIdte, GCPtrIDT + iTrap * sizeof(GuestIdte), sizeof(GuestIdte));
1144 if (VBOX_FAILURE(rc))
1145 {
1146 AssertMsgRC(rc, ("Failed to read IDTE! rc=%Vrc\n", rc));
1147 return rc;
1148 }
1149
1150 if (EMIsRawRing0Enabled(pVM))
1151 {
1152 /*
1153 * Only replace the 0x2E handler; others need to be called indirectly via a trampoline in our GC handlers
1154 */
1155 /** @note dependencies on trap gate numbers in SELMR3SyncTSS */
1156 /** @todo handle those dependencies better! */
1157# ifdef _WIN32 /** @todo Solve this in a proper manner. see defect #1186 */
1158 if (iTrap == 0x2E || iTrap == 0x80)
1159# else
1160 if (iTrap == 0x80)
1161# endif
1162 {
1163 if ( GuestIdte.Gen.u1Present
1164 && ( GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32
1165 || GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
1166 && GuestIdte.Gen.u2DPL == 3)
1167 {
1168 PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1169
1170 GuestIdte.Gen.u5Type2 = VBOX_IDTE_TYPE2_TRAP_32;
1171 GuestIdte.Gen.u16OffsetHigh = pHandler >> 16;
1172 GuestIdte.Gen.u16OffsetLow = pHandler & 0xFFFF;
1173 GuestIdte.Gen.u16SegSel |= 1; //ring 1
1174 *pIdte = GuestIdte;
1175
1176 /* Mark it for relocation purposes. */
1177 ASMBitSet(&pVM->trpm.s.au32IdtPatched[0], iTrap);
1178
1179 /* Also store it in our guest trap array. */
1180 pVM->trpm.s.aGuestTrapHandler[iTrap] = pHandler;
1181
1182 Log(("Setting trap handler %x to %08X (direct)\n", iTrap, pHandler));
1183 return VINF_SUCCESS;
1184 }
1185 /* ok, let's try to install a trampoline handler then. */
1186 }
1187 }
1188
1189 if ( GuestIdte.Gen.u1Present
1190 && ( GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32
1191 || GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
1192 && (GuestIdte.Gen.u2DPL == 3 || GuestIdte.Gen.u2DPL == 0))
1193 {
1194 /*
1195 * Save handler which can be used for a trampoline call inside the GC
1196 */
1197 Log(("Setting trap handler %x to %08X\n", iTrap, pHandler));
1198 pVM->trpm.s.aGuestTrapHandler[iTrap] = pHandler;
1199 return VINF_SUCCESS;
1200 }
1201 return VERR_INVALID_PARAMETER;
1202}
1203
1204
1205/**
1206 * Check if address is a gate handler (interrupt/trap/task/anything).
1207 *
1208 * @returns True is gate handler, false if not.
1209 *
1210 * @param pVM VM handle.
1211 * @param GCPtr GC address to check.
1212 */
1213TRPMR3DECL(bool) TRPMR3IsGateHandler(PVM pVM, RTGCPTR GCPtr)
1214{
1215 /*
1216 * Read IDTR and calc last entry.
1217 */
1218 uint16_t cbIDT;
1219 RTGCPTR GCPtrIDTE = CPUMGetGuestIDTR(pVM, &cbIDT);
1220 unsigned cEntries = (cbIDT + 1) / sizeof(VBOXIDTE);
1221 if (!cEntries)
1222 return false;
1223 RTGCPTR GCPtrIDTELast = GCPtrIDTE + (cEntries - 1) * sizeof(VBOXIDTE);
1224
1225 /*
1226 * Outer loop: interate pages.
1227 */
1228 while (GCPtrIDTE <= GCPtrIDTELast)
1229 {
1230 /*
1231 * Convert this page to a HC address.
1232 * (This function checks for not-present pages.)
1233 */
1234 PVBOXIDTE pIDTE;
1235 int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrIDTE, (void **)&pIDTE);
1236 if (VBOX_SUCCESS(rc))
1237 {
1238 /*
1239 * Inner Loop: Iterate the data on this page looking for an entry equal to GCPtr.
1240 * N.B. Member of the Flat Earth Society...
1241 */
1242 while (GCPtrIDTE <= GCPtrIDTELast)
1243 {
1244 if (pIDTE->Gen.u1Present)
1245 {
1246 RTGCPTR GCPtrHandler = (pIDTE->Gen.u16OffsetHigh << 16) | pIDTE->Gen.u16OffsetLow;
1247 if (GCPtr == GCPtrHandler)
1248 return true;
1249 }
1250
1251 /* next entry */
1252 if ((GCPtrIDTE & PAGE_OFFSET_MASK) + sizeof(VBOXIDTE) >= PAGE_SIZE)
1253 {
1254 AssertMsg(!(GCPtrIDTE & (sizeof(VBOXIDTE) - 1)),
1255 ("IDT is crossing pages and it's not aligned! GCPtrIDTE=%#x cbIDT=%#x\n", GCPtrIDTE, cbIDT));
1256 GCPtrIDTE += sizeof(VBOXIDTE);
1257 break;
1258 }
1259 GCPtrIDTE += sizeof(VBOXIDTE);
1260 pIDTE++;
1261 }
1262 }
1263 else
1264 {
1265 /* Skip to the next page (if any). Take care not to wrap around the address space. */
1266 if ((GCPtrIDTELast >> PAGE_SHIFT) == (GCPtrIDTE >> PAGE_SHIFT))
1267 return false;
1268 GCPtrIDTE = RT_ALIGN_T(GCPtrIDTE, PAGE_SIZE, RTGCPTR) + PAGE_SIZE + (GCPtrIDTE & (sizeof(VBOXIDTE) - 1));
1269 }
1270 }
1271 return false;
1272}
1273
1274
1275/**
1276 * Inject event (such as external irq or trap)
1277 *
1278 * @returns VBox status code.
1279 * @param pVM The VM to operate on.
1280 * @param enmEvent Trpm event type
1281 */
1282TRPMR3DECL(int) TRPMR3InjectEvent(PVM pVM, TRPMEVENT enmEvent)
1283{
1284 PCPUMCTX pCtx;
1285 int rc;
1286
1287 rc = CPUMQueryGuestCtxPtr(pVM, &pCtx);
1288 AssertRC(rc);
1289 Assert(!PATMIsPatchGCAddr(pVM, (RTGCPTR)pCtx->eip));
1290 Assert(!VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS));
1291
1292 /* Currently only useful for external hardware interrupts. */
1293 Assert(enmEvent == TRPM_HARDWARE_INT);
1294
1295 if (REMR3QueryPendingInterrupt(pVM) == REM_NO_PENDING_IRQ)
1296 {
1297#ifdef TRPM_FORWARD_TRAPS_IN_GC
1298
1299# ifdef LOG_ENABLED
1300 DBGFR3InfoLog(pVM, "cpumguest", "TRPMInject");
1301 DBGFR3DisasInstrCurrentLog(pVM, "TRPMInject");
1302# endif
1303
1304 uint8_t u8Interrupt;
1305 rc = PDMGetInterrupt(pVM, &u8Interrupt);
1306 Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
1307 if (VBOX_SUCCESS(rc))
1308 {
1309 if (HWACCMR3IsActive(pVM))
1310 {
1311 rc = TRPMAssertTrap(pVM, u8Interrupt, false);
1312 AssertRC(rc);
1313 STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
1314 return VINF_EM_RESCHEDULE_HWACC;
1315 }
1316 /* If the guest gate is not patched, then we will check (again) if we can patch it. */
1317 if (pVM->trpm.s.aGuestTrapHandler[u8Interrupt] == TRPM_INVALID_HANDLER)
1318 {
1319 CSAMR3CheckGates(pVM, u8Interrupt, 1);
1320 Log(("TRPMR3InjectEvent: recheck gate %x -> valid=%d\n", u8Interrupt, TRPMR3GetGuestTrapHandler(pVM, u8Interrupt) != TRPM_INVALID_HANDLER));
1321 }
1322
1323 if (pVM->trpm.s.aGuestTrapHandler[u8Interrupt] != TRPM_INVALID_HANDLER)
1324 {
1325 /* There's a handler -> let's execute it in raw mode */
1326 rc = TRPMForwardTrap(pVM, CPUMCTX2CORE(pCtx), u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, enmEvent);
1327 if (rc == VINF_SUCCESS /* Don't use VBOX_SUCCESS */)
1328 {
1329 STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
1330 return VINF_EM_RESCHEDULE_RAW;
1331 }
1332 }
1333 else
1334 STAM_COUNTER_INC(&pVM->trpm.s.StatForwardFailNoHandler);
1335 REMR3NotifyPendingInterrupt(pVM, u8Interrupt);
1336 }
1337 else
1338 AssertRC(rc);
1339#else
1340 if (HWACCMR3IsActive(pVM))
1341 {
1342 uint8_t u8Interrupt;
1343 rc = PDMGetInterrupt(pVM, &u8Interrupt);
1344 Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
1345 if (VBOX_SUCCESS(rc))
1346 {
1347 rc = TRPMAssertTrap(pVM, u8Interrupt, false);
1348 AssertRC(rc);
1349 STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
1350 return VINF_EM_RESCHEDULE_HWACC;
1351 }
1352 }
1353 else
1354 AssertRC(rc);
1355#endif
1356 }
1357 /** @todo check if it's safe to translate the patch address to the original guest address.
1358 * this implies a safe state in translated instructions and should take sti successors into account (instruction fusing)
1359 */
1360 /* Note: if it's a PATM address, then we'll go back to raw mode regardless of the return code below. */
1361
1362 /* Fall back to the recompiler */
1363 return VINF_EM_RESCHEDULE_REM; /* (Heed the halted state if this is changed!) */
1364}
1365
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette