VirtualBox

source: vbox/trunk/src/VBox/VMM/VMM.cpp@ 24646

Last change on this file since 24646 was 24582, checked in by vboxsync, 15 years ago

VMM.cpp: Fix cleanup of the stack's guard pages so that we don't assert in PGM if VM creation fails before VMMR3InitFinalize.

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1/* $Id: VMM.cpp 24582 2009-11-11 14:38:34Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22//#define NO_SUPCALLR0VMM
23
24/** @page pg_vmm VMM - The Virtual Machine Monitor
25 *
26 * The VMM component is two things at the moment, it's a component doing a few
27 * management and routing tasks, and it's the whole virtual machine monitor
28 * thing. For hysterical reasons, it is not doing all the management that one
29 * would expect, this is instead done by @ref pg_vm. We'll address this
30 * misdesign eventually.
31 *
32 * @see grp_vmm, grp_vm
33 *
34 *
35 * @section sec_vmmstate VMM State
36 *
37 * @image html VM_Statechart_Diagram.gif
38 *
39 * To be written.
40 *
41 *
42 * @subsection subsec_vmm_init VMM Initialization
43 *
44 * To be written.
45 *
46 *
47 * @subsection subsec_vmm_term VMM Termination
48 *
49 * To be written.
50 *
51 */
52
53/*******************************************************************************
54* Header Files *
55*******************************************************************************/
56#define LOG_GROUP LOG_GROUP_VMM
57#include <VBox/vmm.h>
58#include <VBox/vmapi.h>
59#include <VBox/pgm.h>
60#include <VBox/cfgm.h>
61#include <VBox/pdmqueue.h>
62#include <VBox/pdmcritsect.h>
63#include <VBox/pdmapi.h>
64#include <VBox/cpum.h>
65#include <VBox/mm.h>
66#include <VBox/iom.h>
67#include <VBox/trpm.h>
68#include <VBox/selm.h>
69#include <VBox/em.h>
70#include <VBox/sup.h>
71#include <VBox/dbgf.h>
72#include <VBox/csam.h>
73#include <VBox/patm.h>
74#include <VBox/rem.h>
75#include <VBox/ssm.h>
76#include <VBox/tm.h>
77#include "VMMInternal.h"
78#include "VMMSwitcher/VMMSwitcher.h"
79#include <VBox/vm.h>
80
81#include <VBox/err.h>
82#include <VBox/param.h>
83#include <VBox/version.h>
84#include <VBox/x86.h>
85#include <VBox/hwaccm.h>
86#include <iprt/assert.h>
87#include <iprt/alloc.h>
88#include <iprt/asm.h>
89#include <iprt/time.h>
90#include <iprt/semaphore.h>
91#include <iprt/stream.h>
92#include <iprt/string.h>
93#include <iprt/stdarg.h>
94#include <iprt/ctype.h>
95
96
97
98/*******************************************************************************
99* Defined Constants And Macros *
100*******************************************************************************/
101/** The saved state version. */
102#define VMM_SAVED_STATE_VERSION 4
103/** The saved state version used by v3.0 and earlier. (Teleportation) */
104#define VMM_SAVED_STATE_VERSION_3_0 3
105
106
107/*******************************************************************************
108* Internal Functions *
109*******************************************************************************/
110static int vmmR3InitStacks(PVM pVM);
111static int vmmR3InitLoggers(PVM pVM);
112static void vmmR3InitRegisterStats(PVM pVM);
113static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
114static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
115static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
116static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
117static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
118
119
120/**
121 * Initializes the VMM.
122 *
123 * @returns VBox status code.
124 * @param pVM The VM to operate on.
125 */
126VMMR3DECL(int) VMMR3Init(PVM pVM)
127{
128 LogFlow(("VMMR3Init\n"));
129
130 /*
131 * Assert alignment, sizes and order.
132 */
133 AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
134 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
135 AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
136
137 /*
138 * Init basic VM VMM members.
139 */
140 pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
141 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
142 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
143 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
144 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
145 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
146 int rc = CFGMR3QueryU32(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies);
147 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
148 pVM->vmm.s.cYieldEveryMillies = 23; /* Value arrived at after experimenting with the grub boot prompt. */
149 //pVM->vmm.s.cYieldEveryMillies = 8; //debugging
150 else
151 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
152
153 /*
154 * Initialize the VMM sync critical section and semaphores.
155 */
156 rc = RTCritSectInit(&pVM->vmm.s.CritSectSync);
157 AssertRCReturn(rc, rc);
158 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
159 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
160 return VERR_NO_MEMORY;
161 for (VMCPUID i = 0; i < pVM->cCpus; i++)
162 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
163 for (VMCPUID i = 0; i < pVM->cCpus; i++)
164 {
165 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
166 AssertRCReturn(rc, rc);
167 }
168 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
169 AssertRCReturn(rc, rc);
170 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
171 AssertRCReturn(rc, rc);
172 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
173 AssertRCReturn(rc, rc);
174 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
175 AssertRCReturn(rc, rc);
176
177 /* GC switchers are enabled by default. Turned off by HWACCM. */
178 pVM->vmm.s.fSwitcherDisabled = false;
179
180 /*
181 * Register the saved state data unit.
182 */
183 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
184 NULL, NULL, NULL,
185 NULL, vmmR3Save, NULL,
186 NULL, vmmR3Load, NULL);
187 if (RT_FAILURE(rc))
188 return rc;
189
190 /*
191 * Register the Ring-0 VM handle with the session for fast ioctl calls.
192 */
193 rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
194 if (RT_FAILURE(rc))
195 return rc;
196
197 /*
198 * Init various sub-components.
199 */
200 rc = vmmR3SwitcherInit(pVM);
201 if (RT_SUCCESS(rc))
202 {
203 rc = vmmR3InitStacks(pVM);
204 if (RT_SUCCESS(rc))
205 {
206 rc = vmmR3InitLoggers(pVM);
207
208#ifdef VBOX_WITH_NMI
209 /*
210 * Allocate mapping for the host APIC.
211 */
212 if (RT_SUCCESS(rc))
213 {
214 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
215 AssertRC(rc);
216 }
217#endif
218 if (RT_SUCCESS(rc))
219 {
220 /*
221 * Debug info and statistics.
222 */
223 DBGFR3InfoRegisterInternal(pVM, "ff", "Displays the current Forced actions Flags.", vmmR3InfoFF);
224 vmmR3InitRegisterStats(pVM);
225
226 return VINF_SUCCESS;
227 }
228 }
229 /** @todo: Need failure cleanup. */
230
231 //more todo in here?
232 //if (RT_SUCCESS(rc))
233 //{
234 //}
235 //int rc2 = vmmR3TermCoreCode(pVM);
236 //AssertRC(rc2));
237 }
238
239 return rc;
240}
241
242
243/**
244 * Allocate & setup the VMM RC stack(s) (for EMTs).
245 *
246 * The stacks are also used for long jumps in Ring-0.
247 *
248 * @returns VBox status code.
249 * @param pVM Pointer to the shared VM structure.
250 *
251 * @remarks The optional guard page gets it protection setup up during R3 init
252 * completion because of init order issues.
253 */
254static int vmmR3InitStacks(PVM pVM)
255{
256 int rc = VINF_SUCCESS;
257#ifdef VMM_R0_SWITCH_STACK
258 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
259#else
260 uint32_t fFlags = 0;
261#endif
262
263 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
264 {
265 PVMCPU pVCpu = &pVM->aCpus[idCpu];
266
267#ifdef VBOX_STRICT_VMM_STACK
268 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
269#else
270 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
271#endif
272 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
273 if (RT_SUCCESS(rc))
274 {
275#ifdef VBOX_STRICT_VMM_STACK
276 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
277#endif
278#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
279 /* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
280 if (!VMMIsHwVirtExtForced(pVM))
281 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
282 else
283#endif
284 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
285 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
286 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
287 AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
288
289 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
290 }
291 }
292
293 return rc;
294}
295
296
297/**
298 * Initialize the loggers.
299 *
300 * @returns VBox status code.
301 * @param pVM Pointer to the shared VM structure.
302 */
303static int vmmR3InitLoggers(PVM pVM)
304{
305 int rc;
306
307 /*
308 * Allocate RC & R0 Logger instances (they are finalized in the relocator).
309 */
310#ifdef LOG_ENABLED
311 PRTLOGGER pLogger = RTLogDefaultInstance();
312 if (pLogger)
313 {
314 pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
315 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
316 if (RT_FAILURE(rc))
317 return rc;
318 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
319
320# ifdef VBOX_WITH_R0_LOGGING
321 for (VMCPUID i = 0; i < pVM->cCpus; i++)
322 {
323 PVMCPU pVCpu = &pVM->aCpus[i];
324
325 rc = MMR3HyperAllocOnceNoRelEx(pVM, RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[pLogger->cGroups]),
326 0, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
327 (void **)&pVCpu->vmm.s.pR0LoggerR3);
328 if (RT_FAILURE(rc))
329 return rc;
330 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
331 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
332 pVCpu->vmm.s.pR0LoggerR3->cbLogger = RT_OFFSETOF(RTLOGGER, afGroups[pLogger->cGroups]);
333 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
334 }
335# endif
336 }
337#endif /* LOG_ENABLED */
338
339#ifdef VBOX_WITH_RC_RELEASE_LOGGING
340 /*
341 * Allocate RC release logger instances (finalized in the relocator).
342 */
343 PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
344 if (pRelLogger)
345 {
346 pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
347 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
348 if (RT_FAILURE(rc))
349 return rc;
350 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
351 }
352#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
353 return VINF_SUCCESS;
354}
355
356
357/**
358 * VMMR3Init worker that register the statistics with STAM.
359 *
360 * @param pVM The shared VM structure.
361 */
362static void vmmR3InitRegisterStats(PVM pVM)
363{
364 /*
365 * Statistics.
366 */
367 STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
368 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
369 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
370 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
371 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
372 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
373 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
374 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
375 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
376 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
377 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
378 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
379 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_READ returns.");
380 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_WRITE returns.");
381 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ returns.");
382 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_WRITE returns.");
383 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ_WRITE returns.");
384 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
385 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
386 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
387 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
388 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
389 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
390 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
391 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
392 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
393 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
394 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
395 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
396 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
397 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
398 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
399 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
400 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
401 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
402 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
403 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
404 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
405 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HWACCM_PATCH_TPR_INSTR returns.");
406 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
407 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
408 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMQueueFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMQueueFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_QUEUE_FLUSH calls.");
409 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
410 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
411 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
412 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
413 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
414 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
415 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
416 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
417
418#ifdef VBOX_WITH_STATISTICS
419 for (VMCPUID i = 0; i < pVM->cCpus; i++)
420 {
421 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
422 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
423 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
424 }
425#endif
426}
427
428
429/**
430 * Initializes the per-VCPU VMM.
431 *
432 * @returns VBox status code.
433 * @param pVM The VM to operate on.
434 */
435VMMR3DECL(int) VMMR3InitCPU(PVM pVM)
436{
437 LogFlow(("VMMR3InitCPU\n"));
438 return VINF_SUCCESS;
439}
440
441
442/**
443 * Ring-3 init finalizing.
444 *
445 * @returns VBox status code.
446 * @param pVM The VM handle.
447 */
448VMMR3DECL(int) VMMR3InitFinalize(PVM pVM)
449{
450 int rc;
451
452 /*
453 * Set page attributes to r/w for stack pages.
454 */
455 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
456 {
457 rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
458 X86_PTE_P | X86_PTE_A | X86_PTE_D | X86_PTE_RW);
459 AssertRCReturn(rc, rc);
460 }
461
462 /*
463 * Create the EMT yield timer.
464 */
465 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
466 AssertRCReturn(rc, rc);
467
468 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
469 AssertRCReturn(rc, rc);
470
471#ifdef VBOX_WITH_NMI
472 /*
473 * Map the host APIC into GC - This is AMD/Intel + Host OS specific!
474 */
475 rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
476 X86_PTE_P | X86_PTE_RW | X86_PTE_PWT | X86_PTE_PCD | X86_PTE_A | X86_PTE_D);
477 AssertRCReturn(rc, rc);
478#endif
479
480#ifdef VBOX_STRICT_VMM_STACK
481 /*
482 * Setup the stack guard pages: Two inaccessible pages at each sides of the
483 * stack to catch over/under-flows.
484 */
485 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
486 {
487 uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
488
489 memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
490 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /*fSet*/);
491
492 memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
493 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /*fSet*/);
494 }
495 pVM->vmm.s.fStackGuardsStationed = true;
496#endif
497
498 return VINF_SUCCESS;
499}
500
501
502/**
503 * Initializes the R0 VMM.
504 *
505 * @returns VBox status code.
506 * @param pVM The VM to operate on.
507 */
508VMMR3DECL(int) VMMR3InitR0(PVM pVM)
509{
510 int rc;
511 PVMCPU pVCpu = VMMGetCpu(pVM);
512 Assert(pVCpu && pVCpu->idCpu == 0);
513
514#ifdef LOG_ENABLED
515 /*
516 * Initialize the ring-0 logger if we haven't done so yet.
517 */
518 if ( pVCpu->vmm.s.pR0LoggerR3
519 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
520 {
521 rc = VMMR3UpdateLoggers(pVM);
522 if (RT_FAILURE(rc))
523 return rc;
524 }
525#endif
526
527 /*
528 * Call Ring-0 entry with init code.
529 */
530 for (;;)
531 {
532#ifdef NO_SUPCALLR0VMM
533 //rc = VERR_GENERAL_FAILURE;
534 rc = VINF_SUCCESS;
535#else
536 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
537#endif
538 /*
539 * Flush the logs.
540 */
541#ifdef LOG_ENABLED
542 if ( pVCpu->vmm.s.pR0LoggerR3
543 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
544 RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
545#endif
546 if (rc != VINF_VMM_CALL_HOST)
547 break;
548 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
549 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
550 break;
551 /* Resume R0 */
552 }
553
554 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
555 {
556 LogRel(("R0 init failed, rc=%Rra\n", rc));
557 if (RT_SUCCESS(rc))
558 rc = VERR_INTERNAL_ERROR;
559 }
560 return rc;
561}
562
563
564/**
565 * Initializes the RC VMM.
566 *
567 * @returns VBox status code.
568 * @param pVM The VM to operate on.
569 */
570VMMR3DECL(int) VMMR3InitRC(PVM pVM)
571{
572 PVMCPU pVCpu = VMMGetCpu(pVM);
573 Assert(pVCpu && pVCpu->idCpu == 0);
574
575 /* In VMX mode, there's no need to init RC. */
576 if (pVM->vmm.s.fSwitcherDisabled)
577 return VINF_SUCCESS;
578
579 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
580
581 /*
582 * Call VMMGCInit():
583 * -# resolve the address.
584 * -# setup stackframe and EIP to use the trampoline.
585 * -# do a generic hypervisor call.
586 */
587 RTRCPTR RCPtrEP;
588 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
589 if (RT_SUCCESS(rc))
590 {
591 CPUMHyperSetCtxCore(pVCpu, NULL);
592 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
593 uint64_t u64TS = RTTimeProgramStartNanoTS();
594 CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
595 CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
596 CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
597 CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
598 CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
599 CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
600 CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
601 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
602 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
603
604 for (;;)
605 {
606#ifdef NO_SUPCALLR0VMM
607 //rc = VERR_GENERAL_FAILURE;
608 rc = VINF_SUCCESS;
609#else
610 rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
611#endif
612#ifdef LOG_ENABLED
613 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
614 if ( pLogger
615 && pLogger->offScratch > 0)
616 RTLogFlushRC(NULL, pLogger);
617#endif
618#ifdef VBOX_WITH_RC_RELEASE_LOGGING
619 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
620 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
621 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
622#endif
623 if (rc != VINF_VMM_CALL_HOST)
624 break;
625 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
626 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
627 break;
628 }
629
630 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
631 {
632 VMMR3FatalDump(pVM, pVCpu, rc);
633 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
634 rc = VERR_INTERNAL_ERROR;
635 }
636 AssertRC(rc);
637 }
638 return rc;
639}
640
641
642/**
643 * Terminate the VMM bits.
644 *
645 * @returns VINF_SUCCESS.
646 * @param pVM The VM handle.
647 */
648VMMR3DECL(int) VMMR3Term(PVM pVM)
649{
650 PVMCPU pVCpu = VMMGetCpu(pVM);
651 Assert(pVCpu && pVCpu->idCpu == 0);
652
653 /*
654 * Call Ring-0 entry with termination code.
655 */
656 int rc;
657 for (;;)
658 {
659#ifdef NO_SUPCALLR0VMM
660 //rc = VERR_GENERAL_FAILURE;
661 rc = VINF_SUCCESS;
662#else
663 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
664#endif
665 /*
666 * Flush the logs.
667 */
668#ifdef LOG_ENABLED
669 if ( pVCpu->vmm.s.pR0LoggerR3
670 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
671 RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
672#endif
673 if (rc != VINF_VMM_CALL_HOST)
674 break;
675 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
676 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
677 break;
678 /* Resume R0 */
679 }
680 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
681 {
682 LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
683 if (RT_SUCCESS(rc))
684 rc = VERR_INTERNAL_ERROR;
685 }
686
687 RTCritSectDelete(&pVM->vmm.s.CritSectSync);
688 for (VMCPUID i = 0; i < pVM->cCpus; i++)
689 {
690 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
691 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
692 }
693 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
694 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
695 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
696 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
697 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
698 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
699 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
700 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
701
702#ifdef VBOX_STRICT_VMM_STACK
703 /*
704 * Make the two stack guard pages present again.
705 */
706 if (pVM->vmm.s.fStackGuardsStationed)
707 {
708 for (VMCPUID i = 0; i < pVM->cCpus; i++)
709 {
710 uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
711 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /*fSet*/);
712 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /*fSet*/);
713 }
714 pVM->vmm.s.fStackGuardsStationed = false;
715 }
716#endif
717 return rc;
718}
719
720
721/**
722 * Terminates the per-VCPU VMM.
723 *
724 * Termination means cleaning up and freeing all resources,
725 * the VM it self is at this point powered off or suspended.
726 *
727 * @returns VBox status code.
728 * @param pVM The VM to operate on.
729 */
730VMMR3DECL(int) VMMR3TermCPU(PVM pVM)
731{
732 return VINF_SUCCESS;
733}
734
735
736/**
737 * Applies relocations to data and code managed by this
738 * component. This function will be called at init and
739 * whenever the VMM need to relocate it self inside the GC.
740 *
741 * The VMM will need to apply relocations to the core code.
742 *
743 * @param pVM The VM handle.
744 * @param offDelta The relocation delta.
745 */
746VMMR3DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
747{
748 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
749
750 /*
751 * Recalc the RC address.
752 */
753 pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
754
755 /*
756 * The stack.
757 */
758 for (VMCPUID i = 0; i < pVM->cCpus; i++)
759 {
760 PVMCPU pVCpu = &pVM->aCpus[i];
761
762 CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
763
764 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
765 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
766 }
767
768 /*
769 * All the switchers.
770 */
771 vmmR3SwitcherRelocate(pVM, offDelta);
772
773 /*
774 * Get other RC entry points.
775 */
776 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
777 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
778
779 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
780 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
781
782 /*
783 * Update the logger.
784 */
785 VMMR3UpdateLoggers(pVM);
786}
787
788
789/**
790 * Updates the settings for the RC and R0 loggers.
791 *
792 * @returns VBox status code.
793 * @param pVM The VM handle.
794 */
795VMMR3DECL(int) VMMR3UpdateLoggers(PVM pVM)
796{
797 /*
798 * Simply clone the logger instance (for RC).
799 */
800 int rc = VINF_SUCCESS;
801 RTRCPTR RCPtrLoggerFlush = 0;
802
803 if (pVM->vmm.s.pRCLoggerR3
804#ifdef VBOX_WITH_RC_RELEASE_LOGGING
805 || pVM->vmm.s.pRCRelLoggerR3
806#endif
807 )
808 {
809 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
810 AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
811 }
812
813 if (pVM->vmm.s.pRCLoggerR3)
814 {
815 RTRCPTR RCPtrLoggerWrapper = 0;
816 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
817 AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
818
819 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
820 rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
821 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
822 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
823 }
824
825#ifdef VBOX_WITH_RC_RELEASE_LOGGING
826 if (pVM->vmm.s.pRCRelLoggerR3)
827 {
828 RTRCPTR RCPtrLoggerWrapper = 0;
829 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
830 AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
831
832 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
833 rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
834 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
835 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
836 }
837#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
838
839#ifdef LOG_ENABLED
840 /*
841 * For the ring-0 EMT logger, we use a per-thread logger instance
842 * in ring-0. Only initialize it once.
843 */
844 for (VMCPUID i = 0; i < pVM->cCpus; i++)
845 {
846 PVMCPU pVCpu = &pVM->aCpus[i];
847 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
848 if (pR0LoggerR3)
849 {
850 if (!pR0LoggerR3->fCreated)
851 {
852 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
853 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
854 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
855
856 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
857 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
858 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
859
860 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
861 *(PFNRTLOGGER *)&pfnLoggerWrapper, *(PFNRTLOGFLUSH *)&pfnLoggerFlush,
862 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
863 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
864
865 RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
866 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
867 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
868 rc = RTLogSetCustomPrefixCallback(&pR0LoggerR3->Logger, *(PFNRTLOGPREFIX *)&pfnLoggerPrefix, NULL);
869 AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
870
871 pR0LoggerR3->idCpu = i;
872 pR0LoggerR3->fCreated = true;
873 pR0LoggerR3->fFlushingDisabled = false;
874
875 }
876
877 rc = RTLogCopyGroupsAndFlags(&pR0LoggerR3->Logger, NULL /* default */, pVM->vmm.s.pRCLoggerR3->fFlags, RTLOGFLAGS_BUFFERED);
878 AssertRC(rc);
879 }
880 }
881#endif
882 return rc;
883}
884
885
886/**
887 * Gets the pointer to a buffer containing the R0/RC AssertMsg1 output.
888 *
889 * @returns Pointer to the buffer.
890 * @param pVM The VM handle.
891 */
892VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
893{
894 if (HWACCMIsEnabled(pVM))
895 return pVM->vmm.s.szRing0AssertMsg1;
896
897 RTRCPTR RCPtr;
898 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
899 if (RT_SUCCESS(rc))
900 return (const char *)MMHyperRCToR3(pVM, RCPtr);
901
902 return NULL;
903}
904
905
906/**
907 * Gets the pointer to a buffer containing the R0/RC AssertMsg2 output.
908 *
909 * @returns Pointer to the buffer.
910 * @param pVM The VM handle.
911 */
912VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
913{
914 if (HWACCMIsEnabled(pVM))
915 return pVM->vmm.s.szRing0AssertMsg2;
916
917 RTRCPTR RCPtr;
918 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
919 if (RT_SUCCESS(rc))
920 return (const char *)MMHyperRCToR3(pVM, RCPtr);
921
922 return NULL;
923}
924
925
926/**
927 * Execute state save operation.
928 *
929 * @returns VBox status code.
930 * @param pVM VM Handle.
931 * @param pSSM SSM operation handle.
932 */
933static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
934{
935 LogFlow(("vmmR3Save:\n"));
936
937 /*
938 * Save the started/stopped state of all CPUs except 0 as it will always
939 * be running. This avoids breaking the saved state version. :-)
940 */
941 for (VMCPUID i = 1; i < pVM->cCpus; i++)
942 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
943
944 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
945}
946
947
948/**
949 * Execute state load operation.
950 *
951 * @returns VBox status code.
952 * @param pVM VM Handle.
953 * @param pSSM SSM operation handle.
954 * @param uVersion Data layout version.
955 * @param uPass The data pass.
956 */
957static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
958{
959 LogFlow(("vmmR3Load:\n"));
960 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
961
962 /*
963 * Validate version.
964 */
965 if ( uVersion != VMM_SAVED_STATE_VERSION
966 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
967 {
968 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
969 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
970 }
971
972 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
973 {
974 /* Ignore the stack bottom, stack pointer and stack bits. */
975 RTRCPTR RCPtrIgnored;
976 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
977 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
978 SSMR3Skip(pSSM, VMM_STACK_SIZE);
979 }
980
981 /*
982 * Restore the VMCPU states. VCPU 0 is always started.
983 */
984 VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
985 for (VMCPUID i = 1; i < pVM->cCpus; i++)
986 {
987 bool fStarted;
988 int rc = SSMR3GetBool(pSSM, &fStarted);
989 if (RT_FAILURE(rc))
990 return rc;
991 VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
992 }
993
994 /* terminator */
995 uint32_t u32;
996 int rc = SSMR3GetU32(pSSM, &u32);
997 if (RT_FAILURE(rc))
998 return rc;
999 if (u32 != UINT32_MAX)
1000 {
1001 AssertMsgFailed(("u32=%#x\n", u32));
1002 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1003 }
1004 return VINF_SUCCESS;
1005}
1006
1007
1008/**
1009 * Resolve a builtin RC symbol.
1010 *
1011 * Called by PDM when loading or relocating RC modules.
1012 *
1013 * @returns VBox status
1014 * @param pVM VM Handle.
1015 * @param pszSymbol Symbol to resolv
1016 * @param pRCPtrValue Where to store the symbol value.
1017 *
1018 * @remark This has to work before VMMR3Relocate() is called.
1019 */
1020VMMR3DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1021{
1022 if (!strcmp(pszSymbol, "g_Logger"))
1023 {
1024 if (pVM->vmm.s.pRCLoggerR3)
1025 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1026 *pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1027 }
1028 else if (!strcmp(pszSymbol, "g_RelLogger"))
1029 {
1030#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1031 if (pVM->vmm.s.pRCRelLoggerR3)
1032 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1033 *pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1034#else
1035 *pRCPtrValue = NIL_RTRCPTR;
1036#endif
1037 }
1038 else
1039 return VERR_SYMBOL_NOT_FOUND;
1040 return VINF_SUCCESS;
1041}
1042
1043
1044/**
1045 * Suspends the CPU yielder.
1046 *
1047 * @param pVM The VM handle.
1048 */
1049VMMR3DECL(void) VMMR3YieldSuspend(PVM pVM)
1050{
1051 VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1052 if (!pVM->vmm.s.cYieldResumeMillies)
1053 {
1054 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1055 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1056 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1057 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1058 else
1059 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1060 TMTimerStop(pVM->vmm.s.pYieldTimer);
1061 }
1062 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1063}
1064
1065
1066/**
1067 * Stops the CPU yielder.
1068 *
1069 * @param pVM The VM handle.
1070 */
1071VMMR3DECL(void) VMMR3YieldStop(PVM pVM)
1072{
1073 if (!pVM->vmm.s.cYieldResumeMillies)
1074 TMTimerStop(pVM->vmm.s.pYieldTimer);
1075 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1076 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1077}
1078
1079
1080/**
1081 * Resumes the CPU yielder when it has been a suspended or stopped.
1082 *
1083 * @param pVM The VM handle.
1084 */
1085VMMR3DECL(void) VMMR3YieldResume(PVM pVM)
1086{
1087 if (pVM->vmm.s.cYieldResumeMillies)
1088 {
1089 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1090 pVM->vmm.s.cYieldResumeMillies = 0;
1091 }
1092}
1093
1094
1095/**
1096 * Internal timer callback function.
1097 *
1098 * @param pVM The VM.
1099 * @param pTimer The timer handle.
1100 * @param pvUser User argument specified upon timer creation.
1101 */
1102static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1103{
1104 /*
1105 * This really needs some careful tuning. While we shouldn't be too greedy since
1106 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1107 * because that'll cause us to stop up.
1108 *
1109 * The current logic is to use the default interval when there is no lag worth
1110 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1111 *
1112 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1113 * so the lag is up to date.)
1114 */
1115 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1116 if ( u64Lag < 50000000 /* 50ms */
1117 || ( u64Lag < 1000000000 /* 1s */
1118 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1119 )
1120 {
1121 uint64_t u64Elapsed = RTTimeNanoTS();
1122 pVM->vmm.s.u64LastYield = u64Elapsed;
1123
1124 RTThreadYield();
1125
1126#ifdef LOG_ENABLED
1127 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1128 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1129#endif
1130 }
1131 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1132}
1133
1134
1135/**
1136 * Executes guest code in the raw-mode context.
1137 *
1138 * @param pVM VM handle.
1139 * @param pVCpu The VMCPU to operate on.
1140 */
1141VMMR3DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1142{
1143 Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1144
1145 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1146
1147 /*
1148 * Set the EIP and ESP.
1149 */
1150 CPUMSetHyperEIP(pVCpu, CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1151 ? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1152 : pVM->vmm.s.pfnCPUMRCResumeGuest);
1153 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
1154
1155 /*
1156 * We hide log flushes (outer) and hypervisor interrupts (inner).
1157 */
1158 for (;;)
1159 {
1160#ifdef VBOX_STRICT
1161 if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) || CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1162 EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1163 PGMMapCheck(pVM);
1164#endif
1165 int rc;
1166 do
1167 {
1168#ifdef NO_SUPCALLR0VMM
1169 rc = VERR_GENERAL_FAILURE;
1170#else
1171 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1172 if (RT_LIKELY(rc == VINF_SUCCESS))
1173 rc = pVCpu->vmm.s.iLastGZRc;
1174#endif
1175 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1176
1177 /*
1178 * Flush the logs.
1179 */
1180#ifdef LOG_ENABLED
1181 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1182 if ( pLogger
1183 && pLogger->offScratch > 0)
1184 RTLogFlushRC(NULL, pLogger);
1185#endif
1186#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1187 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1188 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1189 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1190#endif
1191 if (rc != VINF_VMM_CALL_HOST)
1192 {
1193 Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1194 return rc;
1195 }
1196 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1197 if (RT_FAILURE(rc))
1198 return rc;
1199 /* Resume GC */
1200 }
1201}
1202
1203
1204/**
1205 * Executes guest code (Intel VT-x and AMD-V).
1206 *
1207 * @param pVM VM handle.
1208 * @param pVCpu The VMCPU to operate on.
1209 */
1210VMMR3DECL(int) VMMR3HwAccRunGC(PVM pVM, PVMCPU pVCpu)
1211{
1212 Log2(("VMMR3HwAccRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1213
1214 for (;;)
1215 {
1216 int rc;
1217 do
1218 {
1219#ifdef NO_SUPCALLR0VMM
1220 rc = VERR_GENERAL_FAILURE;
1221#else
1222 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HWACC_RUN, pVCpu->idCpu);
1223 if (RT_LIKELY(rc == VINF_SUCCESS))
1224 rc = pVCpu->vmm.s.iLastGZRc;
1225#endif
1226 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1227
1228#ifdef LOG_ENABLED
1229 /*
1230 * Flush the log
1231 */
1232 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1233 if ( pR0LoggerR3
1234 && pR0LoggerR3->Logger.offScratch > 0)
1235 RTLogFlushToLogger(&pR0LoggerR3->Logger, NULL);
1236#endif /* !LOG_ENABLED */
1237 if (rc != VINF_VMM_CALL_HOST)
1238 {
1239 Log2(("VMMR3HwAccRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1240 return rc;
1241 }
1242 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1243 if (RT_FAILURE(rc))
1244 return rc;
1245 /* Resume R0 */
1246 }
1247}
1248
1249/**
1250 * VCPU worker for VMMSendSipi.
1251 *
1252 * @param pVM The VM to operate on.
1253 * @param idCpu Virtual CPU to perform SIPI on
1254 * @param uVector SIPI vector
1255 */
1256DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1257{
1258 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1259 VMCPU_ASSERT_EMT(pVCpu);
1260
1261 /** @todo what are we supposed to do if the processor is already running? */
1262 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1263 return VERR_ACCESS_DENIED;
1264
1265
1266 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1267
1268 pCtx->cs = uVector << 8;
1269 pCtx->csHid.u64Base = uVector << 12;
1270 pCtx->csHid.u32Limit = 0x0000ffff;
1271 pCtx->rip = 0;
1272
1273 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1274
1275# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1276 EMSetState(pVCpu, EMSTATE_HALTED);
1277 return VINF_EM_RESCHEDULE;
1278# else /* And if we go the VMCPU::enmState way it can stay here. */
1279 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1280 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1281 return VINF_SUCCESS;
1282# endif
1283}
1284
1285DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1286{
1287 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1288 VMCPU_ASSERT_EMT(pVCpu);
1289
1290 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1291 CPUMR3ResetCpu(pVCpu);
1292 return VINF_EM_WAIT_SIPI;
1293}
1294
1295/**
1296 * Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1297 * and unhalting processor
1298 *
1299 * @param pVM The VM to operate on.
1300 * @param idCpu Virtual CPU to perform SIPI on
1301 * @param uVector SIPI vector
1302 */
1303VMMR3DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1304{
1305 AssertReturnVoid(idCpu < pVM->cCpus);
1306
1307 int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1308 AssertRC(rc);
1309}
1310
1311/**
1312 * Sends init IPI to the virtual CPU.
1313 *
1314 * @param pVM The VM to operate on.
1315 * @param idCpu Virtual CPU to perform int IPI on
1316 */
1317VMMR3DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1318{
1319 AssertReturnVoid(idCpu < pVM->cCpus);
1320
1321 int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1322 AssertRC(rc);
1323}
1324
1325/**
1326 * Registers the guest memory range that can be used for patching
1327 *
1328 * @returns VBox status code.
1329 * @param pVM The VM to operate on.
1330 * @param pPatchMem Patch memory range
1331 * @param cbPatchMem Size of the memory range
1332 */
1333VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1334{
1335 if (HWACCMIsEnabled(pVM))
1336 return HWACMMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1337
1338 return VERR_NOT_SUPPORTED;
1339}
1340
1341/**
1342 * Deregisters the guest memory range that can be used for patching
1343 *
1344 * @returns VBox status code.
1345 * @param pVM The VM to operate on.
1346 * @param pPatchMem Patch memory range
1347 * @param cbPatchMem Size of the memory range
1348 */
1349VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1350{
1351 if (HWACCMIsEnabled(pVM))
1352 return HWACMMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1353
1354 return VINF_SUCCESS;
1355}
1356
1357
1358/**
1359 * VCPU worker for VMMR3SynchronizeAllVCpus.
1360 *
1361 * @param pVM The VM to operate on.
1362 * @param idCpu Virtual CPU to perform SIPI on
1363 * @param uVector SIPI vector
1364 */
1365DECLCALLBACK(int) vmmR3SyncVCpu(PVM pVM)
1366{
1367 /* Block until the job in the caller has finished. */
1368 RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1369 RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1370 return VINF_SUCCESS;
1371}
1372
1373
1374/**
1375 * Atomically execute a callback handler
1376 * Note: This is very expensive; avoid using it frequently!
1377 *
1378 * @param pVM The VM to operate on.
1379 * @param pfnHandler Callback handler
1380 * @param pvUser User specified parameter
1381 *
1382 * @thread EMT
1383 */
1384VMMR3DECL(int) VMMR3AtomicExecuteHandler(PVM pVM, PFNATOMICHANDLER pfnHandler, void *pvUser)
1385{
1386 int rc;
1387 PVMCPU pVCpu = VMMGetCpu(pVM);
1388 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1389
1390 /* Shortcut for the uniprocessor case. */
1391 if (pVM->cCpus == 1)
1392 return pfnHandler(pVM, pvUser);
1393
1394 RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1395 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
1396 {
1397 if (idCpu != pVCpu->idCpu)
1398 {
1399 rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SyncVCpu, 1, pVM);
1400 AssertRC(rc);
1401 }
1402 }
1403 /* Wait until all other VCPUs are waiting for us. */
1404 while (RTCritSectGetWaiters(&pVM->vmm.s.CritSectSync) != (int32_t)(pVM->cCpus - 1))
1405 RTThreadSleep(1);
1406
1407 rc = pfnHandler(pVM, pvUser);
1408 RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1409 return rc;
1410}
1411
1412
1413/**
1414 * Count returns and have the last non-caller EMT wake up the caller.
1415 *
1416 * @returns VBox strict informational status code for EM scheduling. No failures
1417 * will be returned here, those are for the caller only.
1418 *
1419 * @param pVM The VM handle.
1420 */
1421DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1422{
1423 int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1424 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1425 if (cReturned == pVM->cCpus - 1U)
1426 {
1427 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1428 AssertLogRelRC(rc);
1429 }
1430
1431 AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1432 || (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1433 ("%Rrc\n", rcRet),
1434 VERR_IPE_UNEXPECTED_INFO_STATUS);
1435 return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1436}
1437
1438
1439/**
1440 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1441 *
1442 * @returns VBox strict informational status code for EM scheduling. No failures
1443 * will be returned here, those are for the caller only. When
1444 * fIsCaller is set, VINF_SUCESS is always returned.
1445 *
1446 * @param pVM The VM handle.
1447 * @param pVCpu The VMCPU structure for the calling EMT.
1448 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1449 * not.
1450 * @param fFlags The flags.
1451 * @param pfnRendezvous The callback.
1452 * @param pvUser The user argument for the callback.
1453 */
1454static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1455 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1456{
1457 int rc;
1458
1459 /*
1460 * Enter, the last EMT triggers the next callback phase.
1461 */
1462 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1463 if (cEntered != pVM->cCpus)
1464 {
1465 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1466 {
1467 /* Wait for our turn. */
1468 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1469 AssertLogRelRC(rc);
1470 }
1471 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1472 {
1473 /* Wait for the last EMT to arrive and wake everyone up. */
1474 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1475 AssertLogRelRC(rc);
1476 }
1477 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1478 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1479 {
1480 /* Wait for our turn. */
1481 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1482 AssertLogRelRC(rc);
1483 }
1484 else
1485 {
1486 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1487
1488 /*
1489 * The execute once is handled specially to optimize the code flow.
1490 *
1491 * The last EMT to arrive will perform the callback and the other
1492 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1493 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1494 * returns, that EMT will initiate the normal return sequence.
1495 */
1496 if (!fIsCaller)
1497 {
1498 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1499 AssertLogRelRC(rc);
1500
1501 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1502 }
1503 return VINF_SUCCESS;
1504 }
1505 }
1506 else
1507 {
1508 /*
1509 * All EMTs are waiting, clear the FF and take action according to the
1510 * execution method.
1511 */
1512 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1513
1514 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1515 {
1516 /* Wake up everyone. */
1517 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1518 AssertLogRelRC(rc);
1519 }
1520 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1521 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1522 {
1523 /* Figure out who to wake up and wake it up. If it's ourself, then
1524 it's easy otherwise wait for our turn. */
1525 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1526 ? 0
1527 : pVM->cCpus - 1U;
1528 if (pVCpu->idCpu != iFirst)
1529 {
1530 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1531 AssertLogRelRC(rc);
1532 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1533 AssertLogRelRC(rc);
1534 }
1535 }
1536 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1537 }
1538
1539
1540 /*
1541 * Do the callback and update the status if necessary.
1542 */
1543 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1544 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1545 {
1546 VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1547 if (rcStrict != VINF_SUCCESS)
1548 {
1549 AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1550 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1551 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1552 int32_t i32RendezvousStatus;
1553 do
1554 {
1555 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1556 if ( rcStrict == i32RendezvousStatus
1557 || RT_FAILURE(i32RendezvousStatus)
1558 || ( i32RendezvousStatus != VINF_SUCCESS
1559 && rcStrict > i32RendezvousStatus))
1560 break;
1561 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1562 }
1563 }
1564
1565 /*
1566 * Increment the done counter and take action depending on whether we're
1567 * the last to finish callback execution.
1568 */
1569 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1570 if ( cDone != pVM->cCpus
1571 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1572 {
1573 /* Signal the next EMT? */
1574 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1575 {
1576 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1577 AssertLogRelRC(rc);
1578 }
1579 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1580 {
1581 Assert(cDone == pVCpu->idCpu + 1U);
1582 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1583 AssertLogRelRC(rc);
1584 }
1585 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1586 {
1587 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1588 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1589 AssertLogRelRC(rc);
1590 }
1591
1592 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1593 if (!fIsCaller)
1594 {
1595 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1596 AssertLogRelRC(rc);
1597 }
1598 }
1599 else
1600 {
1601 /* Callback execution is all done, tell the rest to return. */
1602 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1603 AssertLogRelRC(rc);
1604 }
1605
1606 if (!fIsCaller)
1607 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1608 return VINF_SUCCESS;
1609}
1610
1611
1612/**
1613 * Called in response to VM_FF_EMT_RENDEZVOUS.
1614 *
1615 * @returns VBox strict status code - EM scheduling. No errors will be returned
1616 * here, nor will any non-EM scheduling status codes be returned.
1617 *
1618 * @param pVM The VM handle
1619 * @param pVCpu The handle of the calling EMT.
1620 *
1621 * @thread EMT
1622 */
1623VMMR3DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1624{
1625 return vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1626 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1627}
1628
1629
1630/**
1631 * EMT rendezvous.
1632 *
1633 * Gathers all the EMTs and execute some code on each of them, either in a one
1634 * by one fashion or all at once.
1635 *
1636 * @returns VBox strict status code. This will be the the first error,
1637 * VINF_SUCCESS, or an EM scheduling status code.
1638 *
1639 * @param pVM The VM handle.
1640 * @param fFlags Flags indicating execution methods. See
1641 * grp_VMMR3EmtRendezvous_fFlags.
1642 * @param pfnRendezvous The callback.
1643 * @param pvUser User argument for the callback.
1644 *
1645 * @thread Any.
1646 */
1647VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1648{
1649 /*
1650 * Validate input.
1651 */
1652 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1653 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1654 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1655 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1656 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1657 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1658 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1659
1660 VBOXSTRICTRC rcStrict;
1661 PVMCPU pVCpu = VMMGetCpu(pVM);
1662 if (!pVCpu)
1663 /*
1664 * Forward the request to an EMT thread.
1665 */
1666 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1667 (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1668 else if (pVM->cCpus == 1)
1669 /*
1670 * Shortcut for the single EMT case.
1671 */
1672 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1673 else
1674 {
1675 /*
1676 * Spin lock. If busy, wait for the other EMT to finish while keeping a
1677 * lookout of the RENDEZVOUS FF.
1678 */
1679 int rc;
1680 rcStrict = VINF_SUCCESS;
1681 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1682 {
1683 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1684 {
1685 if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1686 {
1687 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1688 if ( rc != VINF_SUCCESS
1689 && ( rcStrict == VINF_SUCCESS
1690 || rcStrict > rc))
1691 rcStrict = rc;
1692 /** @todo Perhaps deal with termination here? */
1693 }
1694 ASMNopPause();
1695 }
1696 }
1697 Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1698
1699 /*
1700 * Clear the slate. This is a semaphore ping-pong orgy. :-)
1701 */
1702 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1703 {
1704 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1705 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1706 }
1707 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1708 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1709 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1710 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1711 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1712 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1713 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1714 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1715 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1716 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1717 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1718
1719 /*
1720 * Set the FF and poke the other EMTs.
1721 */
1722 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1723 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1724
1725 /*
1726 * Do the same ourselves.
1727 */
1728 vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1729
1730 /*
1731 * The caller waits for the other EMTs to be done and return before doing
1732 * the cleanup. This makes away with wakeup / reset races we would otherwise
1733 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1734 */
1735 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1736 AssertLogRelRC(rc);
1737
1738 /*
1739 * Get the return code and clean up a little bit.
1740 */
1741 int rcMy = pVM->vmm.s.i32RendezvousStatus;
1742 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, NULL);
1743
1744 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1745
1746 /*
1747 * Merge rcStrict and rcMy.
1748 */
1749 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1750 if ( rcMy != VINF_SUCCESS
1751 && ( rcStrict == VINF_SUCCESS
1752 || rcStrict > rcMy))
1753 rcStrict = rcMy;
1754 }
1755
1756 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1757 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1758 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1759 VERR_IPE_UNEXPECTED_INFO_STATUS);
1760 return VBOXSTRICTRC_VAL(rcStrict);
1761}
1762
1763
1764/**
1765 * Read from the ring 0 jump buffer stack
1766 *
1767 * @returns VBox status code.
1768 *
1769 * @param pVM Pointer to the shared VM structure.
1770 * @param idCpu The ID of the source CPU context (for the address).
1771 * @param pAddress Where to start reading.
1772 * @param pvBuf Where to store the data we've read.
1773 * @param cbRead The number of bytes to read.
1774 */
1775VMMR3DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR pAddress, void *pvBuf, size_t cbRead)
1776{
1777 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1778 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1779
1780 RTHCUINTPTR offset = pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - pAddress;
1781 if (offset >= pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack)
1782 return VERR_INVALID_POINTER;
1783
1784 memcpy(pvBuf, pVCpu->vmm.s.pbEMTStackR3 + pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - offset, cbRead);
1785 return VINF_SUCCESS;
1786}
1787
1788
1789/**
1790 * Calls a RC function.
1791 *
1792 * @param pVM The VM handle.
1793 * @param RCPtrEntry The address of the RC function.
1794 * @param cArgs The number of arguments in the ....
1795 * @param ... Arguments to the function.
1796 */
1797VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1798{
1799 va_list args;
1800 va_start(args, cArgs);
1801 int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1802 va_end(args);
1803 return rc;
1804}
1805
1806
1807/**
1808 * Calls a RC function.
1809 *
1810 * @param pVM The VM handle.
1811 * @param RCPtrEntry The address of the RC function.
1812 * @param cArgs The number of arguments in the ....
1813 * @param args Arguments to the function.
1814 */
1815VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1816{
1817 /* Raw mode implies 1 VCPU. */
1818 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1819 PVMCPU pVCpu = &pVM->aCpus[0];
1820
1821 Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1822
1823 /*
1824 * Setup the call frame using the trampoline.
1825 */
1826 CPUMHyperSetCtxCore(pVCpu, NULL);
1827 memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1828 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32));
1829 PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1830 int i = cArgs;
1831 while (i-- > 0)
1832 *pFrame++ = va_arg(args, RTGCUINTPTR32);
1833
1834 CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1835 CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1836 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
1837
1838 /*
1839 * We hide log flushes (outer) and hypervisor interrupts (inner).
1840 */
1841 for (;;)
1842 {
1843 int rc;
1844 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1845 do
1846 {
1847#ifdef NO_SUPCALLR0VMM
1848 rc = VERR_GENERAL_FAILURE;
1849#else
1850 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1851 if (RT_LIKELY(rc == VINF_SUCCESS))
1852 rc = pVCpu->vmm.s.iLastGZRc;
1853#endif
1854 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1855
1856 /*
1857 * Flush the logs.
1858 */
1859#ifdef LOG_ENABLED
1860 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1861 if ( pLogger
1862 && pLogger->offScratch > 0)
1863 RTLogFlushRC(NULL, pLogger);
1864#endif
1865#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1866 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1867 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1868 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1869#endif
1870 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
1871 VMMR3FatalDump(pVM, pVCpu, rc);
1872 if (rc != VINF_VMM_CALL_HOST)
1873 {
1874 Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1875 return rc;
1876 }
1877 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1878 if (RT_FAILURE(rc))
1879 return rc;
1880 }
1881}
1882
1883
1884/**
1885 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1886 *
1887 * @returns VBox status code.
1888 * @param pVM The VM to operate on.
1889 * @param uOperation Operation to execute.
1890 * @param u64Arg Constant argument.
1891 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1892 * details.
1893 */
1894VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1895{
1896 PVMCPU pVCpu = VMMGetCpu(pVM);
1897 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1898
1899 /*
1900 * Call Ring-0 entry with init code.
1901 */
1902 int rc;
1903 for (;;)
1904 {
1905#ifdef NO_SUPCALLR0VMM
1906 rc = VERR_GENERAL_FAILURE;
1907#else
1908 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1909#endif
1910 /*
1911 * Flush the logs.
1912 */
1913#ifdef LOG_ENABLED
1914 if ( pVCpu->vmm.s.pR0LoggerR3
1915 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1916 RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
1917#endif
1918 if (rc != VINF_VMM_CALL_HOST)
1919 break;
1920 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1921 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1922 break;
1923 /* Resume R0 */
1924 }
1925
1926 AssertLogRelMsgReturn(rc == VINF_SUCCESS || VBOX_FAILURE(rc),
1927 ("uOperation=%u rc=%Rrc\n", uOperation, rc),
1928 VERR_INTERNAL_ERROR);
1929 return rc;
1930}
1931
1932
1933/**
1934 * Resumes executing hypervisor code when interrupted by a queue flush or a
1935 * debug event.
1936 *
1937 * @returns VBox status code.
1938 * @param pVM VM handle.
1939 * @param pVCpu VMCPU handle.
1940 */
1941VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
1942{
1943 Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
1944 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1945
1946 /*
1947 * We hide log flushes (outer) and hypervisor interrupts (inner).
1948 */
1949 for (;;)
1950 {
1951 int rc;
1952 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1953 do
1954 {
1955#ifdef NO_SUPCALLR0VMM
1956 rc = VERR_GENERAL_FAILURE;
1957#else
1958 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1959 if (RT_LIKELY(rc == VINF_SUCCESS))
1960 rc = pVCpu->vmm.s.iLastGZRc;
1961#endif
1962 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1963
1964 /*
1965 * Flush the loggers,
1966 */
1967#ifdef LOG_ENABLED
1968 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1969 if ( pLogger
1970 && pLogger->offScratch > 0)
1971 RTLogFlushRC(NULL, pLogger);
1972#endif
1973#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1974 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1975 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1976 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1977#endif
1978 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
1979 VMMR3FatalDump(pVM, pVCpu, rc);
1980 if (rc != VINF_VMM_CALL_HOST)
1981 {
1982 Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
1983 return rc;
1984 }
1985 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1986 if (RT_FAILURE(rc))
1987 return rc;
1988 }
1989}
1990
1991
1992/**
1993 * Service a call to the ring-3 host code.
1994 *
1995 * @returns VBox status code.
1996 * @param pVM VM handle.
1997 * @param pVCpu VMCPU handle
1998 * @remark Careful with critsects.
1999 */
2000static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2001{
2002 /*
2003 * We must also check for pending critsect exits or else we can deadlock
2004 * when entering other critsects here.
2005 */
2006 if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2007 PDMCritSectFF(pVCpu);
2008
2009 switch (pVCpu->vmm.s.enmCallRing3Operation)
2010 {
2011 /*
2012 * Acquire the PDM lock.
2013 */
2014 case VMMCALLRING3_PDM_LOCK:
2015 {
2016 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2017 break;
2018 }
2019
2020 /*
2021 * Flush a PDM queue.
2022 */
2023 case VMMCALLRING3_PDM_QUEUE_FLUSH:
2024 {
2025 PDMR3QueueFlushWorker(pVM, NULL);
2026 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2027 break;
2028 }
2029
2030 /*
2031 * Grow the PGM pool.
2032 */
2033 case VMMCALLRING3_PGM_POOL_GROW:
2034 {
2035 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2036 break;
2037 }
2038
2039 /*
2040 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2041 */
2042 case VMMCALLRING3_PGM_MAP_CHUNK:
2043 {
2044 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2045 break;
2046 }
2047
2048 /*
2049 * Allocates more handy pages.
2050 */
2051 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2052 {
2053 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2054 break;
2055 }
2056
2057 /*
2058 * Acquire the PGM lock.
2059 */
2060 case VMMCALLRING3_PGM_LOCK:
2061 {
2062 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2063 break;
2064 }
2065
2066 /*
2067 * Acquire the MM hypervisor heap lock.
2068 */
2069 case VMMCALLRING3_MMHYPER_LOCK:
2070 {
2071 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2072 break;
2073 }
2074
2075 /*
2076 * Flush REM handler notifications.
2077 */
2078 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2079 {
2080 REMR3ReplayHandlerNotifications(pVM);
2081 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2082 break;
2083 }
2084
2085 /*
2086 * This is a noop. We just take this route to avoid unnecessary
2087 * tests in the loops.
2088 */
2089 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2090 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2091 LogAlways(("*FLUSH*\n"));
2092 break;
2093
2094 /*
2095 * Set the VM error message.
2096 */
2097 case VMMCALLRING3_VM_SET_ERROR:
2098 VMR3SetErrorWorker(pVM);
2099 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2100 break;
2101
2102 /*
2103 * Set the VM runtime error message.
2104 */
2105 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2106 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2107 break;
2108
2109 /*
2110 * Signal a ring 0 hypervisor assertion.
2111 * Cancel the longjmp operation that's in progress.
2112 */
2113 case VMMCALLRING3_VM_R0_ASSERTION:
2114 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2115 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2116#ifdef RT_ARCH_X86
2117 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2118#else
2119 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2120#endif
2121 LogRel((pVM->vmm.s.szRing0AssertMsg1));
2122 LogRel((pVM->vmm.s.szRing0AssertMsg2));
2123 return VERR_VMM_RING0_ASSERTION;
2124
2125 /*
2126 * A forced switch to ring 0 for preemption purposes.
2127 */
2128 case VMMCALLRING3_VM_R0_PREEMPT:
2129 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2130 break;
2131
2132 default:
2133 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2134 return VERR_INTERNAL_ERROR;
2135 }
2136
2137 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2138 return VINF_SUCCESS;
2139}
2140
2141
2142/**
2143 * Displays the Force action Flags.
2144 *
2145 * @param pVM The VM handle.
2146 * @param pHlp The output helpers.
2147 * @param pszArgs The additional arguments (ignored).
2148 */
2149static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2150{
2151 int c;
2152 uint32_t f;
2153#define PRINT_FLAG(prf,flag) do { \
2154 if (f & (prf##flag)) \
2155 { \
2156 static const char *s_psz = #flag; \
2157 if (!(c % 6)) \
2158 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2159 else \
2160 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2161 c++; \
2162 f &= ~(prf##flag); \
2163 } \
2164 } while (0)
2165
2166#define PRINT_GROUP(prf,grp,sfx) do { \
2167 if (f & (prf##grp##sfx)) \
2168 { \
2169 static const char *s_psz = #grp; \
2170 if (!(c % 5)) \
2171 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2172 else \
2173 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2174 c++; \
2175 } \
2176 } while (0)
2177
2178 /*
2179 * The global flags.
2180 */
2181 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2182 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2183
2184 /* show the flag mnemonics */
2185 c = 0;
2186 f = fGlobalForcedActions;
2187 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2188 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2189 PRINT_FLAG(VM_FF_,PDM_DMA);
2190 PRINT_FLAG(VM_FF_,DBGF);
2191 PRINT_FLAG(VM_FF_,REQUEST);
2192 PRINT_FLAG(VM_FF_,TERMINATE);
2193 PRINT_FLAG(VM_FF_,RESET);
2194 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2195 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2196 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2197 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2198 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2199 if (f)
2200 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2201 else
2202 pHlp->pfnPrintf(pHlp, "\n");
2203
2204 /* the groups */
2205 c = 0;
2206 f = fGlobalForcedActions;
2207 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2208 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2209 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2210 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2211 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2212 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2213 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2214 PRINT_GROUP(VM_FF_,ALL_BUT_RAW,_MASK);
2215 if (c)
2216 pHlp->pfnPrintf(pHlp, "\n");
2217
2218 /*
2219 * Per CPU flags.
2220 */
2221 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2222 {
2223 const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2224 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2225
2226 /* show the flag mnemonics */
2227 c = 0;
2228 f = fLocalForcedActions;
2229 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2230 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2231 PRINT_FLAG(VMCPU_FF_,TIMER);
2232 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2233 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2234 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2235 PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2236 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2237 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2238 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2239 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2240 PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2241 PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2242 PRINT_FLAG(VMCPU_FF_,TO_R3);
2243 if (f)
2244 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2245 else
2246 pHlp->pfnPrintf(pHlp, "\n");
2247
2248 /* the groups */
2249 c = 0;
2250 f = fLocalForcedActions;
2251 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2252 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2253 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2254 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2255 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2256 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2257 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2258 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2259 PRINT_GROUP(VMCPU_FF_,HWACCM_TO_R3,_MASK);
2260 PRINT_GROUP(VMCPU_FF_,ALL_BUT_RAW,_MASK);
2261 if (c)
2262 pHlp->pfnPrintf(pHlp, "\n");
2263 }
2264
2265#undef PRINT_FLAG
2266#undef PRINT_GROUP
2267}
2268
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