VMM.cpp@ 25659

Last change on this file since 25659 was 25528, checked in by vboxsync, 15 years ago
IPRT,SUPDrv,++: AssertMsg[12] -> AssertMsg1Weak, AssertMsg1, AssertMsg2Weak, AssertMsg2, AssertMsg2WeakV and AssertMsg2V. Doing more of the assertion machinery in common/misc/assert.cpp to avoid code duplication (ring-0). Major SUPDrv version bump.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 80.8 KB

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1	/* $Id: VMM.cpp 25528 2009-12-20 23:24:59Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22	//#define NO_SUPCALLR0VMM
23
24	/** @page pg_vmm VMM - The Virtual Machine Monitor
25	*
26	* The VMM component is two things at the moment, it's a component doing a few
27	* management and routing tasks, and it's the whole virtual machine monitor
28	* thing. For hysterical reasons, it is not doing all the management that one
29	* would expect, this is instead done by @ref pg_vm. We'll address this
30	* misdesign eventually.
31	*
32	* @see grp_vmm, grp_vm
33	*
34	*
35	* @section sec_vmmstate VMM State
36	*
37	* @image html VM_Statechart_Diagram.gif
38	*
39	* To be written.
40	*
41	*
42	* @subsection subsec_vmm_init VMM Initialization
43	*
44	* To be written.
45	*
46	*
47	* @subsection subsec_vmm_term VMM Termination
48	*
49	* To be written.
50	*
51	*/
52
53	/*******************************************************************************
54	* Header Files *
55	*******************************************************************************/
56	#define LOG_GROUP LOG_GROUP_VMM
57	#include <VBox/vmm.h>
58	#include <VBox/vmapi.h>
59	#include <VBox/pgm.h>
60	#include <VBox/cfgm.h>
61	#include <VBox/pdmqueue.h>
62	#include <VBox/pdmcritsect.h>
63	#include <VBox/pdmapi.h>
64	#include <VBox/cpum.h>
65	#include <VBox/mm.h>
66	#include <VBox/iom.h>
67	#include <VBox/trpm.h>
68	#include <VBox/selm.h>
69	#include <VBox/em.h>
70	#include <VBox/sup.h>
71	#include <VBox/dbgf.h>
72	#include <VBox/csam.h>
73	#include <VBox/patm.h>
74	#include <VBox/rem.h>
75	#include <VBox/ssm.h>
76	#include <VBox/tm.h>
77	#include "VMMInternal.h"
78	#include "VMMSwitcher/VMMSwitcher.h"
79	#include <VBox/vm.h>
80
81	#include <VBox/err.h>
82	#include <VBox/param.h>
83	#include <VBox/version.h>
84	#include <VBox/x86.h>
85	#include <VBox/hwaccm.h>
86	#include <iprt/assert.h>
87	#include <iprt/alloc.h>
88	#include <iprt/asm.h>
89	#include <iprt/time.h>
90	#include <iprt/semaphore.h>
91	#include <iprt/stream.h>
92	#include <iprt/string.h>
93	#include <iprt/stdarg.h>
94	#include <iprt/ctype.h>
95
96
97
98	/*******************************************************************************
99	* Defined Constants And Macros *
100	*******************************************************************************/
101	/** The saved state version. */
102	#define VMM_SAVED_STATE_VERSION 4
103	/** The saved state version used by v3.0 and earlier. (Teleportation) */
104	#define VMM_SAVED_STATE_VERSION_3_0 3
105
106
107	/*******************************************************************************
108	* Internal Functions *
109	*******************************************************************************/
110	static int vmmR3InitStacks(PVM pVM);
111	static int vmmR3InitLoggers(PVM pVM);
112	static void vmmR3InitRegisterStats(PVM pVM);
113	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
114	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
115	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
116	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
117	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
118
119
120	/**
121	* Initializes the VMM.
122	*
123	* @returns VBox status code.
124	* @param pVM The VM to operate on.
125	*/
126	VMMR3DECL(int) VMMR3Init(PVM pVM)
127	{
128	LogFlow(("VMMR3Init\n"));
129
130	/*
131	* Assert alignment, sizes and order.
132	*/
133	AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
134	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
135	AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
136
137	/*
138	* Init basic VM VMM members.
139	*/
140	pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
141	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
142	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
143	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
144	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
145	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
146	int rc = CFGMR3QueryU32(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies);
147	if (rc == VERR_CFGM_VALUE_NOT_FOUND)
148	pVM->vmm.s.cYieldEveryMillies = 23; /* Value arrived at after experimenting with the grub boot prompt. */
149	//pVM->vmm.s.cYieldEveryMillies = 8; //debugging
150	else
151	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
152
153	/*
154	* Initialize the VMM sync critical section and semaphores.
155	*/
156	rc = RTCritSectInit(&pVM->vmm.s.CritSectSync);
157	AssertRCReturn(rc, rc);
158	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
159	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
160	return VERR_NO_MEMORY;
161	for (VMCPUID i = 0; i < pVM->cCpus; i++)
162	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
163	for (VMCPUID i = 0; i < pVM->cCpus; i++)
164	{
165	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
166	AssertRCReturn(rc, rc);
167	}
168	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
169	AssertRCReturn(rc, rc);
170	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
171	AssertRCReturn(rc, rc);
172	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
173	AssertRCReturn(rc, rc);
174	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
175	AssertRCReturn(rc, rc);
176
177	/* GC switchers are enabled by default. Turned off by HWACCM. */
178	pVM->vmm.s.fSwitcherDisabled = false;
179
180	/*
181	* Register the saved state data unit.
182	*/
183	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
184	NULL, NULL, NULL,
185	NULL, vmmR3Save, NULL,
186	NULL, vmmR3Load, NULL);
187	if (RT_FAILURE(rc))
188	return rc;
189
190	/*
191	* Register the Ring-0 VM handle with the session for fast ioctl calls.
192	*/
193	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
194	if (RT_FAILURE(rc))
195	return rc;
196
197	/*
198	* Init various sub-components.
199	*/
200	rc = vmmR3SwitcherInit(pVM);
201	if (RT_SUCCESS(rc))
202	{
203	rc = vmmR3InitStacks(pVM);
204	if (RT_SUCCESS(rc))
205	{
206	rc = vmmR3InitLoggers(pVM);
207
208	#ifdef VBOX_WITH_NMI
209	/*
210	* Allocate mapping for the host APIC.
211	*/
212	if (RT_SUCCESS(rc))
213	{
214	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
215	AssertRC(rc);
216	}
217	#endif
218	if (RT_SUCCESS(rc))
219	{
220	/*
221	* Debug info and statistics.
222	*/
223	DBGFR3InfoRegisterInternal(pVM, "ff", "Displays the current Forced actions Flags.", vmmR3InfoFF);
224	vmmR3InitRegisterStats(pVM);
225
226	return VINF_SUCCESS;
227	}
228	}
229	/** @todo: Need failure cleanup. */
230
231	//more todo in here?
232	//if (RT_SUCCESS(rc))
233	//{
234	//}
235	//int rc2 = vmmR3TermCoreCode(pVM);
236	//AssertRC(rc2));
237	}
238
239	return rc;
240	}
241
242
243	/**
244	* Allocate & setup the VMM RC stack(s) (for EMTs).
245	*
246	* The stacks are also used for long jumps in Ring-0.
247	*
248	* @returns VBox status code.
249	* @param pVM Pointer to the shared VM structure.
250	*
251	* @remarks The optional guard page gets it protection setup up during R3 init
252	* completion because of init order issues.
253	*/
254	static int vmmR3InitStacks(PVM pVM)
255	{
256	int rc = VINF_SUCCESS;
257	#ifdef VMM_R0_SWITCH_STACK
258	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
259	#else
260	uint32_t fFlags = 0;
261	#endif
262
263	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
264	{
265	PVMCPU pVCpu = &pVM->aCpus[idCpu];
266
267	#ifdef VBOX_STRICT_VMM_STACK
268	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
269	#else
270	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
271	#endif
272	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
273	if (RT_SUCCESS(rc))
274	{
275	#ifdef VBOX_STRICT_VMM_STACK
276	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
277	#endif
278	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
279	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
280	if (!VMMIsHwVirtExtForced(pVM))
281	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
282	else
283	#endif
284	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
285	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
286	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
287	AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
288
289	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
290	}
291	}
292
293	return rc;
294	}
295
296
297	/**
298	* Initialize the loggers.
299	*
300	* @returns VBox status code.
301	* @param pVM Pointer to the shared VM structure.
302	*/
303	static int vmmR3InitLoggers(PVM pVM)
304	{
305	int rc;
306
307	/*
308	* Allocate RC & R0 Logger instances (they are finalized in the relocator).
309	*/
310	#ifdef LOG_ENABLED
311	PRTLOGGER pLogger = RTLogDefaultInstance();
312	if (pLogger)
313	{
314	pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
315	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
316	if (RT_FAILURE(rc))
317	return rc;
318	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
319
320	# ifdef VBOX_WITH_R0_LOGGING
321	for (VMCPUID i = 0; i < pVM->cCpus; i++)
322	{
323	PVMCPU pVCpu = &pVM->aCpus[i];
324
325	rc = MMR3HyperAllocOnceNoRelEx(pVM, RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[pLogger->cGroups]),
326	0, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
327	(void **)&pVCpu->vmm.s.pR0LoggerR3);
328	if (RT_FAILURE(rc))
329	return rc;
330	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
331	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
332	pVCpu->vmm.s.pR0LoggerR3->cbLogger = RT_OFFSETOF(RTLOGGER, afGroups[pLogger->cGroups]);
333	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
334	}
335	# endif
336	}
337	#endif /* LOG_ENABLED */
338
339	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
340	/*
341	* Allocate RC release logger instances (finalized in the relocator).
342	*/
343	PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
344	if (pRelLogger)
345	{
346	pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
347	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
348	if (RT_FAILURE(rc))
349	return rc;
350	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
351	}
352	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
353	return VINF_SUCCESS;
354	}
355
356
357	/**
358	* VMMR3Init worker that register the statistics with STAM.
359	*
360	* @param pVM The shared VM structure.
361	*/
362	static void vmmR3InitRegisterStats(PVM pVM)
363	{
364	/*
365	* Statistics.
366	*/
367	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
368	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
369	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
370	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
371	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
372	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
373	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
374	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
375	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
376	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
377	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
378	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
379	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_READ returns.");
380	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_WRITE returns.");
381	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ returns.");
382	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_WRITE returns.");
383	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ_WRITE returns.");
384	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
385	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
386	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
387	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
388	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
389	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
390	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
391	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
392	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
393	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
394	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
395	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
396	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
397	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
398	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
399	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
400	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
401	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
402	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
403	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
404	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
405	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HWACCM_PATCH_TPR_INSTR returns.");
406	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
407	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
408	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMQueueFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMQueueFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_QUEUE_FLUSH calls.");
409	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
410	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
411	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
412	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
413	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
414	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
415	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
416	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
417
418	#ifdef VBOX_WITH_STATISTICS
419	for (VMCPUID i = 0; i < pVM->cCpus; i++)
420	{
421	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
422	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
423	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
424	}
425	#endif
426	}
427
428
429	/**
430	* Initializes the per-VCPU VMM.
431	*
432	* @returns VBox status code.
433	* @param pVM The VM to operate on.
434	*/
435	VMMR3DECL(int) VMMR3InitCPU(PVM pVM)
436	{
437	LogFlow(("VMMR3InitCPU\n"));
438	return VINF_SUCCESS;
439	}
440
441
442	/**
443	* Ring-3 init finalizing.
444	*
445	* @returns VBox status code.
446	* @param pVM The VM handle.
447	*/
448	VMMR3DECL(int) VMMR3InitFinalize(PVM pVM)
449	{
450	int rc;
451
452	/*
453	* Set page attributes to r/w for stack pages.
454	*/
455	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
456	{
457	rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
458	X86_PTE_P \| X86_PTE_A \| X86_PTE_D \| X86_PTE_RW);
459	AssertRCReturn(rc, rc);
460	}
461
462	/*
463	* Create the EMT yield timer.
464	*/
465	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
466	AssertRCReturn(rc, rc);
467
468	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
469	AssertRCReturn(rc, rc);
470
471	#ifdef VBOX_WITH_NMI
472	/*
473	* Map the host APIC into GC - This is AMD/Intel + Host OS specific!
474	*/
475	rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
476	X86_PTE_P \| X86_PTE_RW \| X86_PTE_PWT \| X86_PTE_PCD \| X86_PTE_A \| X86_PTE_D);
477	AssertRCReturn(rc, rc);
478	#endif
479
480	#ifdef VBOX_STRICT_VMM_STACK
481	/*
482	* Setup the stack guard pages: Two inaccessible pages at each sides of the
483	* stack to catch over/under-flows.
484	*/
485	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
486	{
487	uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
488
489	memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
490	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /fSet/);
491
492	memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
493	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /fSet/);
494	}
495	pVM->vmm.s.fStackGuardsStationed = true;
496	#endif
497
498	return VINF_SUCCESS;
499	}
500
501
502	/**
503	* Initializes the R0 VMM.
504	*
505	* @returns VBox status code.
506	* @param pVM The VM to operate on.
507	*/
508	VMMR3DECL(int) VMMR3InitR0(PVM pVM)
509	{
510	int rc;
511	PVMCPU pVCpu = VMMGetCpu(pVM);
512	Assert(pVCpu && pVCpu->idCpu == 0);
513
514	#ifdef LOG_ENABLED
515	/*
516	* Initialize the ring-0 logger if we haven't done so yet.
517	*/
518	if ( pVCpu->vmm.s.pR0LoggerR3
519	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
520	{
521	rc = VMMR3UpdateLoggers(pVM);
522	if (RT_FAILURE(rc))
523	return rc;
524	}
525	#endif
526
527	/*
528	* Call Ring-0 entry with init code.
529	*/
530	for (;;)
531	{
532	#ifdef NO_SUPCALLR0VMM
533	//rc = VERR_GENERAL_FAILURE;
534	rc = VINF_SUCCESS;
535	#else
536	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
537	#endif
538	/*
539	* Flush the logs.
540	*/
541	#ifdef LOG_ENABLED
542	if ( pVCpu->vmm.s.pR0LoggerR3
543	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
544	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
545	#endif
546	if (rc != VINF_VMM_CALL_HOST)
547	break;
548	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
549	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
550	break;
551	/* Resume R0 */
552	}
553
554	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
555	{
556	LogRel(("R0 init failed, rc=%Rra\n", rc));
557	if (RT_SUCCESS(rc))
558	rc = VERR_INTERNAL_ERROR;
559	}
560	return rc;
561	}
562
563
564	/**
565	* Initializes the RC VMM.
566	*
567	* @returns VBox status code.
568	* @param pVM The VM to operate on.
569	*/
570	VMMR3DECL(int) VMMR3InitRC(PVM pVM)
571	{
572	PVMCPU pVCpu = VMMGetCpu(pVM);
573	Assert(pVCpu && pVCpu->idCpu == 0);
574
575	/* In VMX mode, there's no need to init RC. */
576	if (pVM->vmm.s.fSwitcherDisabled)
577	return VINF_SUCCESS;
578
579	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
580
581	/*
582	* Call VMMGCInit():
583	* -# resolve the address.
584	* -# setup stackframe and EIP to use the trampoline.
585	* -# do a generic hypervisor call.
586	*/
587	RTRCPTR RCPtrEP;
588	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
589	if (RT_SUCCESS(rc))
590	{
591	CPUMHyperSetCtxCore(pVCpu, NULL);
592	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
593	uint64_t u64TS = RTTimeProgramStartNanoTS();
594	CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
595	CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
596	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
597	CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
598	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
599	CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
600	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
601	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
602	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
603
604	for (;;)
605	{
606	#ifdef NO_SUPCALLR0VMM
607	//rc = VERR_GENERAL_FAILURE;
608	rc = VINF_SUCCESS;
609	#else
610	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
611	#endif
612	#ifdef LOG_ENABLED
613	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
614	if ( pLogger
615	&& pLogger->offScratch > 0)
616	RTLogFlushRC(NULL, pLogger);
617	#endif
618	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
619	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
620	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
621	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
622	#endif
623	if (rc != VINF_VMM_CALL_HOST)
624	break;
625	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
626	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
627	break;
628	}
629
630	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
631	{
632	VMMR3FatalDump(pVM, pVCpu, rc);
633	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
634	rc = VERR_INTERNAL_ERROR;
635	}
636	AssertRC(rc);
637	}
638	return rc;
639	}
640
641
642	/**
643	* Terminate the VMM bits.
644	*
645	* @returns VINF_SUCCESS.
646	* @param pVM The VM handle.
647	*/
648	VMMR3DECL(int) VMMR3Term(PVM pVM)
649	{
650	PVMCPU pVCpu = VMMGetCpu(pVM);
651	Assert(pVCpu && pVCpu->idCpu == 0);
652
653	/*
654	* Call Ring-0 entry with termination code.
655	*/
656	int rc;
657	for (;;)
658	{
659	#ifdef NO_SUPCALLR0VMM
660	//rc = VERR_GENERAL_FAILURE;
661	rc = VINF_SUCCESS;
662	#else
663	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
664	#endif
665	/*
666	* Flush the logs.
667	*/
668	#ifdef LOG_ENABLED
669	if ( pVCpu->vmm.s.pR0LoggerR3
670	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
671	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
672	#endif
673	if (rc != VINF_VMM_CALL_HOST)
674	break;
675	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
676	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
677	break;
678	/* Resume R0 */
679	}
680	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
681	{
682	LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
683	if (RT_SUCCESS(rc))
684	rc = VERR_INTERNAL_ERROR;
685	}
686
687	RTCritSectDelete(&pVM->vmm.s.CritSectSync);
688	for (VMCPUID i = 0; i < pVM->cCpus; i++)
689	{
690	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
691	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
692	}
693	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
694	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
695	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
696	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
697	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
698	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
699	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
700	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
701
702	#ifdef VBOX_STRICT_VMM_STACK
703	/*
704	* Make the two stack guard pages present again.
705	*/
706	if (pVM->vmm.s.fStackGuardsStationed)
707	{
708	for (VMCPUID i = 0; i < pVM->cCpus; i++)
709	{
710	uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
711	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /fSet/);
712	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /fSet/);
713	}
714	pVM->vmm.s.fStackGuardsStationed = false;
715	}
716	#endif
717	return rc;
718	}
719
720
721	/**
722	* Terminates the per-VCPU VMM.
723	*
724	* Termination means cleaning up and freeing all resources,
725	* the VM it self is at this point powered off or suspended.
726	*
727	* @returns VBox status code.
728	* @param pVM The VM to operate on.
729	*/
730	VMMR3DECL(int) VMMR3TermCPU(PVM pVM)
731	{
732	return VINF_SUCCESS;
733	}
734
735
736	/**
737	* Applies relocations to data and code managed by this
738	* component. This function will be called at init and
739	* whenever the VMM need to relocate it self inside the GC.
740	*
741	* The VMM will need to apply relocations to the core code.
742	*
743	* @param pVM The VM handle.
744	* @param offDelta The relocation delta.
745	*/
746	VMMR3DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
747	{
748	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
749
750	/*
751	* Recalc the RC address.
752	*/
753	pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
754
755	/*
756	* The stack.
757	*/
758	for (VMCPUID i = 0; i < pVM->cCpus; i++)
759	{
760	PVMCPU pVCpu = &pVM->aCpus[i];
761
762	CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
763
764	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
765	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
766	}
767
768	/*
769	* All the switchers.
770	*/
771	vmmR3SwitcherRelocate(pVM, offDelta);
772
773	/*
774	* Get other RC entry points.
775	*/
776	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
777	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
778
779	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
780	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
781
782	/*
783	* Update the logger.
784	*/
785	VMMR3UpdateLoggers(pVM);
786	}
787
788
789	/**
790	* Updates the settings for the RC and R0 loggers.
791	*
792	* @returns VBox status code.
793	* @param pVM The VM handle.
794	*/
795	VMMR3DECL(int) VMMR3UpdateLoggers(PVM pVM)
796	{
797	/*
798	* Simply clone the logger instance (for RC).
799	*/
800	int rc = VINF_SUCCESS;
801	RTRCPTR RCPtrLoggerFlush = 0;
802
803	if (pVM->vmm.s.pRCLoggerR3
804	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
805	\|\| pVM->vmm.s.pRCRelLoggerR3
806	#endif
807	)
808	{
809	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
810	AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
811	}
812
813	if (pVM->vmm.s.pRCLoggerR3)
814	{
815	RTRCPTR RCPtrLoggerWrapper = 0;
816	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
817	AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
818
819	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
820	rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
821	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
822	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
823	}
824
825	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
826	if (pVM->vmm.s.pRCRelLoggerR3)
827	{
828	RTRCPTR RCPtrLoggerWrapper = 0;
829	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
830	AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
831
832	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
833	rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
834	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
835	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
836	}
837	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
838
839	#ifdef LOG_ENABLED
840	/*
841	* For the ring-0 EMT logger, we use a per-thread logger instance
842	* in ring-0. Only initialize it once.
843	*/
844	for (VMCPUID i = 0; i < pVM->cCpus; i++)
845	{
846	PVMCPU pVCpu = &pVM->aCpus[i];
847	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
848	if (pR0LoggerR3)
849	{
850	if (!pR0LoggerR3->fCreated)
851	{
852	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
853	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
854	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
855
856	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
857	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
858	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
859
860	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
861	(PFNRTLOGGER )&pfnLoggerWrapper, (PFNRTLOGFLUSH )&pfnLoggerFlush,
862	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
863	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
864
865	RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
866	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
867	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
868	rc = RTLogSetCustomPrefixCallback(&pR0LoggerR3->Logger, (PFNRTLOGPREFIX )&pfnLoggerPrefix, NULL);
869	AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
870
871	pR0LoggerR3->idCpu = i;
872	pR0LoggerR3->fCreated = true;
873	pR0LoggerR3->fFlushingDisabled = false;
874
875	}
876
877	rc = RTLogCopyGroupsAndFlags(&pR0LoggerR3->Logger, NULL /* default */, pVM->vmm.s.pRCLoggerR3->fFlags, RTLOGFLAGS_BUFFERED);
878	AssertRC(rc);
879	}
880	}
881	#endif
882	return rc;
883	}
884
885
886	/**
887	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
888	*
889	* @returns Pointer to the buffer.
890	* @param pVM The VM handle.
891	*/
892	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
893	{
894	if (HWACCMIsEnabled(pVM))
895	return pVM->vmm.s.szRing0AssertMsg1;
896
897	RTRCPTR RCPtr;
898	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
899	if (RT_SUCCESS(rc))
900	return (const char *)MMHyperRCToR3(pVM, RCPtr);
901
902	return NULL;
903	}
904
905
906	/**
907	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
908	*
909	* @returns Pointer to the buffer.
910	* @param pVM The VM handle.
911	*/
912	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
913	{
914	if (HWACCMIsEnabled(pVM))
915	return pVM->vmm.s.szRing0AssertMsg2;
916
917	RTRCPTR RCPtr;
918	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
919	if (RT_SUCCESS(rc))
920	return (const char *)MMHyperRCToR3(pVM, RCPtr);
921
922	return NULL;
923	}
924
925
926	/**
927	* Execute state save operation.
928	*
929	* @returns VBox status code.
930	* @param pVM VM Handle.
931	* @param pSSM SSM operation handle.
932	*/
933	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
934	{
935	LogFlow(("vmmR3Save:\n"));
936
937	/*
938	* Save the started/stopped state of all CPUs except 0 as it will always
939	* be running. This avoids breaking the saved state version. :-)
940	*/
941	for (VMCPUID i = 1; i < pVM->cCpus; i++)
942	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
943
944	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
945	}
946
947
948	/**
949	* Execute state load operation.
950	*
951	* @returns VBox status code.
952	* @param pVM VM Handle.
953	* @param pSSM SSM operation handle.
954	* @param uVersion Data layout version.
955	* @param uPass The data pass.
956	*/
957	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
958	{
959	LogFlow(("vmmR3Load:\n"));
960	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
961
962	/*
963	* Validate version.
964	*/
965	if ( uVersion != VMM_SAVED_STATE_VERSION
966	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
967	{
968	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
969	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
970	}
971
972	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
973	{
974	/* Ignore the stack bottom, stack pointer and stack bits. */
975	RTRCPTR RCPtrIgnored;
976	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
977	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
978	#ifdef RT_OS_DARWIN
979	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
980	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
981	&& SSMR3HandleRevision(pSSM) >= 48858
982	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
983	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
984	)
985	SSMR3Skip(pSSM, 16384);
986	else
987	SSMR3Skip(pSSM, 8192);
988	#else
989	SSMR3Skip(pSSM, 8192);
990	#endif
991	}
992
993	/*
994	* Restore the VMCPU states. VCPU 0 is always started.
995	*/
996	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
997	for (VMCPUID i = 1; i < pVM->cCpus; i++)
998	{
999	bool fStarted;
1000	int rc = SSMR3GetBool(pSSM, &fStarted);
1001	if (RT_FAILURE(rc))
1002	return rc;
1003	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1004	}
1005
1006	/* terminator */
1007	uint32_t u32;
1008	int rc = SSMR3GetU32(pSSM, &u32);
1009	if (RT_FAILURE(rc))
1010	return rc;
1011	if (u32 != UINT32_MAX)
1012	{
1013	AssertMsgFailed(("u32=%#x\n", u32));
1014	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1015	}
1016	return VINF_SUCCESS;
1017	}
1018
1019
1020	/**
1021	* Resolve a builtin RC symbol.
1022	*
1023	* Called by PDM when loading or relocating RC modules.
1024	*
1025	* @returns VBox status
1026	* @param pVM VM Handle.
1027	* @param pszSymbol Symbol to resolv
1028	* @param pRCPtrValue Where to store the symbol value.
1029	*
1030	* @remark This has to work before VMMR3Relocate() is called.
1031	*/
1032	VMMR3DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1033	{
1034	if (!strcmp(pszSymbol, "g_Logger"))
1035	{
1036	if (pVM->vmm.s.pRCLoggerR3)
1037	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1038	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1039	}
1040	else if (!strcmp(pszSymbol, "g_RelLogger"))
1041	{
1042	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1043	if (pVM->vmm.s.pRCRelLoggerR3)
1044	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1045	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1046	#else
1047	*pRCPtrValue = NIL_RTRCPTR;
1048	#endif
1049	}
1050	else
1051	return VERR_SYMBOL_NOT_FOUND;
1052	return VINF_SUCCESS;
1053	}
1054
1055
1056	/**
1057	* Suspends the CPU yielder.
1058	*
1059	* @param pVM The VM handle.
1060	*/
1061	VMMR3DECL(void) VMMR3YieldSuspend(PVM pVM)
1062	{
1063	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1064	if (!pVM->vmm.s.cYieldResumeMillies)
1065	{
1066	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1067	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1068	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1069	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1070	else
1071	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1072	TMTimerStop(pVM->vmm.s.pYieldTimer);
1073	}
1074	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1075	}
1076
1077
1078	/**
1079	* Stops the CPU yielder.
1080	*
1081	* @param pVM The VM handle.
1082	*/
1083	VMMR3DECL(void) VMMR3YieldStop(PVM pVM)
1084	{
1085	if (!pVM->vmm.s.cYieldResumeMillies)
1086	TMTimerStop(pVM->vmm.s.pYieldTimer);
1087	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1088	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1089	}
1090
1091
1092	/**
1093	* Resumes the CPU yielder when it has been a suspended or stopped.
1094	*
1095	* @param pVM The VM handle.
1096	*/
1097	VMMR3DECL(void) VMMR3YieldResume(PVM pVM)
1098	{
1099	if (pVM->vmm.s.cYieldResumeMillies)
1100	{
1101	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1102	pVM->vmm.s.cYieldResumeMillies = 0;
1103	}
1104	}
1105
1106
1107	/**
1108	* Internal timer callback function.
1109	*
1110	* @param pVM The VM.
1111	* @param pTimer The timer handle.
1112	* @param pvUser User argument specified upon timer creation.
1113	*/
1114	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1115	{
1116	/*
1117	* This really needs some careful tuning. While we shouldn't be too greedy since
1118	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1119	* because that'll cause us to stop up.
1120	*
1121	* The current logic is to use the default interval when there is no lag worth
1122	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1123	*
1124	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1125	* so the lag is up to date.)
1126	*/
1127	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1128	if ( u64Lag < 50000000 /* 50ms */
1129	\|\| ( u64Lag < 1000000000 /* 1s */
1130	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1131	)
1132	{
1133	uint64_t u64Elapsed = RTTimeNanoTS();
1134	pVM->vmm.s.u64LastYield = u64Elapsed;
1135
1136	RTThreadYield();
1137
1138	#ifdef LOG_ENABLED
1139	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1140	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1141	#endif
1142	}
1143	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1144	}
1145
1146
1147	/**
1148	* Executes guest code in the raw-mode context.
1149	*
1150	* @param pVM VM handle.
1151	* @param pVCpu The VMCPU to operate on.
1152	*/
1153	VMMR3DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1154	{
1155	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1156
1157	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1158
1159	/*
1160	* Set the EIP and ESP.
1161	*/
1162	CPUMSetHyperEIP(pVCpu, CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1163	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1164	: pVM->vmm.s.pfnCPUMRCResumeGuest);
1165	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
1166
1167	/*
1168	* We hide log flushes (outer) and hypervisor interrupts (inner).
1169	*/
1170	for (;;)
1171	{
1172	#ifdef VBOX_STRICT
1173	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1174	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1175	PGMMapCheck(pVM);
1176	#endif
1177	int rc;
1178	do
1179	{
1180	#ifdef NO_SUPCALLR0VMM
1181	rc = VERR_GENERAL_FAILURE;
1182	#else
1183	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1184	if (RT_LIKELY(rc == VINF_SUCCESS))
1185	rc = pVCpu->vmm.s.iLastGZRc;
1186	#endif
1187	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1188
1189	/*
1190	* Flush the logs.
1191	*/
1192	#ifdef LOG_ENABLED
1193	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1194	if ( pLogger
1195	&& pLogger->offScratch > 0)
1196	RTLogFlushRC(NULL, pLogger);
1197	#endif
1198	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1199	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1200	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1201	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1202	#endif
1203	if (rc != VINF_VMM_CALL_HOST)
1204	{
1205	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1206	return rc;
1207	}
1208	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1209	if (RT_FAILURE(rc))
1210	return rc;
1211	/* Resume GC */
1212	}
1213	}
1214
1215
1216	/**
1217	* Executes guest code (Intel VT-x and AMD-V).
1218	*
1219	* @param pVM VM handle.
1220	* @param pVCpu The VMCPU to operate on.
1221	*/
1222	VMMR3DECL(int) VMMR3HwAccRunGC(PVM pVM, PVMCPU pVCpu)
1223	{
1224	Log2(("VMMR3HwAccRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1225
1226	for (;;)
1227	{
1228	int rc;
1229	do
1230	{
1231	#ifdef NO_SUPCALLR0VMM
1232	rc = VERR_GENERAL_FAILURE;
1233	#else
1234	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HWACC_RUN, pVCpu->idCpu);
1235	if (RT_LIKELY(rc == VINF_SUCCESS))
1236	rc = pVCpu->vmm.s.iLastGZRc;
1237	#endif
1238	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1239
1240	#ifdef LOG_ENABLED
1241	/*
1242	* Flush the log
1243	*/
1244	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1245	if ( pR0LoggerR3
1246	&& pR0LoggerR3->Logger.offScratch > 0)
1247	RTLogFlushToLogger(&pR0LoggerR3->Logger, NULL);
1248	#endif /* !LOG_ENABLED */
1249	if (rc != VINF_VMM_CALL_HOST)
1250	{
1251	Log2(("VMMR3HwAccRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1252	return rc;
1253	}
1254	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1255	if (RT_FAILURE(rc))
1256	return rc;
1257	/* Resume R0 */
1258	}
1259	}
1260
1261	/**
1262	* VCPU worker for VMMSendSipi.
1263	*
1264	* @param pVM The VM to operate on.
1265	* @param idCpu Virtual CPU to perform SIPI on
1266	* @param uVector SIPI vector
1267	*/
1268	DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1269	{
1270	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1271	VMCPU_ASSERT_EMT(pVCpu);
1272
1273	/** @todo what are we supposed to do if the processor is already running? */
1274	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1275	return VERR_ACCESS_DENIED;
1276
1277
1278	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1279
1280	pCtx->cs = uVector << 8;
1281	pCtx->csHid.u64Base = uVector << 12;
1282	pCtx->csHid.u32Limit = 0x0000ffff;
1283	pCtx->rip = 0;
1284
1285	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1286
1287	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1288	EMSetState(pVCpu, EMSTATE_HALTED);
1289	return VINF_EM_RESCHEDULE;
1290	# else /* And if we go the VMCPU::enmState way it can stay here. */
1291	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1292	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1293	return VINF_SUCCESS;
1294	# endif
1295	}
1296
1297	DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1298	{
1299	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1300	VMCPU_ASSERT_EMT(pVCpu);
1301
1302	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1303	CPUMR3ResetCpu(pVCpu);
1304	return VINF_EM_WAIT_SIPI;
1305	}
1306
1307	/**
1308	* Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1309	* and unhalting processor
1310	*
1311	* @param pVM The VM to operate on.
1312	* @param idCpu Virtual CPU to perform SIPI on
1313	* @param uVector SIPI vector
1314	*/
1315	VMMR3DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1316	{
1317	AssertReturnVoid(idCpu < pVM->cCpus);
1318
1319	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1320	AssertRC(rc);
1321	}
1322
1323	/**
1324	* Sends init IPI to the virtual CPU.
1325	*
1326	* @param pVM The VM to operate on.
1327	* @param idCpu Virtual CPU to perform int IPI on
1328	*/
1329	VMMR3DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1330	{
1331	AssertReturnVoid(idCpu < pVM->cCpus);
1332
1333	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1334	AssertRC(rc);
1335	}
1336
1337	/**
1338	* Registers the guest memory range that can be used for patching
1339	*
1340	* @returns VBox status code.
1341	* @param pVM The VM to operate on.
1342	* @param pPatchMem Patch memory range
1343	* @param cbPatchMem Size of the memory range
1344	*/
1345	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1346	{
1347	if (HWACCMIsEnabled(pVM))
1348	return HWACMMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1349
1350	return VERR_NOT_SUPPORTED;
1351	}
1352
1353	/**
1354	* Deregisters the guest memory range that can be used for patching
1355	*
1356	* @returns VBox status code.
1357	* @param pVM The VM to operate on.
1358	* @param pPatchMem Patch memory range
1359	* @param cbPatchMem Size of the memory range
1360	*/
1361	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1362	{
1363	if (HWACCMIsEnabled(pVM))
1364	return HWACMMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1365
1366	return VINF_SUCCESS;
1367	}
1368
1369
1370	/**
1371	* VCPU worker for VMMR3SynchronizeAllVCpus.
1372	*
1373	* @param pVM The VM to operate on.
1374	* @param idCpu Virtual CPU to perform SIPI on
1375	* @param uVector SIPI vector
1376	*/
1377	DECLCALLBACK(int) vmmR3SyncVCpu(PVM pVM)
1378	{
1379	/* Block until the job in the caller has finished. */
1380	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1381	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1382	return VINF_SUCCESS;
1383	}
1384
1385
1386	/**
1387	* Atomically execute a callback handler
1388	* Note: This is very expensive; avoid using it frequently!
1389	*
1390	* @param pVM The VM to operate on.
1391	* @param pfnHandler Callback handler
1392	* @param pvUser User specified parameter
1393	*
1394	* @thread EMT
1395	*/
1396	VMMR3DECL(int) VMMR3AtomicExecuteHandler(PVM pVM, PFNATOMICHANDLER pfnHandler, void *pvUser)
1397	{
1398	int rc;
1399	PVMCPU pVCpu = VMMGetCpu(pVM);
1400	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1401
1402	/* Shortcut for the uniprocessor case. */
1403	if (pVM->cCpus == 1)
1404	return pfnHandler(pVM, pvUser);
1405
1406	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1407	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
1408	{
1409	if (idCpu != pVCpu->idCpu)
1410	{
1411	rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SyncVCpu, 1, pVM);
1412	AssertRC(rc);
1413	}
1414	}
1415	/* Wait until all other VCPUs are waiting for us. */
1416	while (RTCritSectGetWaiters(&pVM->vmm.s.CritSectSync) != (int32_t)(pVM->cCpus - 1))
1417	RTThreadSleep(1);
1418
1419	rc = pfnHandler(pVM, pvUser);
1420	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1421	return rc;
1422	}
1423
1424
1425	/**
1426	* Count returns and have the last non-caller EMT wake up the caller.
1427	*
1428	* @returns VBox strict informational status code for EM scheduling. No failures
1429	* will be returned here, those are for the caller only.
1430	*
1431	* @param pVM The VM handle.
1432	*/
1433	DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1434	{
1435	int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1436	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1437	if (cReturned == pVM->cCpus - 1U)
1438	{
1439	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1440	AssertLogRelRC(rc);
1441	}
1442
1443	AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1444	\|\| (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1445	("%Rrc\n", rcRet),
1446	VERR_IPE_UNEXPECTED_INFO_STATUS);
1447	return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1448	}
1449
1450
1451	/**
1452	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1453	*
1454	* @returns VBox strict informational status code for EM scheduling. No failures
1455	* will be returned here, those are for the caller only. When
1456	* fIsCaller is set, VINF_SUCESS is always returned.
1457	*
1458	* @param pVM The VM handle.
1459	* @param pVCpu The VMCPU structure for the calling EMT.
1460	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1461	* not.
1462	* @param fFlags The flags.
1463	* @param pfnRendezvous The callback.
1464	* @param pvUser The user argument for the callback.
1465	*/
1466	static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1467	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1468	{
1469	int rc;
1470
1471	/*
1472	* Enter, the last EMT triggers the next callback phase.
1473	*/
1474	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1475	if (cEntered != pVM->cCpus)
1476	{
1477	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1478	{
1479	/* Wait for our turn. */
1480	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1481	AssertLogRelRC(rc);
1482	}
1483	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1484	{
1485	/* Wait for the last EMT to arrive and wake everyone up. */
1486	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1487	AssertLogRelRC(rc);
1488	}
1489	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1490	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1491	{
1492	/* Wait for our turn. */
1493	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1494	AssertLogRelRC(rc);
1495	}
1496	else
1497	{
1498	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1499
1500	/*
1501	* The execute once is handled specially to optimize the code flow.
1502	*
1503	* The last EMT to arrive will perform the callback and the other
1504	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1505	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1506	* returns, that EMT will initiate the normal return sequence.
1507	*/
1508	if (!fIsCaller)
1509	{
1510	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1511	AssertLogRelRC(rc);
1512
1513	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1514	}
1515	return VINF_SUCCESS;
1516	}
1517	}
1518	else
1519	{
1520	/*
1521	* All EMTs are waiting, clear the FF and take action according to the
1522	* execution method.
1523	*/
1524	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1525
1526	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1527	{
1528	/* Wake up everyone. */
1529	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1530	AssertLogRelRC(rc);
1531	}
1532	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1533	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1534	{
1535	/* Figure out who to wake up and wake it up. If it's ourself, then
1536	it's easy otherwise wait for our turn. */
1537	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1538	? 0
1539	: pVM->cCpus - 1U;
1540	if (pVCpu->idCpu != iFirst)
1541	{
1542	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1543	AssertLogRelRC(rc);
1544	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1545	AssertLogRelRC(rc);
1546	}
1547	}
1548	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1549	}
1550
1551
1552	/*
1553	* Do the callback and update the status if necessary.
1554	*/
1555	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1556	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1557	{
1558	VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1559	if (rcStrict != VINF_SUCCESS)
1560	{
1561	AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1562	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1563	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1564	int32_t i32RendezvousStatus;
1565	do
1566	{
1567	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1568	if ( rcStrict == i32RendezvousStatus
1569	\|\| RT_FAILURE(i32RendezvousStatus)
1570	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1571	&& rcStrict > i32RendezvousStatus))
1572	break;
1573	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1574	}
1575	}
1576
1577	/*
1578	* Increment the done counter and take action depending on whether we're
1579	* the last to finish callback execution.
1580	*/
1581	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1582	if ( cDone != pVM->cCpus
1583	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1584	{
1585	/* Signal the next EMT? */
1586	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1587	{
1588	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1589	AssertLogRelRC(rc);
1590	}
1591	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1592	{
1593	Assert(cDone == pVCpu->idCpu + 1U);
1594	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1595	AssertLogRelRC(rc);
1596	}
1597	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1598	{
1599	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1600	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1601	AssertLogRelRC(rc);
1602	}
1603
1604	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1605	if (!fIsCaller)
1606	{
1607	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1608	AssertLogRelRC(rc);
1609	}
1610	}
1611	else
1612	{
1613	/* Callback execution is all done, tell the rest to return. */
1614	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1615	AssertLogRelRC(rc);
1616	}
1617
1618	if (!fIsCaller)
1619	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1620	return VINF_SUCCESS;
1621	}
1622
1623
1624	/**
1625	* Called in response to VM_FF_EMT_RENDEZVOUS.
1626	*
1627	* @returns VBox strict status code - EM scheduling. No errors will be returned
1628	* here, nor will any non-EM scheduling status codes be returned.
1629	*
1630	* @param pVM The VM handle
1631	* @param pVCpu The handle of the calling EMT.
1632	*
1633	* @thread EMT
1634	*/
1635	VMMR3DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1636	{
1637	return vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1638	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1639	}
1640
1641
1642	/**
1643	* EMT rendezvous.
1644	*
1645	* Gathers all the EMTs and execute some code on each of them, either in a one
1646	* by one fashion or all at once.
1647	*
1648	* @returns VBox strict status code. This will be the the first error,
1649	* VINF_SUCCESS, or an EM scheduling status code.
1650	*
1651	* @param pVM The VM handle.
1652	* @param fFlags Flags indicating execution methods. See
1653	* grp_VMMR3EmtRendezvous_fFlags.
1654	* @param pfnRendezvous The callback.
1655	* @param pvUser User argument for the callback.
1656	*
1657	* @thread Any.
1658	*/
1659	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1660	{
1661	/*
1662	* Validate input.
1663	*/
1664	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1665	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1666	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1667	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1668	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1669	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1670	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1671
1672	VBOXSTRICTRC rcStrict;
1673	PVMCPU pVCpu = VMMGetCpu(pVM);
1674	if (!pVCpu)
1675	/*
1676	* Forward the request to an EMT thread.
1677	*/
1678	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1679	(PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1680	else if (pVM->cCpus == 1)
1681	/*
1682	* Shortcut for the single EMT case.
1683	*/
1684	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1685	else
1686	{
1687	/*
1688	* Spin lock. If busy, wait for the other EMT to finish while keeping a
1689	* lookout of the RENDEZVOUS FF.
1690	*/
1691	int rc;
1692	rcStrict = VINF_SUCCESS;
1693	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1694	{
1695	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1696	{
1697	if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1698	{
1699	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1700	if ( rc != VINF_SUCCESS
1701	&& ( rcStrict == VINF_SUCCESS
1702	\|\| rcStrict > rc))
1703	rcStrict = rc;
1704	/** @todo Perhaps deal with termination here? */
1705	}
1706	ASMNopPause();
1707	}
1708	}
1709	Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1710
1711	/*
1712	* Clear the slate. This is a semaphore ping-pong orgy. :-)
1713	*/
1714	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1715	{
1716	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1717	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1718	}
1719	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1720	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1721	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1722	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1723	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1724	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1725	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1726	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1727	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1728	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1729	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1730
1731	/*
1732	* Set the FF and poke the other EMTs.
1733	*/
1734	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1735	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1736
1737	/*
1738	* Do the same ourselves.
1739	*/
1740	vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1741
1742	/*
1743	* The caller waits for the other EMTs to be done and return before doing
1744	* the cleanup. This makes away with wakeup / reset races we would otherwise
1745	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1746	*/
1747	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1748	AssertLogRelRC(rc);
1749
1750	/*
1751	* Get the return code and clean up a little bit.
1752	*/
1753	int rcMy = pVM->vmm.s.i32RendezvousStatus;
1754	ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, NULL);
1755
1756	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1757
1758	/*
1759	* Merge rcStrict and rcMy.
1760	*/
1761	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1762	if ( rcMy != VINF_SUCCESS
1763	&& ( rcStrict == VINF_SUCCESS
1764	\|\| rcStrict > rcMy))
1765	rcStrict = rcMy;
1766	}
1767
1768	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1769	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1770	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1771	VERR_IPE_UNEXPECTED_INFO_STATUS);
1772	return VBOXSTRICTRC_VAL(rcStrict);
1773	}
1774
1775
1776	/**
1777	* Read from the ring 0 jump buffer stack
1778	*
1779	* @returns VBox status code.
1780	*
1781	* @param pVM Pointer to the shared VM structure.
1782	* @param idCpu The ID of the source CPU context (for the address).
1783	* @param pAddress Where to start reading.
1784	* @param pvBuf Where to store the data we've read.
1785	* @param cbRead The number of bytes to read.
1786	*/
1787	VMMR3DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR pAddress, void *pvBuf, size_t cbRead)
1788	{
1789	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1790	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1791
1792	RTHCUINTPTR offset = pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - pAddress;
1793	if (offset >= pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack)
1794	return VERR_INVALID_POINTER;
1795
1796	memcpy(pvBuf, pVCpu->vmm.s.pbEMTStackR3 + pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - offset, cbRead);
1797	return VINF_SUCCESS;
1798	}
1799
1800
1801	/**
1802	* Calls a RC function.
1803	*
1804	* @param pVM The VM handle.
1805	* @param RCPtrEntry The address of the RC function.
1806	* @param cArgs The number of arguments in the ....
1807	* @param ... Arguments to the function.
1808	*/
1809	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1810	{
1811	va_list args;
1812	va_start(args, cArgs);
1813	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1814	va_end(args);
1815	return rc;
1816	}
1817
1818
1819	/**
1820	* Calls a RC function.
1821	*
1822	* @param pVM The VM handle.
1823	* @param RCPtrEntry The address of the RC function.
1824	* @param cArgs The number of arguments in the ....
1825	* @param args Arguments to the function.
1826	*/
1827	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1828	{
1829	/* Raw mode implies 1 VCPU. */
1830	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1831	PVMCPU pVCpu = &pVM->aCpus[0];
1832
1833	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1834
1835	/*
1836	* Setup the call frame using the trampoline.
1837	*/
1838	CPUMHyperSetCtxCore(pVCpu, NULL);
1839	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1840	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32));
1841	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1842	int i = cArgs;
1843	while (i-- > 0)
1844	*pFrame++ = va_arg(args, RTGCUINTPTR32);
1845
1846	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1847	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1848	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
1849
1850	/*
1851	* We hide log flushes (outer) and hypervisor interrupts (inner).
1852	*/
1853	for (;;)
1854	{
1855	int rc;
1856	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1857	do
1858	{
1859	#ifdef NO_SUPCALLR0VMM
1860	rc = VERR_GENERAL_FAILURE;
1861	#else
1862	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1863	if (RT_LIKELY(rc == VINF_SUCCESS))
1864	rc = pVCpu->vmm.s.iLastGZRc;
1865	#endif
1866	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1867
1868	/*
1869	* Flush the logs.
1870	*/
1871	#ifdef LOG_ENABLED
1872	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1873	if ( pLogger
1874	&& pLogger->offScratch > 0)
1875	RTLogFlushRC(NULL, pLogger);
1876	#endif
1877	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1878	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1879	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1880	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1881	#endif
1882	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
1883	VMMR3FatalDump(pVM, pVCpu, rc);
1884	if (rc != VINF_VMM_CALL_HOST)
1885	{
1886	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1887	return rc;
1888	}
1889	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1890	if (RT_FAILURE(rc))
1891	return rc;
1892	}
1893	}
1894
1895
1896	/**
1897	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1898	*
1899	* @returns VBox status code.
1900	* @param pVM The VM to operate on.
1901	* @param uOperation Operation to execute.
1902	* @param u64Arg Constant argument.
1903	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1904	* details.
1905	*/
1906	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1907	{
1908	PVMCPU pVCpu = VMMGetCpu(pVM);
1909	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1910
1911	/*
1912	* Call Ring-0 entry with init code.
1913	*/
1914	int rc;
1915	for (;;)
1916	{
1917	#ifdef NO_SUPCALLR0VMM
1918	rc = VERR_GENERAL_FAILURE;
1919	#else
1920	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1921	#endif
1922	/*
1923	* Flush the logs.
1924	*/
1925	#ifdef LOG_ENABLED
1926	if ( pVCpu->vmm.s.pR0LoggerR3
1927	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1928	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
1929	#endif
1930	if (rc != VINF_VMM_CALL_HOST)
1931	break;
1932	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1933	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1934	break;
1935	/* Resume R0 */
1936	}
1937
1938	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| VBOX_FAILURE(rc),
1939	("uOperation=%u rc=%Rrc\n", uOperation, rc),
1940	VERR_INTERNAL_ERROR);
1941	return rc;
1942	}
1943
1944
1945	/**
1946	* Resumes executing hypervisor code when interrupted by a queue flush or a
1947	* debug event.
1948	*
1949	* @returns VBox status code.
1950	* @param pVM VM handle.
1951	* @param pVCpu VMCPU handle.
1952	*/
1953	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
1954	{
1955	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
1956	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1957
1958	/*
1959	* We hide log flushes (outer) and hypervisor interrupts (inner).
1960	*/
1961	for (;;)
1962	{
1963	int rc;
1964	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1965	do
1966	{
1967	#ifdef NO_SUPCALLR0VMM
1968	rc = VERR_GENERAL_FAILURE;
1969	#else
1970	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1971	if (RT_LIKELY(rc == VINF_SUCCESS))
1972	rc = pVCpu->vmm.s.iLastGZRc;
1973	#endif
1974	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1975
1976	/*
1977	* Flush the loggers,
1978	*/
1979	#ifdef LOG_ENABLED
1980	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1981	if ( pLogger
1982	&& pLogger->offScratch > 0)
1983	RTLogFlushRC(NULL, pLogger);
1984	#endif
1985	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1986	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1987	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1988	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1989	#endif
1990	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
1991	VMMR3FatalDump(pVM, pVCpu, rc);
1992	if (rc != VINF_VMM_CALL_HOST)
1993	{
1994	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
1995	return rc;
1996	}
1997	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1998	if (RT_FAILURE(rc))
1999	return rc;
2000	}
2001	}
2002
2003
2004	/**
2005	* Service a call to the ring-3 host code.
2006	*
2007	* @returns VBox status code.
2008	* @param pVM VM handle.
2009	* @param pVCpu VMCPU handle
2010	* @remark Careful with critsects.
2011	*/
2012	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2013	{
2014	/*
2015	* We must also check for pending critsect exits or else we can deadlock
2016	* when entering other critsects here.
2017	*/
2018	if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2019	PDMCritSectFF(pVCpu);
2020
2021	switch (pVCpu->vmm.s.enmCallRing3Operation)
2022	{
2023	/*
2024	* Acquire the PDM lock.
2025	*/
2026	case VMMCALLRING3_PDM_LOCK:
2027	{
2028	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2029	break;
2030	}
2031
2032	/*
2033	* Flush a PDM queue.
2034	*/
2035	case VMMCALLRING3_PDM_QUEUE_FLUSH:
2036	{
2037	PDMR3QueueFlushWorker(pVM, NULL);
2038	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2039	break;
2040	}
2041
2042	/*
2043	* Grow the PGM pool.
2044	*/
2045	case VMMCALLRING3_PGM_POOL_GROW:
2046	{
2047	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2048	break;
2049	}
2050
2051	/*
2052	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2053	*/
2054	case VMMCALLRING3_PGM_MAP_CHUNK:
2055	{
2056	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2057	break;
2058	}
2059
2060	/*
2061	* Allocates more handy pages.
2062	*/
2063	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2064	{
2065	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2066	break;
2067	}
2068
2069	/*
2070	* Acquire the PGM lock.
2071	*/
2072	case VMMCALLRING3_PGM_LOCK:
2073	{
2074	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2075	break;
2076	}
2077
2078	/*
2079	* Acquire the MM hypervisor heap lock.
2080	*/
2081	case VMMCALLRING3_MMHYPER_LOCK:
2082	{
2083	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2084	break;
2085	}
2086
2087	/*
2088	* Flush REM handler notifications.
2089	*/
2090	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2091	{
2092	REMR3ReplayHandlerNotifications(pVM);
2093	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2094	break;
2095	}
2096
2097	/*
2098	* This is a noop. We just take this route to avoid unnecessary
2099	* tests in the loops.
2100	*/
2101	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2102	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2103	LogAlways(("FLUSH\n"));
2104	break;
2105
2106	/*
2107	* Set the VM error message.
2108	*/
2109	case VMMCALLRING3_VM_SET_ERROR:
2110	VMR3SetErrorWorker(pVM);
2111	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2112	break;
2113
2114	/*
2115	* Set the VM runtime error message.
2116	*/
2117	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2118	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2119	break;
2120
2121	/*
2122	* Signal a ring 0 hypervisor assertion.
2123	* Cancel the longjmp operation that's in progress.
2124	*/
2125	case VMMCALLRING3_VM_R0_ASSERTION:
2126	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2127	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2128	#ifdef RT_ARCH_X86
2129	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2130	#else
2131	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2132	#endif
2133	LogRel((pVM->vmm.s.szRing0AssertMsg1));
2134	LogRel((pVM->vmm.s.szRing0AssertMsg2));
2135	return VERR_VMM_RING0_ASSERTION;
2136
2137	/*
2138	* A forced switch to ring 0 for preemption purposes.
2139	*/
2140	case VMMCALLRING3_VM_R0_PREEMPT:
2141	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2142	break;
2143
2144	default:
2145	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2146	return VERR_INTERNAL_ERROR;
2147	}
2148
2149	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2150	return VINF_SUCCESS;
2151	}
2152
2153
2154	/**
2155	* Displays the Force action Flags.
2156	*
2157	* @param pVM The VM handle.
2158	* @param pHlp The output helpers.
2159	* @param pszArgs The additional arguments (ignored).
2160	*/
2161	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2162	{
2163	int c;
2164	uint32_t f;
2165	#define PRINT_FLAG(prf,flag) do { \
2166	if (f & (prf##flag)) \
2167	{ \
2168	static const char *s_psz = #flag; \
2169	if (!(c % 6)) \
2170	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2171	else \
2172	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2173	c++; \
2174	f &= ~(prf##flag); \
2175	} \
2176	} while (0)
2177
2178	#define PRINT_GROUP(prf,grp,sfx) do { \
2179	if (f & (prf##grp##sfx)) \
2180	{ \
2181	static const char *s_psz = #grp; \
2182	if (!(c % 5)) \
2183	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2184	else \
2185	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2186	c++; \
2187	} \
2188	} while (0)
2189
2190	/*
2191	* The global flags.
2192	*/
2193	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2194	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2195
2196	/* show the flag mnemonics */
2197	c = 0;
2198	f = fGlobalForcedActions;
2199	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2200	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2201	PRINT_FLAG(VM_FF_,PDM_DMA);
2202	PRINT_FLAG(VM_FF_,DBGF);
2203	PRINT_FLAG(VM_FF_,REQUEST);
2204	PRINT_FLAG(VM_FF_,TERMINATE);
2205	PRINT_FLAG(VM_FF_,RESET);
2206	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2207	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2208	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2209	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2210	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2211	if (f)
2212	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2213	else
2214	pHlp->pfnPrintf(pHlp, "\n");
2215
2216	/* the groups */
2217	c = 0;
2218	f = fGlobalForcedActions;
2219	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2220	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2221	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2222	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2223	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2224	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2225	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2226	PRINT_GROUP(VM_FF_,ALL_BUT_RAW,_MASK);
2227	if (c)
2228	pHlp->pfnPrintf(pHlp, "\n");
2229
2230	/*
2231	* Per CPU flags.
2232	*/
2233	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2234	{
2235	const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2236	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2237
2238	/* show the flag mnemonics */
2239	c = 0;
2240	f = fLocalForcedActions;
2241	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2242	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2243	PRINT_FLAG(VMCPU_FF_,TIMER);
2244	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2245	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2246	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2247	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2248	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2249	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2250	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2251	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2252	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2253	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2254	PRINT_FLAG(VMCPU_FF_,TO_R3);
2255	if (f)
2256	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2257	else
2258	pHlp->pfnPrintf(pHlp, "\n");
2259
2260	/* the groups */
2261	c = 0;
2262	f = fLocalForcedActions;
2263	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2264	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2265	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2266	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2267	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2268	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2269	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2270	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2271	PRINT_GROUP(VMCPU_FF_,HWACCM_TO_R3,_MASK);
2272	PRINT_GROUP(VMCPU_FF_,ALL_BUT_RAW,_MASK);
2273	if (c)
2274	pHlp->pfnPrintf(pHlp, "\n");
2275	}
2276
2277	#undef PRINT_FLAG
2278	#undef PRINT_GROUP
2279	}
2280

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source: vbox/trunk/src/VBox/VMM/VMM.cpp@ 25659

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