VirtualBox

source: vbox/trunk/src/VBox/VMM/VMM.cpp@ 32963

Last change on this file since 32963 was 32869, checked in by vboxsync, 14 years ago

Annoying assertion

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1/* $Id: VMM.cpp 32869 2010-10-01 14:53:25Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually.
27 *
28 * @see grp_vmm, grp_vm
29 *
30 *
31 * @section sec_vmmstate VMM State
32 *
33 * @image html VM_Statechart_Diagram.gif
34 *
35 * To be written.
36 *
37 *
38 * @subsection subsec_vmm_init VMM Initialization
39 *
40 * To be written.
41 *
42 *
43 * @subsection subsec_vmm_term VMM Termination
44 *
45 * To be written.
46 *
47 */
48
49/*******************************************************************************
50* Header Files *
51*******************************************************************************/
52#define LOG_GROUP LOG_GROUP_VMM
53#include <VBox/vmm.h>
54#include <VBox/vmapi.h>
55#include <VBox/pgm.h>
56#include <VBox/cfgm.h>
57#include <VBox/pdmqueue.h>
58#include <VBox/pdmcritsect.h>
59#include <VBox/pdmapi.h>
60#include <VBox/cpum.h>
61#include <VBox/mm.h>
62#include <VBox/iom.h>
63#include <VBox/trpm.h>
64#include <VBox/selm.h>
65#include <VBox/em.h>
66#include <VBox/sup.h>
67#include <VBox/dbgf.h>
68#include <VBox/csam.h>
69#include <VBox/patm.h>
70#include <VBox/rem.h>
71#include <VBox/ssm.h>
72#include <VBox/tm.h>
73#include "VMMInternal.h"
74#include "VMMSwitcher/VMMSwitcher.h"
75#include <VBox/vm.h>
76#include <VBox/ftm.h>
77
78#include <VBox/err.h>
79#include <VBox/param.h>
80#include <VBox/version.h>
81#include <VBox/x86.h>
82#include <VBox/hwaccm.h>
83#include <iprt/assert.h>
84#include <iprt/alloc.h>
85#include <iprt/asm.h>
86#include <iprt/time.h>
87#include <iprt/semaphore.h>
88#include <iprt/stream.h>
89#include <iprt/string.h>
90#include <iprt/stdarg.h>
91#include <iprt/ctype.h>
92
93
94
95/*******************************************************************************
96* Defined Constants And Macros *
97*******************************************************************************/
98/** The saved state version. */
99#define VMM_SAVED_STATE_VERSION 4
100/** The saved state version used by v3.0 and earlier. (Teleportation) */
101#define VMM_SAVED_STATE_VERSION_3_0 3
102
103
104/*******************************************************************************
105* Internal Functions *
106*******************************************************************************/
107static int vmmR3InitStacks(PVM pVM);
108static int vmmR3InitLoggers(PVM pVM);
109static void vmmR3InitRegisterStats(PVM pVM);
110static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
111static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
112static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
113static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
114static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
115
116
117/**
118 * Initializes the VMM.
119 *
120 * @returns VBox status code.
121 * @param pVM The VM to operate on.
122 */
123VMMR3DECL(int) VMMR3Init(PVM pVM)
124{
125 LogFlow(("VMMR3Init\n"));
126
127 /*
128 * Assert alignment, sizes and order.
129 */
130 AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
131 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
132 AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
133
134 /*
135 * Init basic VM VMM members.
136 */
137 pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
138 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
139 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
140 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
141 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
142 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
143
144 /** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
145 * The EMT yield interval. The EMT yielding is a hack we employ to play a
146 * bit nicer with the rest of the system (like for instance the GUI).
147 */
148 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
149 23 /* Value arrived at after experimenting with the grub boot prompt. */);
150 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
151
152
153 /** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
154 * Controls whether we employ per-cpu preemption timers to limit the time
155 * spent executing guest code. This option is not available on all
156 * platforms and we will silently ignore this setting then. If we are
157 * running in VT-x mode, we will use the VMX-preemption timer instead of
158 * this one when possible.
159 */
160 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
161 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
162 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
163
164 /*
165 * Initialize the VMM sync critical section and semaphores.
166 */
167 rc = RTCritSectInit(&pVM->vmm.s.CritSectSync);
168 AssertRCReturn(rc, rc);
169 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
170 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
171 return VERR_NO_MEMORY;
172 for (VMCPUID i = 0; i < pVM->cCpus; i++)
173 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
174 for (VMCPUID i = 0; i < pVM->cCpus; i++)
175 {
176 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
177 AssertRCReturn(rc, rc);
178 }
179 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
180 AssertRCReturn(rc, rc);
181 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
182 AssertRCReturn(rc, rc);
183 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
184 AssertRCReturn(rc, rc);
185 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
186 AssertRCReturn(rc, rc);
187
188 /* GC switchers are enabled by default. Turned off by HWACCM. */
189 pVM->vmm.s.fSwitcherDisabled = false;
190
191 /*
192 * Register the saved state data unit.
193 */
194 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
195 NULL, NULL, NULL,
196 NULL, vmmR3Save, NULL,
197 NULL, vmmR3Load, NULL);
198 if (RT_FAILURE(rc))
199 return rc;
200
201 /*
202 * Register the Ring-0 VM handle with the session for fast ioctl calls.
203 */
204 rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
205 if (RT_FAILURE(rc))
206 return rc;
207
208 /*
209 * Init various sub-components.
210 */
211 rc = vmmR3SwitcherInit(pVM);
212 if (RT_SUCCESS(rc))
213 {
214 rc = vmmR3InitStacks(pVM);
215 if (RT_SUCCESS(rc))
216 {
217 rc = vmmR3InitLoggers(pVM);
218
219#ifdef VBOX_WITH_NMI
220 /*
221 * Allocate mapping for the host APIC.
222 */
223 if (RT_SUCCESS(rc))
224 {
225 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
226 AssertRC(rc);
227 }
228#endif
229 if (RT_SUCCESS(rc))
230 {
231 /*
232 * Debug info and statistics.
233 */
234 DBGFR3InfoRegisterInternal(pVM, "ff", "Displays the current Forced actions Flags.", vmmR3InfoFF);
235 vmmR3InitRegisterStats(pVM);
236
237 return VINF_SUCCESS;
238 }
239 }
240 /** @todo: Need failure cleanup. */
241
242 //more todo in here?
243 //if (RT_SUCCESS(rc))
244 //{
245 //}
246 //int rc2 = vmmR3TermCoreCode(pVM);
247 //AssertRC(rc2));
248 }
249
250 return rc;
251}
252
253
254/**
255 * Allocate & setup the VMM RC stack(s) (for EMTs).
256 *
257 * The stacks are also used for long jumps in Ring-0.
258 *
259 * @returns VBox status code.
260 * @param pVM Pointer to the shared VM structure.
261 *
262 * @remarks The optional guard page gets it protection setup up during R3 init
263 * completion because of init order issues.
264 */
265static int vmmR3InitStacks(PVM pVM)
266{
267 int rc = VINF_SUCCESS;
268#ifdef VMM_R0_SWITCH_STACK
269 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
270#else
271 uint32_t fFlags = 0;
272#endif
273
274 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
275 {
276 PVMCPU pVCpu = &pVM->aCpus[idCpu];
277
278#ifdef VBOX_STRICT_VMM_STACK
279 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
280#else
281 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
282#endif
283 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
284 if (RT_SUCCESS(rc))
285 {
286#ifdef VBOX_STRICT_VMM_STACK
287 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
288#endif
289#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
290 /* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
291 if (!VMMIsHwVirtExtForced(pVM))
292 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
293 else
294#endif
295 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
296 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
297 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
298 AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
299
300 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
301 }
302 }
303
304 return rc;
305}
306
307
308/**
309 * Initialize the loggers.
310 *
311 * @returns VBox status code.
312 * @param pVM Pointer to the shared VM structure.
313 */
314static int vmmR3InitLoggers(PVM pVM)
315{
316 int rc;
317
318 /*
319 * Allocate RC & R0 Logger instances (they are finalized in the relocator).
320 */
321#ifdef LOG_ENABLED
322 PRTLOGGER pLogger = RTLogDefaultInstance();
323 if (pLogger)
324 {
325 pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
326 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
327 if (RT_FAILURE(rc))
328 return rc;
329 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
330
331# ifdef VBOX_WITH_R0_LOGGING
332 for (VMCPUID i = 0; i < pVM->cCpus; i++)
333 {
334 PVMCPU pVCpu = &pVM->aCpus[i];
335
336 rc = MMR3HyperAllocOnceNoRelEx(pVM, RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[pLogger->cGroups]),
337 0, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
338 (void **)&pVCpu->vmm.s.pR0LoggerR3);
339 if (RT_FAILURE(rc))
340 return rc;
341 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
342 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
343 pVCpu->vmm.s.pR0LoggerR3->cbLogger = RT_OFFSETOF(RTLOGGER, afGroups[pLogger->cGroups]);
344 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
345 }
346# endif
347 }
348#endif /* LOG_ENABLED */
349
350#ifdef VBOX_WITH_RC_RELEASE_LOGGING
351 /*
352 * Allocate RC release logger instances (finalized in the relocator).
353 */
354 PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
355 if (pRelLogger)
356 {
357 pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
358 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
359 if (RT_FAILURE(rc))
360 return rc;
361 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
362 }
363#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
364 return VINF_SUCCESS;
365}
366
367
368/**
369 * VMMR3Init worker that register the statistics with STAM.
370 *
371 * @param pVM The shared VM structure.
372 */
373static void vmmR3InitRegisterStats(PVM pVM)
374{
375 /*
376 * Statistics.
377 */
378 STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
379 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
380 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
381 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
382 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
383 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
384 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
385 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
386 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
387 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
388 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
389 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
390 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_READ returns.");
391 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_WRITE returns.");
392 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ returns.");
393 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_WRITE returns.");
394 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ_WRITE returns.");
395 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
396 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
397 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
398 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
399 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
400 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
401 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
402 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
403 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
404 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
405 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
406 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
407 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
408 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
409 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
410 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
411 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
412 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
413 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
414 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
415 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
416 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
417 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
418 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
419 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
420 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
421 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
422 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
423 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
424 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
425 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HWACCM_PATCH_TPR_INSTR returns.");
426 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
427 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
428 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
429 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
430 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
431 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
432 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
433 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
434 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
435 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
436
437#ifdef VBOX_WITH_STATISTICS
438 for (VMCPUID i = 0; i < pVM->cCpus; i++)
439 {
440 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
441 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
442 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
443 }
444#endif
445}
446
447
448/**
449 * Initializes the per-VCPU VMM.
450 *
451 * @returns VBox status code.
452 * @param pVM The VM to operate on.
453 */
454VMMR3DECL(int) VMMR3InitCPU(PVM pVM)
455{
456 LogFlow(("VMMR3InitCPU\n"));
457 return VINF_SUCCESS;
458}
459
460
461/**
462 * Ring-3 init finalizing.
463 *
464 * @returns VBox status code.
465 * @param pVM The VM handle.
466 */
467VMMR3DECL(int) VMMR3InitFinalize(PVM pVM)
468{
469 int rc;
470
471 /*
472 * Set page attributes to r/w for stack pages.
473 */
474 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
475 {
476 rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
477 X86_PTE_P | X86_PTE_A | X86_PTE_D | X86_PTE_RW);
478 AssertRCReturn(rc, rc);
479 }
480
481 /*
482 * Create the EMT yield timer.
483 */
484 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
485 AssertRCReturn(rc, rc);
486
487 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
488 AssertRCReturn(rc, rc);
489
490#ifdef VBOX_WITH_NMI
491 /*
492 * Map the host APIC into GC - This is AMD/Intel + Host OS specific!
493 */
494 rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
495 X86_PTE_P | X86_PTE_RW | X86_PTE_PWT | X86_PTE_PCD | X86_PTE_A | X86_PTE_D);
496 AssertRCReturn(rc, rc);
497#endif
498
499#ifdef VBOX_STRICT_VMM_STACK
500 /*
501 * Setup the stack guard pages: Two inaccessible pages at each sides of the
502 * stack to catch over/under-flows.
503 */
504 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
505 {
506 uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
507
508 memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
509 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /*fSet*/);
510
511 memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
512 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /*fSet*/);
513 }
514 pVM->vmm.s.fStackGuardsStationed = true;
515#endif
516
517 /*
518 * Disable the periodic preemption timers if we can use the VMX-preemption
519 * timer instead.
520 */
521 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
522 && HWACCMR3IsVmxPreemptionTimerUsed(pVM))
523 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
524 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
525
526 return VINF_SUCCESS;
527}
528
529
530/**
531 * Initializes the R0 VMM.
532 *
533 * @returns VBox status code.
534 * @param pVM The VM to operate on.
535 */
536VMMR3DECL(int) VMMR3InitR0(PVM pVM)
537{
538 int rc;
539 PVMCPU pVCpu = VMMGetCpu(pVM);
540 Assert(pVCpu && pVCpu->idCpu == 0);
541
542#ifdef LOG_ENABLED
543 /*
544 * Initialize the ring-0 logger if we haven't done so yet.
545 */
546 if ( pVCpu->vmm.s.pR0LoggerR3
547 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
548 {
549 rc = VMMR3UpdateLoggers(pVM);
550 if (RT_FAILURE(rc))
551 return rc;
552 }
553#endif
554
555 /*
556 * Call Ring-0 entry with init code.
557 */
558 for (;;)
559 {
560#ifdef NO_SUPCALLR0VMM
561 //rc = VERR_GENERAL_FAILURE;
562 rc = VINF_SUCCESS;
563#else
564 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
565#endif
566 /*
567 * Flush the logs.
568 */
569#ifdef LOG_ENABLED
570 if ( pVCpu->vmm.s.pR0LoggerR3
571 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
572 RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
573#endif
574 if (rc != VINF_VMM_CALL_HOST)
575 break;
576 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
577 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
578 break;
579 /* Resume R0 */
580 }
581
582 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
583 {
584 LogRel(("R0 init failed, rc=%Rra\n", rc));
585 if (RT_SUCCESS(rc))
586 rc = VERR_INTERNAL_ERROR;
587 }
588 return rc;
589}
590
591
592/**
593 * Initializes the RC VMM.
594 *
595 * @returns VBox status code.
596 * @param pVM The VM to operate on.
597 */
598VMMR3DECL(int) VMMR3InitRC(PVM pVM)
599{
600 PVMCPU pVCpu = VMMGetCpu(pVM);
601 Assert(pVCpu && pVCpu->idCpu == 0);
602
603 /* In VMX mode, there's no need to init RC. */
604 if (pVM->vmm.s.fSwitcherDisabled)
605 return VINF_SUCCESS;
606
607 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
608
609 /*
610 * Call VMMGCInit():
611 * -# resolve the address.
612 * -# setup stackframe and EIP to use the trampoline.
613 * -# do a generic hypervisor call.
614 */
615 RTRCPTR RCPtrEP;
616 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
617 if (RT_SUCCESS(rc))
618 {
619 CPUMHyperSetCtxCore(pVCpu, NULL);
620 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
621 uint64_t u64TS = RTTimeProgramStartNanoTS();
622 CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
623 CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
624 CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
625 CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
626 CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
627 CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
628 CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
629 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
630 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
631
632 for (;;)
633 {
634#ifdef NO_SUPCALLR0VMM
635 //rc = VERR_GENERAL_FAILURE;
636 rc = VINF_SUCCESS;
637#else
638 rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
639#endif
640#ifdef LOG_ENABLED
641 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
642 if ( pLogger
643 && pLogger->offScratch > 0)
644 RTLogFlushRC(NULL, pLogger);
645#endif
646#ifdef VBOX_WITH_RC_RELEASE_LOGGING
647 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
648 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
649 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
650#endif
651 if (rc != VINF_VMM_CALL_HOST)
652 break;
653 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
654 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
655 break;
656 }
657
658 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
659 {
660 VMMR3FatalDump(pVM, pVCpu, rc);
661 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
662 rc = VERR_INTERNAL_ERROR;
663 }
664 AssertRC(rc);
665 }
666 return rc;
667}
668
669
670/**
671 * Terminate the VMM bits.
672 *
673 * @returns VINF_SUCCESS.
674 * @param pVM The VM handle.
675 */
676VMMR3DECL(int) VMMR3Term(PVM pVM)
677{
678 PVMCPU pVCpu = VMMGetCpu(pVM);
679 Assert(pVCpu && pVCpu->idCpu == 0);
680
681 /*
682 * Call Ring-0 entry with termination code.
683 */
684 int rc;
685 for (;;)
686 {
687#ifdef NO_SUPCALLR0VMM
688 //rc = VERR_GENERAL_FAILURE;
689 rc = VINF_SUCCESS;
690#else
691 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
692#endif
693 /*
694 * Flush the logs.
695 */
696#ifdef LOG_ENABLED
697 if ( pVCpu->vmm.s.pR0LoggerR3
698 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
699 RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
700#endif
701 if (rc != VINF_VMM_CALL_HOST)
702 break;
703 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
704 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
705 break;
706 /* Resume R0 */
707 }
708 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
709 {
710 LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
711 if (RT_SUCCESS(rc))
712 rc = VERR_INTERNAL_ERROR;
713 }
714
715 RTCritSectDelete(&pVM->vmm.s.CritSectSync);
716 for (VMCPUID i = 0; i < pVM->cCpus; i++)
717 {
718 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
719 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
720 }
721 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
722 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
723 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
724 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
725 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
726 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
727 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
728 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
729
730#ifdef VBOX_STRICT_VMM_STACK
731 /*
732 * Make the two stack guard pages present again.
733 */
734 if (pVM->vmm.s.fStackGuardsStationed)
735 {
736 for (VMCPUID i = 0; i < pVM->cCpus; i++)
737 {
738 uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
739 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /*fSet*/);
740 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /*fSet*/);
741 }
742 pVM->vmm.s.fStackGuardsStationed = false;
743 }
744#endif
745 return rc;
746}
747
748
749/**
750 * Terminates the per-VCPU VMM.
751 *
752 * Termination means cleaning up and freeing all resources,
753 * the VM it self is at this point powered off or suspended.
754 *
755 * @returns VBox status code.
756 * @param pVM The VM to operate on.
757 */
758VMMR3DECL(int) VMMR3TermCPU(PVM pVM)
759{
760 return VINF_SUCCESS;
761}
762
763
764/**
765 * Applies relocations to data and code managed by this
766 * component. This function will be called at init and
767 * whenever the VMM need to relocate it self inside the GC.
768 *
769 * The VMM will need to apply relocations to the core code.
770 *
771 * @param pVM The VM handle.
772 * @param offDelta The relocation delta.
773 */
774VMMR3DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
775{
776 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
777
778 /*
779 * Recalc the RC address.
780 */
781#ifdef VBOX_WITH_RAW_MODE
782 pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
783#endif
784
785 /*
786 * The stack.
787 */
788 for (VMCPUID i = 0; i < pVM->cCpus; i++)
789 {
790 PVMCPU pVCpu = &pVM->aCpus[i];
791
792 CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
793
794 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
795 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
796 }
797
798 /*
799 * All the switchers.
800 */
801 vmmR3SwitcherRelocate(pVM, offDelta);
802
803 /*
804 * Get other RC entry points.
805 */
806 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
807 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
808
809 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
810 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
811
812 /*
813 * Update the logger.
814 */
815 VMMR3UpdateLoggers(pVM);
816}
817
818
819/**
820 * Updates the settings for the RC and R0 loggers.
821 *
822 * @returns VBox status code.
823 * @param pVM The VM handle.
824 */
825VMMR3DECL(int) VMMR3UpdateLoggers(PVM pVM)
826{
827 /*
828 * Simply clone the logger instance (for RC).
829 */
830 int rc = VINF_SUCCESS;
831 RTRCPTR RCPtrLoggerFlush = 0;
832
833 if (pVM->vmm.s.pRCLoggerR3
834#ifdef VBOX_WITH_RC_RELEASE_LOGGING
835 || pVM->vmm.s.pRCRelLoggerR3
836#endif
837 )
838 {
839 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
840 AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
841 }
842
843 if (pVM->vmm.s.pRCLoggerR3)
844 {
845 RTRCPTR RCPtrLoggerWrapper = 0;
846 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
847 AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
848
849 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
850 rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
851 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
852 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
853 }
854
855#ifdef VBOX_WITH_RC_RELEASE_LOGGING
856 if (pVM->vmm.s.pRCRelLoggerR3)
857 {
858 RTRCPTR RCPtrLoggerWrapper = 0;
859 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
860 AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
861
862 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
863 rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
864 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
865 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
866 }
867#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
868
869#ifdef LOG_ENABLED
870 /*
871 * For the ring-0 EMT logger, we use a per-thread logger instance
872 * in ring-0. Only initialize it once.
873 */
874 for (VMCPUID i = 0; i < pVM->cCpus; i++)
875 {
876 PVMCPU pVCpu = &pVM->aCpus[i];
877 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
878 if (pR0LoggerR3)
879 {
880 if (!pR0LoggerR3->fCreated)
881 {
882 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
883 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
884 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
885
886 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
887 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
888 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
889
890 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
891 *(PFNRTLOGGER *)&pfnLoggerWrapper, *(PFNRTLOGFLUSH *)&pfnLoggerFlush,
892 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
893 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
894
895 RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
896 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
897 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
898 rc = RTLogSetCustomPrefixCallback(&pR0LoggerR3->Logger, *(PFNRTLOGPREFIX *)&pfnLoggerPrefix, NULL);
899 AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
900
901 pR0LoggerR3->idCpu = i;
902 pR0LoggerR3->fCreated = true;
903 pR0LoggerR3->fFlushingDisabled = false;
904
905 }
906
907 rc = RTLogCopyGroupsAndFlags(&pR0LoggerR3->Logger, NULL /* default */, pVM->vmm.s.pRCLoggerR3->fFlags, RTLOGFLAGS_BUFFERED);
908 AssertRC(rc);
909 }
910 }
911#endif
912 return rc;
913}
914
915
916/**
917 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
918 *
919 * @returns Pointer to the buffer.
920 * @param pVM The VM handle.
921 */
922VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
923{
924 if (HWACCMIsEnabled(pVM))
925 return pVM->vmm.s.szRing0AssertMsg1;
926
927 RTRCPTR RCPtr;
928 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
929 if (RT_SUCCESS(rc))
930 return (const char *)MMHyperRCToR3(pVM, RCPtr);
931
932 return NULL;
933}
934
935
936/**
937 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
938 *
939 * @returns Pointer to the buffer.
940 * @param pVM The VM handle.
941 */
942VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
943{
944 if (HWACCMIsEnabled(pVM))
945 return pVM->vmm.s.szRing0AssertMsg2;
946
947 RTRCPTR RCPtr;
948 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
949 if (RT_SUCCESS(rc))
950 return (const char *)MMHyperRCToR3(pVM, RCPtr);
951
952 return NULL;
953}
954
955
956/**
957 * Execute state save operation.
958 *
959 * @returns VBox status code.
960 * @param pVM VM Handle.
961 * @param pSSM SSM operation handle.
962 */
963static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
964{
965 LogFlow(("vmmR3Save:\n"));
966
967 /*
968 * Save the started/stopped state of all CPUs except 0 as it will always
969 * be running. This avoids breaking the saved state version. :-)
970 */
971 for (VMCPUID i = 1; i < pVM->cCpus; i++)
972 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
973
974 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
975}
976
977
978/**
979 * Execute state load operation.
980 *
981 * @returns VBox status code.
982 * @param pVM VM Handle.
983 * @param pSSM SSM operation handle.
984 * @param uVersion Data layout version.
985 * @param uPass The data pass.
986 */
987static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
988{
989 LogFlow(("vmmR3Load:\n"));
990 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
991
992 /*
993 * Validate version.
994 */
995 if ( uVersion != VMM_SAVED_STATE_VERSION
996 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
997 {
998 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
999 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1000 }
1001
1002 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1003 {
1004 /* Ignore the stack bottom, stack pointer and stack bits. */
1005 RTRCPTR RCPtrIgnored;
1006 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1007 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1008#ifdef RT_OS_DARWIN
1009 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1010 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1011 && SSMR3HandleRevision(pSSM) >= 48858
1012 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1013 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1014 )
1015 SSMR3Skip(pSSM, 16384);
1016 else
1017 SSMR3Skip(pSSM, 8192);
1018#else
1019 SSMR3Skip(pSSM, 8192);
1020#endif
1021 }
1022
1023 /*
1024 * Restore the VMCPU states. VCPU 0 is always started.
1025 */
1026 VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1027 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1028 {
1029 bool fStarted;
1030 int rc = SSMR3GetBool(pSSM, &fStarted);
1031 if (RT_FAILURE(rc))
1032 return rc;
1033 VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1034 }
1035
1036 /* terminator */
1037 uint32_t u32;
1038 int rc = SSMR3GetU32(pSSM, &u32);
1039 if (RT_FAILURE(rc))
1040 return rc;
1041 if (u32 != UINT32_MAX)
1042 {
1043 AssertMsgFailed(("u32=%#x\n", u32));
1044 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1045 }
1046 return VINF_SUCCESS;
1047}
1048
1049
1050/**
1051 * Resolve a builtin RC symbol.
1052 *
1053 * Called by PDM when loading or relocating RC modules.
1054 *
1055 * @returns VBox status
1056 * @param pVM VM Handle.
1057 * @param pszSymbol Symbol to resolv
1058 * @param pRCPtrValue Where to store the symbol value.
1059 *
1060 * @remark This has to work before VMMR3Relocate() is called.
1061 */
1062VMMR3DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1063{
1064 if (!strcmp(pszSymbol, "g_Logger"))
1065 {
1066 if (pVM->vmm.s.pRCLoggerR3)
1067 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1068 *pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1069 }
1070 else if (!strcmp(pszSymbol, "g_RelLogger"))
1071 {
1072#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1073 if (pVM->vmm.s.pRCRelLoggerR3)
1074 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1075 *pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1076#else
1077 *pRCPtrValue = NIL_RTRCPTR;
1078#endif
1079 }
1080 else
1081 return VERR_SYMBOL_NOT_FOUND;
1082 return VINF_SUCCESS;
1083}
1084
1085
1086/**
1087 * Suspends the CPU yielder.
1088 *
1089 * @param pVM The VM handle.
1090 */
1091VMMR3DECL(void) VMMR3YieldSuspend(PVM pVM)
1092{
1093 VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1094 if (!pVM->vmm.s.cYieldResumeMillies)
1095 {
1096 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1097 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1098 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1099 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1100 else
1101 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1102 TMTimerStop(pVM->vmm.s.pYieldTimer);
1103 }
1104 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1105}
1106
1107
1108/**
1109 * Stops the CPU yielder.
1110 *
1111 * @param pVM The VM handle.
1112 */
1113VMMR3DECL(void) VMMR3YieldStop(PVM pVM)
1114{
1115 if (!pVM->vmm.s.cYieldResumeMillies)
1116 TMTimerStop(pVM->vmm.s.pYieldTimer);
1117 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1118 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1119}
1120
1121
1122/**
1123 * Resumes the CPU yielder when it has been a suspended or stopped.
1124 *
1125 * @param pVM The VM handle.
1126 */
1127VMMR3DECL(void) VMMR3YieldResume(PVM pVM)
1128{
1129 if (pVM->vmm.s.cYieldResumeMillies)
1130 {
1131 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1132 pVM->vmm.s.cYieldResumeMillies = 0;
1133 }
1134}
1135
1136
1137/**
1138 * Internal timer callback function.
1139 *
1140 * @param pVM The VM.
1141 * @param pTimer The timer handle.
1142 * @param pvUser User argument specified upon timer creation.
1143 */
1144static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1145{
1146 /*
1147 * This really needs some careful tuning. While we shouldn't be too greedy since
1148 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1149 * because that'll cause us to stop up.
1150 *
1151 * The current logic is to use the default interval when there is no lag worth
1152 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1153 *
1154 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1155 * so the lag is up to date.)
1156 */
1157 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1158 if ( u64Lag < 50000000 /* 50ms */
1159 || ( u64Lag < 1000000000 /* 1s */
1160 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1161 )
1162 {
1163 uint64_t u64Elapsed = RTTimeNanoTS();
1164 pVM->vmm.s.u64LastYield = u64Elapsed;
1165
1166 RTThreadYield();
1167
1168#ifdef LOG_ENABLED
1169 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1170 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1171#endif
1172 }
1173 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1174}
1175
1176
1177/**
1178 * Executes guest code in the raw-mode context.
1179 *
1180 * @param pVM VM handle.
1181 * @param pVCpu The VMCPU to operate on.
1182 */
1183VMMR3DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1184{
1185 Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1186
1187 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1188
1189 /*
1190 * Set the EIP and ESP.
1191 */
1192 CPUMSetHyperEIP(pVCpu, CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1193 ? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1194 : pVM->vmm.s.pfnCPUMRCResumeGuest);
1195 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
1196
1197 /*
1198 * We hide log flushes (outer) and hypervisor interrupts (inner).
1199 */
1200 for (;;)
1201 {
1202#ifdef VBOX_STRICT
1203 if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) || CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1204 EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1205 PGMMapCheck(pVM);
1206#endif
1207 int rc;
1208 do
1209 {
1210#ifdef NO_SUPCALLR0VMM
1211 rc = VERR_GENERAL_FAILURE;
1212#else
1213 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1214 if (RT_LIKELY(rc == VINF_SUCCESS))
1215 rc = pVCpu->vmm.s.iLastGZRc;
1216#endif
1217 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1218
1219 /*
1220 * Flush the logs.
1221 */
1222#ifdef LOG_ENABLED
1223 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1224 if ( pLogger
1225 && pLogger->offScratch > 0)
1226 RTLogFlushRC(NULL, pLogger);
1227#endif
1228#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1229 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1230 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1231 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1232#endif
1233 if (rc != VINF_VMM_CALL_HOST)
1234 {
1235 Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1236 return rc;
1237 }
1238 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1239 if (RT_FAILURE(rc))
1240 return rc;
1241 /* Resume GC */
1242 }
1243}
1244
1245
1246/**
1247 * Executes guest code (Intel VT-x and AMD-V).
1248 *
1249 * @param pVM VM handle.
1250 * @param pVCpu The VMCPU to operate on.
1251 */
1252VMMR3DECL(int) VMMR3HwAccRunGC(PVM pVM, PVMCPU pVCpu)
1253{
1254 Log2(("VMMR3HwAccRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1255
1256 for (;;)
1257 {
1258 int rc;
1259 do
1260 {
1261#ifdef NO_SUPCALLR0VMM
1262 rc = VERR_GENERAL_FAILURE;
1263#else
1264 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HWACC_RUN, pVCpu->idCpu);
1265 if (RT_LIKELY(rc == VINF_SUCCESS))
1266 rc = pVCpu->vmm.s.iLastGZRc;
1267#endif
1268 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1269
1270#if 0 /* todo triggers too often */
1271 Assert(!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TO_R3));
1272#endif
1273
1274#ifdef LOG_ENABLED
1275 /*
1276 * Flush the log
1277 */
1278 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1279 if ( pR0LoggerR3
1280 && pR0LoggerR3->Logger.offScratch > 0)
1281 RTLogFlushToLogger(&pR0LoggerR3->Logger, NULL);
1282#endif /* !LOG_ENABLED */
1283 if (rc != VINF_VMM_CALL_HOST)
1284 {
1285 Log2(("VMMR3HwAccRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1286 return rc;
1287 }
1288 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1289 if (RT_FAILURE(rc))
1290 return rc;
1291 /* Resume R0 */
1292 }
1293}
1294
1295/**
1296 * VCPU worker for VMMSendSipi.
1297 *
1298 * @param pVM The VM to operate on.
1299 * @param idCpu Virtual CPU to perform SIPI on
1300 * @param uVector SIPI vector
1301 */
1302DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1303{
1304 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1305 VMCPU_ASSERT_EMT(pVCpu);
1306
1307 /** @todo what are we supposed to do if the processor is already running? */
1308 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1309 return VERR_ACCESS_DENIED;
1310
1311
1312 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1313
1314 pCtx->cs = uVector << 8;
1315 pCtx->csHid.u64Base = uVector << 12;
1316 pCtx->csHid.u32Limit = 0x0000ffff;
1317 pCtx->rip = 0;
1318
1319 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1320
1321# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1322 EMSetState(pVCpu, EMSTATE_HALTED);
1323 return VINF_EM_RESCHEDULE;
1324# else /* And if we go the VMCPU::enmState way it can stay here. */
1325 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1326 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1327 return VINF_SUCCESS;
1328# endif
1329}
1330
1331DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1332{
1333 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1334 VMCPU_ASSERT_EMT(pVCpu);
1335
1336 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1337 CPUMR3ResetCpu(pVCpu);
1338 return VINF_EM_WAIT_SIPI;
1339}
1340
1341/**
1342 * Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1343 * and unhalting processor
1344 *
1345 * @param pVM The VM to operate on.
1346 * @param idCpu Virtual CPU to perform SIPI on
1347 * @param uVector SIPI vector
1348 */
1349VMMR3DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1350{
1351 AssertReturnVoid(idCpu < pVM->cCpus);
1352
1353 int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1354 AssertRC(rc);
1355}
1356
1357/**
1358 * Sends init IPI to the virtual CPU.
1359 *
1360 * @param pVM The VM to operate on.
1361 * @param idCpu Virtual CPU to perform int IPI on
1362 */
1363VMMR3DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1364{
1365 AssertReturnVoid(idCpu < pVM->cCpus);
1366
1367 int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1368 AssertRC(rc);
1369}
1370
1371/**
1372 * Registers the guest memory range that can be used for patching
1373 *
1374 * @returns VBox status code.
1375 * @param pVM The VM to operate on.
1376 * @param pPatchMem Patch memory range
1377 * @param cbPatchMem Size of the memory range
1378 */
1379VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1380{
1381 if (HWACCMIsEnabled(pVM))
1382 return HWACMMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1383
1384 return VERR_NOT_SUPPORTED;
1385}
1386
1387/**
1388 * Deregisters the guest memory range that can be used for patching
1389 *
1390 * @returns VBox status code.
1391 * @param pVM The VM to operate on.
1392 * @param pPatchMem Patch memory range
1393 * @param cbPatchMem Size of the memory range
1394 */
1395VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1396{
1397 if (HWACCMIsEnabled(pVM))
1398 return HWACMMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1399
1400 return VINF_SUCCESS;
1401}
1402
1403
1404/**
1405 * VCPU worker for VMMR3SynchronizeAllVCpus.
1406 *
1407 * @param pVM The VM to operate on.
1408 * @param idCpu Virtual CPU to perform SIPI on
1409 * @param uVector SIPI vector
1410 */
1411DECLCALLBACK(int) vmmR3SyncVCpu(PVM pVM)
1412{
1413 /* Block until the job in the caller has finished. */
1414 RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1415 RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1416 return VINF_SUCCESS;
1417}
1418
1419
1420/**
1421 * Atomically execute a callback handler
1422 * Note: This is very expensive; avoid using it frequently!
1423 *
1424 * @param pVM The VM to operate on.
1425 * @param pfnHandler Callback handler
1426 * @param pvUser User specified parameter
1427 *
1428 * @thread EMT
1429 */
1430VMMR3DECL(int) VMMR3AtomicExecuteHandler(PVM pVM, PFNATOMICHANDLER pfnHandler, void *pvUser)
1431{
1432 int rc;
1433 PVMCPU pVCpu = VMMGetCpu(pVM);
1434 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1435
1436 /* Shortcut for the uniprocessor case. */
1437 if (pVM->cCpus == 1)
1438 return pfnHandler(pVM, pvUser);
1439
1440 RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1441 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
1442 {
1443 if (idCpu != pVCpu->idCpu)
1444 {
1445 rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SyncVCpu, 1, pVM);
1446 AssertRC(rc);
1447 }
1448 }
1449 /* Wait until all other VCPUs are waiting for us. */
1450 while (RTCritSectGetWaiters(&pVM->vmm.s.CritSectSync) != (int32_t)(pVM->cCpus - 1))
1451 RTThreadSleep(1);
1452
1453 rc = pfnHandler(pVM, pvUser);
1454 RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1455 return rc;
1456}
1457
1458
1459/**
1460 * Count returns and have the last non-caller EMT wake up the caller.
1461 *
1462 * @returns VBox strict informational status code for EM scheduling. No failures
1463 * will be returned here, those are for the caller only.
1464 *
1465 * @param pVM The VM handle.
1466 */
1467DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1468{
1469 int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1470 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1471 if (cReturned == pVM->cCpus - 1U)
1472 {
1473 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1474 AssertLogRelRC(rc);
1475 }
1476
1477 AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1478 || (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1479 ("%Rrc\n", rcRet),
1480 VERR_IPE_UNEXPECTED_INFO_STATUS);
1481 return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1482}
1483
1484
1485/**
1486 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1487 *
1488 * @returns VBox strict informational status code for EM scheduling. No failures
1489 * will be returned here, those are for the caller only. When
1490 * fIsCaller is set, VINF_SUCESS is always returned.
1491 *
1492 * @param pVM The VM handle.
1493 * @param pVCpu The VMCPU structure for the calling EMT.
1494 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1495 * not.
1496 * @param fFlags The flags.
1497 * @param pfnRendezvous The callback.
1498 * @param pvUser The user argument for the callback.
1499 */
1500static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1501 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1502{
1503 int rc;
1504
1505 /*
1506 * Enter, the last EMT triggers the next callback phase.
1507 */
1508 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1509 if (cEntered != pVM->cCpus)
1510 {
1511 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1512 {
1513 /* Wait for our turn. */
1514 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1515 AssertLogRelRC(rc);
1516 }
1517 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1518 {
1519 /* Wait for the last EMT to arrive and wake everyone up. */
1520 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1521 AssertLogRelRC(rc);
1522 }
1523 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1524 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1525 {
1526 /* Wait for our turn. */
1527 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1528 AssertLogRelRC(rc);
1529 }
1530 else
1531 {
1532 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1533
1534 /*
1535 * The execute once is handled specially to optimize the code flow.
1536 *
1537 * The last EMT to arrive will perform the callback and the other
1538 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1539 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1540 * returns, that EMT will initiate the normal return sequence.
1541 */
1542 if (!fIsCaller)
1543 {
1544 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1545 AssertLogRelRC(rc);
1546
1547 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1548 }
1549 return VINF_SUCCESS;
1550 }
1551 }
1552 else
1553 {
1554 /*
1555 * All EMTs are waiting, clear the FF and take action according to the
1556 * execution method.
1557 */
1558 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1559
1560 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1561 {
1562 /* Wake up everyone. */
1563 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1564 AssertLogRelRC(rc);
1565 }
1566 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1567 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1568 {
1569 /* Figure out who to wake up and wake it up. If it's ourself, then
1570 it's easy otherwise wait for our turn. */
1571 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1572 ? 0
1573 : pVM->cCpus - 1U;
1574 if (pVCpu->idCpu != iFirst)
1575 {
1576 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1577 AssertLogRelRC(rc);
1578 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1579 AssertLogRelRC(rc);
1580 }
1581 }
1582 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1583 }
1584
1585
1586 /*
1587 * Do the callback and update the status if necessary.
1588 */
1589 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1590 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1591 {
1592 VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1593 if (rcStrict != VINF_SUCCESS)
1594 {
1595 AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1596 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1597 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1598 int32_t i32RendezvousStatus;
1599 do
1600 {
1601 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1602 if ( rcStrict == i32RendezvousStatus
1603 || RT_FAILURE(i32RendezvousStatus)
1604 || ( i32RendezvousStatus != VINF_SUCCESS
1605 && rcStrict > i32RendezvousStatus))
1606 break;
1607 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1608 }
1609 }
1610
1611 /*
1612 * Increment the done counter and take action depending on whether we're
1613 * the last to finish callback execution.
1614 */
1615 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1616 if ( cDone != pVM->cCpus
1617 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1618 {
1619 /* Signal the next EMT? */
1620 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1621 {
1622 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1623 AssertLogRelRC(rc);
1624 }
1625 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1626 {
1627 Assert(cDone == pVCpu->idCpu + 1U);
1628 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1629 AssertLogRelRC(rc);
1630 }
1631 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1632 {
1633 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1634 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1635 AssertLogRelRC(rc);
1636 }
1637
1638 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1639 if (!fIsCaller)
1640 {
1641 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1642 AssertLogRelRC(rc);
1643 }
1644 }
1645 else
1646 {
1647 /* Callback execution is all done, tell the rest to return. */
1648 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1649 AssertLogRelRC(rc);
1650 }
1651
1652 if (!fIsCaller)
1653 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1654 return VINF_SUCCESS;
1655}
1656
1657
1658/**
1659 * Called in response to VM_FF_EMT_RENDEZVOUS.
1660 *
1661 * @returns VBox strict status code - EM scheduling. No errors will be returned
1662 * here, nor will any non-EM scheduling status codes be returned.
1663 *
1664 * @param pVM The VM handle
1665 * @param pVCpu The handle of the calling EMT.
1666 *
1667 * @thread EMT
1668 */
1669VMMR3DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1670{
1671 return vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1672 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1673}
1674
1675
1676/**
1677 * EMT rendezvous.
1678 *
1679 * Gathers all the EMTs and execute some code on each of them, either in a one
1680 * by one fashion or all at once.
1681 *
1682 * @returns VBox strict status code. This will be the the first error,
1683 * VINF_SUCCESS, or an EM scheduling status code.
1684 *
1685 * @param pVM The VM handle.
1686 * @param fFlags Flags indicating execution methods. See
1687 * grp_VMMR3EmtRendezvous_fFlags.
1688 * @param pfnRendezvous The callback.
1689 * @param pvUser User argument for the callback.
1690 *
1691 * @thread Any.
1692 */
1693VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1694{
1695 /*
1696 * Validate input.
1697 */
1698 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1699 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1700 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1701 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1702 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1703 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1704 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1705
1706 VBOXSTRICTRC rcStrict;
1707 PVMCPU pVCpu = VMMGetCpu(pVM);
1708 if (!pVCpu)
1709 /*
1710 * Forward the request to an EMT thread.
1711 */
1712 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1713 (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1714 else if (pVM->cCpus == 1)
1715 /*
1716 * Shortcut for the single EMT case.
1717 */
1718 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1719 else
1720 {
1721 /*
1722 * Spin lock. If busy, wait for the other EMT to finish while keeping a
1723 * lookout of the RENDEZVOUS FF.
1724 */
1725 int rc;
1726 rcStrict = VINF_SUCCESS;
1727 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1728 {
1729 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1730 {
1731 if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1732 {
1733 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1734 if ( rc != VINF_SUCCESS
1735 && ( rcStrict == VINF_SUCCESS
1736 || rcStrict > rc))
1737 rcStrict = rc;
1738 /** @todo Perhaps deal with termination here? */
1739 }
1740 ASMNopPause();
1741 }
1742 }
1743 Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1744
1745 /*
1746 * Clear the slate. This is a semaphore ping-pong orgy. :-)
1747 */
1748 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1749 {
1750 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1751 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1752 }
1753 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1754 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1755 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1756 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1757 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1758 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1759 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1760 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1761 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1762 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1763 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1764
1765 /*
1766 * Set the FF and poke the other EMTs.
1767 */
1768 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1769 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1770
1771 /*
1772 * Do the same ourselves.
1773 */
1774 vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1775
1776 /*
1777 * The caller waits for the other EMTs to be done and return before doing
1778 * the cleanup. This makes away with wakeup / reset races we would otherwise
1779 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1780 */
1781 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1782 AssertLogRelRC(rc);
1783
1784 /*
1785 * Get the return code and clean up a little bit.
1786 */
1787 int rcMy = pVM->vmm.s.i32RendezvousStatus;
1788 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1789
1790 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1791
1792 /*
1793 * Merge rcStrict and rcMy.
1794 */
1795 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1796 if ( rcMy != VINF_SUCCESS
1797 && ( rcStrict == VINF_SUCCESS
1798 || rcStrict > rcMy))
1799 rcStrict = rcMy;
1800 }
1801
1802 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1803 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1804 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1805 VERR_IPE_UNEXPECTED_INFO_STATUS);
1806 return VBOXSTRICTRC_VAL(rcStrict);
1807}
1808
1809
1810/**
1811 * Read from the ring 0 jump buffer stack
1812 *
1813 * @returns VBox status code.
1814 *
1815 * @param pVM Pointer to the shared VM structure.
1816 * @param idCpu The ID of the source CPU context (for the address).
1817 * @param R0Addr Where to start reading.
1818 * @param pvBuf Where to store the data we've read.
1819 * @param cbRead The number of bytes to read.
1820 */
1821VMMR3DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1822{
1823 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1824 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1825
1826#ifdef VMM_R0_SWITCH_STACK
1827 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1828#else
1829 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1830#endif
1831 if ( off > VMM_STACK_SIZE
1832 || off + cbRead >= VMM_STACK_SIZE)
1833 return VERR_INVALID_POINTER;
1834
1835 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1836 return VINF_SUCCESS;
1837}
1838
1839
1840/**
1841 * Calls a RC function.
1842 *
1843 * @param pVM The VM handle.
1844 * @param RCPtrEntry The address of the RC function.
1845 * @param cArgs The number of arguments in the ....
1846 * @param ... Arguments to the function.
1847 */
1848VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1849{
1850 va_list args;
1851 va_start(args, cArgs);
1852 int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1853 va_end(args);
1854 return rc;
1855}
1856
1857
1858/**
1859 * Calls a RC function.
1860 *
1861 * @param pVM The VM handle.
1862 * @param RCPtrEntry The address of the RC function.
1863 * @param cArgs The number of arguments in the ....
1864 * @param args Arguments to the function.
1865 */
1866VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1867{
1868 /* Raw mode implies 1 VCPU. */
1869 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1870 PVMCPU pVCpu = &pVM->aCpus[0];
1871
1872 Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1873
1874 /*
1875 * Setup the call frame using the trampoline.
1876 */
1877 CPUMHyperSetCtxCore(pVCpu, NULL);
1878 memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1879 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32));
1880 PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1881 int i = cArgs;
1882 while (i-- > 0)
1883 *pFrame++ = va_arg(args, RTGCUINTPTR32);
1884
1885 CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1886 CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1887 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
1888
1889 /*
1890 * We hide log flushes (outer) and hypervisor interrupts (inner).
1891 */
1892 for (;;)
1893 {
1894 int rc;
1895 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1896 do
1897 {
1898#ifdef NO_SUPCALLR0VMM
1899 rc = VERR_GENERAL_FAILURE;
1900#else
1901 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1902 if (RT_LIKELY(rc == VINF_SUCCESS))
1903 rc = pVCpu->vmm.s.iLastGZRc;
1904#endif
1905 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1906
1907 /*
1908 * Flush the logs.
1909 */
1910#ifdef LOG_ENABLED
1911 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1912 if ( pLogger
1913 && pLogger->offScratch > 0)
1914 RTLogFlushRC(NULL, pLogger);
1915#endif
1916#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1917 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1918 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1919 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1920#endif
1921 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
1922 VMMR3FatalDump(pVM, pVCpu, rc);
1923 if (rc != VINF_VMM_CALL_HOST)
1924 {
1925 Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1926 return rc;
1927 }
1928 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1929 if (RT_FAILURE(rc))
1930 return rc;
1931 }
1932}
1933
1934
1935/**
1936 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1937 *
1938 * @returns VBox status code.
1939 * @param pVM The VM to operate on.
1940 * @param uOperation Operation to execute.
1941 * @param u64Arg Constant argument.
1942 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1943 * details.
1944 */
1945VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1946{
1947 PVMCPU pVCpu = VMMGetCpu(pVM);
1948 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1949
1950 /*
1951 * Call Ring-0 entry with init code.
1952 */
1953 int rc;
1954 for (;;)
1955 {
1956#ifdef NO_SUPCALLR0VMM
1957 rc = VERR_GENERAL_FAILURE;
1958#else
1959 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1960#endif
1961 /*
1962 * Flush the logs.
1963 */
1964#ifdef LOG_ENABLED
1965 if ( pVCpu->vmm.s.pR0LoggerR3
1966 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1967 RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
1968#endif
1969 if (rc != VINF_VMM_CALL_HOST)
1970 break;
1971 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1972 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1973 break;
1974 /* Resume R0 */
1975 }
1976
1977 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
1978 ("uOperation=%u rc=%Rrc\n", uOperation, rc),
1979 VERR_INTERNAL_ERROR);
1980 return rc;
1981}
1982
1983
1984/**
1985 * Resumes executing hypervisor code when interrupted by a queue flush or a
1986 * debug event.
1987 *
1988 * @returns VBox status code.
1989 * @param pVM VM handle.
1990 * @param pVCpu VMCPU handle.
1991 */
1992VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
1993{
1994 Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
1995 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1996
1997 /*
1998 * We hide log flushes (outer) and hypervisor interrupts (inner).
1999 */
2000 for (;;)
2001 {
2002 int rc;
2003 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2004 do
2005 {
2006#ifdef NO_SUPCALLR0VMM
2007 rc = VERR_GENERAL_FAILURE;
2008#else
2009 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2010 if (RT_LIKELY(rc == VINF_SUCCESS))
2011 rc = pVCpu->vmm.s.iLastGZRc;
2012#endif
2013 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2014
2015 /*
2016 * Flush the loggers,
2017 */
2018#ifdef LOG_ENABLED
2019 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2020 if ( pLogger
2021 && pLogger->offScratch > 0)
2022 RTLogFlushRC(NULL, pLogger);
2023#endif
2024#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2025 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2026 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2027 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2028#endif
2029 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2030 VMMR3FatalDump(pVM, pVCpu, rc);
2031 if (rc != VINF_VMM_CALL_HOST)
2032 {
2033 Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2034 return rc;
2035 }
2036 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2037 if (RT_FAILURE(rc))
2038 return rc;
2039 }
2040}
2041
2042
2043/**
2044 * Service a call to the ring-3 host code.
2045 *
2046 * @returns VBox status code.
2047 * @param pVM VM handle.
2048 * @param pVCpu VMCPU handle
2049 * @remark Careful with critsects.
2050 */
2051static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2052{
2053 /*
2054 * We must also check for pending critsect exits or else we can deadlock
2055 * when entering other critsects here.
2056 */
2057 if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2058 PDMCritSectFF(pVCpu);
2059
2060 switch (pVCpu->vmm.s.enmCallRing3Operation)
2061 {
2062 /*
2063 * Acquire the PDM lock.
2064 */
2065 case VMMCALLRING3_PDM_LOCK:
2066 {
2067 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2068 break;
2069 }
2070
2071 /*
2072 * Grow the PGM pool.
2073 */
2074 case VMMCALLRING3_PGM_POOL_GROW:
2075 {
2076 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2077 break;
2078 }
2079
2080 /*
2081 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2082 */
2083 case VMMCALLRING3_PGM_MAP_CHUNK:
2084 {
2085 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2086 break;
2087 }
2088
2089 /*
2090 * Allocates more handy pages.
2091 */
2092 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2093 {
2094 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2095 break;
2096 }
2097
2098 /*
2099 * Allocates a large page.
2100 */
2101 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2102 {
2103 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2104 break;
2105 }
2106
2107 /*
2108 * Acquire the PGM lock.
2109 */
2110 case VMMCALLRING3_PGM_LOCK:
2111 {
2112 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2113 break;
2114 }
2115
2116 /*
2117 * Acquire the MM hypervisor heap lock.
2118 */
2119 case VMMCALLRING3_MMHYPER_LOCK:
2120 {
2121 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2122 break;
2123 }
2124
2125 /*
2126 * Flush REM handler notifications.
2127 */
2128 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2129 {
2130 REMR3ReplayHandlerNotifications(pVM);
2131 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2132 break;
2133 }
2134
2135 /*
2136 * This is a noop. We just take this route to avoid unnecessary
2137 * tests in the loops.
2138 */
2139 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2140 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2141 LogAlways(("*FLUSH*\n"));
2142 break;
2143
2144 /*
2145 * Set the VM error message.
2146 */
2147 case VMMCALLRING3_VM_SET_ERROR:
2148 VMR3SetErrorWorker(pVM);
2149 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2150 break;
2151
2152 /*
2153 * Set the VM runtime error message.
2154 */
2155 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2156 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2157 break;
2158
2159 /*
2160 * Signal a ring 0 hypervisor assertion.
2161 * Cancel the longjmp operation that's in progress.
2162 */
2163 case VMMCALLRING3_VM_R0_ASSERTION:
2164 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2165 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2166#ifdef RT_ARCH_X86
2167 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2168#else
2169 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2170#endif
2171#ifdef VMM_R0_SWITCH_STACK
2172 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2173#endif
2174 LogRel((pVM->vmm.s.szRing0AssertMsg1));
2175 LogRel((pVM->vmm.s.szRing0AssertMsg2));
2176 return VERR_VMM_RING0_ASSERTION;
2177
2178 /*
2179 * A forced switch to ring 0 for preemption purposes.
2180 */
2181 case VMMCALLRING3_VM_R0_PREEMPT:
2182 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2183 break;
2184
2185 case VMMCALLRING3_FTM_SET_CHECKPOINT:
2186 pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2187 break;
2188
2189 default:
2190 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2191 return VERR_INTERNAL_ERROR;
2192 }
2193
2194 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2195 return VINF_SUCCESS;
2196}
2197
2198
2199/**
2200 * Displays the Force action Flags.
2201 *
2202 * @param pVM The VM handle.
2203 * @param pHlp The output helpers.
2204 * @param pszArgs The additional arguments (ignored).
2205 */
2206static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2207{
2208 int c;
2209 uint32_t f;
2210#define PRINT_FLAG(prf,flag) do { \
2211 if (f & (prf##flag)) \
2212 { \
2213 static const char *s_psz = #flag; \
2214 if (!(c % 6)) \
2215 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2216 else \
2217 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2218 c++; \
2219 f &= ~(prf##flag); \
2220 } \
2221 } while (0)
2222
2223#define PRINT_GROUP(prf,grp,sfx) do { \
2224 if (f & (prf##grp##sfx)) \
2225 { \
2226 static const char *s_psz = #grp; \
2227 if (!(c % 5)) \
2228 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2229 else \
2230 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2231 c++; \
2232 } \
2233 } while (0)
2234
2235 /*
2236 * The global flags.
2237 */
2238 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2239 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2240
2241 /* show the flag mnemonics */
2242 c = 0;
2243 f = fGlobalForcedActions;
2244 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2245 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2246 PRINT_FLAG(VM_FF_,PDM_DMA);
2247 PRINT_FLAG(VM_FF_,DBGF);
2248 PRINT_FLAG(VM_FF_,REQUEST);
2249 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2250 PRINT_FLAG(VM_FF_,RESET);
2251 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2252 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2253 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2254 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2255 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2256 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2257 if (f)
2258 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2259 else
2260 pHlp->pfnPrintf(pHlp, "\n");
2261
2262 /* the groups */
2263 c = 0;
2264 f = fGlobalForcedActions;
2265 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2266 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2267 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2268 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2269 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2270 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2271 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2272 PRINT_GROUP(VM_FF_,ALL_BUT_RAW,_MASK);
2273 if (c)
2274 pHlp->pfnPrintf(pHlp, "\n");
2275
2276 /*
2277 * Per CPU flags.
2278 */
2279 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2280 {
2281 const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2282 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2283
2284 /* show the flag mnemonics */
2285 c = 0;
2286 f = fLocalForcedActions;
2287 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2288 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2289 PRINT_FLAG(VMCPU_FF_,TIMER);
2290 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2291 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2292 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2293 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2294 PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2295 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2296 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2297 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2298 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2299 PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2300 PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2301 PRINT_FLAG(VMCPU_FF_,TO_R3);
2302 if (f)
2303 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2304 else
2305 pHlp->pfnPrintf(pHlp, "\n");
2306
2307 /* the groups */
2308 c = 0;
2309 f = fLocalForcedActions;
2310 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2311 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2312 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2313 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2314 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2315 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2316 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2317 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2318 PRINT_GROUP(VMCPU_FF_,HWACCM_TO_R3,_MASK);
2319 PRINT_GROUP(VMCPU_FF_,ALL_BUT_RAW,_MASK);
2320 if (c)
2321 pHlp->pfnPrintf(pHlp, "\n");
2322 }
2323
2324#undef PRINT_FLAG
2325#undef PRINT_GROUP
2326}
2327
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