VMM.cpp@ 21653

Last change on this file since 21653 was 21653, checked in by vboxsync, 15 years ago
TPR patching updates
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1	/* $Id: VMM.cpp 21653 2009-07-16 15:18:07Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22	//#define NO_SUPCALLR0VMM
23
24	/** @page pg_vmm VMM - The Virtual Machine Monitor
25	*
26	* The VMM component is two things at the moment, it's a component doing a few
27	* management and routing tasks, and it's the whole virtual machine monitor
28	* thing. For hysterical reasons, it is not doing all the management that one
29	* would expect, this is instead done by @ref pg_vm. We'll address this
30	* misdesign eventually.
31	*
32	* @see grp_vmm, grp_vm
33	*
34	*
35	* @section sec_vmmstate VMM State
36	*
37	* @image html VM_Statechart_Diagram.gif
38	*
39	* To be written.
40	*
41	*
42	* @subsection subsec_vmm_init VMM Initialization
43	*
44	* To be written.
45	*
46	*
47	* @subsection subsec_vmm_term VMM Termination
48	*
49	* To be written.
50	*
51	*/
52
53	/*******************************************************************************
54	* Header Files *
55	*******************************************************************************/
56	#define LOG_GROUP LOG_GROUP_VMM
57	#include <VBox/vmm.h>
58	#include <VBox/vmapi.h>
59	#include <VBox/pgm.h>
60	#include <VBox/cfgm.h>
61	#include <VBox/pdmqueue.h>
62	#include <VBox/pdmcritsect.h>
63	#include <VBox/pdmapi.h>
64	#include <VBox/cpum.h>
65	#include <VBox/mm.h>
66	#include <VBox/iom.h>
67	#include <VBox/trpm.h>
68	#include <VBox/selm.h>
69	#include <VBox/em.h>
70	#include <VBox/sup.h>
71	#include <VBox/dbgf.h>
72	#include <VBox/csam.h>
73	#include <VBox/patm.h>
74	#include <VBox/rem.h>
75	#include <VBox/ssm.h>
76	#include <VBox/tm.h>
77	#include "VMMInternal.h"
78	#include "VMMSwitcher/VMMSwitcher.h"
79	#include <VBox/vm.h>
80
81	#include <VBox/err.h>
82	#include <VBox/param.h>
83	#include <VBox/version.h>
84	#include <VBox/x86.h>
85	#include <VBox/hwaccm.h>
86	#include <iprt/assert.h>
87	#include <iprt/alloc.h>
88	#include <iprt/asm.h>
89	#include <iprt/time.h>
90	#include <iprt/semaphore.h>
91	#include <iprt/stream.h>
92	#include <iprt/string.h>
93	#include <iprt/stdarg.h>
94	#include <iprt/ctype.h>
95
96
97
98	/*******************************************************************************
99	* Defined Constants And Macros *
100	*******************************************************************************/
101	/** The saved state version. */
102	#define VMM_SAVED_STATE_VERSION 3
103
104
105	/*******************************************************************************
106	* Internal Functions *
107	*******************************************************************************/
108	static int vmmR3InitStacks(PVM pVM);
109	static int vmmR3InitLoggers(PVM pVM);
110	static void vmmR3InitRegisterStats(PVM pVM);
111	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
112	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t u32Version);
113	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
114	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
115	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
116
117
118	/**
119	* Initializes the VMM.
120	*
121	* @returns VBox status code.
122	* @param pVM The VM to operate on.
123	*/
124	VMMR3DECL(int) VMMR3Init(PVM pVM)
125	{
126	LogFlow(("VMMR3Init\n"));
127
128	/*
129	* Assert alignment, sizes and order.
130	*/
131	AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
132	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
133	AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
134
135	/*
136	* Init basic VM VMM members.
137	*/
138	pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
139	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
140	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
141	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
142	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
143	int rc = CFGMR3QueryU32(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies);
144	if (rc == VERR_CFGM_VALUE_NOT_FOUND)
145	pVM->vmm.s.cYieldEveryMillies = 23; /* Value arrived at after experimenting with the grub boot prompt. */
146	//pVM->vmm.s.cYieldEveryMillies = 8; //debugging
147	else
148	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
149
150	/*
151	* Initialize the VMM sync critical section and semaphores.
152	*/
153	rc = RTCritSectInit(&pVM->vmm.s.CritSectSync);
154	AssertRCReturn(rc, rc);
155	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
156	AssertRCReturn(rc, rc);
157	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
158	AssertRCReturn(rc, rc);
159	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
160	AssertRCReturn(rc, rc);
161	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
162	AssertRCReturn(rc, rc);
163
164	/* GC switchers are enabled by default. Turned off by HWACCM. */
165	pVM->vmm.s.fSwitcherDisabled = false;
166
167	/*
168	* Register the saved state data unit.
169	*/
170	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
171	NULL, vmmR3Save, NULL,
172	NULL, vmmR3Load, NULL);
173	if (RT_FAILURE(rc))
174	return rc;
175
176	/*
177	* Register the Ring-0 VM handle with the session for fast ioctl calls.
178	*/
179	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
180	if (RT_FAILURE(rc))
181	return rc;
182
183	/*
184	* Init various sub-components.
185	*/
186	rc = vmmR3SwitcherInit(pVM);
187	if (RT_SUCCESS(rc))
188	{
189	rc = vmmR3InitStacks(pVM);
190	if (RT_SUCCESS(rc))
191	{
192	rc = vmmR3InitLoggers(pVM);
193
194	#ifdef VBOX_WITH_NMI
195	/*
196	* Allocate mapping for the host APIC.
197	*/
198	if (RT_SUCCESS(rc))
199	{
200	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
201	AssertRC(rc);
202	}
203	#endif
204	if (RT_SUCCESS(rc))
205	{
206	/*
207	* Debug info and statistics.
208	*/
209	DBGFR3InfoRegisterInternal(pVM, "ff", "Displays the current Forced actions Flags.", vmmR3InfoFF);
210	vmmR3InitRegisterStats(pVM);
211
212	return VINF_SUCCESS;
213	}
214	}
215	/** @todo: Need failure cleanup. */
216
217	//more todo in here?
218	//if (RT_SUCCESS(rc))
219	//{
220	//}
221	//int rc2 = vmmR3TermCoreCode(pVM);
222	//AssertRC(rc2));
223	}
224
225	return rc;
226	}
227
228
229	/**
230	* Allocate & setup the VMM RC stack(s) (for EMTs).
231	*
232	* The stacks are also used for long jumps in Ring-0.
233	*
234	* @returns VBox status code.
235	* @param pVM Pointer to the shared VM structure.
236	*
237	* @remarks The optional guard page gets it protection setup up during R3 init
238	* completion because of init order issues.
239	*/
240	static int vmmR3InitStacks(PVM pVM)
241	{
242	int rc = VINF_SUCCESS;
243
244	for (VMCPUID idCpu = 0; idCpu < pVM->cCPUs; idCpu++)
245	{
246	PVMCPU pVCpu = &pVM->aCpus[idCpu];
247
248	#ifdef VBOX_STRICT_VMM_STACK
249	rc = MMR3HyperAllocOnceNoRel(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE, PAGE_SIZE, MM_TAG_VMM, (void **)&pVCpu->vmm.s.pbEMTStackR3);
250	#else
251	rc = MMR3HyperAllocOnceNoRel(pVM, VMM_STACK_SIZE, PAGE_SIZE, MM_TAG_VMM, (void **)&pVCpu->vmm.s.pbEMTStackR3);
252	#endif
253	if (RT_SUCCESS(rc))
254	{
255	#ifdef VBOX_STRICT_VMM_STACK
256	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
257	#endif
258	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
259	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
260	if (!VMMIsHwVirtExtForced(pVM))
261	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
262	else
263	#endif
264	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
265	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
266	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
267	AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
268
269	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
270	}
271	}
272
273	return rc;
274	}
275
276
277	/**
278	* Initialize the loggers.
279	*
280	* @returns VBox status code.
281	* @param pVM Pointer to the shared VM structure.
282	*/
283	static int vmmR3InitLoggers(PVM pVM)
284	{
285	int rc;
286
287	/*
288	* Allocate RC & R0 Logger instances (they are finalized in the relocator).
289	*/
290	#ifdef LOG_ENABLED
291	PRTLOGGER pLogger = RTLogDefaultInstance();
292	if (pLogger)
293	{
294	pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
295	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
296	if (RT_FAILURE(rc))
297	return rc;
298	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
299
300	# ifdef VBOX_WITH_R0_LOGGING
301	for (VMCPUID i = 0; i < pVM->cCPUs; i++)
302	{
303	PVMCPU pVCpu = &pVM->aCpus[i];
304
305	rc = MMR3HyperAllocOnceNoRelEx(pVM, RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[pLogger->cGroups]),
306	0, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
307	(void **)&pVCpu->vmm.s.pR0LoggerR3);
308	if (RT_FAILURE(rc))
309	return rc;
310	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
311	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
312	pVCpu->vmm.s.pR0LoggerR3->cbLogger = RT_OFFSETOF(RTLOGGER, afGroups[pLogger->cGroups]);
313	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
314	}
315	# endif
316	}
317	#endif /* LOG_ENABLED */
318
319	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
320	/*
321	* Allocate RC release logger instances (finalized in the relocator).
322	*/
323	PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
324	if (pRelLogger)
325	{
326	pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
327	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
328	if (RT_FAILURE(rc))
329	return rc;
330	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
331	}
332	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
333	return VINF_SUCCESS;
334	}
335
336
337	/**
338	* VMMR3Init worker that register the statistics with STAM.
339	*
340	* @param pVM The shared VM structure.
341	*/
342	static void vmmR3InitRegisterStats(PVM pVM)
343	{
344	/*
345	* Statistics.
346	*/
347	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
348	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
349	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
350	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
351	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
352	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
353	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
354	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
355	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
356	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
357	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
358	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
359	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_READ returns.");
360	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_WRITE returns.");
361	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ returns.");
362	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_WRITE returns.");
363	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ_WRITE returns.");
364	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
365	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
366	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
367	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
368	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
369	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
370	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
371	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
372	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
373	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
374	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
375	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
376	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
377	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
378	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
379	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
380	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
381	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
382	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
383	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
384	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
385	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HWACCM_PATCH_TPR_INSTR returns.");
386	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
387	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
388	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMQueueFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMQueueFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_QUEUE_FLUSH calls.");
389	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
390	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
391	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
392	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
393	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
394	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
395	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
396	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
397
398	#ifdef VBOX_WITH_STATISTICS
399	for (VMCPUID i = 0; i < pVM->cCPUs; i++)
400	{
401	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
402	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
403	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
404	}
405	#endif
406	}
407
408
409	/**
410	* Initializes the per-VCPU VMM.
411	*
412	* @returns VBox status code.
413	* @param pVM The VM to operate on.
414	*/
415	VMMR3DECL(int) VMMR3InitCPU(PVM pVM)
416	{
417	LogFlow(("VMMR3InitCPU\n"));
418	return VINF_SUCCESS;
419	}
420
421
422	/**
423	* Ring-3 init finalizing.
424	*
425	* @returns VBox status code.
426	* @param pVM The VM handle.
427	*/
428	VMMR3DECL(int) VMMR3InitFinalize(PVM pVM)
429	{
430	int rc = VINF_SUCCESS;
431
432	for (VMCPUID idCpu = 0; idCpu < pVM->cCPUs; idCpu++)
433	{
434	PVMCPU pVCpu = &pVM->aCpus[idCpu];
435
436	#ifdef VBOX_STRICT_VMM_STACK
437	/*
438	* Two inaccessible pages at each sides of the stack to catch over/under-flows.
439	*/
440	memset(pVCpu->vmm.s.pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
441	MMR3HyperSetGuard(pVM, pVCpu->vmm.s.pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /fSet/);
442
443	memset(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
444	MMR3HyperSetGuard(pVM, pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /fSet/);
445	#endif
446
447	/*
448	* Set page attributes to r/w for stack pages.
449	*/
450	rc = PGMMapSetPage(pVM, pVCpu->vmm.s.pbEMTStackRC, VMM_STACK_SIZE, X86_PTE_P \| X86_PTE_A \| X86_PTE_D \| X86_PTE_RW);
451	AssertRC(rc);
452	if (RT_FAILURE(rc))
453	break;
454	}
455	if (RT_SUCCESS(rc))
456	{
457	/*
458	* Create the EMT yield timer.
459	*/
460	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
461	if (RT_SUCCESS(rc))
462	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
463	}
464
465	#ifdef VBOX_WITH_NMI
466	/*
467	* Map the host APIC into GC - This is AMD/Intel + Host OS specific!
468	*/
469	if (RT_SUCCESS(rc))
470	rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
471	X86_PTE_P \| X86_PTE_RW \| X86_PTE_PWT \| X86_PTE_PCD \| X86_PTE_A \| X86_PTE_D);
472	#endif
473	return rc;
474	}
475
476
477	/**
478	* Initializes the R0 VMM.
479	*
480	* @returns VBox status code.
481	* @param pVM The VM to operate on.
482	*/
483	VMMR3DECL(int) VMMR3InitR0(PVM pVM)
484	{
485	int rc;
486	PVMCPU pVCpu = VMMGetCpu(pVM);
487	Assert(pVCpu && pVCpu->idCpu == 0);
488
489	#ifdef LOG_ENABLED
490	/*
491	* Initialize the ring-0 logger if we haven't done so yet.
492	*/
493	if ( pVCpu->vmm.s.pR0LoggerR3
494	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
495	{
496	rc = VMMR3UpdateLoggers(pVM);
497	if (RT_FAILURE(rc))
498	return rc;
499	}
500	#endif
501
502	/*
503	* Call Ring-0 entry with init code.
504	*/
505	for (;;)
506	{
507	#ifdef NO_SUPCALLR0VMM
508	//rc = VERR_GENERAL_FAILURE;
509	rc = VINF_SUCCESS;
510	#else
511	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
512	#endif
513	/*
514	* Flush the logs.
515	*/
516	#ifdef LOG_ENABLED
517	if ( pVCpu->vmm.s.pR0LoggerR3
518	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
519	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
520	#endif
521	if (rc != VINF_VMM_CALL_HOST)
522	break;
523	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
524	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
525	break;
526	/* Resume R0 */
527	}
528
529	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
530	{
531	LogRel(("R0 init failed, rc=%Rra\n", rc));
532	if (RT_SUCCESS(rc))
533	rc = VERR_INTERNAL_ERROR;
534	}
535	return rc;
536	}
537
538
539	/**
540	* Initializes the RC VMM.
541	*
542	* @returns VBox status code.
543	* @param pVM The VM to operate on.
544	*/
545	VMMR3DECL(int) VMMR3InitRC(PVM pVM)
546	{
547	PVMCPU pVCpu = VMMGetCpu(pVM);
548	Assert(pVCpu && pVCpu->idCpu == 0);
549
550	/* In VMX mode, there's no need to init RC. */
551	if (pVM->vmm.s.fSwitcherDisabled)
552	return VINF_SUCCESS;
553
554	AssertReturn(pVM->cCPUs == 1, VERR_RAW_MODE_INVALID_SMP);
555
556	/*
557	* Call VMMGCInit():
558	* -# resolve the address.
559	* -# setup stackframe and EIP to use the trampoline.
560	* -# do a generic hypervisor call.
561	*/
562	RTRCPTR RCPtrEP;
563	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
564	if (RT_SUCCESS(rc))
565	{
566	CPUMHyperSetCtxCore(pVCpu, NULL);
567	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
568	uint64_t u64TS = RTTimeProgramStartNanoTS();
569	CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
570	CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
571	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
572	CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
573	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
574	CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
575	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
576	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
577	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
578
579	for (;;)
580	{
581	#ifdef NO_SUPCALLR0VMM
582	//rc = VERR_GENERAL_FAILURE;
583	rc = VINF_SUCCESS;
584	#else
585	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
586	#endif
587	#ifdef LOG_ENABLED
588	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
589	if ( pLogger
590	&& pLogger->offScratch > 0)
591	RTLogFlushRC(NULL, pLogger);
592	#endif
593	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
594	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
595	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
596	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
597	#endif
598	if (rc != VINF_VMM_CALL_HOST)
599	break;
600	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
601	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
602	break;
603	}
604
605	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
606	{
607	VMMR3FatalDump(pVM, pVCpu, rc);
608	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
609	rc = VERR_INTERNAL_ERROR;
610	}
611	AssertRC(rc);
612	}
613	return rc;
614	}
615
616
617	/**
618	* Terminate the VMM bits.
619	*
620	* @returns VINF_SUCCESS.
621	* @param pVM The VM handle.
622	*/
623	VMMR3DECL(int) VMMR3Term(PVM pVM)
624	{
625	PVMCPU pVCpu = VMMGetCpu(pVM);
626	Assert(pVCpu && pVCpu->idCpu == 0);
627
628	/*
629	* Call Ring-0 entry with termination code.
630	*/
631	int rc;
632	for (;;)
633	{
634	#ifdef NO_SUPCALLR0VMM
635	//rc = VERR_GENERAL_FAILURE;
636	rc = VINF_SUCCESS;
637	#else
638	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
639	#endif
640	/*
641	* Flush the logs.
642	*/
643	#ifdef LOG_ENABLED
644	if ( pVCpu->vmm.s.pR0LoggerR3
645	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
646	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
647	#endif
648	if (rc != VINF_VMM_CALL_HOST)
649	break;
650	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
651	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
652	break;
653	/* Resume R0 */
654	}
655	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
656	{
657	LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
658	if (RT_SUCCESS(rc))
659	rc = VERR_INTERNAL_ERROR;
660	}
661
662	RTCritSectDelete(&pVM->vmm.s.CritSectSync);
663	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
664	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
665	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
666	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
667	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
668	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
669	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
670	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
671
672	#ifdef VBOX_STRICT_VMM_STACK
673	/*
674	* Make the two stack guard pages present again.
675	*/
676	for (VMCPUID i = 0; i < pVM->cCPUs; i++)
677	{
678	MMR3HyperSetGuard(pVM, pVM->aCpus[i].vmm.s.pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /fSet/);
679	MMR3HyperSetGuard(pVM, pVM->aCpus[i].vmm.s.pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /fSet/);
680	}
681	#endif
682	return rc;
683	}
684
685
686	/**
687	* Terminates the per-VCPU VMM.
688	*
689	* Termination means cleaning up and freeing all resources,
690	* the VM it self is at this point powered off or suspended.
691	*
692	* @returns VBox status code.
693	* @param pVM The VM to operate on.
694	*/
695	VMMR3DECL(int) VMMR3TermCPU(PVM pVM)
696	{
697	return VINF_SUCCESS;
698	}
699
700
701	/**
702	* Applies relocations to data and code managed by this
703	* component. This function will be called at init and
704	* whenever the VMM need to relocate it self inside the GC.
705	*
706	* The VMM will need to apply relocations to the core code.
707	*
708	* @param pVM The VM handle.
709	* @param offDelta The relocation delta.
710	*/
711	VMMR3DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
712	{
713	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
714
715	/*
716	* Recalc the RC address.
717	*/
718	pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
719
720	/*
721	* The stack.
722	*/
723	for (VMCPUID i = 0; i < pVM->cCPUs; i++)
724	{
725	PVMCPU pVCpu = &pVM->aCpus[i];
726
727	CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
728
729	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
730	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
731	}
732
733	/*
734	* All the switchers.
735	*/
736	vmmR3SwitcherRelocate(pVM, offDelta);
737
738	/*
739	* Get other RC entry points.
740	*/
741	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
742	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
743
744	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
745	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
746
747	/*
748	* Update the logger.
749	*/
750	VMMR3UpdateLoggers(pVM);
751	}
752
753
754	/**
755	* Updates the settings for the RC and R0 loggers.
756	*
757	* @returns VBox status code.
758	* @param pVM The VM handle.
759	*/
760	VMMR3DECL(int) VMMR3UpdateLoggers(PVM pVM)
761	{
762	/*
763	* Simply clone the logger instance (for RC).
764	*/
765	int rc = VINF_SUCCESS;
766	RTRCPTR RCPtrLoggerFlush = 0;
767
768	if (pVM->vmm.s.pRCLoggerR3
769	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
770	\|\| pVM->vmm.s.pRCRelLoggerR3
771	#endif
772	)
773	{
774	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
775	AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
776	}
777
778	if (pVM->vmm.s.pRCLoggerR3)
779	{
780	RTRCPTR RCPtrLoggerWrapper = 0;
781	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
782	AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
783
784	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
785	rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
786	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
787	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
788	}
789
790	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
791	if (pVM->vmm.s.pRCRelLoggerR3)
792	{
793	RTRCPTR RCPtrLoggerWrapper = 0;
794	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
795	AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
796
797	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
798	rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
799	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
800	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
801	}
802	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
803
804	#ifdef LOG_ENABLED
805	/*
806	* For the ring-0 EMT logger, we use a per-thread logger instance
807	* in ring-0. Only initialize it once.
808	*/
809	for (VMCPUID i = 0; i < pVM->cCPUs; i++)
810	{
811	PVMCPU pVCpu = &pVM->aCpus[i];
812	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
813	if (pR0LoggerR3)
814	{
815	if (!pR0LoggerR3->fCreated)
816	{
817	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
818	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
819	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
820
821	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
822	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
823	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
824
825	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
826	(PFNRTLOGGER )&pfnLoggerWrapper, (PFNRTLOGFLUSH )&pfnLoggerFlush,
827	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
828	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
829
830	RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
831	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
832	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
833	rc = RTLogSetCustomPrefixCallback(&pR0LoggerR3->Logger, (PFNRTLOGPREFIX )&pfnLoggerPrefix, NULL);
834	AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
835
836	pR0LoggerR3->idCpu = i;
837	pR0LoggerR3->fCreated = true;
838	pR0LoggerR3->fFlushingDisabled = false;
839
840	}
841
842	rc = RTLogCopyGroupsAndFlags(&pR0LoggerR3->Logger, NULL /* default */, pVM->vmm.s.pRCLoggerR3->fFlags, RTLOGFLAGS_BUFFERED);
843	AssertRC(rc);
844	}
845	}
846	#endif
847	return rc;
848	}
849
850
851	/**
852	* Gets the pointer to a buffer containing the R0/RC AssertMsg1 output.
853	*
854	* @returns Pointer to the buffer.
855	* @param pVM The VM handle.
856	*/
857	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
858	{
859	if (HWACCMIsEnabled(pVM))
860	return pVM->vmm.s.szRing0AssertMsg1;
861
862	RTRCPTR RCPtr;
863	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
864	if (RT_SUCCESS(rc))
865	return (const char *)MMHyperRCToR3(pVM, RCPtr);
866
867	return NULL;
868	}
869
870
871	/**
872	* Gets the pointer to a buffer containing the R0/RC AssertMsg2 output.
873	*
874	* @returns Pointer to the buffer.
875	* @param pVM The VM handle.
876	*/
877	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
878	{
879	if (HWACCMIsEnabled(pVM))
880	return pVM->vmm.s.szRing0AssertMsg2;
881
882	RTRCPTR RCPtr;
883	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
884	if (RT_SUCCESS(rc))
885	return (const char *)MMHyperRCToR3(pVM, RCPtr);
886
887	return NULL;
888	}
889
890
891	/**
892	* Execute state save operation.
893	*
894	* @returns VBox status code.
895	* @param pVM VM Handle.
896	* @param pSSM SSM operation handle.
897	*/
898	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
899	{
900	LogFlow(("vmmR3Save:\n"));
901
902	/*
903	* The hypervisor stack.
904	* Note! See note in vmmR3Load (remove this on version change).
905	*/
906	PVMCPU pVCpu0 = &pVM->aCpus[0];
907	SSMR3PutRCPtr(pSSM, pVCpu0->vmm.s.pbEMTStackBottomRC);
908	RTRCPTR RCPtrESP = CPUMGetHyperESP(pVCpu0);
909	AssertMsg(pVCpu0->vmm.s.pbEMTStackBottomRC - RCPtrESP <= VMM_STACK_SIZE, ("Bottom %RRv ESP=%RRv\n", pVCpu0->vmm.s.pbEMTStackBottomRC, RCPtrESP));
910	SSMR3PutRCPtr(pSSM, RCPtrESP);
911	SSMR3PutMem(pSSM, pVCpu0->vmm.s.pbEMTStackR3, VMM_STACK_SIZE);
912
913	/*
914	* Save the started/stopped state of all CPUs except 0 as it will always
915	* be running. This avoids breaking the saved state version. :-)
916	*/
917	for (VMCPUID i = 1; i < pVM->cCPUs; i++)
918	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
919
920	return SSMR3PutU32(pSSM, ~0); /* terminator */
921	}
922
923
924	/**
925	* Execute state load operation.
926	*
927	* @returns VBox status code.
928	* @param pVM VM Handle.
929	* @param pSSM SSM operation handle.
930	* @param u32Version Data layout version.
931	*/
932	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t u32Version)
933	{
934	LogFlow(("vmmR3Load:\n"));
935
936	/*
937	* Validate version.
938	*/
939	if (u32Version != VMM_SAVED_STATE_VERSION)
940	{
941	AssertMsgFailed(("vmmR3Load: Invalid version u32Version=%d!\n", u32Version));
942	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
943	}
944
945	/*
946	* Check that the stack is in the same place, or that it's fearly empty.
947	*
948	* Note! This can be skipped next time we update saved state as we will
949	* never be in a R0/RC -> ring-3 call when saving the state. The
950	* stack and the two associated pointers are not required.
951	*/
952	RTRCPTR RCPtrStackBottom;
953	SSMR3GetRCPtr(pSSM, &RCPtrStackBottom);
954	RTRCPTR RCPtrESP;
955	int rc = SSMR3GetRCPtr(pSSM, &RCPtrESP);
956	if (RT_FAILURE(rc))
957	return rc;
958	SSMR3GetMem(pSSM, pVM->aCpus[0].vmm.s.pbEMTStackR3, VMM_STACK_SIZE);
959
960	/* Restore the VMCPU states. VCPU 0 is always started. */
961	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
962	for (VMCPUID i = 1; i < pVM->cCPUs; i++)
963	{
964	bool fStarted;
965	rc = SSMR3GetBool(pSSM, &fStarted);
966	if (RT_FAILURE(rc))
967	return rc;
968	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
969	}
970
971	/* terminator */
972	uint32_t u32;
973	rc = SSMR3GetU32(pSSM, &u32);
974	if (RT_FAILURE(rc))
975	return rc;
976	if (u32 != ~0U)
977	{
978	AssertMsgFailed(("u32=%#x\n", u32));
979	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
980	}
981	return VINF_SUCCESS;
982	}
983
984
985	/**
986	* Resolve a builtin RC symbol.
987	*
988	* Called by PDM when loading or relocating RC modules.
989	*
990	* @returns VBox status
991	* @param pVM VM Handle.
992	* @param pszSymbol Symbol to resolv
993	* @param pRCPtrValue Where to store the symbol value.
994	*
995	* @remark This has to work before VMMR3Relocate() is called.
996	*/
997	VMMR3DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
998	{
999	if (!strcmp(pszSymbol, "g_Logger"))
1000	{
1001	if (pVM->vmm.s.pRCLoggerR3)
1002	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1003	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1004	}
1005	else if (!strcmp(pszSymbol, "g_RelLogger"))
1006	{
1007	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1008	if (pVM->vmm.s.pRCRelLoggerR3)
1009	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1010	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1011	#else
1012	*pRCPtrValue = NIL_RTRCPTR;
1013	#endif
1014	}
1015	else
1016	return VERR_SYMBOL_NOT_FOUND;
1017	return VINF_SUCCESS;
1018	}
1019
1020
1021	/**
1022	* Suspends the CPU yielder.
1023	*
1024	* @param pVM The VM handle.
1025	*/
1026	VMMR3DECL(void) VMMR3YieldSuspend(PVM pVM)
1027	{
1028	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1029	if (!pVM->vmm.s.cYieldResumeMillies)
1030	{
1031	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1032	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1033	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1034	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1035	else
1036	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1037	TMTimerStop(pVM->vmm.s.pYieldTimer);
1038	}
1039	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1040	}
1041
1042
1043	/**
1044	* Stops the CPU yielder.
1045	*
1046	* @param pVM The VM handle.
1047	*/
1048	VMMR3DECL(void) VMMR3YieldStop(PVM pVM)
1049	{
1050	if (!pVM->vmm.s.cYieldResumeMillies)
1051	TMTimerStop(pVM->vmm.s.pYieldTimer);
1052	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1053	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1054	}
1055
1056
1057	/**
1058	* Resumes the CPU yielder when it has been a suspended or stopped.
1059	*
1060	* @param pVM The VM handle.
1061	*/
1062	VMMR3DECL(void) VMMR3YieldResume(PVM pVM)
1063	{
1064	if (pVM->vmm.s.cYieldResumeMillies)
1065	{
1066	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1067	pVM->vmm.s.cYieldResumeMillies = 0;
1068	}
1069	}
1070
1071
1072	/**
1073	* Internal timer callback function.
1074	*
1075	* @param pVM The VM.
1076	* @param pTimer The timer handle.
1077	* @param pvUser User argument specified upon timer creation.
1078	*/
1079	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1080	{
1081	/*
1082	* This really needs some careful tuning. While we shouldn't be too greedy since
1083	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1084	* because that'll cause us to stop up.
1085	*
1086	* The current logic is to use the default interval when there is no lag worth
1087	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1088	*
1089	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1090	* so the lag is up to date.)
1091	*/
1092	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1093	if ( u64Lag < 50000000 /* 50ms */
1094	\|\| ( u64Lag < 1000000000 /* 1s */
1095	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1096	)
1097	{
1098	uint64_t u64Elapsed = RTTimeNanoTS();
1099	pVM->vmm.s.u64LastYield = u64Elapsed;
1100
1101	RTThreadYield();
1102
1103	#ifdef LOG_ENABLED
1104	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1105	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1106	#endif
1107	}
1108	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1109	}
1110
1111
1112	/**
1113	* Executes guest code in the raw-mode context.
1114	*
1115	* @param pVM VM handle.
1116	* @param pVCpu The VMCPU to operate on.
1117	*/
1118	VMMR3DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1119	{
1120	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1121
1122	AssertReturn(pVM->cCPUs == 1, VERR_RAW_MODE_INVALID_SMP);
1123
1124	/*
1125	* Set the EIP and ESP.
1126	*/
1127	CPUMSetHyperEIP(pVCpu, CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1128	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1129	: pVM->vmm.s.pfnCPUMRCResumeGuest);
1130	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
1131
1132	/*
1133	* We hide log flushes (outer) and hypervisor interrupts (inner).
1134	*/
1135	for (;;)
1136	{
1137	#ifdef VBOX_STRICT
1138	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1139	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1140	PGMMapCheck(pVM);
1141	#endif
1142	int rc;
1143	do
1144	{
1145	#ifdef NO_SUPCALLR0VMM
1146	rc = VERR_GENERAL_FAILURE;
1147	#else
1148	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1149	if (RT_LIKELY(rc == VINF_SUCCESS))
1150	rc = pVCpu->vmm.s.iLastGZRc;
1151	#endif
1152	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1153
1154	/*
1155	* Flush the logs.
1156	*/
1157	#ifdef LOG_ENABLED
1158	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1159	if ( pLogger
1160	&& pLogger->offScratch > 0)
1161	RTLogFlushRC(NULL, pLogger);
1162	#endif
1163	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1164	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1165	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1166	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1167	#endif
1168	if (rc != VINF_VMM_CALL_HOST)
1169	{
1170	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1171	return rc;
1172	}
1173	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1174	if (RT_FAILURE(rc))
1175	return rc;
1176	/* Resume GC */
1177	}
1178	}
1179
1180
1181	/**
1182	* Executes guest code (Intel VT-x and AMD-V).
1183	*
1184	* @param pVM VM handle.
1185	* @param pVCpu The VMCPU to operate on.
1186	*/
1187	VMMR3DECL(int) VMMR3HwAccRunGC(PVM pVM, PVMCPU pVCpu)
1188	{
1189	Log2(("VMMR3HwAccRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1190
1191	for (;;)
1192	{
1193	int rc;
1194	do
1195	{
1196	#ifdef NO_SUPCALLR0VMM
1197	rc = VERR_GENERAL_FAILURE;
1198	#else
1199	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HWACC_RUN, pVCpu->idCpu);
1200	if (RT_LIKELY(rc == VINF_SUCCESS))
1201	rc = pVCpu->vmm.s.iLastGZRc;
1202	#endif
1203	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1204
1205	#ifdef LOG_ENABLED
1206	/*
1207	* Flush the log
1208	*/
1209	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1210	if ( pR0LoggerR3
1211	&& pR0LoggerR3->Logger.offScratch > 0)
1212	RTLogFlushToLogger(&pR0LoggerR3->Logger, NULL);
1213	#endif /* !LOG_ENABLED */
1214	if (rc != VINF_VMM_CALL_HOST)
1215	{
1216	Log2(("VMMR3HwAccRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1217	return rc;
1218	}
1219	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1220	if (RT_FAILURE(rc))
1221	return rc;
1222	/* Resume R0 */
1223	}
1224	}
1225
1226	/**
1227	* VCPU worker for VMMSendSipi.
1228	*
1229	* @param pVM The VM to operate on.
1230	* @param idCpu Virtual CPU to perform SIPI on
1231	* @param uVector SIPI vector
1232	*/
1233	DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1234	{
1235	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1236	VMCPU_ASSERT_EMT(pVCpu);
1237
1238	/** @todo what are we supposed to do if the processor is already running? */
1239	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1240	return VERR_ACCESS_DENIED;
1241
1242
1243	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1244
1245	pCtx->cs = uVector << 8;
1246	pCtx->csHid.u64Base = uVector << 12;
1247	pCtx->csHid.u32Limit = 0x0000ffff;
1248	pCtx->rip = 0;
1249
1250	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1251
1252	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1253	EMSetState(pVCpu, EMSTATE_HALTED);
1254	return VINF_EM_RESCHEDULE;
1255	# else /* And if we go the VMCPU::enmState way it can stay here. */
1256	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1257	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1258	return VINF_SUCCESS;
1259	# endif
1260	}
1261
1262	DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1263	{
1264	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1265	VMCPU_ASSERT_EMT(pVCpu);
1266
1267	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1268	CPUMR3ResetCpu(pVCpu);
1269	return VINF_EM_WAIT_SIPI;
1270	}
1271
1272	/**
1273	* Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1274	* and unhalting processor
1275	*
1276	* @param pVM The VM to operate on.
1277	* @param idCpu Virtual CPU to perform SIPI on
1278	* @param uVector SIPI vector
1279	*/
1280	VMMR3DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1281	{
1282	AssertReturnVoid(idCpu < pVM->cCPUs);
1283
1284	PVMREQ pReq;
1285	int rc = VMR3ReqCallU(pVM->pUVM, idCpu, &pReq, 0, VMREQFLAGS_NO_WAIT,
1286	(PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1287	AssertRC(rc);
1288	}
1289
1290	/**
1291	* Sends init IPI to the virtual CPU.
1292	*
1293	* @param pVM The VM to operate on.
1294	* @param idCpu Virtual CPU to perform int IPI on
1295	*/
1296	VMMR3DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1297	{
1298	AssertReturnVoid(idCpu < pVM->cCPUs);
1299
1300	PVMREQ pReq;
1301	int rc = VMR3ReqCallU(pVM->pUVM, idCpu, &pReq, 0, VMREQFLAGS_NO_WAIT,
1302	(PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1303	AssertRC(rc);
1304	}
1305
1306	/**
1307	* Registers the guest memory range that can be used for patching
1308	*
1309	* @returns VBox status code.
1310	* @param pVM The VM to operate on.
1311	* @param pPatchMem Patch memory range
1312	* @param cbPatchMem Size of the memory range
1313	*/
1314	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1315	{
1316	if (HWACCMIsEnabled(pVM))
1317	return HWACMMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1318
1319	return VERR_NOT_SUPPORTED;
1320	}
1321
1322	/**
1323	* Deregisters the guest memory range that can be used for patching
1324	*
1325	* @returns VBox status code.
1326	* @param pVM The VM to operate on.
1327	* @param pPatchMem Patch memory range
1328	* @param cbPatchMem Size of the memory range
1329	*/
1330	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1331	{
1332	if (HWACCMIsEnabled(pVM))
1333	return HWACMMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1334
1335	return VINF_SUCCESS;
1336	}
1337
1338
1339	/**
1340	* VCPU worker for VMMR3SynchronizeAllVCpus.
1341	*
1342	* @param pVM The VM to operate on.
1343	* @param idCpu Virtual CPU to perform SIPI on
1344	* @param uVector SIPI vector
1345	*/
1346	DECLCALLBACK(int) vmmR3SyncVCpu(PVM pVM)
1347	{
1348	/* Block until the job in the caller has finished. */
1349	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1350	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1351	return VINF_SUCCESS;
1352	}
1353
1354
1355	/**
1356	* Atomically execute a callback handler
1357	* Note: This is very expensive; avoid using it frequently!
1358	*
1359	* @param pVM The VM to operate on.
1360	* @param pfnHandler Callback handler
1361	* @param pvUser User specified parameter
1362	*
1363	* @thread EMT
1364	*/
1365	VMMR3DECL(int) VMMR3AtomicExecuteHandler(PVM pVM, PFNATOMICHANDLER pfnHandler, void *pvUser)
1366	{
1367	int rc;
1368	PVMCPU pVCpu = VMMGetCpu(pVM);
1369	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1370
1371	/* Shortcut for the uniprocessor case. */
1372	if (pVM->cCPUs == 1)
1373	return pfnHandler(pVM, pvUser);
1374
1375	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1376	for (VMCPUID idCpu = 0; idCpu < pVM->cCPUs; idCpu++)
1377	{
1378	if (idCpu != pVCpu->idCpu)
1379	{
1380	rc = VMR3ReqCallU(pVM->pUVM, idCpu, NULL, 0, VMREQFLAGS_NO_WAIT,
1381	(PFNRT)vmmR3SyncVCpu, 1, pVM);
1382	AssertRC(rc);
1383	}
1384	}
1385	/* Wait until all other VCPUs are waiting for us. */
1386	while (RTCritSectGetWaiters(&pVM->vmm.s.CritSectSync) != (int32_t)(pVM->cCPUs - 1))
1387	RTThreadSleep(1);
1388
1389	rc = pfnHandler(pVM, pvUser);
1390	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1391	return rc;
1392	}
1393
1394
1395	/**
1396	* Count returns and have the last non-caller EMT wake up the caller.
1397	*
1398	* @param pVM The VM handle.
1399	*/
1400	DECL_FORCE_INLINE(void) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1401	{
1402	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1403	if (cReturned == pVM->cCPUs - 1U)
1404	{
1405	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1406	AssertLogRelRC(rc);
1407	}
1408	}
1409
1410
1411	/**
1412	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1413	*
1414	* @param pVM The VM handle.
1415	* @param pVCpu The VMCPU structure for the calling EMT.
1416	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1417	* not.
1418	* @param fFlags The flags.
1419	* @param pfnRendezvous The callback.
1420	* @param pvUser The user argument for the callback.
1421	*/
1422	static void vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1423	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1424	{
1425	int rc;
1426
1427	/*
1428	* Enter, the last EMT triggers the next callback phase.
1429	*/
1430	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1431	if (cEntered != pVM->cCPUs)
1432	{
1433	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1434	{
1435	/* Wait for our turn. */
1436	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1437	AssertLogRelRC(rc);
1438	}
1439	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1440	{
1441	/* Wait for the last EMT to arrive and wake everyone up. */
1442	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1443	AssertLogRelRC(rc);
1444	}
1445	else
1446	{
1447	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1448
1449	/*
1450	* The execute once is handled specially to optimize the code flow.
1451	*
1452	* The last EMT to arrive will perform the callback and the other
1453	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1454	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1455	* returns, that EMT will initiate the normal return sequence.
1456	*/
1457	if (!fIsCaller)
1458	{
1459	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1460	AssertLogRelRC(rc);
1461
1462	vmmR3EmtRendezvousNonCallerReturn(pVM);
1463	}
1464	return;
1465	}
1466	}
1467	else
1468	{
1469	/*
1470	* All EMTs are waiting, clear the FF and take action according to the
1471	* execution method.
1472	*/
1473	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1474
1475	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1476	{
1477	/* Wake up everyone. */
1478	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1479	AssertLogRelRC(rc);
1480	}
1481	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1482	}
1483
1484
1485	/*
1486	* Do the callback and update the status if necessary.
1487	*/
1488	rc = pfnRendezvous(pVM, pVCpu, pvUser);
1489	if (rc != VINF_SUCCESS)
1490	{
1491	int32_t i32RendezvousStatus;
1492	do
1493	{
1494	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1495	if ( RT_FAILURE(i32RendezvousStatus)
1496	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1497	&& RT_SUCCESS(rc)))
1498	break;
1499	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, rc, i32RendezvousStatus));
1500	}
1501
1502	/*
1503	* Increment the done counter and take action depending on whether we're
1504	* the last to finish callback execution.
1505	*/
1506	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1507	if ( cDone != pVM->cCPUs
1508	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1509	{
1510	/* Signal the next EMT? */
1511	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1512	{
1513	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1514	AssertLogRelRC(rc);
1515	}
1516
1517	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1518	if (!fIsCaller)
1519	{
1520	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1521	AssertLogRelRC(rc);
1522	}
1523	}
1524	else
1525	{
1526	/* Callback execution is all done, tell the rest to return. */
1527	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1528	AssertLogRelRC(rc);
1529	}
1530
1531	if (!fIsCaller)
1532	vmmR3EmtRendezvousNonCallerReturn(pVM);
1533	}
1534
1535
1536	/**
1537	* Called in response to VM_FF_EMT_RENDEZVOUS.
1538	*
1539	* @param pVM The VM handle
1540	* @param pVCpu The handle of the calling EMT.
1541	*
1542	* @thread EMT
1543	*/
1544	VMMR3DECL(void) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1545	{
1546	vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1547	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1548	}
1549
1550
1551	/**
1552	* EMT rendezvous.
1553	*
1554	* Gathers all the EMTs and execute some code on each of them, either in a one
1555	* by one fashion or all at once.
1556	*
1557	* @returns VBox status code. This will be the first error or, if all succeed,
1558	* the first informational status code.
1559	* @retval VERR_VM_THREAD_NOT_EMT if the caller is not an EMT.
1560	*
1561	* @param pVM The VM handle.
1562	* @param fFlags Flags indicating execution methods. See
1563	* grp_VMMR3EmtRendezvous_fFlags.
1564	* @param pfnRendezvous The callback.
1565	* @param pvUser User argument for the callback.
1566	*
1567	* @thread EMT
1568	*/
1569	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1570	{
1571	/*
1572	* Validate input.
1573	*/
1574	PVMCPU pVCpu = VMMGetCpu(pVM);
1575	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1576	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1577	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1578
1579	int rc;
1580	if (pVM->cCPUs == 1)
1581	/*
1582	* Shortcut for the single EMT case.
1583	*/
1584	rc = pfnRendezvous(pVM, pVCpu, pvUser);
1585	else
1586	{
1587	/*
1588	* Spin lock. If busy, wait for the other EMT to finish while keeping a
1589	* lookout of the RENDEZVOUS FF.
1590	*/
1591	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1592	{
1593	if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1594	VMMR3EmtRendezvousFF(pVM, pVCpu);
1595	}
1596	Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1597
1598	/*
1599	* Clear the slate. This is a semaphore ping-pong orgy. :-)
1600	*/
1601	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1602	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1603	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1604	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1605	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1606	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1607	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1608	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1609	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1610	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1611	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1612
1613	/*
1614	* Set the FF and poke the other EMTs.
1615	*/
1616	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1617	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1618
1619	/*
1620	* Do the same ourselves.
1621	*/
1622	vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1623
1624	/*
1625	* The caller waits for the other EMTs to be done and return before doing
1626	* the cleanup. This makes away with wakeup / reset races we would otherwise
1627	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1628	*/
1629	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1630	AssertLogRelRC(rc);
1631
1632	/*
1633	* Get the return code and clean up a little bit.
1634	*/
1635	rc = pVM->vmm.s.i32RendezvousStatus;
1636	ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, NULL);
1637
1638	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1639	}
1640
1641	return rc;
1642	}
1643
1644
1645	/**
1646	* Read from the ring 0 jump buffer stack
1647	*
1648	* @returns VBox status code.
1649	*
1650	* @param pVM Pointer to the shared VM structure.
1651	* @param idCpu The ID of the source CPU context (for the address).
1652	* @param pAddress Where to start reading.
1653	* @param pvBuf Where to store the data we've read.
1654	* @param cbRead The number of bytes to read.
1655	*/
1656	VMMR3DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR pAddress, void *pvBuf, size_t cbRead)
1657	{
1658	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1659	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1660
1661	RTHCUINTPTR offset = pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - pAddress;
1662	if (offset >= pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack)
1663	return VERR_INVALID_POINTER;
1664
1665	memcpy(pvBuf, pVCpu->vmm.s.pbEMTStackR3 + pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - offset, cbRead);
1666	return VINF_SUCCESS;
1667	}
1668
1669
1670	/**
1671	* Calls a RC function.
1672	*
1673	* @param pVM The VM handle.
1674	* @param RCPtrEntry The address of the RC function.
1675	* @param cArgs The number of arguments in the ....
1676	* @param ... Arguments to the function.
1677	*/
1678	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1679	{
1680	va_list args;
1681	va_start(args, cArgs);
1682	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1683	va_end(args);
1684	return rc;
1685	}
1686
1687
1688	/**
1689	* Calls a RC function.
1690	*
1691	* @param pVM The VM handle.
1692	* @param RCPtrEntry The address of the RC function.
1693	* @param cArgs The number of arguments in the ....
1694	* @param args Arguments to the function.
1695	*/
1696	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1697	{
1698	/* Raw mode implies 1 VCPU. */
1699	AssertReturn(pVM->cCPUs == 1, VERR_RAW_MODE_INVALID_SMP);
1700	PVMCPU pVCpu = &pVM->aCpus[0];
1701
1702	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1703
1704	/*
1705	* Setup the call frame using the trampoline.
1706	*/
1707	CPUMHyperSetCtxCore(pVCpu, NULL);
1708	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1709	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32));
1710	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1711	int i = cArgs;
1712	while (i-- > 0)
1713	*pFrame++ = va_arg(args, RTGCUINTPTR32);
1714
1715	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1716	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1717	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
1718
1719	/*
1720	* We hide log flushes (outer) and hypervisor interrupts (inner).
1721	*/
1722	for (;;)
1723	{
1724	int rc;
1725	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1726	do
1727	{
1728	#ifdef NO_SUPCALLR0VMM
1729	rc = VERR_GENERAL_FAILURE;
1730	#else
1731	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1732	if (RT_LIKELY(rc == VINF_SUCCESS))
1733	rc = pVCpu->vmm.s.iLastGZRc;
1734	#endif
1735	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1736
1737	/*
1738	* Flush the logs.
1739	*/
1740	#ifdef LOG_ENABLED
1741	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1742	if ( pLogger
1743	&& pLogger->offScratch > 0)
1744	RTLogFlushRC(NULL, pLogger);
1745	#endif
1746	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1747	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1748	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1749	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1750	#endif
1751	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
1752	VMMR3FatalDump(pVM, pVCpu, rc);
1753	if (rc != VINF_VMM_CALL_HOST)
1754	{
1755	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1756	return rc;
1757	}
1758	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1759	if (RT_FAILURE(rc))
1760	return rc;
1761	}
1762	}
1763
1764
1765	/**
1766	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1767	*
1768	* @returns VBox status code.
1769	* @param pVM The VM to operate on.
1770	* @param uOperation Operation to execute.
1771	* @param u64Arg Constant argument.
1772	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1773	* details.
1774	*/
1775	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1776	{
1777	PVMCPU pVCpu = VMMGetCpu(pVM);
1778	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1779
1780	/*
1781	* Call Ring-0 entry with init code.
1782	*/
1783	int rc;
1784	for (;;)
1785	{
1786	#ifdef NO_SUPCALLR0VMM
1787	rc = VERR_GENERAL_FAILURE;
1788	#else
1789	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1790	#endif
1791	/*
1792	* Flush the logs.
1793	*/
1794	#ifdef LOG_ENABLED
1795	if ( pVCpu->vmm.s.pR0LoggerR3
1796	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1797	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
1798	#endif
1799	if (rc != VINF_VMM_CALL_HOST)
1800	break;
1801	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1802	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1803	break;
1804	/* Resume R0 */
1805	}
1806
1807	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| VBOX_FAILURE(rc),
1808	("uOperation=%u rc=%Rrc\n", uOperation, rc),
1809	VERR_INTERNAL_ERROR);
1810	return rc;
1811	}
1812
1813
1814	/**
1815	* Resumes executing hypervisor code when interrupted by a queue flush or a
1816	* debug event.
1817	*
1818	* @returns VBox status code.
1819	* @param pVM VM handle.
1820	* @param pVCpu VMCPU handle.
1821	*/
1822	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
1823	{
1824	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
1825	AssertReturn(pVM->cCPUs == 1, VERR_RAW_MODE_INVALID_SMP);
1826
1827	/*
1828	* We hide log flushes (outer) and hypervisor interrupts (inner).
1829	*/
1830	for (;;)
1831	{
1832	int rc;
1833	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1834	do
1835	{
1836	#ifdef NO_SUPCALLR0VMM
1837	rc = VERR_GENERAL_FAILURE;
1838	#else
1839	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1840	if (RT_LIKELY(rc == VINF_SUCCESS))
1841	rc = pVCpu->vmm.s.iLastGZRc;
1842	#endif
1843	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1844
1845	/*
1846	* Flush the loggers,
1847	*/
1848	#ifdef LOG_ENABLED
1849	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1850	if ( pLogger
1851	&& pLogger->offScratch > 0)
1852	RTLogFlushRC(NULL, pLogger);
1853	#endif
1854	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1855	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1856	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1857	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1858	#endif
1859	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
1860	VMMR3FatalDump(pVM, pVCpu, rc);
1861	if (rc != VINF_VMM_CALL_HOST)
1862	{
1863	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
1864	return rc;
1865	}
1866	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1867	if (RT_FAILURE(rc))
1868	return rc;
1869	}
1870	}
1871
1872
1873	/**
1874	* Service a call to the ring-3 host code.
1875	*
1876	* @returns VBox status code.
1877	* @param pVM VM handle.
1878	* @param pVCpu VMCPU handle
1879	* @remark Careful with critsects.
1880	*/
1881	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
1882	{
1883	/*
1884	* We must also check for pending critsect exits or else we can deadlock
1885	* when entering other critsects here.
1886	*/
1887	if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
1888	PDMCritSectFF(pVCpu);
1889
1890	switch (pVCpu->vmm.s.enmCallRing3Operation)
1891	{
1892	/*
1893	* Acquire the PDM lock.
1894	*/
1895	case VMMCALLRING3_PDM_LOCK:
1896	{
1897	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
1898	break;
1899	}
1900
1901	/*
1902	* Flush a PDM queue.
1903	*/
1904	case VMMCALLRING3_PDM_QUEUE_FLUSH:
1905	{
1906	PDMR3QueueFlushWorker(pVM, NULL);
1907	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
1908	break;
1909	}
1910
1911	/*
1912	* Grow the PGM pool.
1913	*/
1914	case VMMCALLRING3_PGM_POOL_GROW:
1915	{
1916	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
1917	break;
1918	}
1919
1920	/*
1921	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
1922	*/
1923	case VMMCALLRING3_PGM_MAP_CHUNK:
1924	{
1925	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
1926	break;
1927	}
1928
1929	/*
1930	* Allocates more handy pages.
1931	*/
1932	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
1933	{
1934	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
1935	break;
1936	}
1937
1938	/*
1939	* Acquire the PGM lock.
1940	*/
1941	case VMMCALLRING3_PGM_LOCK:
1942	{
1943	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
1944	break;
1945	}
1946
1947	/*
1948	* Acquire the MM hypervisor heap lock.
1949	*/
1950	case VMMCALLRING3_MMHYPER_LOCK:
1951	{
1952	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
1953	break;
1954	}
1955
1956	/*
1957	* Flush REM handler notifications.
1958	*/
1959	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
1960	{
1961	REMR3ReplayHandlerNotifications(pVM);
1962	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
1963	break;
1964	}
1965
1966	/*
1967	* This is a noop. We just take this route to avoid unnecessary
1968	* tests in the loops.
1969	*/
1970	case VMMCALLRING3_VMM_LOGGER_FLUSH:
1971	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
1972	LogAlways(("FLUSH\n"));
1973	break;
1974
1975	/*
1976	* Set the VM error message.
1977	*/
1978	case VMMCALLRING3_VM_SET_ERROR:
1979	VMR3SetErrorWorker(pVM);
1980	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
1981	break;
1982
1983	/*
1984	* Set the VM runtime error message.
1985	*/
1986	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
1987	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
1988	break;
1989
1990	/*
1991	* Signal a ring 0 hypervisor assertion.
1992	* Cancel the longjmp operation that's in progress.
1993	*/
1994	case VMMCALLRING3_VM_R0_ASSERTION:
1995	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
1996	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
1997	#ifdef RT_ARCH_X86
1998	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
1999	#else
2000	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2001	#endif
2002	LogRel((pVM->vmm.s.szRing0AssertMsg1));
2003	LogRel((pVM->vmm.s.szRing0AssertMsg2));
2004	return VERR_VMM_RING0_ASSERTION;
2005
2006	/*
2007	* A forced switch to ring 0 for preemption purposes.
2008	*/
2009	case VMMCALLRING3_VM_R0_PREEMPT:
2010	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2011	break;
2012
2013	default:
2014	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2015	return VERR_INTERNAL_ERROR;
2016	}
2017
2018	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2019	return VINF_SUCCESS;
2020	}
2021
2022
2023	/**
2024	* Displays the Force action Flags.
2025	*
2026	* @param pVM The VM handle.
2027	* @param pHlp The output helpers.
2028	* @param pszArgs The additional arguments (ignored).
2029	*/
2030	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2031	{
2032	int c;
2033	uint32_t f;
2034	#define PRINT_FLAG(prf,flag) do { \
2035	if (f & (prf##flag)) \
2036	{ \
2037	static const char *s_psz = #flag; \
2038	if (!(c % 6)) \
2039	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2040	else \
2041	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2042	c++; \
2043	f &= ~(prf##flag); \
2044	} \
2045	} while (0)
2046
2047	#define PRINT_GROUP(prf,grp,sfx) do { \
2048	if (f & (prf##grp##sfx)) \
2049	{ \
2050	static const char *s_psz = #grp; \
2051	if (!(c % 5)) \
2052	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2053	else \
2054	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2055	c++; \
2056	} \
2057	} while (0)
2058
2059	/*
2060	* The global flags.
2061	*/
2062	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2063	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2064
2065	/* show the flag mnemonics */
2066	c = 0;
2067	f = fGlobalForcedActions;
2068	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2069	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2070	PRINT_FLAG(VM_FF_,PDM_DMA);
2071	PRINT_FLAG(VM_FF_,DBGF);
2072	PRINT_FLAG(VM_FF_,REQUEST);
2073	PRINT_FLAG(VM_FF_,TERMINATE);
2074	PRINT_FLAG(VM_FF_,RESET);
2075	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2076	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2077	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2078	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2079	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2080	if (f)
2081	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2082	else
2083	pHlp->pfnPrintf(pHlp, "\n");
2084
2085	/* the groups */
2086	c = 0;
2087	f = fGlobalForcedActions;
2088	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2089	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2090	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2091	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2092	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2093	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2094	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2095	PRINT_GROUP(VM_FF_,ALL_BUT_RAW,_MASK);
2096	if (c)
2097	pHlp->pfnPrintf(pHlp, "\n");
2098
2099	/*
2100	* Per CPU flags.
2101	*/
2102	for (VMCPUID i = 0; i < pVM->cCPUs; i++)
2103	{
2104	const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2105	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2106
2107	/* show the flag mnemonics */
2108	c = 0;
2109	f = fLocalForcedActions;
2110	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2111	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2112	PRINT_FLAG(VMCPU_FF_,TIMER);
2113	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2114	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2115	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2116	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2117	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2118	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2119	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2120	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2121	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2122	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2123	PRINT_FLAG(VMCPU_FF_,TO_R3);
2124	if (f)
2125	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2126	else
2127	pHlp->pfnPrintf(pHlp, "\n");
2128
2129	/* the groups */
2130	c = 0;
2131	f = fLocalForcedActions;
2132	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2133	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2134	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2135	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2136	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2137	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2138	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2139	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2140	PRINT_GROUP(VMCPU_FF_,HWACCM_TO_R3,_MASK);
2141	PRINT_GROUP(VMCPU_FF_,ALL_BUT_RAW,_MASK);
2142	if (c)
2143	pHlp->pfnPrintf(pHlp, "\n");
2144	}
2145
2146	#undef PRINT_FLAG
2147	#undef PRINT_GROUP
2148	}
2149

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source: vbox/trunk/src/VBox/VMM/VMM.cpp@ 21653

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