VirtualBox

source: vbox/trunk/src/VBox/VMM/VMM.cpp@ 24323

Last change on this file since 24323 was 23801, checked in by vboxsync, 15 years ago

Main,VMM,Frontends,++: Teminology. Added a bind address for the (target) teleporter.

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1/* $Id: VMM.cpp 23801 2009-10-15 15:00:47Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22//#define NO_SUPCALLR0VMM
23
24/** @page pg_vmm VMM - The Virtual Machine Monitor
25 *
26 * The VMM component is two things at the moment, it's a component doing a few
27 * management and routing tasks, and it's the whole virtual machine monitor
28 * thing. For hysterical reasons, it is not doing all the management that one
29 * would expect, this is instead done by @ref pg_vm. We'll address this
30 * misdesign eventually.
31 *
32 * @see grp_vmm, grp_vm
33 *
34 *
35 * @section sec_vmmstate VMM State
36 *
37 * @image html VM_Statechart_Diagram.gif
38 *
39 * To be written.
40 *
41 *
42 * @subsection subsec_vmm_init VMM Initialization
43 *
44 * To be written.
45 *
46 *
47 * @subsection subsec_vmm_term VMM Termination
48 *
49 * To be written.
50 *
51 */
52
53/*******************************************************************************
54* Header Files *
55*******************************************************************************/
56#define LOG_GROUP LOG_GROUP_VMM
57#include <VBox/vmm.h>
58#include <VBox/vmapi.h>
59#include <VBox/pgm.h>
60#include <VBox/cfgm.h>
61#include <VBox/pdmqueue.h>
62#include <VBox/pdmcritsect.h>
63#include <VBox/pdmapi.h>
64#include <VBox/cpum.h>
65#include <VBox/mm.h>
66#include <VBox/iom.h>
67#include <VBox/trpm.h>
68#include <VBox/selm.h>
69#include <VBox/em.h>
70#include <VBox/sup.h>
71#include <VBox/dbgf.h>
72#include <VBox/csam.h>
73#include <VBox/patm.h>
74#include <VBox/rem.h>
75#include <VBox/ssm.h>
76#include <VBox/tm.h>
77#include "VMMInternal.h"
78#include "VMMSwitcher/VMMSwitcher.h"
79#include <VBox/vm.h>
80
81#include <VBox/err.h>
82#include <VBox/param.h>
83#include <VBox/version.h>
84#include <VBox/x86.h>
85#include <VBox/hwaccm.h>
86#include <iprt/assert.h>
87#include <iprt/alloc.h>
88#include <iprt/asm.h>
89#include <iprt/time.h>
90#include <iprt/semaphore.h>
91#include <iprt/stream.h>
92#include <iprt/string.h>
93#include <iprt/stdarg.h>
94#include <iprt/ctype.h>
95
96
97
98/*******************************************************************************
99* Defined Constants And Macros *
100*******************************************************************************/
101/** The saved state version. */
102#define VMM_SAVED_STATE_VERSION 4
103/** The saved state version used by v3.0 and earlier. (Teleportation) */
104#define VMM_SAVED_STATE_VERSION_3_0 3
105
106
107/*******************************************************************************
108* Internal Functions *
109*******************************************************************************/
110static int vmmR3InitStacks(PVM pVM);
111static int vmmR3InitLoggers(PVM pVM);
112static void vmmR3InitRegisterStats(PVM pVM);
113static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
114static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
115static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
116static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
117static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
118
119
120/**
121 * Initializes the VMM.
122 *
123 * @returns VBox status code.
124 * @param pVM The VM to operate on.
125 */
126VMMR3DECL(int) VMMR3Init(PVM pVM)
127{
128 LogFlow(("VMMR3Init\n"));
129
130 /*
131 * Assert alignment, sizes and order.
132 */
133 AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
134 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
135 AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
136
137 /*
138 * Init basic VM VMM members.
139 */
140 pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
141 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
142 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
143 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
144 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
145 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
146 int rc = CFGMR3QueryU32(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies);
147 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
148 pVM->vmm.s.cYieldEveryMillies = 23; /* Value arrived at after experimenting with the grub boot prompt. */
149 //pVM->vmm.s.cYieldEveryMillies = 8; //debugging
150 else
151 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
152
153 /*
154 * Initialize the VMM sync critical section and semaphores.
155 */
156 rc = RTCritSectInit(&pVM->vmm.s.CritSectSync);
157 AssertRCReturn(rc, rc);
158 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
159 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
160 return VERR_NO_MEMORY;
161 for (VMCPUID i = 0; i < pVM->cCpus; i++)
162 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
163 for (VMCPUID i = 0; i < pVM->cCpus; i++)
164 {
165 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
166 AssertRCReturn(rc, rc);
167 }
168 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
169 AssertRCReturn(rc, rc);
170 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
171 AssertRCReturn(rc, rc);
172 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
173 AssertRCReturn(rc, rc);
174 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
175 AssertRCReturn(rc, rc);
176
177 /* GC switchers are enabled by default. Turned off by HWACCM. */
178 pVM->vmm.s.fSwitcherDisabled = false;
179
180 /*
181 * Register the saved state data unit.
182 */
183 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
184 NULL, NULL, NULL,
185 NULL, vmmR3Save, NULL,
186 NULL, vmmR3Load, NULL);
187 if (RT_FAILURE(rc))
188 return rc;
189
190 /*
191 * Register the Ring-0 VM handle with the session for fast ioctl calls.
192 */
193 rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
194 if (RT_FAILURE(rc))
195 return rc;
196
197 /*
198 * Init various sub-components.
199 */
200 rc = vmmR3SwitcherInit(pVM);
201 if (RT_SUCCESS(rc))
202 {
203 rc = vmmR3InitStacks(pVM);
204 if (RT_SUCCESS(rc))
205 {
206 rc = vmmR3InitLoggers(pVM);
207
208#ifdef VBOX_WITH_NMI
209 /*
210 * Allocate mapping for the host APIC.
211 */
212 if (RT_SUCCESS(rc))
213 {
214 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
215 AssertRC(rc);
216 }
217#endif
218 if (RT_SUCCESS(rc))
219 {
220 /*
221 * Debug info and statistics.
222 */
223 DBGFR3InfoRegisterInternal(pVM, "ff", "Displays the current Forced actions Flags.", vmmR3InfoFF);
224 vmmR3InitRegisterStats(pVM);
225
226 return VINF_SUCCESS;
227 }
228 }
229 /** @todo: Need failure cleanup. */
230
231 //more todo in here?
232 //if (RT_SUCCESS(rc))
233 //{
234 //}
235 //int rc2 = vmmR3TermCoreCode(pVM);
236 //AssertRC(rc2));
237 }
238
239 return rc;
240}
241
242
243/**
244 * Allocate & setup the VMM RC stack(s) (for EMTs).
245 *
246 * The stacks are also used for long jumps in Ring-0.
247 *
248 * @returns VBox status code.
249 * @param pVM Pointer to the shared VM structure.
250 *
251 * @remarks The optional guard page gets it protection setup up during R3 init
252 * completion because of init order issues.
253 */
254static int vmmR3InitStacks(PVM pVM)
255{
256 int rc = VINF_SUCCESS;
257#ifdef VMM_R0_SWITCH_STACK
258 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
259#else
260 uint32_t fFlags = 0;
261#endif
262
263 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
264 {
265 PVMCPU pVCpu = &pVM->aCpus[idCpu];
266
267#ifdef VBOX_STRICT_VMM_STACK
268 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
269#else
270 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
271#endif
272 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
273 if (RT_SUCCESS(rc))
274 {
275#ifdef VBOX_STRICT_VMM_STACK
276 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
277#endif
278#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
279 /* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
280 if (!VMMIsHwVirtExtForced(pVM))
281 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
282 else
283#endif
284 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
285 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
286 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
287 AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
288
289 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
290 }
291 }
292
293 return rc;
294}
295
296
297/**
298 * Initialize the loggers.
299 *
300 * @returns VBox status code.
301 * @param pVM Pointer to the shared VM structure.
302 */
303static int vmmR3InitLoggers(PVM pVM)
304{
305 int rc;
306
307 /*
308 * Allocate RC & R0 Logger instances (they are finalized in the relocator).
309 */
310#ifdef LOG_ENABLED
311 PRTLOGGER pLogger = RTLogDefaultInstance();
312 if (pLogger)
313 {
314 pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
315 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
316 if (RT_FAILURE(rc))
317 return rc;
318 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
319
320# ifdef VBOX_WITH_R0_LOGGING
321 for (VMCPUID i = 0; i < pVM->cCpus; i++)
322 {
323 PVMCPU pVCpu = &pVM->aCpus[i];
324
325 rc = MMR3HyperAllocOnceNoRelEx(pVM, RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[pLogger->cGroups]),
326 0, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
327 (void **)&pVCpu->vmm.s.pR0LoggerR3);
328 if (RT_FAILURE(rc))
329 return rc;
330 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
331 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
332 pVCpu->vmm.s.pR0LoggerR3->cbLogger = RT_OFFSETOF(RTLOGGER, afGroups[pLogger->cGroups]);
333 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
334 }
335# endif
336 }
337#endif /* LOG_ENABLED */
338
339#ifdef VBOX_WITH_RC_RELEASE_LOGGING
340 /*
341 * Allocate RC release logger instances (finalized in the relocator).
342 */
343 PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
344 if (pRelLogger)
345 {
346 pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
347 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
348 if (RT_FAILURE(rc))
349 return rc;
350 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
351 }
352#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
353 return VINF_SUCCESS;
354}
355
356
357/**
358 * VMMR3Init worker that register the statistics with STAM.
359 *
360 * @param pVM The shared VM structure.
361 */
362static void vmmR3InitRegisterStats(PVM pVM)
363{
364 /*
365 * Statistics.
366 */
367 STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
368 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
369 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
370 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
371 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
372 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
373 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
374 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
375 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
376 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
377 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
378 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
379 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_READ returns.");
380 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_WRITE returns.");
381 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ returns.");
382 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_WRITE returns.");
383 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ_WRITE returns.");
384 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
385 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
386 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
387 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
388 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
389 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
390 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
391 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
392 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
393 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
394 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
395 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
396 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
397 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
398 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
399 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
400 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
401 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
402 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
403 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
404 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
405 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HWACCM_PATCH_TPR_INSTR returns.");
406 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
407 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
408 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMQueueFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMQueueFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_QUEUE_FLUSH calls.");
409 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
410 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
411 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
412 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
413 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
414 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
415 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
416 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
417
418#ifdef VBOX_WITH_STATISTICS
419 for (VMCPUID i = 0; i < pVM->cCpus; i++)
420 {
421 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
422 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
423 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
424 }
425#endif
426}
427
428
429/**
430 * Initializes the per-VCPU VMM.
431 *
432 * @returns VBox status code.
433 * @param pVM The VM to operate on.
434 */
435VMMR3DECL(int) VMMR3InitCPU(PVM pVM)
436{
437 LogFlow(("VMMR3InitCPU\n"));
438 return VINF_SUCCESS;
439}
440
441
442/**
443 * Ring-3 init finalizing.
444 *
445 * @returns VBox status code.
446 * @param pVM The VM handle.
447 */
448VMMR3DECL(int) VMMR3InitFinalize(PVM pVM)
449{
450 int rc = VINF_SUCCESS;
451
452 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
453 {
454 PVMCPU pVCpu = &pVM->aCpus[idCpu];
455
456#ifdef VBOX_STRICT_VMM_STACK
457 /*
458 * Two inaccessible pages at each sides of the stack to catch over/under-flows.
459 */
460 memset(pVCpu->vmm.s.pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
461 MMR3HyperSetGuard(pVM, pVCpu->vmm.s.pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /*fSet*/);
462
463 memset(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
464 MMR3HyperSetGuard(pVM, pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /*fSet*/);
465#endif
466
467 /*
468 * Set page attributes to r/w for stack pages.
469 */
470 rc = PGMMapSetPage(pVM, pVCpu->vmm.s.pbEMTStackRC, VMM_STACK_SIZE, X86_PTE_P | X86_PTE_A | X86_PTE_D | X86_PTE_RW);
471 AssertRC(rc);
472 if (RT_FAILURE(rc))
473 break;
474 }
475 if (RT_SUCCESS(rc))
476 {
477 /*
478 * Create the EMT yield timer.
479 */
480 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
481 if (RT_SUCCESS(rc))
482 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
483 }
484
485#ifdef VBOX_WITH_NMI
486 /*
487 * Map the host APIC into GC - This is AMD/Intel + Host OS specific!
488 */
489 if (RT_SUCCESS(rc))
490 rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
491 X86_PTE_P | X86_PTE_RW | X86_PTE_PWT | X86_PTE_PCD | X86_PTE_A | X86_PTE_D);
492#endif
493 return rc;
494}
495
496
497/**
498 * Initializes the R0 VMM.
499 *
500 * @returns VBox status code.
501 * @param pVM The VM to operate on.
502 */
503VMMR3DECL(int) VMMR3InitR0(PVM pVM)
504{
505 int rc;
506 PVMCPU pVCpu = VMMGetCpu(pVM);
507 Assert(pVCpu && pVCpu->idCpu == 0);
508
509#ifdef LOG_ENABLED
510 /*
511 * Initialize the ring-0 logger if we haven't done so yet.
512 */
513 if ( pVCpu->vmm.s.pR0LoggerR3
514 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
515 {
516 rc = VMMR3UpdateLoggers(pVM);
517 if (RT_FAILURE(rc))
518 return rc;
519 }
520#endif
521
522 /*
523 * Call Ring-0 entry with init code.
524 */
525 for (;;)
526 {
527#ifdef NO_SUPCALLR0VMM
528 //rc = VERR_GENERAL_FAILURE;
529 rc = VINF_SUCCESS;
530#else
531 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
532#endif
533 /*
534 * Flush the logs.
535 */
536#ifdef LOG_ENABLED
537 if ( pVCpu->vmm.s.pR0LoggerR3
538 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
539 RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
540#endif
541 if (rc != VINF_VMM_CALL_HOST)
542 break;
543 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
544 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
545 break;
546 /* Resume R0 */
547 }
548
549 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
550 {
551 LogRel(("R0 init failed, rc=%Rra\n", rc));
552 if (RT_SUCCESS(rc))
553 rc = VERR_INTERNAL_ERROR;
554 }
555 return rc;
556}
557
558
559/**
560 * Initializes the RC VMM.
561 *
562 * @returns VBox status code.
563 * @param pVM The VM to operate on.
564 */
565VMMR3DECL(int) VMMR3InitRC(PVM pVM)
566{
567 PVMCPU pVCpu = VMMGetCpu(pVM);
568 Assert(pVCpu && pVCpu->idCpu == 0);
569
570 /* In VMX mode, there's no need to init RC. */
571 if (pVM->vmm.s.fSwitcherDisabled)
572 return VINF_SUCCESS;
573
574 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
575
576 /*
577 * Call VMMGCInit():
578 * -# resolve the address.
579 * -# setup stackframe and EIP to use the trampoline.
580 * -# do a generic hypervisor call.
581 */
582 RTRCPTR RCPtrEP;
583 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
584 if (RT_SUCCESS(rc))
585 {
586 CPUMHyperSetCtxCore(pVCpu, NULL);
587 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
588 uint64_t u64TS = RTTimeProgramStartNanoTS();
589 CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
590 CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
591 CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
592 CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
593 CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
594 CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
595 CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
596 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
597 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
598
599 for (;;)
600 {
601#ifdef NO_SUPCALLR0VMM
602 //rc = VERR_GENERAL_FAILURE;
603 rc = VINF_SUCCESS;
604#else
605 rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
606#endif
607#ifdef LOG_ENABLED
608 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
609 if ( pLogger
610 && pLogger->offScratch > 0)
611 RTLogFlushRC(NULL, pLogger);
612#endif
613#ifdef VBOX_WITH_RC_RELEASE_LOGGING
614 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
615 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
616 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
617#endif
618 if (rc != VINF_VMM_CALL_HOST)
619 break;
620 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
621 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
622 break;
623 }
624
625 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
626 {
627 VMMR3FatalDump(pVM, pVCpu, rc);
628 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
629 rc = VERR_INTERNAL_ERROR;
630 }
631 AssertRC(rc);
632 }
633 return rc;
634}
635
636
637/**
638 * Terminate the VMM bits.
639 *
640 * @returns VINF_SUCCESS.
641 * @param pVM The VM handle.
642 */
643VMMR3DECL(int) VMMR3Term(PVM pVM)
644{
645 PVMCPU pVCpu = VMMGetCpu(pVM);
646 Assert(pVCpu && pVCpu->idCpu == 0);
647
648 /*
649 * Call Ring-0 entry with termination code.
650 */
651 int rc;
652 for (;;)
653 {
654#ifdef NO_SUPCALLR0VMM
655 //rc = VERR_GENERAL_FAILURE;
656 rc = VINF_SUCCESS;
657#else
658 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
659#endif
660 /*
661 * Flush the logs.
662 */
663#ifdef LOG_ENABLED
664 if ( pVCpu->vmm.s.pR0LoggerR3
665 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
666 RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
667#endif
668 if (rc != VINF_VMM_CALL_HOST)
669 break;
670 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
671 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
672 break;
673 /* Resume R0 */
674 }
675 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
676 {
677 LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
678 if (RT_SUCCESS(rc))
679 rc = VERR_INTERNAL_ERROR;
680 }
681
682 RTCritSectDelete(&pVM->vmm.s.CritSectSync);
683 for (VMCPUID i = 0; i < pVM->cCpus; i++)
684 {
685 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
686 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
687 }
688 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
689 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
690 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
691 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
692 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
693 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
694 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
695 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
696
697#ifdef VBOX_STRICT_VMM_STACK
698 /*
699 * Make the two stack guard pages present again.
700 */
701 for (VMCPUID i = 0; i < pVM->cCpus; i++)
702 {
703 MMR3HyperSetGuard(pVM, pVM->aCpus[i].vmm.s.pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /*fSet*/);
704 MMR3HyperSetGuard(pVM, pVM->aCpus[i].vmm.s.pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /*fSet*/);
705 }
706#endif
707 return rc;
708}
709
710
711/**
712 * Terminates the per-VCPU VMM.
713 *
714 * Termination means cleaning up and freeing all resources,
715 * the VM it self is at this point powered off or suspended.
716 *
717 * @returns VBox status code.
718 * @param pVM The VM to operate on.
719 */
720VMMR3DECL(int) VMMR3TermCPU(PVM pVM)
721{
722 return VINF_SUCCESS;
723}
724
725
726/**
727 * Applies relocations to data and code managed by this
728 * component. This function will be called at init and
729 * whenever the VMM need to relocate it self inside the GC.
730 *
731 * The VMM will need to apply relocations to the core code.
732 *
733 * @param pVM The VM handle.
734 * @param offDelta The relocation delta.
735 */
736VMMR3DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
737{
738 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
739
740 /*
741 * Recalc the RC address.
742 */
743 pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
744
745 /*
746 * The stack.
747 */
748 for (VMCPUID i = 0; i < pVM->cCpus; i++)
749 {
750 PVMCPU pVCpu = &pVM->aCpus[i];
751
752 CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
753
754 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
755 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
756 }
757
758 /*
759 * All the switchers.
760 */
761 vmmR3SwitcherRelocate(pVM, offDelta);
762
763 /*
764 * Get other RC entry points.
765 */
766 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
767 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
768
769 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
770 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
771
772 /*
773 * Update the logger.
774 */
775 VMMR3UpdateLoggers(pVM);
776}
777
778
779/**
780 * Updates the settings for the RC and R0 loggers.
781 *
782 * @returns VBox status code.
783 * @param pVM The VM handle.
784 */
785VMMR3DECL(int) VMMR3UpdateLoggers(PVM pVM)
786{
787 /*
788 * Simply clone the logger instance (for RC).
789 */
790 int rc = VINF_SUCCESS;
791 RTRCPTR RCPtrLoggerFlush = 0;
792
793 if (pVM->vmm.s.pRCLoggerR3
794#ifdef VBOX_WITH_RC_RELEASE_LOGGING
795 || pVM->vmm.s.pRCRelLoggerR3
796#endif
797 )
798 {
799 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
800 AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
801 }
802
803 if (pVM->vmm.s.pRCLoggerR3)
804 {
805 RTRCPTR RCPtrLoggerWrapper = 0;
806 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
807 AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
808
809 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
810 rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
811 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
812 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
813 }
814
815#ifdef VBOX_WITH_RC_RELEASE_LOGGING
816 if (pVM->vmm.s.pRCRelLoggerR3)
817 {
818 RTRCPTR RCPtrLoggerWrapper = 0;
819 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
820 AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
821
822 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
823 rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
824 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
825 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
826 }
827#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
828
829#ifdef LOG_ENABLED
830 /*
831 * For the ring-0 EMT logger, we use a per-thread logger instance
832 * in ring-0. Only initialize it once.
833 */
834 for (VMCPUID i = 0; i < pVM->cCpus; i++)
835 {
836 PVMCPU pVCpu = &pVM->aCpus[i];
837 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
838 if (pR0LoggerR3)
839 {
840 if (!pR0LoggerR3->fCreated)
841 {
842 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
843 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
844 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
845
846 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
847 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
848 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
849
850 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
851 *(PFNRTLOGGER *)&pfnLoggerWrapper, *(PFNRTLOGFLUSH *)&pfnLoggerFlush,
852 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
853 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
854
855 RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
856 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
857 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
858 rc = RTLogSetCustomPrefixCallback(&pR0LoggerR3->Logger, *(PFNRTLOGPREFIX *)&pfnLoggerPrefix, NULL);
859 AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
860
861 pR0LoggerR3->idCpu = i;
862 pR0LoggerR3->fCreated = true;
863 pR0LoggerR3->fFlushingDisabled = false;
864
865 }
866
867 rc = RTLogCopyGroupsAndFlags(&pR0LoggerR3->Logger, NULL /* default */, pVM->vmm.s.pRCLoggerR3->fFlags, RTLOGFLAGS_BUFFERED);
868 AssertRC(rc);
869 }
870 }
871#endif
872 return rc;
873}
874
875
876/**
877 * Gets the pointer to a buffer containing the R0/RC AssertMsg1 output.
878 *
879 * @returns Pointer to the buffer.
880 * @param pVM The VM handle.
881 */
882VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
883{
884 if (HWACCMIsEnabled(pVM))
885 return pVM->vmm.s.szRing0AssertMsg1;
886
887 RTRCPTR RCPtr;
888 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
889 if (RT_SUCCESS(rc))
890 return (const char *)MMHyperRCToR3(pVM, RCPtr);
891
892 return NULL;
893}
894
895
896/**
897 * Gets the pointer to a buffer containing the R0/RC AssertMsg2 output.
898 *
899 * @returns Pointer to the buffer.
900 * @param pVM The VM handle.
901 */
902VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
903{
904 if (HWACCMIsEnabled(pVM))
905 return pVM->vmm.s.szRing0AssertMsg2;
906
907 RTRCPTR RCPtr;
908 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
909 if (RT_SUCCESS(rc))
910 return (const char *)MMHyperRCToR3(pVM, RCPtr);
911
912 return NULL;
913}
914
915
916/**
917 * Execute state save operation.
918 *
919 * @returns VBox status code.
920 * @param pVM VM Handle.
921 * @param pSSM SSM operation handle.
922 */
923static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
924{
925 LogFlow(("vmmR3Save:\n"));
926
927 /*
928 * Save the started/stopped state of all CPUs except 0 as it will always
929 * be running. This avoids breaking the saved state version. :-)
930 */
931 for (VMCPUID i = 1; i < pVM->cCpus; i++)
932 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
933
934 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
935}
936
937
938/**
939 * Execute state load operation.
940 *
941 * @returns VBox status code.
942 * @param pVM VM Handle.
943 * @param pSSM SSM operation handle.
944 * @param uVersion Data layout version.
945 * @param uPass The data pass.
946 */
947static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
948{
949 LogFlow(("vmmR3Load:\n"));
950 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
951
952 /*
953 * Validate version.
954 */
955 if ( uVersion != VMM_SAVED_STATE_VERSION
956 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
957 {
958 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
959 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
960 }
961
962 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
963 {
964 /* Ignore the stack bottom, stack pointer and stack bits. */
965 RTRCPTR RCPtrIgnored;
966 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
967 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
968 SSMR3Skip(pSSM, VMM_STACK_SIZE);
969 }
970
971 /*
972 * Restore the VMCPU states. VCPU 0 is always started.
973 */
974 VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
975 for (VMCPUID i = 1; i < pVM->cCpus; i++)
976 {
977 bool fStarted;
978 int rc = SSMR3GetBool(pSSM, &fStarted);
979 if (RT_FAILURE(rc))
980 return rc;
981 VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
982 }
983
984 /* terminator */
985 uint32_t u32;
986 int rc = SSMR3GetU32(pSSM, &u32);
987 if (RT_FAILURE(rc))
988 return rc;
989 if (u32 != UINT32_MAX)
990 {
991 AssertMsgFailed(("u32=%#x\n", u32));
992 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
993 }
994 return VINF_SUCCESS;
995}
996
997
998/**
999 * Resolve a builtin RC symbol.
1000 *
1001 * Called by PDM when loading or relocating RC modules.
1002 *
1003 * @returns VBox status
1004 * @param pVM VM Handle.
1005 * @param pszSymbol Symbol to resolv
1006 * @param pRCPtrValue Where to store the symbol value.
1007 *
1008 * @remark This has to work before VMMR3Relocate() is called.
1009 */
1010VMMR3DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1011{
1012 if (!strcmp(pszSymbol, "g_Logger"))
1013 {
1014 if (pVM->vmm.s.pRCLoggerR3)
1015 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1016 *pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1017 }
1018 else if (!strcmp(pszSymbol, "g_RelLogger"))
1019 {
1020#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1021 if (pVM->vmm.s.pRCRelLoggerR3)
1022 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1023 *pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1024#else
1025 *pRCPtrValue = NIL_RTRCPTR;
1026#endif
1027 }
1028 else
1029 return VERR_SYMBOL_NOT_FOUND;
1030 return VINF_SUCCESS;
1031}
1032
1033
1034/**
1035 * Suspends the CPU yielder.
1036 *
1037 * @param pVM The VM handle.
1038 */
1039VMMR3DECL(void) VMMR3YieldSuspend(PVM pVM)
1040{
1041 VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1042 if (!pVM->vmm.s.cYieldResumeMillies)
1043 {
1044 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1045 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1046 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1047 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1048 else
1049 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1050 TMTimerStop(pVM->vmm.s.pYieldTimer);
1051 }
1052 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1053}
1054
1055
1056/**
1057 * Stops the CPU yielder.
1058 *
1059 * @param pVM The VM handle.
1060 */
1061VMMR3DECL(void) VMMR3YieldStop(PVM pVM)
1062{
1063 if (!pVM->vmm.s.cYieldResumeMillies)
1064 TMTimerStop(pVM->vmm.s.pYieldTimer);
1065 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1066 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1067}
1068
1069
1070/**
1071 * Resumes the CPU yielder when it has been a suspended or stopped.
1072 *
1073 * @param pVM The VM handle.
1074 */
1075VMMR3DECL(void) VMMR3YieldResume(PVM pVM)
1076{
1077 if (pVM->vmm.s.cYieldResumeMillies)
1078 {
1079 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1080 pVM->vmm.s.cYieldResumeMillies = 0;
1081 }
1082}
1083
1084
1085/**
1086 * Internal timer callback function.
1087 *
1088 * @param pVM The VM.
1089 * @param pTimer The timer handle.
1090 * @param pvUser User argument specified upon timer creation.
1091 */
1092static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1093{
1094 /*
1095 * This really needs some careful tuning. While we shouldn't be too greedy since
1096 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1097 * because that'll cause us to stop up.
1098 *
1099 * The current logic is to use the default interval when there is no lag worth
1100 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1101 *
1102 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1103 * so the lag is up to date.)
1104 */
1105 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1106 if ( u64Lag < 50000000 /* 50ms */
1107 || ( u64Lag < 1000000000 /* 1s */
1108 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1109 )
1110 {
1111 uint64_t u64Elapsed = RTTimeNanoTS();
1112 pVM->vmm.s.u64LastYield = u64Elapsed;
1113
1114 RTThreadYield();
1115
1116#ifdef LOG_ENABLED
1117 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1118 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1119#endif
1120 }
1121 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1122}
1123
1124
1125/**
1126 * Executes guest code in the raw-mode context.
1127 *
1128 * @param pVM VM handle.
1129 * @param pVCpu The VMCPU to operate on.
1130 */
1131VMMR3DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1132{
1133 Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1134
1135 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1136
1137 /*
1138 * Set the EIP and ESP.
1139 */
1140 CPUMSetHyperEIP(pVCpu, CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1141 ? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1142 : pVM->vmm.s.pfnCPUMRCResumeGuest);
1143 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
1144
1145 /*
1146 * We hide log flushes (outer) and hypervisor interrupts (inner).
1147 */
1148 for (;;)
1149 {
1150#ifdef VBOX_STRICT
1151 if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) || CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1152 EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1153 PGMMapCheck(pVM);
1154#endif
1155 int rc;
1156 do
1157 {
1158#ifdef NO_SUPCALLR0VMM
1159 rc = VERR_GENERAL_FAILURE;
1160#else
1161 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1162 if (RT_LIKELY(rc == VINF_SUCCESS))
1163 rc = pVCpu->vmm.s.iLastGZRc;
1164#endif
1165 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1166
1167 /*
1168 * Flush the logs.
1169 */
1170#ifdef LOG_ENABLED
1171 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1172 if ( pLogger
1173 && pLogger->offScratch > 0)
1174 RTLogFlushRC(NULL, pLogger);
1175#endif
1176#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1177 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1178 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1179 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1180#endif
1181 if (rc != VINF_VMM_CALL_HOST)
1182 {
1183 Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1184 return rc;
1185 }
1186 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1187 if (RT_FAILURE(rc))
1188 return rc;
1189 /* Resume GC */
1190 }
1191}
1192
1193
1194/**
1195 * Executes guest code (Intel VT-x and AMD-V).
1196 *
1197 * @param pVM VM handle.
1198 * @param pVCpu The VMCPU to operate on.
1199 */
1200VMMR3DECL(int) VMMR3HwAccRunGC(PVM pVM, PVMCPU pVCpu)
1201{
1202 Log2(("VMMR3HwAccRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1203
1204 for (;;)
1205 {
1206 int rc;
1207 do
1208 {
1209#ifdef NO_SUPCALLR0VMM
1210 rc = VERR_GENERAL_FAILURE;
1211#else
1212 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HWACC_RUN, pVCpu->idCpu);
1213 if (RT_LIKELY(rc == VINF_SUCCESS))
1214 rc = pVCpu->vmm.s.iLastGZRc;
1215#endif
1216 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1217
1218#ifdef LOG_ENABLED
1219 /*
1220 * Flush the log
1221 */
1222 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1223 if ( pR0LoggerR3
1224 && pR0LoggerR3->Logger.offScratch > 0)
1225 RTLogFlushToLogger(&pR0LoggerR3->Logger, NULL);
1226#endif /* !LOG_ENABLED */
1227 if (rc != VINF_VMM_CALL_HOST)
1228 {
1229 Log2(("VMMR3HwAccRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1230 return rc;
1231 }
1232 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1233 if (RT_FAILURE(rc))
1234 return rc;
1235 /* Resume R0 */
1236 }
1237}
1238
1239/**
1240 * VCPU worker for VMMSendSipi.
1241 *
1242 * @param pVM The VM to operate on.
1243 * @param idCpu Virtual CPU to perform SIPI on
1244 * @param uVector SIPI vector
1245 */
1246DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1247{
1248 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1249 VMCPU_ASSERT_EMT(pVCpu);
1250
1251 /** @todo what are we supposed to do if the processor is already running? */
1252 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1253 return VERR_ACCESS_DENIED;
1254
1255
1256 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1257
1258 pCtx->cs = uVector << 8;
1259 pCtx->csHid.u64Base = uVector << 12;
1260 pCtx->csHid.u32Limit = 0x0000ffff;
1261 pCtx->rip = 0;
1262
1263 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1264
1265# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1266 EMSetState(pVCpu, EMSTATE_HALTED);
1267 return VINF_EM_RESCHEDULE;
1268# else /* And if we go the VMCPU::enmState way it can stay here. */
1269 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1270 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1271 return VINF_SUCCESS;
1272# endif
1273}
1274
1275DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1276{
1277 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1278 VMCPU_ASSERT_EMT(pVCpu);
1279
1280 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1281 CPUMR3ResetCpu(pVCpu);
1282 return VINF_EM_WAIT_SIPI;
1283}
1284
1285/**
1286 * Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1287 * and unhalting processor
1288 *
1289 * @param pVM The VM to operate on.
1290 * @param idCpu Virtual CPU to perform SIPI on
1291 * @param uVector SIPI vector
1292 */
1293VMMR3DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1294{
1295 AssertReturnVoid(idCpu < pVM->cCpus);
1296
1297 int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1298 AssertRC(rc);
1299}
1300
1301/**
1302 * Sends init IPI to the virtual CPU.
1303 *
1304 * @param pVM The VM to operate on.
1305 * @param idCpu Virtual CPU to perform int IPI on
1306 */
1307VMMR3DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1308{
1309 AssertReturnVoid(idCpu < pVM->cCpus);
1310
1311 int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1312 AssertRC(rc);
1313}
1314
1315/**
1316 * Registers the guest memory range that can be used for patching
1317 *
1318 * @returns VBox status code.
1319 * @param pVM The VM to operate on.
1320 * @param pPatchMem Patch memory range
1321 * @param cbPatchMem Size of the memory range
1322 */
1323VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1324{
1325 if (HWACCMIsEnabled(pVM))
1326 return HWACMMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1327
1328 return VERR_NOT_SUPPORTED;
1329}
1330
1331/**
1332 * Deregisters the guest memory range that can be used for patching
1333 *
1334 * @returns VBox status code.
1335 * @param pVM The VM to operate on.
1336 * @param pPatchMem Patch memory range
1337 * @param cbPatchMem Size of the memory range
1338 */
1339VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1340{
1341 if (HWACCMIsEnabled(pVM))
1342 return HWACMMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1343
1344 return VINF_SUCCESS;
1345}
1346
1347
1348/**
1349 * VCPU worker for VMMR3SynchronizeAllVCpus.
1350 *
1351 * @param pVM The VM to operate on.
1352 * @param idCpu Virtual CPU to perform SIPI on
1353 * @param uVector SIPI vector
1354 */
1355DECLCALLBACK(int) vmmR3SyncVCpu(PVM pVM)
1356{
1357 /* Block until the job in the caller has finished. */
1358 RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1359 RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1360 return VINF_SUCCESS;
1361}
1362
1363
1364/**
1365 * Atomically execute a callback handler
1366 * Note: This is very expensive; avoid using it frequently!
1367 *
1368 * @param pVM The VM to operate on.
1369 * @param pfnHandler Callback handler
1370 * @param pvUser User specified parameter
1371 *
1372 * @thread EMT
1373 */
1374VMMR3DECL(int) VMMR3AtomicExecuteHandler(PVM pVM, PFNATOMICHANDLER pfnHandler, void *pvUser)
1375{
1376 int rc;
1377 PVMCPU pVCpu = VMMGetCpu(pVM);
1378 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1379
1380 /* Shortcut for the uniprocessor case. */
1381 if (pVM->cCpus == 1)
1382 return pfnHandler(pVM, pvUser);
1383
1384 RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1385 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
1386 {
1387 if (idCpu != pVCpu->idCpu)
1388 {
1389 rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SyncVCpu, 1, pVM);
1390 AssertRC(rc);
1391 }
1392 }
1393 /* Wait until all other VCPUs are waiting for us. */
1394 while (RTCritSectGetWaiters(&pVM->vmm.s.CritSectSync) != (int32_t)(pVM->cCpus - 1))
1395 RTThreadSleep(1);
1396
1397 rc = pfnHandler(pVM, pvUser);
1398 RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1399 return rc;
1400}
1401
1402
1403/**
1404 * Count returns and have the last non-caller EMT wake up the caller.
1405 *
1406 * @returns VBox strict informational status code for EM scheduling. No failures
1407 * will be returned here, those are for the caller only.
1408 *
1409 * @param pVM The VM handle.
1410 */
1411DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1412{
1413 int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1414 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1415 if (cReturned == pVM->cCpus - 1U)
1416 {
1417 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1418 AssertLogRelRC(rc);
1419 }
1420
1421 AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1422 || (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1423 ("%Rrc\n", rcRet),
1424 VERR_IPE_UNEXPECTED_INFO_STATUS);
1425 return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1426}
1427
1428
1429/**
1430 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1431 *
1432 * @returns VBox strict informational status code for EM scheduling. No failures
1433 * will be returned here, those are for the caller only. When
1434 * fIsCaller is set, VINF_SUCESS is always returned.
1435 *
1436 * @param pVM The VM handle.
1437 * @param pVCpu The VMCPU structure for the calling EMT.
1438 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1439 * not.
1440 * @param fFlags The flags.
1441 * @param pfnRendezvous The callback.
1442 * @param pvUser The user argument for the callback.
1443 */
1444static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1445 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1446{
1447 int rc;
1448
1449 /*
1450 * Enter, the last EMT triggers the next callback phase.
1451 */
1452 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1453 if (cEntered != pVM->cCpus)
1454 {
1455 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1456 {
1457 /* Wait for our turn. */
1458 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1459 AssertLogRelRC(rc);
1460 }
1461 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1462 {
1463 /* Wait for the last EMT to arrive and wake everyone up. */
1464 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1465 AssertLogRelRC(rc);
1466 }
1467 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1468 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1469 {
1470 /* Wait for our turn. */
1471 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1472 AssertLogRelRC(rc);
1473 }
1474 else
1475 {
1476 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1477
1478 /*
1479 * The execute once is handled specially to optimize the code flow.
1480 *
1481 * The last EMT to arrive will perform the callback and the other
1482 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1483 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1484 * returns, that EMT will initiate the normal return sequence.
1485 */
1486 if (!fIsCaller)
1487 {
1488 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1489 AssertLogRelRC(rc);
1490
1491 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1492 }
1493 return VINF_SUCCESS;
1494 }
1495 }
1496 else
1497 {
1498 /*
1499 * All EMTs are waiting, clear the FF and take action according to the
1500 * execution method.
1501 */
1502 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1503
1504 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1505 {
1506 /* Wake up everyone. */
1507 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1508 AssertLogRelRC(rc);
1509 }
1510 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1511 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1512 {
1513 /* Figure out who to wake up and wake it up. If it's ourself, then
1514 it's easy otherwise wait for our turn. */
1515 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1516 ? 0
1517 : pVM->cCpus - 1U;
1518 if (pVCpu->idCpu != iFirst)
1519 {
1520 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1521 AssertLogRelRC(rc);
1522 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1523 AssertLogRelRC(rc);
1524 }
1525 }
1526 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1527 }
1528
1529
1530 /*
1531 * Do the callback and update the status if necessary.
1532 */
1533 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1534 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1535 {
1536 VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1537 if (rcStrict != VINF_SUCCESS)
1538 {
1539 AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1540 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1541 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1542 int32_t i32RendezvousStatus;
1543 do
1544 {
1545 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1546 if ( rcStrict == i32RendezvousStatus
1547 || RT_FAILURE(i32RendezvousStatus)
1548 || ( i32RendezvousStatus != VINF_SUCCESS
1549 && rcStrict > i32RendezvousStatus))
1550 break;
1551 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1552 }
1553 }
1554
1555 /*
1556 * Increment the done counter and take action depending on whether we're
1557 * the last to finish callback execution.
1558 */
1559 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1560 if ( cDone != pVM->cCpus
1561 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1562 {
1563 /* Signal the next EMT? */
1564 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1565 {
1566 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1567 AssertLogRelRC(rc);
1568 }
1569 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1570 {
1571 Assert(cDone == pVCpu->idCpu + 1U);
1572 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1573 AssertLogRelRC(rc);
1574 }
1575 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1576 {
1577 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1578 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1579 AssertLogRelRC(rc);
1580 }
1581
1582 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1583 if (!fIsCaller)
1584 {
1585 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1586 AssertLogRelRC(rc);
1587 }
1588 }
1589 else
1590 {
1591 /* Callback execution is all done, tell the rest to return. */
1592 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1593 AssertLogRelRC(rc);
1594 }
1595
1596 if (!fIsCaller)
1597 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1598 return VINF_SUCCESS;
1599}
1600
1601
1602/**
1603 * Called in response to VM_FF_EMT_RENDEZVOUS.
1604 *
1605 * @returns VBox strict status code - EM scheduling. No errors will be returned
1606 * here, nor will any non-EM scheduling status codes be returned.
1607 *
1608 * @param pVM The VM handle
1609 * @param pVCpu The handle of the calling EMT.
1610 *
1611 * @thread EMT
1612 */
1613VMMR3DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1614{
1615 return vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1616 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1617}
1618
1619
1620/**
1621 * EMT rendezvous.
1622 *
1623 * Gathers all the EMTs and execute some code on each of them, either in a one
1624 * by one fashion or all at once.
1625 *
1626 * @returns VBox strict status code. This will be the the first error,
1627 * VINF_SUCCESS, or an EM scheduling status code.
1628 *
1629 * @param pVM The VM handle.
1630 * @param fFlags Flags indicating execution methods. See
1631 * grp_VMMR3EmtRendezvous_fFlags.
1632 * @param pfnRendezvous The callback.
1633 * @param pvUser User argument for the callback.
1634 *
1635 * @thread Any.
1636 */
1637VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1638{
1639 /*
1640 * Validate input.
1641 */
1642 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1643 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1644 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1645 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1646 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1647 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1648 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1649
1650 VBOXSTRICTRC rcStrict;
1651 PVMCPU pVCpu = VMMGetCpu(pVM);
1652 if (!pVCpu)
1653 /*
1654 * Forward the request to an EMT thread.
1655 */
1656 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1657 (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1658 else if (pVM->cCpus == 1)
1659 /*
1660 * Shortcut for the single EMT case.
1661 */
1662 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1663 else
1664 {
1665 /*
1666 * Spin lock. If busy, wait for the other EMT to finish while keeping a
1667 * lookout of the RENDEZVOUS FF.
1668 */
1669 int rc;
1670 rcStrict = VINF_SUCCESS;
1671 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1672 {
1673 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1674 {
1675 if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1676 {
1677 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1678 if ( rc != VINF_SUCCESS
1679 && ( rcStrict == VINF_SUCCESS
1680 || rcStrict > rc))
1681 rcStrict = rc;
1682 /** @todo Perhaps deal with termination here? */
1683 }
1684 ASMNopPause();
1685 }
1686 }
1687 Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1688
1689 /*
1690 * Clear the slate. This is a semaphore ping-pong orgy. :-)
1691 */
1692 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1693 {
1694 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1695 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1696 }
1697 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1698 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1699 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1700 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1701 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1702 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1703 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1704 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1705 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1706 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1707 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1708
1709 /*
1710 * Set the FF and poke the other EMTs.
1711 */
1712 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1713 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1714
1715 /*
1716 * Do the same ourselves.
1717 */
1718 vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1719
1720 /*
1721 * The caller waits for the other EMTs to be done and return before doing
1722 * the cleanup. This makes away with wakeup / reset races we would otherwise
1723 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1724 */
1725 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1726 AssertLogRelRC(rc);
1727
1728 /*
1729 * Get the return code and clean up a little bit.
1730 */
1731 int rcMy = pVM->vmm.s.i32RendezvousStatus;
1732 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, NULL);
1733
1734 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1735
1736 /*
1737 * Merge rcStrict and rcMy.
1738 */
1739 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1740 if ( rcMy != VINF_SUCCESS
1741 && ( rcStrict == VINF_SUCCESS
1742 || rcStrict > rcMy))
1743 rcStrict = rcMy;
1744 }
1745
1746 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1747 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1748 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1749 VERR_IPE_UNEXPECTED_INFO_STATUS);
1750 return VBOXSTRICTRC_VAL(rcStrict);
1751}
1752
1753
1754/**
1755 * Read from the ring 0 jump buffer stack
1756 *
1757 * @returns VBox status code.
1758 *
1759 * @param pVM Pointer to the shared VM structure.
1760 * @param idCpu The ID of the source CPU context (for the address).
1761 * @param pAddress Where to start reading.
1762 * @param pvBuf Where to store the data we've read.
1763 * @param cbRead The number of bytes to read.
1764 */
1765VMMR3DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR pAddress, void *pvBuf, size_t cbRead)
1766{
1767 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1768 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1769
1770 RTHCUINTPTR offset = pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - pAddress;
1771 if (offset >= pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack)
1772 return VERR_INVALID_POINTER;
1773
1774 memcpy(pvBuf, pVCpu->vmm.s.pbEMTStackR3 + pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - offset, cbRead);
1775 return VINF_SUCCESS;
1776}
1777
1778
1779/**
1780 * Calls a RC function.
1781 *
1782 * @param pVM The VM handle.
1783 * @param RCPtrEntry The address of the RC function.
1784 * @param cArgs The number of arguments in the ....
1785 * @param ... Arguments to the function.
1786 */
1787VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1788{
1789 va_list args;
1790 va_start(args, cArgs);
1791 int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1792 va_end(args);
1793 return rc;
1794}
1795
1796
1797/**
1798 * Calls a RC function.
1799 *
1800 * @param pVM The VM handle.
1801 * @param RCPtrEntry The address of the RC function.
1802 * @param cArgs The number of arguments in the ....
1803 * @param args Arguments to the function.
1804 */
1805VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1806{
1807 /* Raw mode implies 1 VCPU. */
1808 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1809 PVMCPU pVCpu = &pVM->aCpus[0];
1810
1811 Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1812
1813 /*
1814 * Setup the call frame using the trampoline.
1815 */
1816 CPUMHyperSetCtxCore(pVCpu, NULL);
1817 memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1818 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32));
1819 PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1820 int i = cArgs;
1821 while (i-- > 0)
1822 *pFrame++ = va_arg(args, RTGCUINTPTR32);
1823
1824 CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1825 CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1826 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
1827
1828 /*
1829 * We hide log flushes (outer) and hypervisor interrupts (inner).
1830 */
1831 for (;;)
1832 {
1833 int rc;
1834 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1835 do
1836 {
1837#ifdef NO_SUPCALLR0VMM
1838 rc = VERR_GENERAL_FAILURE;
1839#else
1840 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1841 if (RT_LIKELY(rc == VINF_SUCCESS))
1842 rc = pVCpu->vmm.s.iLastGZRc;
1843#endif
1844 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1845
1846 /*
1847 * Flush the logs.
1848 */
1849#ifdef LOG_ENABLED
1850 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1851 if ( pLogger
1852 && pLogger->offScratch > 0)
1853 RTLogFlushRC(NULL, pLogger);
1854#endif
1855#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1856 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1857 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1858 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1859#endif
1860 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
1861 VMMR3FatalDump(pVM, pVCpu, rc);
1862 if (rc != VINF_VMM_CALL_HOST)
1863 {
1864 Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1865 return rc;
1866 }
1867 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1868 if (RT_FAILURE(rc))
1869 return rc;
1870 }
1871}
1872
1873
1874/**
1875 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1876 *
1877 * @returns VBox status code.
1878 * @param pVM The VM to operate on.
1879 * @param uOperation Operation to execute.
1880 * @param u64Arg Constant argument.
1881 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1882 * details.
1883 */
1884VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1885{
1886 PVMCPU pVCpu = VMMGetCpu(pVM);
1887 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1888
1889 /*
1890 * Call Ring-0 entry with init code.
1891 */
1892 int rc;
1893 for (;;)
1894 {
1895#ifdef NO_SUPCALLR0VMM
1896 rc = VERR_GENERAL_FAILURE;
1897#else
1898 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1899#endif
1900 /*
1901 * Flush the logs.
1902 */
1903#ifdef LOG_ENABLED
1904 if ( pVCpu->vmm.s.pR0LoggerR3
1905 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1906 RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
1907#endif
1908 if (rc != VINF_VMM_CALL_HOST)
1909 break;
1910 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1911 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1912 break;
1913 /* Resume R0 */
1914 }
1915
1916 AssertLogRelMsgReturn(rc == VINF_SUCCESS || VBOX_FAILURE(rc),
1917 ("uOperation=%u rc=%Rrc\n", uOperation, rc),
1918 VERR_INTERNAL_ERROR);
1919 return rc;
1920}
1921
1922
1923/**
1924 * Resumes executing hypervisor code when interrupted by a queue flush or a
1925 * debug event.
1926 *
1927 * @returns VBox status code.
1928 * @param pVM VM handle.
1929 * @param pVCpu VMCPU handle.
1930 */
1931VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
1932{
1933 Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
1934 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1935
1936 /*
1937 * We hide log flushes (outer) and hypervisor interrupts (inner).
1938 */
1939 for (;;)
1940 {
1941 int rc;
1942 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1943 do
1944 {
1945#ifdef NO_SUPCALLR0VMM
1946 rc = VERR_GENERAL_FAILURE;
1947#else
1948 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1949 if (RT_LIKELY(rc == VINF_SUCCESS))
1950 rc = pVCpu->vmm.s.iLastGZRc;
1951#endif
1952 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1953
1954 /*
1955 * Flush the loggers,
1956 */
1957#ifdef LOG_ENABLED
1958 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1959 if ( pLogger
1960 && pLogger->offScratch > 0)
1961 RTLogFlushRC(NULL, pLogger);
1962#endif
1963#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1964 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1965 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1966 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1967#endif
1968 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
1969 VMMR3FatalDump(pVM, pVCpu, rc);
1970 if (rc != VINF_VMM_CALL_HOST)
1971 {
1972 Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
1973 return rc;
1974 }
1975 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1976 if (RT_FAILURE(rc))
1977 return rc;
1978 }
1979}
1980
1981
1982/**
1983 * Service a call to the ring-3 host code.
1984 *
1985 * @returns VBox status code.
1986 * @param pVM VM handle.
1987 * @param pVCpu VMCPU handle
1988 * @remark Careful with critsects.
1989 */
1990static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
1991{
1992 /*
1993 * We must also check for pending critsect exits or else we can deadlock
1994 * when entering other critsects here.
1995 */
1996 if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
1997 PDMCritSectFF(pVCpu);
1998
1999 switch (pVCpu->vmm.s.enmCallRing3Operation)
2000 {
2001 /*
2002 * Acquire the PDM lock.
2003 */
2004 case VMMCALLRING3_PDM_LOCK:
2005 {
2006 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2007 break;
2008 }
2009
2010 /*
2011 * Flush a PDM queue.
2012 */
2013 case VMMCALLRING3_PDM_QUEUE_FLUSH:
2014 {
2015 PDMR3QueueFlushWorker(pVM, NULL);
2016 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2017 break;
2018 }
2019
2020 /*
2021 * Grow the PGM pool.
2022 */
2023 case VMMCALLRING3_PGM_POOL_GROW:
2024 {
2025 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2026 break;
2027 }
2028
2029 /*
2030 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2031 */
2032 case VMMCALLRING3_PGM_MAP_CHUNK:
2033 {
2034 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2035 break;
2036 }
2037
2038 /*
2039 * Allocates more handy pages.
2040 */
2041 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2042 {
2043 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2044 break;
2045 }
2046
2047 /*
2048 * Acquire the PGM lock.
2049 */
2050 case VMMCALLRING3_PGM_LOCK:
2051 {
2052 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2053 break;
2054 }
2055
2056 /*
2057 * Acquire the MM hypervisor heap lock.
2058 */
2059 case VMMCALLRING3_MMHYPER_LOCK:
2060 {
2061 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2062 break;
2063 }
2064
2065 /*
2066 * Flush REM handler notifications.
2067 */
2068 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2069 {
2070 REMR3ReplayHandlerNotifications(pVM);
2071 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2072 break;
2073 }
2074
2075 /*
2076 * This is a noop. We just take this route to avoid unnecessary
2077 * tests in the loops.
2078 */
2079 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2080 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2081 LogAlways(("*FLUSH*\n"));
2082 break;
2083
2084 /*
2085 * Set the VM error message.
2086 */
2087 case VMMCALLRING3_VM_SET_ERROR:
2088 VMR3SetErrorWorker(pVM);
2089 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2090 break;
2091
2092 /*
2093 * Set the VM runtime error message.
2094 */
2095 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2096 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2097 break;
2098
2099 /*
2100 * Signal a ring 0 hypervisor assertion.
2101 * Cancel the longjmp operation that's in progress.
2102 */
2103 case VMMCALLRING3_VM_R0_ASSERTION:
2104 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2105 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2106#ifdef RT_ARCH_X86
2107 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2108#else
2109 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2110#endif
2111 LogRel((pVM->vmm.s.szRing0AssertMsg1));
2112 LogRel((pVM->vmm.s.szRing0AssertMsg2));
2113 return VERR_VMM_RING0_ASSERTION;
2114
2115 /*
2116 * A forced switch to ring 0 for preemption purposes.
2117 */
2118 case VMMCALLRING3_VM_R0_PREEMPT:
2119 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2120 break;
2121
2122 default:
2123 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2124 return VERR_INTERNAL_ERROR;
2125 }
2126
2127 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2128 return VINF_SUCCESS;
2129}
2130
2131
2132/**
2133 * Displays the Force action Flags.
2134 *
2135 * @param pVM The VM handle.
2136 * @param pHlp The output helpers.
2137 * @param pszArgs The additional arguments (ignored).
2138 */
2139static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2140{
2141 int c;
2142 uint32_t f;
2143#define PRINT_FLAG(prf,flag) do { \
2144 if (f & (prf##flag)) \
2145 { \
2146 static const char *s_psz = #flag; \
2147 if (!(c % 6)) \
2148 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2149 else \
2150 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2151 c++; \
2152 f &= ~(prf##flag); \
2153 } \
2154 } while (0)
2155
2156#define PRINT_GROUP(prf,grp,sfx) do { \
2157 if (f & (prf##grp##sfx)) \
2158 { \
2159 static const char *s_psz = #grp; \
2160 if (!(c % 5)) \
2161 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2162 else \
2163 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2164 c++; \
2165 } \
2166 } while (0)
2167
2168 /*
2169 * The global flags.
2170 */
2171 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2172 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2173
2174 /* show the flag mnemonics */
2175 c = 0;
2176 f = fGlobalForcedActions;
2177 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2178 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2179 PRINT_FLAG(VM_FF_,PDM_DMA);
2180 PRINT_FLAG(VM_FF_,DBGF);
2181 PRINT_FLAG(VM_FF_,REQUEST);
2182 PRINT_FLAG(VM_FF_,TERMINATE);
2183 PRINT_FLAG(VM_FF_,RESET);
2184 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2185 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2186 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2187 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2188 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2189 if (f)
2190 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2191 else
2192 pHlp->pfnPrintf(pHlp, "\n");
2193
2194 /* the groups */
2195 c = 0;
2196 f = fGlobalForcedActions;
2197 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2198 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2199 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2200 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2201 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2202 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2203 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2204 PRINT_GROUP(VM_FF_,ALL_BUT_RAW,_MASK);
2205 if (c)
2206 pHlp->pfnPrintf(pHlp, "\n");
2207
2208 /*
2209 * Per CPU flags.
2210 */
2211 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2212 {
2213 const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2214 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2215
2216 /* show the flag mnemonics */
2217 c = 0;
2218 f = fLocalForcedActions;
2219 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2220 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2221 PRINT_FLAG(VMCPU_FF_,TIMER);
2222 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2223 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2224 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2225 PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2226 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2227 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2228 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2229 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2230 PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2231 PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2232 PRINT_FLAG(VMCPU_FF_,TO_R3);
2233 if (f)
2234 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2235 else
2236 pHlp->pfnPrintf(pHlp, "\n");
2237
2238 /* the groups */
2239 c = 0;
2240 f = fLocalForcedActions;
2241 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2242 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2243 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2244 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2245 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2246 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2247 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2248 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2249 PRINT_GROUP(VMCPU_FF_,HWACCM_TO_R3,_MASK);
2250 PRINT_GROUP(VMCPU_FF_,ALL_BUT_RAW,_MASK);
2251 if (c)
2252 pHlp->pfnPrintf(pHlp, "\n");
2253 }
2254
2255#undef PRINT_FLAG
2256#undef PRINT_GROUP
2257}
2258
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