VMM.cpp@ 30660

Last change on this file since 30660 was 30473, checked in by vboxsync, 14 years ago
VMM: First shot at the fatal error misbehavior (PAE).
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 80.9 KB

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1	/* $Id: VMM.cpp 30473 2010-06-28 15:45:22Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually.
27	*
28	* @see grp_vmm, grp_vm
29	*
30	*
31	* @section sec_vmmstate VMM State
32	*
33	* @image html VM_Statechart_Diagram.gif
34	*
35	* To be written.
36	*
37	*
38	* @subsection subsec_vmm_init VMM Initialization
39	*
40	* To be written.
41	*
42	*
43	* @subsection subsec_vmm_term VMM Termination
44	*
45	* To be written.
46	*
47	*/
48
49	/*******************************************************************************
50	* Header Files *
51	*******************************************************************************/
52	#define LOG_GROUP LOG_GROUP_VMM
53	#include <VBox/vmm.h>
54	#include <VBox/vmapi.h>
55	#include <VBox/pgm.h>
56	#include <VBox/cfgm.h>
57	#include <VBox/pdmqueue.h>
58	#include <VBox/pdmcritsect.h>
59	#include <VBox/pdmapi.h>
60	#include <VBox/cpum.h>
61	#include <VBox/mm.h>
62	#include <VBox/iom.h>
63	#include <VBox/trpm.h>
64	#include <VBox/selm.h>
65	#include <VBox/em.h>
66	#include <VBox/sup.h>
67	#include <VBox/dbgf.h>
68	#include <VBox/csam.h>
69	#include <VBox/patm.h>
70	#include <VBox/rem.h>
71	#include <VBox/ssm.h>
72	#include <VBox/tm.h>
73	#include "VMMInternal.h"
74	#include "VMMSwitcher/VMMSwitcher.h"
75	#include <VBox/vm.h>
76
77	#include <VBox/err.h>
78	#include <VBox/param.h>
79	#include <VBox/version.h>
80	#include <VBox/x86.h>
81	#include <VBox/hwaccm.h>
82	#include <iprt/assert.h>
83	#include <iprt/alloc.h>
84	#include <iprt/asm.h>
85	#include <iprt/time.h>
86	#include <iprt/semaphore.h>
87	#include <iprt/stream.h>
88	#include <iprt/string.h>
89	#include <iprt/stdarg.h>
90	#include <iprt/ctype.h>
91
92
93
94	/*******************************************************************************
95	* Defined Constants And Macros *
96	*******************************************************************************/
97	/** The saved state version. */
98	#define VMM_SAVED_STATE_VERSION 4
99	/** The saved state version used by v3.0 and earlier. (Teleportation) */
100	#define VMM_SAVED_STATE_VERSION_3_0 3
101
102
103	/*******************************************************************************
104	* Internal Functions *
105	*******************************************************************************/
106	static int vmmR3InitStacks(PVM pVM);
107	static int vmmR3InitLoggers(PVM pVM);
108	static void vmmR3InitRegisterStats(PVM pVM);
109	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
110	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
111	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
112	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
113	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
114
115
116	/**
117	* Initializes the VMM.
118	*
119	* @returns VBox status code.
120	* @param pVM The VM to operate on.
121	*/
122	VMMR3DECL(int) VMMR3Init(PVM pVM)
123	{
124	LogFlow(("VMMR3Init\n"));
125
126	/*
127	* Assert alignment, sizes and order.
128	*/
129	AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
130	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
131	AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
132
133	/*
134	* Init basic VM VMM members.
135	*/
136	pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
137	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
138	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
139	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
140	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
141	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
142	int rc = CFGMR3QueryU32(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies);
143	if (rc == VERR_CFGM_VALUE_NOT_FOUND)
144	pVM->vmm.s.cYieldEveryMillies = 23; /* Value arrived at after experimenting with the grub boot prompt. */
145	//pVM->vmm.s.cYieldEveryMillies = 8; //debugging
146	else
147	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
148
149	/*
150	* Initialize the VMM sync critical section and semaphores.
151	*/
152	rc = RTCritSectInit(&pVM->vmm.s.CritSectSync);
153	AssertRCReturn(rc, rc);
154	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
155	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
156	return VERR_NO_MEMORY;
157	for (VMCPUID i = 0; i < pVM->cCpus; i++)
158	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
159	for (VMCPUID i = 0; i < pVM->cCpus; i++)
160	{
161	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
162	AssertRCReturn(rc, rc);
163	}
164	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
165	AssertRCReturn(rc, rc);
166	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
167	AssertRCReturn(rc, rc);
168	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
169	AssertRCReturn(rc, rc);
170	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
171	AssertRCReturn(rc, rc);
172
173	/* GC switchers are enabled by default. Turned off by HWACCM. */
174	pVM->vmm.s.fSwitcherDisabled = false;
175
176	/*
177	* Register the saved state data unit.
178	*/
179	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
180	NULL, NULL, NULL,
181	NULL, vmmR3Save, NULL,
182	NULL, vmmR3Load, NULL);
183	if (RT_FAILURE(rc))
184	return rc;
185
186	/*
187	* Register the Ring-0 VM handle with the session for fast ioctl calls.
188	*/
189	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
190	if (RT_FAILURE(rc))
191	return rc;
192
193	/*
194	* Init various sub-components.
195	*/
196	rc = vmmR3SwitcherInit(pVM);
197	if (RT_SUCCESS(rc))
198	{
199	rc = vmmR3InitStacks(pVM);
200	if (RT_SUCCESS(rc))
201	{
202	rc = vmmR3InitLoggers(pVM);
203
204	#ifdef VBOX_WITH_NMI
205	/*
206	* Allocate mapping for the host APIC.
207	*/
208	if (RT_SUCCESS(rc))
209	{
210	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
211	AssertRC(rc);
212	}
213	#endif
214	if (RT_SUCCESS(rc))
215	{
216	/*
217	* Debug info and statistics.
218	*/
219	DBGFR3InfoRegisterInternal(pVM, "ff", "Displays the current Forced actions Flags.", vmmR3InfoFF);
220	vmmR3InitRegisterStats(pVM);
221
222	return VINF_SUCCESS;
223	}
224	}
225	/** @todo: Need failure cleanup. */
226
227	//more todo in here?
228	//if (RT_SUCCESS(rc))
229	//{
230	//}
231	//int rc2 = vmmR3TermCoreCode(pVM);
232	//AssertRC(rc2));
233	}
234
235	return rc;
236	}
237
238
239	/**
240	* Allocate & setup the VMM RC stack(s) (for EMTs).
241	*
242	* The stacks are also used for long jumps in Ring-0.
243	*
244	* @returns VBox status code.
245	* @param pVM Pointer to the shared VM structure.
246	*
247	* @remarks The optional guard page gets it protection setup up during R3 init
248	* completion because of init order issues.
249	*/
250	static int vmmR3InitStacks(PVM pVM)
251	{
252	int rc = VINF_SUCCESS;
253	#ifdef VMM_R0_SWITCH_STACK
254	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
255	#else
256	uint32_t fFlags = 0;
257	#endif
258
259	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
260	{
261	PVMCPU pVCpu = &pVM->aCpus[idCpu];
262
263	#ifdef VBOX_STRICT_VMM_STACK
264	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
265	#else
266	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
267	#endif
268	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
269	if (RT_SUCCESS(rc))
270	{
271	#ifdef VBOX_STRICT_VMM_STACK
272	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
273	#endif
274	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
275	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
276	if (!VMMIsHwVirtExtForced(pVM))
277	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
278	else
279	#endif
280	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
281	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
282	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
283	AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
284
285	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
286	}
287	}
288
289	return rc;
290	}
291
292
293	/**
294	* Initialize the loggers.
295	*
296	* @returns VBox status code.
297	* @param pVM Pointer to the shared VM structure.
298	*/
299	static int vmmR3InitLoggers(PVM pVM)
300	{
301	int rc;
302
303	/*
304	* Allocate RC & R0 Logger instances (they are finalized in the relocator).
305	*/
306	#ifdef LOG_ENABLED
307	PRTLOGGER pLogger = RTLogDefaultInstance();
308	if (pLogger)
309	{
310	pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
311	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
312	if (RT_FAILURE(rc))
313	return rc;
314	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
315
316	# ifdef VBOX_WITH_R0_LOGGING
317	for (VMCPUID i = 0; i < pVM->cCpus; i++)
318	{
319	PVMCPU pVCpu = &pVM->aCpus[i];
320
321	rc = MMR3HyperAllocOnceNoRelEx(pVM, RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[pLogger->cGroups]),
322	0, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
323	(void **)&pVCpu->vmm.s.pR0LoggerR3);
324	if (RT_FAILURE(rc))
325	return rc;
326	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
327	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
328	pVCpu->vmm.s.pR0LoggerR3->cbLogger = RT_OFFSETOF(RTLOGGER, afGroups[pLogger->cGroups]);
329	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
330	}
331	# endif
332	}
333	#endif /* LOG_ENABLED */
334
335	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
336	/*
337	* Allocate RC release logger instances (finalized in the relocator).
338	*/
339	PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
340	if (pRelLogger)
341	{
342	pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
343	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
344	if (RT_FAILURE(rc))
345	return rc;
346	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
347	}
348	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
349	return VINF_SUCCESS;
350	}
351
352
353	/**
354	* VMMR3Init worker that register the statistics with STAM.
355	*
356	* @param pVM The shared VM structure.
357	*/
358	static void vmmR3InitRegisterStats(PVM pVM)
359	{
360	/*
361	* Statistics.
362	*/
363	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
364	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
365	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
366	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
367	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
368	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
369	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
370	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
371	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
372	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
373	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
374	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
375	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_READ returns.");
376	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_WRITE returns.");
377	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ returns.");
378	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_WRITE returns.");
379	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ_WRITE returns.");
380	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
381	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
382	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
383	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
384	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
385	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
386	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
387	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
388	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
389	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
390	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
391	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
392	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
393	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
394	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
395	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
396	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
397	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
398	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
399	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
400	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
401	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
402	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HWACCM_PATCH_TPR_INSTR returns.");
403	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
404	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
405	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
406	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
407	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
408	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
409	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
410	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
411	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
412	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
413
414	#ifdef VBOX_WITH_STATISTICS
415	for (VMCPUID i = 0; i < pVM->cCpus; i++)
416	{
417	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
418	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
419	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
420	}
421	#endif
422	}
423
424
425	/**
426	* Initializes the per-VCPU VMM.
427	*
428	* @returns VBox status code.
429	* @param pVM The VM to operate on.
430	*/
431	VMMR3DECL(int) VMMR3InitCPU(PVM pVM)
432	{
433	LogFlow(("VMMR3InitCPU\n"));
434	return VINF_SUCCESS;
435	}
436
437
438	/**
439	* Ring-3 init finalizing.
440	*
441	* @returns VBox status code.
442	* @param pVM The VM handle.
443	*/
444	VMMR3DECL(int) VMMR3InitFinalize(PVM pVM)
445	{
446	int rc;
447
448	/*
449	* Set page attributes to r/w for stack pages.
450	*/
451	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
452	{
453	rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
454	X86_PTE_P \| X86_PTE_A \| X86_PTE_D \| X86_PTE_RW);
455	AssertRCReturn(rc, rc);
456	}
457
458	/*
459	* Create the EMT yield timer.
460	*/
461	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
462	AssertRCReturn(rc, rc);
463
464	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
465	AssertRCReturn(rc, rc);
466
467	#ifdef VBOX_WITH_NMI
468	/*
469	* Map the host APIC into GC - This is AMD/Intel + Host OS specific!
470	*/
471	rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
472	X86_PTE_P \| X86_PTE_RW \| X86_PTE_PWT \| X86_PTE_PCD \| X86_PTE_A \| X86_PTE_D);
473	AssertRCReturn(rc, rc);
474	#endif
475
476	#ifdef VBOX_STRICT_VMM_STACK
477	/*
478	* Setup the stack guard pages: Two inaccessible pages at each sides of the
479	* stack to catch over/under-flows.
480	*/
481	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
482	{
483	uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
484
485	memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
486	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /fSet/);
487
488	memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
489	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /fSet/);
490	}
491	pVM->vmm.s.fStackGuardsStationed = true;
492	#endif
493
494	return VINF_SUCCESS;
495	}
496
497
498	/**
499	* Initializes the R0 VMM.
500	*
501	* @returns VBox status code.
502	* @param pVM The VM to operate on.
503	*/
504	VMMR3DECL(int) VMMR3InitR0(PVM pVM)
505	{
506	int rc;
507	PVMCPU pVCpu = VMMGetCpu(pVM);
508	Assert(pVCpu && pVCpu->idCpu == 0);
509
510	#ifdef LOG_ENABLED
511	/*
512	* Initialize the ring-0 logger if we haven't done so yet.
513	*/
514	if ( pVCpu->vmm.s.pR0LoggerR3
515	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
516	{
517	rc = VMMR3UpdateLoggers(pVM);
518	if (RT_FAILURE(rc))
519	return rc;
520	}
521	#endif
522
523	/*
524	* Call Ring-0 entry with init code.
525	*/
526	for (;;)
527	{
528	#ifdef NO_SUPCALLR0VMM
529	//rc = VERR_GENERAL_FAILURE;
530	rc = VINF_SUCCESS;
531	#else
532	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
533	#endif
534	/*
535	* Flush the logs.
536	*/
537	#ifdef LOG_ENABLED
538	if ( pVCpu->vmm.s.pR0LoggerR3
539	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
540	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
541	#endif
542	if (rc != VINF_VMM_CALL_HOST)
543	break;
544	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
545	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
546	break;
547	/* Resume R0 */
548	}
549
550	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
551	{
552	LogRel(("R0 init failed, rc=%Rra\n", rc));
553	if (RT_SUCCESS(rc))
554	rc = VERR_INTERNAL_ERROR;
555	}
556	return rc;
557	}
558
559
560	/**
561	* Initializes the RC VMM.
562	*
563	* @returns VBox status code.
564	* @param pVM The VM to operate on.
565	*/
566	VMMR3DECL(int) VMMR3InitRC(PVM pVM)
567	{
568	PVMCPU pVCpu = VMMGetCpu(pVM);
569	Assert(pVCpu && pVCpu->idCpu == 0);
570
571	/* In VMX mode, there's no need to init RC. */
572	if (pVM->vmm.s.fSwitcherDisabled)
573	return VINF_SUCCESS;
574
575	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
576
577	/*
578	* Call VMMGCInit():
579	* -# resolve the address.
580	* -# setup stackframe and EIP to use the trampoline.
581	* -# do a generic hypervisor call.
582	*/
583	RTRCPTR RCPtrEP;
584	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
585	if (RT_SUCCESS(rc))
586	{
587	CPUMHyperSetCtxCore(pVCpu, NULL);
588	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
589	uint64_t u64TS = RTTimeProgramStartNanoTS();
590	CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
591	CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
592	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
593	CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
594	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
595	CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
596	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
597	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
598	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
599
600	for (;;)
601	{
602	#ifdef NO_SUPCALLR0VMM
603	//rc = VERR_GENERAL_FAILURE;
604	rc = VINF_SUCCESS;
605	#else
606	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
607	#endif
608	#ifdef LOG_ENABLED
609	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
610	if ( pLogger
611	&& pLogger->offScratch > 0)
612	RTLogFlushRC(NULL, pLogger);
613	#endif
614	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
615	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
616	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
617	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
618	#endif
619	if (rc != VINF_VMM_CALL_HOST)
620	break;
621	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
622	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
623	break;
624	}
625
626	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
627	{
628	VMMR3FatalDump(pVM, pVCpu, rc);
629	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
630	rc = VERR_INTERNAL_ERROR;
631	}
632	AssertRC(rc);
633	}
634	return rc;
635	}
636
637
638	/**
639	* Terminate the VMM bits.
640	*
641	* @returns VINF_SUCCESS.
642	* @param pVM The VM handle.
643	*/
644	VMMR3DECL(int) VMMR3Term(PVM pVM)
645	{
646	PVMCPU pVCpu = VMMGetCpu(pVM);
647	Assert(pVCpu && pVCpu->idCpu == 0);
648
649	/*
650	* Call Ring-0 entry with termination code.
651	*/
652	int rc;
653	for (;;)
654	{
655	#ifdef NO_SUPCALLR0VMM
656	//rc = VERR_GENERAL_FAILURE;
657	rc = VINF_SUCCESS;
658	#else
659	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
660	#endif
661	/*
662	* Flush the logs.
663	*/
664	#ifdef LOG_ENABLED
665	if ( pVCpu->vmm.s.pR0LoggerR3
666	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
667	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
668	#endif
669	if (rc != VINF_VMM_CALL_HOST)
670	break;
671	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
672	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
673	break;
674	/* Resume R0 */
675	}
676	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
677	{
678	LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
679	if (RT_SUCCESS(rc))
680	rc = VERR_INTERNAL_ERROR;
681	}
682
683	RTCritSectDelete(&pVM->vmm.s.CritSectSync);
684	for (VMCPUID i = 0; i < pVM->cCpus; i++)
685	{
686	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
687	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
688	}
689	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
690	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
691	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
692	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
693	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
694	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
695	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
696	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
697
698	#ifdef VBOX_STRICT_VMM_STACK
699	/*
700	* Make the two stack guard pages present again.
701	*/
702	if (pVM->vmm.s.fStackGuardsStationed)
703	{
704	for (VMCPUID i = 0; i < pVM->cCpus; i++)
705	{
706	uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
707	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /fSet/);
708	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /fSet/);
709	}
710	pVM->vmm.s.fStackGuardsStationed = false;
711	}
712	#endif
713	return rc;
714	}
715
716
717	/**
718	* Terminates the per-VCPU VMM.
719	*
720	* Termination means cleaning up and freeing all resources,
721	* the VM it self is at this point powered off or suspended.
722	*
723	* @returns VBox status code.
724	* @param pVM The VM to operate on.
725	*/
726	VMMR3DECL(int) VMMR3TermCPU(PVM pVM)
727	{
728	return VINF_SUCCESS;
729	}
730
731
732	/**
733	* Applies relocations to data and code managed by this
734	* component. This function will be called at init and
735	* whenever the VMM need to relocate it self inside the GC.
736	*
737	* The VMM will need to apply relocations to the core code.
738	*
739	* @param pVM The VM handle.
740	* @param offDelta The relocation delta.
741	*/
742	VMMR3DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
743	{
744	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
745
746	/*
747	* Recalc the RC address.
748	*/
749	#ifdef VBOX_WITH_RAW_MODE
750	pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
751	#endif
752
753	/*
754	* The stack.
755	*/
756	for (VMCPUID i = 0; i < pVM->cCpus; i++)
757	{
758	PVMCPU pVCpu = &pVM->aCpus[i];
759
760	CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
761
762	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
763	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
764	}
765
766	/*
767	* All the switchers.
768	*/
769	vmmR3SwitcherRelocate(pVM, offDelta);
770
771	/*
772	* Get other RC entry points.
773	*/
774	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
775	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
776
777	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
778	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
779
780	/*
781	* Update the logger.
782	*/
783	VMMR3UpdateLoggers(pVM);
784	}
785
786
787	/**
788	* Updates the settings for the RC and R0 loggers.
789	*
790	* @returns VBox status code.
791	* @param pVM The VM handle.
792	*/
793	VMMR3DECL(int) VMMR3UpdateLoggers(PVM pVM)
794	{
795	/*
796	* Simply clone the logger instance (for RC).
797	*/
798	int rc = VINF_SUCCESS;
799	RTRCPTR RCPtrLoggerFlush = 0;
800
801	if (pVM->vmm.s.pRCLoggerR3
802	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
803	\|\| pVM->vmm.s.pRCRelLoggerR3
804	#endif
805	)
806	{
807	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
808	AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
809	}
810
811	if (pVM->vmm.s.pRCLoggerR3)
812	{
813	RTRCPTR RCPtrLoggerWrapper = 0;
814	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
815	AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
816
817	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
818	rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
819	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
820	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
821	}
822
823	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
824	if (pVM->vmm.s.pRCRelLoggerR3)
825	{
826	RTRCPTR RCPtrLoggerWrapper = 0;
827	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
828	AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
829
830	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
831	rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
832	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
833	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
834	}
835	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
836
837	#ifdef LOG_ENABLED
838	/*
839	* For the ring-0 EMT logger, we use a per-thread logger instance
840	* in ring-0. Only initialize it once.
841	*/
842	for (VMCPUID i = 0; i < pVM->cCpus; i++)
843	{
844	PVMCPU pVCpu = &pVM->aCpus[i];
845	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
846	if (pR0LoggerR3)
847	{
848	if (!pR0LoggerR3->fCreated)
849	{
850	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
851	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
852	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
853
854	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
855	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
856	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
857
858	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
859	(PFNRTLOGGER )&pfnLoggerWrapper, (PFNRTLOGFLUSH )&pfnLoggerFlush,
860	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
861	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
862
863	RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
864	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
865	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
866	rc = RTLogSetCustomPrefixCallback(&pR0LoggerR3->Logger, (PFNRTLOGPREFIX )&pfnLoggerPrefix, NULL);
867	AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
868
869	pR0LoggerR3->idCpu = i;
870	pR0LoggerR3->fCreated = true;
871	pR0LoggerR3->fFlushingDisabled = false;
872
873	}
874
875	rc = RTLogCopyGroupsAndFlags(&pR0LoggerR3->Logger, NULL /* default */, pVM->vmm.s.pRCLoggerR3->fFlags, RTLOGFLAGS_BUFFERED);
876	AssertRC(rc);
877	}
878	}
879	#endif
880	return rc;
881	}
882
883
884	/**
885	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
886	*
887	* @returns Pointer to the buffer.
888	* @param pVM The VM handle.
889	*/
890	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
891	{
892	if (HWACCMIsEnabled(pVM))
893	return pVM->vmm.s.szRing0AssertMsg1;
894
895	RTRCPTR RCPtr;
896	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
897	if (RT_SUCCESS(rc))
898	return (const char *)MMHyperRCToR3(pVM, RCPtr);
899
900	return NULL;
901	}
902
903
904	/**
905	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
906	*
907	* @returns Pointer to the buffer.
908	* @param pVM The VM handle.
909	*/
910	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
911	{
912	if (HWACCMIsEnabled(pVM))
913	return pVM->vmm.s.szRing0AssertMsg2;
914
915	RTRCPTR RCPtr;
916	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
917	if (RT_SUCCESS(rc))
918	return (const char *)MMHyperRCToR3(pVM, RCPtr);
919
920	return NULL;
921	}
922
923
924	/**
925	* Execute state save operation.
926	*
927	* @returns VBox status code.
928	* @param pVM VM Handle.
929	* @param pSSM SSM operation handle.
930	*/
931	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
932	{
933	LogFlow(("vmmR3Save:\n"));
934
935	/*
936	* Save the started/stopped state of all CPUs except 0 as it will always
937	* be running. This avoids breaking the saved state version. :-)
938	*/
939	for (VMCPUID i = 1; i < pVM->cCpus; i++)
940	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
941
942	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
943	}
944
945
946	/**
947	* Execute state load operation.
948	*
949	* @returns VBox status code.
950	* @param pVM VM Handle.
951	* @param pSSM SSM operation handle.
952	* @param uVersion Data layout version.
953	* @param uPass The data pass.
954	*/
955	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
956	{
957	LogFlow(("vmmR3Load:\n"));
958	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
959
960	/*
961	* Validate version.
962	*/
963	if ( uVersion != VMM_SAVED_STATE_VERSION
964	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
965	{
966	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
967	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
968	}
969
970	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
971	{
972	/* Ignore the stack bottom, stack pointer and stack bits. */
973	RTRCPTR RCPtrIgnored;
974	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
975	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
976	#ifdef RT_OS_DARWIN
977	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
978	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
979	&& SSMR3HandleRevision(pSSM) >= 48858
980	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
981	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
982	)
983	SSMR3Skip(pSSM, 16384);
984	else
985	SSMR3Skip(pSSM, 8192);
986	#else
987	SSMR3Skip(pSSM, 8192);
988	#endif
989	}
990
991	/*
992	* Restore the VMCPU states. VCPU 0 is always started.
993	*/
994	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
995	for (VMCPUID i = 1; i < pVM->cCpus; i++)
996	{
997	bool fStarted;
998	int rc = SSMR3GetBool(pSSM, &fStarted);
999	if (RT_FAILURE(rc))
1000	return rc;
1001	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1002	}
1003
1004	/* terminator */
1005	uint32_t u32;
1006	int rc = SSMR3GetU32(pSSM, &u32);
1007	if (RT_FAILURE(rc))
1008	return rc;
1009	if (u32 != UINT32_MAX)
1010	{
1011	AssertMsgFailed(("u32=%#x\n", u32));
1012	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1013	}
1014	return VINF_SUCCESS;
1015	}
1016
1017
1018	/**
1019	* Resolve a builtin RC symbol.
1020	*
1021	* Called by PDM when loading or relocating RC modules.
1022	*
1023	* @returns VBox status
1024	* @param pVM VM Handle.
1025	* @param pszSymbol Symbol to resolv
1026	* @param pRCPtrValue Where to store the symbol value.
1027	*
1028	* @remark This has to work before VMMR3Relocate() is called.
1029	*/
1030	VMMR3DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1031	{
1032	if (!strcmp(pszSymbol, "g_Logger"))
1033	{
1034	if (pVM->vmm.s.pRCLoggerR3)
1035	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1036	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1037	}
1038	else if (!strcmp(pszSymbol, "g_RelLogger"))
1039	{
1040	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1041	if (pVM->vmm.s.pRCRelLoggerR3)
1042	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1043	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1044	#else
1045	*pRCPtrValue = NIL_RTRCPTR;
1046	#endif
1047	}
1048	else
1049	return VERR_SYMBOL_NOT_FOUND;
1050	return VINF_SUCCESS;
1051	}
1052
1053
1054	/**
1055	* Suspends the CPU yielder.
1056	*
1057	* @param pVM The VM handle.
1058	*/
1059	VMMR3DECL(void) VMMR3YieldSuspend(PVM pVM)
1060	{
1061	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1062	if (!pVM->vmm.s.cYieldResumeMillies)
1063	{
1064	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1065	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1066	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1067	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1068	else
1069	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1070	TMTimerStop(pVM->vmm.s.pYieldTimer);
1071	}
1072	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1073	}
1074
1075
1076	/**
1077	* Stops the CPU yielder.
1078	*
1079	* @param pVM The VM handle.
1080	*/
1081	VMMR3DECL(void) VMMR3YieldStop(PVM pVM)
1082	{
1083	if (!pVM->vmm.s.cYieldResumeMillies)
1084	TMTimerStop(pVM->vmm.s.pYieldTimer);
1085	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1086	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1087	}
1088
1089
1090	/**
1091	* Resumes the CPU yielder when it has been a suspended or stopped.
1092	*
1093	* @param pVM The VM handle.
1094	*/
1095	VMMR3DECL(void) VMMR3YieldResume(PVM pVM)
1096	{
1097	if (pVM->vmm.s.cYieldResumeMillies)
1098	{
1099	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1100	pVM->vmm.s.cYieldResumeMillies = 0;
1101	}
1102	}
1103
1104
1105	/**
1106	* Internal timer callback function.
1107	*
1108	* @param pVM The VM.
1109	* @param pTimer The timer handle.
1110	* @param pvUser User argument specified upon timer creation.
1111	*/
1112	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1113	{
1114	/*
1115	* This really needs some careful tuning. While we shouldn't be too greedy since
1116	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1117	* because that'll cause us to stop up.
1118	*
1119	* The current logic is to use the default interval when there is no lag worth
1120	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1121	*
1122	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1123	* so the lag is up to date.)
1124	*/
1125	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1126	if ( u64Lag < 50000000 /* 50ms */
1127	\|\| ( u64Lag < 1000000000 /* 1s */
1128	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1129	)
1130	{
1131	uint64_t u64Elapsed = RTTimeNanoTS();
1132	pVM->vmm.s.u64LastYield = u64Elapsed;
1133
1134	RTThreadYield();
1135
1136	#ifdef LOG_ENABLED
1137	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1138	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1139	#endif
1140	}
1141	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1142	}
1143
1144
1145	/**
1146	* Executes guest code in the raw-mode context.
1147	*
1148	* @param pVM VM handle.
1149	* @param pVCpu The VMCPU to operate on.
1150	*/
1151	VMMR3DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1152	{
1153	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1154
1155	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1156
1157	/*
1158	* Set the EIP and ESP.
1159	*/
1160	CPUMSetHyperEIP(pVCpu, CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1161	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1162	: pVM->vmm.s.pfnCPUMRCResumeGuest);
1163	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
1164
1165	/*
1166	* We hide log flushes (outer) and hypervisor interrupts (inner).
1167	*/
1168	for (;;)
1169	{
1170	#ifdef VBOX_STRICT
1171	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1172	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1173	PGMMapCheck(pVM);
1174	#endif
1175	int rc;
1176	do
1177	{
1178	#ifdef NO_SUPCALLR0VMM
1179	rc = VERR_GENERAL_FAILURE;
1180	#else
1181	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1182	if (RT_LIKELY(rc == VINF_SUCCESS))
1183	rc = pVCpu->vmm.s.iLastGZRc;
1184	#endif
1185	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1186
1187	/*
1188	* Flush the logs.
1189	*/
1190	#ifdef LOG_ENABLED
1191	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1192	if ( pLogger
1193	&& pLogger->offScratch > 0)
1194	RTLogFlushRC(NULL, pLogger);
1195	#endif
1196	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1197	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1198	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1199	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1200	#endif
1201	if (rc != VINF_VMM_CALL_HOST)
1202	{
1203	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1204	return rc;
1205	}
1206	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1207	if (RT_FAILURE(rc))
1208	return rc;
1209	/* Resume GC */
1210	}
1211	}
1212
1213
1214	/**
1215	* Executes guest code (Intel VT-x and AMD-V).
1216	*
1217	* @param pVM VM handle.
1218	* @param pVCpu The VMCPU to operate on.
1219	*/
1220	VMMR3DECL(int) VMMR3HwAccRunGC(PVM pVM, PVMCPU pVCpu)
1221	{
1222	Log2(("VMMR3HwAccRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1223
1224	for (;;)
1225	{
1226	int rc;
1227	do
1228	{
1229	#ifdef NO_SUPCALLR0VMM
1230	rc = VERR_GENERAL_FAILURE;
1231	#else
1232	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HWACC_RUN, pVCpu->idCpu);
1233	if (RT_LIKELY(rc == VINF_SUCCESS))
1234	rc = pVCpu->vmm.s.iLastGZRc;
1235	#endif
1236	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1237
1238	#ifdef LOG_ENABLED
1239	/*
1240	* Flush the log
1241	*/
1242	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1243	if ( pR0LoggerR3
1244	&& pR0LoggerR3->Logger.offScratch > 0)
1245	RTLogFlushToLogger(&pR0LoggerR3->Logger, NULL);
1246	#endif /* !LOG_ENABLED */
1247	if (rc != VINF_VMM_CALL_HOST)
1248	{
1249	Log2(("VMMR3HwAccRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1250	return rc;
1251	}
1252	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1253	if (RT_FAILURE(rc))
1254	return rc;
1255	/* Resume R0 */
1256	}
1257	}
1258
1259	/**
1260	* VCPU worker for VMMSendSipi.
1261	*
1262	* @param pVM The VM to operate on.
1263	* @param idCpu Virtual CPU to perform SIPI on
1264	* @param uVector SIPI vector
1265	*/
1266	DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1267	{
1268	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1269	VMCPU_ASSERT_EMT(pVCpu);
1270
1271	/** @todo what are we supposed to do if the processor is already running? */
1272	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1273	return VERR_ACCESS_DENIED;
1274
1275
1276	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1277
1278	pCtx->cs = uVector << 8;
1279	pCtx->csHid.u64Base = uVector << 12;
1280	pCtx->csHid.u32Limit = 0x0000ffff;
1281	pCtx->rip = 0;
1282
1283	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1284
1285	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1286	EMSetState(pVCpu, EMSTATE_HALTED);
1287	return VINF_EM_RESCHEDULE;
1288	# else /* And if we go the VMCPU::enmState way it can stay here. */
1289	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1290	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1291	return VINF_SUCCESS;
1292	# endif
1293	}
1294
1295	DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1296	{
1297	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1298	VMCPU_ASSERT_EMT(pVCpu);
1299
1300	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1301	CPUMR3ResetCpu(pVCpu);
1302	return VINF_EM_WAIT_SIPI;
1303	}
1304
1305	/**
1306	* Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1307	* and unhalting processor
1308	*
1309	* @param pVM The VM to operate on.
1310	* @param idCpu Virtual CPU to perform SIPI on
1311	* @param uVector SIPI vector
1312	*/
1313	VMMR3DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1314	{
1315	AssertReturnVoid(idCpu < pVM->cCpus);
1316
1317	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1318	AssertRC(rc);
1319	}
1320
1321	/**
1322	* Sends init IPI to the virtual CPU.
1323	*
1324	* @param pVM The VM to operate on.
1325	* @param idCpu Virtual CPU to perform int IPI on
1326	*/
1327	VMMR3DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1328	{
1329	AssertReturnVoid(idCpu < pVM->cCpus);
1330
1331	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1332	AssertRC(rc);
1333	}
1334
1335	/**
1336	* Registers the guest memory range that can be used for patching
1337	*
1338	* @returns VBox status code.
1339	* @param pVM The VM to operate on.
1340	* @param pPatchMem Patch memory range
1341	* @param cbPatchMem Size of the memory range
1342	*/
1343	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1344	{
1345	if (HWACCMIsEnabled(pVM))
1346	return HWACMMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1347
1348	return VERR_NOT_SUPPORTED;
1349	}
1350
1351	/**
1352	* Deregisters the guest memory range that can be used for patching
1353	*
1354	* @returns VBox status code.
1355	* @param pVM The VM to operate on.
1356	* @param pPatchMem Patch memory range
1357	* @param cbPatchMem Size of the memory range
1358	*/
1359	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1360	{
1361	if (HWACCMIsEnabled(pVM))
1362	return HWACMMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1363
1364	return VINF_SUCCESS;
1365	}
1366
1367
1368	/**
1369	* VCPU worker for VMMR3SynchronizeAllVCpus.
1370	*
1371	* @param pVM The VM to operate on.
1372	* @param idCpu Virtual CPU to perform SIPI on
1373	* @param uVector SIPI vector
1374	*/
1375	DECLCALLBACK(int) vmmR3SyncVCpu(PVM pVM)
1376	{
1377	/* Block until the job in the caller has finished. */
1378	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1379	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1380	return VINF_SUCCESS;
1381	}
1382
1383
1384	/**
1385	* Atomically execute a callback handler
1386	* Note: This is very expensive; avoid using it frequently!
1387	*
1388	* @param pVM The VM to operate on.
1389	* @param pfnHandler Callback handler
1390	* @param pvUser User specified parameter
1391	*
1392	* @thread EMT
1393	*/
1394	VMMR3DECL(int) VMMR3AtomicExecuteHandler(PVM pVM, PFNATOMICHANDLER pfnHandler, void *pvUser)
1395	{
1396	int rc;
1397	PVMCPU pVCpu = VMMGetCpu(pVM);
1398	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1399
1400	/* Shortcut for the uniprocessor case. */
1401	if (pVM->cCpus == 1)
1402	return pfnHandler(pVM, pvUser);
1403
1404	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1405	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
1406	{
1407	if (idCpu != pVCpu->idCpu)
1408	{
1409	rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SyncVCpu, 1, pVM);
1410	AssertRC(rc);
1411	}
1412	}
1413	/* Wait until all other VCPUs are waiting for us. */
1414	while (RTCritSectGetWaiters(&pVM->vmm.s.CritSectSync) != (int32_t)(pVM->cCpus - 1))
1415	RTThreadSleep(1);
1416
1417	rc = pfnHandler(pVM, pvUser);
1418	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1419	return rc;
1420	}
1421
1422
1423	/**
1424	* Count returns and have the last non-caller EMT wake up the caller.
1425	*
1426	* @returns VBox strict informational status code for EM scheduling. No failures
1427	* will be returned here, those are for the caller only.
1428	*
1429	* @param pVM The VM handle.
1430	*/
1431	DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1432	{
1433	int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1434	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1435	if (cReturned == pVM->cCpus - 1U)
1436	{
1437	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1438	AssertLogRelRC(rc);
1439	}
1440
1441	AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1442	\|\| (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1443	("%Rrc\n", rcRet),
1444	VERR_IPE_UNEXPECTED_INFO_STATUS);
1445	return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1446	}
1447
1448
1449	/**
1450	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1451	*
1452	* @returns VBox strict informational status code for EM scheduling. No failures
1453	* will be returned here, those are for the caller only. When
1454	* fIsCaller is set, VINF_SUCESS is always returned.
1455	*
1456	* @param pVM The VM handle.
1457	* @param pVCpu The VMCPU structure for the calling EMT.
1458	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1459	* not.
1460	* @param fFlags The flags.
1461	* @param pfnRendezvous The callback.
1462	* @param pvUser The user argument for the callback.
1463	*/
1464	static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1465	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1466	{
1467	int rc;
1468
1469	/*
1470	* Enter, the last EMT triggers the next callback phase.
1471	*/
1472	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1473	if (cEntered != pVM->cCpus)
1474	{
1475	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1476	{
1477	/* Wait for our turn. */
1478	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1479	AssertLogRelRC(rc);
1480	}
1481	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1482	{
1483	/* Wait for the last EMT to arrive and wake everyone up. */
1484	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1485	AssertLogRelRC(rc);
1486	}
1487	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1488	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1489	{
1490	/* Wait for our turn. */
1491	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1492	AssertLogRelRC(rc);
1493	}
1494	else
1495	{
1496	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1497
1498	/*
1499	* The execute once is handled specially to optimize the code flow.
1500	*
1501	* The last EMT to arrive will perform the callback and the other
1502	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1503	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1504	* returns, that EMT will initiate the normal return sequence.
1505	*/
1506	if (!fIsCaller)
1507	{
1508	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1509	AssertLogRelRC(rc);
1510
1511	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1512	}
1513	return VINF_SUCCESS;
1514	}
1515	}
1516	else
1517	{
1518	/*
1519	* All EMTs are waiting, clear the FF and take action according to the
1520	* execution method.
1521	*/
1522	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1523
1524	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1525	{
1526	/* Wake up everyone. */
1527	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1528	AssertLogRelRC(rc);
1529	}
1530	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1531	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1532	{
1533	/* Figure out who to wake up and wake it up. If it's ourself, then
1534	it's easy otherwise wait for our turn. */
1535	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1536	? 0
1537	: pVM->cCpus - 1U;
1538	if (pVCpu->idCpu != iFirst)
1539	{
1540	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1541	AssertLogRelRC(rc);
1542	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1543	AssertLogRelRC(rc);
1544	}
1545	}
1546	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1547	}
1548
1549
1550	/*
1551	* Do the callback and update the status if necessary.
1552	*/
1553	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1554	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1555	{
1556	VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1557	if (rcStrict != VINF_SUCCESS)
1558	{
1559	AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1560	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1561	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1562	int32_t i32RendezvousStatus;
1563	do
1564	{
1565	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1566	if ( rcStrict == i32RendezvousStatus
1567	\|\| RT_FAILURE(i32RendezvousStatus)
1568	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1569	&& rcStrict > i32RendezvousStatus))
1570	break;
1571	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1572	}
1573	}
1574
1575	/*
1576	* Increment the done counter and take action depending on whether we're
1577	* the last to finish callback execution.
1578	*/
1579	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1580	if ( cDone != pVM->cCpus
1581	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1582	{
1583	/* Signal the next EMT? */
1584	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1585	{
1586	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1587	AssertLogRelRC(rc);
1588	}
1589	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1590	{
1591	Assert(cDone == pVCpu->idCpu + 1U);
1592	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1593	AssertLogRelRC(rc);
1594	}
1595	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1596	{
1597	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1598	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1599	AssertLogRelRC(rc);
1600	}
1601
1602	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1603	if (!fIsCaller)
1604	{
1605	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1606	AssertLogRelRC(rc);
1607	}
1608	}
1609	else
1610	{
1611	/* Callback execution is all done, tell the rest to return. */
1612	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1613	AssertLogRelRC(rc);
1614	}
1615
1616	if (!fIsCaller)
1617	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1618	return VINF_SUCCESS;
1619	}
1620
1621
1622	/**
1623	* Called in response to VM_FF_EMT_RENDEZVOUS.
1624	*
1625	* @returns VBox strict status code - EM scheduling. No errors will be returned
1626	* here, nor will any non-EM scheduling status codes be returned.
1627	*
1628	* @param pVM The VM handle
1629	* @param pVCpu The handle of the calling EMT.
1630	*
1631	* @thread EMT
1632	*/
1633	VMMR3DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1634	{
1635	return vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1636	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1637	}
1638
1639
1640	/**
1641	* EMT rendezvous.
1642	*
1643	* Gathers all the EMTs and execute some code on each of them, either in a one
1644	* by one fashion or all at once.
1645	*
1646	* @returns VBox strict status code. This will be the the first error,
1647	* VINF_SUCCESS, or an EM scheduling status code.
1648	*
1649	* @param pVM The VM handle.
1650	* @param fFlags Flags indicating execution methods. See
1651	* grp_VMMR3EmtRendezvous_fFlags.
1652	* @param pfnRendezvous The callback.
1653	* @param pvUser User argument for the callback.
1654	*
1655	* @thread Any.
1656	*/
1657	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1658	{
1659	/*
1660	* Validate input.
1661	*/
1662	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1663	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1664	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1665	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1666	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1667	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1668	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1669
1670	VBOXSTRICTRC rcStrict;
1671	PVMCPU pVCpu = VMMGetCpu(pVM);
1672	if (!pVCpu)
1673	/*
1674	* Forward the request to an EMT thread.
1675	*/
1676	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1677	(PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1678	else if (pVM->cCpus == 1)
1679	/*
1680	* Shortcut for the single EMT case.
1681	*/
1682	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1683	else
1684	{
1685	/*
1686	* Spin lock. If busy, wait for the other EMT to finish while keeping a
1687	* lookout of the RENDEZVOUS FF.
1688	*/
1689	int rc;
1690	rcStrict = VINF_SUCCESS;
1691	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1692	{
1693	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1694	{
1695	if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1696	{
1697	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1698	if ( rc != VINF_SUCCESS
1699	&& ( rcStrict == VINF_SUCCESS
1700	\|\| rcStrict > rc))
1701	rcStrict = rc;
1702	/** @todo Perhaps deal with termination here? */
1703	}
1704	ASMNopPause();
1705	}
1706	}
1707	Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1708
1709	/*
1710	* Clear the slate. This is a semaphore ping-pong orgy. :-)
1711	*/
1712	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1713	{
1714	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1715	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1716	}
1717	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1718	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1719	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1720	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1721	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1722	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1723	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1724	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1725	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1726	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1727	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1728
1729	/*
1730	* Set the FF and poke the other EMTs.
1731	*/
1732	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1733	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1734
1735	/*
1736	* Do the same ourselves.
1737	*/
1738	vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1739
1740	/*
1741	* The caller waits for the other EMTs to be done and return before doing
1742	* the cleanup. This makes away with wakeup / reset races we would otherwise
1743	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1744	*/
1745	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1746	AssertLogRelRC(rc);
1747
1748	/*
1749	* Get the return code and clean up a little bit.
1750	*/
1751	int rcMy = pVM->vmm.s.i32RendezvousStatus;
1752	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1753
1754	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1755
1756	/*
1757	* Merge rcStrict and rcMy.
1758	*/
1759	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1760	if ( rcMy != VINF_SUCCESS
1761	&& ( rcStrict == VINF_SUCCESS
1762	\|\| rcStrict > rcMy))
1763	rcStrict = rcMy;
1764	}
1765
1766	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1767	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1768	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1769	VERR_IPE_UNEXPECTED_INFO_STATUS);
1770	return VBOXSTRICTRC_VAL(rcStrict);
1771	}
1772
1773
1774	/**
1775	* Read from the ring 0 jump buffer stack
1776	*
1777	* @returns VBox status code.
1778	*
1779	* @param pVM Pointer to the shared VM structure.
1780	* @param idCpu The ID of the source CPU context (for the address).
1781	* @param R0Addr Where to start reading.
1782	* @param pvBuf Where to store the data we've read.
1783	* @param cbRead The number of bytes to read.
1784	*/
1785	VMMR3DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1786	{
1787	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1788	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1789
1790	#ifdef VMM_R0_SWITCH_STACK
1791	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1792	#else
1793	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1794	#endif
1795	if ( off > VMM_STACK_SIZE
1796	\|\| off + cbRead >= VMM_STACK_SIZE)
1797	return VERR_INVALID_POINTER;
1798
1799	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1800	return VINF_SUCCESS;
1801	}
1802
1803
1804	/**
1805	* Calls a RC function.
1806	*
1807	* @param pVM The VM handle.
1808	* @param RCPtrEntry The address of the RC function.
1809	* @param cArgs The number of arguments in the ....
1810	* @param ... Arguments to the function.
1811	*/
1812	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1813	{
1814	va_list args;
1815	va_start(args, cArgs);
1816	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1817	va_end(args);
1818	return rc;
1819	}
1820
1821
1822	/**
1823	* Calls a RC function.
1824	*
1825	* @param pVM The VM handle.
1826	* @param RCPtrEntry The address of the RC function.
1827	* @param cArgs The number of arguments in the ....
1828	* @param args Arguments to the function.
1829	*/
1830	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1831	{
1832	/* Raw mode implies 1 VCPU. */
1833	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1834	PVMCPU pVCpu = &pVM->aCpus[0];
1835
1836	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1837
1838	/*
1839	* Setup the call frame using the trampoline.
1840	*/
1841	CPUMHyperSetCtxCore(pVCpu, NULL);
1842	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1843	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32));
1844	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1845	int i = cArgs;
1846	while (i-- > 0)
1847	*pFrame++ = va_arg(args, RTGCUINTPTR32);
1848
1849	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1850	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1851	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
1852
1853	/*
1854	* We hide log flushes (outer) and hypervisor interrupts (inner).
1855	*/
1856	for (;;)
1857	{
1858	int rc;
1859	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1860	do
1861	{
1862	#ifdef NO_SUPCALLR0VMM
1863	rc = VERR_GENERAL_FAILURE;
1864	#else
1865	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1866	if (RT_LIKELY(rc == VINF_SUCCESS))
1867	rc = pVCpu->vmm.s.iLastGZRc;
1868	#endif
1869	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1870
1871	/*
1872	* Flush the logs.
1873	*/
1874	#ifdef LOG_ENABLED
1875	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1876	if ( pLogger
1877	&& pLogger->offScratch > 0)
1878	RTLogFlushRC(NULL, pLogger);
1879	#endif
1880	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1881	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1882	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1883	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1884	#endif
1885	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
1886	VMMR3FatalDump(pVM, pVCpu, rc);
1887	if (rc != VINF_VMM_CALL_HOST)
1888	{
1889	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1890	return rc;
1891	}
1892	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1893	if (RT_FAILURE(rc))
1894	return rc;
1895	}
1896	}
1897
1898
1899	/**
1900	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1901	*
1902	* @returns VBox status code.
1903	* @param pVM The VM to operate on.
1904	* @param uOperation Operation to execute.
1905	* @param u64Arg Constant argument.
1906	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1907	* details.
1908	*/
1909	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1910	{
1911	PVMCPU pVCpu = VMMGetCpu(pVM);
1912	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1913
1914	/*
1915	* Call Ring-0 entry with init code.
1916	*/
1917	int rc;
1918	for (;;)
1919	{
1920	#ifdef NO_SUPCALLR0VMM
1921	rc = VERR_GENERAL_FAILURE;
1922	#else
1923	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1924	#endif
1925	/*
1926	* Flush the logs.
1927	*/
1928	#ifdef LOG_ENABLED
1929	if ( pVCpu->vmm.s.pR0LoggerR3
1930	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1931	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
1932	#endif
1933	if (rc != VINF_VMM_CALL_HOST)
1934	break;
1935	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1936	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1937	break;
1938	/* Resume R0 */
1939	}
1940
1941	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
1942	("uOperation=%u rc=%Rrc\n", uOperation, rc),
1943	VERR_INTERNAL_ERROR);
1944	return rc;
1945	}
1946
1947
1948	/**
1949	* Resumes executing hypervisor code when interrupted by a queue flush or a
1950	* debug event.
1951	*
1952	* @returns VBox status code.
1953	* @param pVM VM handle.
1954	* @param pVCpu VMCPU handle.
1955	*/
1956	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
1957	{
1958	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
1959	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1960
1961	/*
1962	* We hide log flushes (outer) and hypervisor interrupts (inner).
1963	*/
1964	for (;;)
1965	{
1966	int rc;
1967	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1968	do
1969	{
1970	#ifdef NO_SUPCALLR0VMM
1971	rc = VERR_GENERAL_FAILURE;
1972	#else
1973	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1974	if (RT_LIKELY(rc == VINF_SUCCESS))
1975	rc = pVCpu->vmm.s.iLastGZRc;
1976	#endif
1977	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1978
1979	/*
1980	* Flush the loggers,
1981	*/
1982	#ifdef LOG_ENABLED
1983	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1984	if ( pLogger
1985	&& pLogger->offScratch > 0)
1986	RTLogFlushRC(NULL, pLogger);
1987	#endif
1988	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1989	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1990	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1991	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1992	#endif
1993	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
1994	VMMR3FatalDump(pVM, pVCpu, rc);
1995	if (rc != VINF_VMM_CALL_HOST)
1996	{
1997	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
1998	return rc;
1999	}
2000	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2001	if (RT_FAILURE(rc))
2002	return rc;
2003	}
2004	}
2005
2006
2007	/**
2008	* Service a call to the ring-3 host code.
2009	*
2010	* @returns VBox status code.
2011	* @param pVM VM handle.
2012	* @param pVCpu VMCPU handle
2013	* @remark Careful with critsects.
2014	*/
2015	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2016	{
2017	/*
2018	* We must also check for pending critsect exits or else we can deadlock
2019	* when entering other critsects here.
2020	*/
2021	if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2022	PDMCritSectFF(pVCpu);
2023
2024	switch (pVCpu->vmm.s.enmCallRing3Operation)
2025	{
2026	/*
2027	* Acquire the PDM lock.
2028	*/
2029	case VMMCALLRING3_PDM_LOCK:
2030	{
2031	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2032	break;
2033	}
2034
2035	/*
2036	* Grow the PGM pool.
2037	*/
2038	case VMMCALLRING3_PGM_POOL_GROW:
2039	{
2040	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2041	break;
2042	}
2043
2044	/*
2045	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2046	*/
2047	case VMMCALLRING3_PGM_MAP_CHUNK:
2048	{
2049	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2050	break;
2051	}
2052
2053	/*
2054	* Allocates more handy pages.
2055	*/
2056	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2057	{
2058	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2059	break;
2060	}
2061
2062	/*
2063	* Allocates a large page.
2064	*/
2065	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2066	{
2067	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2068	break;
2069	}
2070
2071	/*
2072	* Acquire the PGM lock.
2073	*/
2074	case VMMCALLRING3_PGM_LOCK:
2075	{
2076	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2077	break;
2078	}
2079
2080	/*
2081	* Acquire the MM hypervisor heap lock.
2082	*/
2083	case VMMCALLRING3_MMHYPER_LOCK:
2084	{
2085	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2086	break;
2087	}
2088
2089	/*
2090	* Flush REM handler notifications.
2091	*/
2092	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2093	{
2094	REMR3ReplayHandlerNotifications(pVM);
2095	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2096	break;
2097	}
2098
2099	/*
2100	* This is a noop. We just take this route to avoid unnecessary
2101	* tests in the loops.
2102	*/
2103	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2104	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2105	LogAlways(("FLUSH\n"));
2106	break;
2107
2108	/*
2109	* Set the VM error message.
2110	*/
2111	case VMMCALLRING3_VM_SET_ERROR:
2112	VMR3SetErrorWorker(pVM);
2113	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2114	break;
2115
2116	/*
2117	* Set the VM runtime error message.
2118	*/
2119	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2120	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2121	break;
2122
2123	/*
2124	* Signal a ring 0 hypervisor assertion.
2125	* Cancel the longjmp operation that's in progress.
2126	*/
2127	case VMMCALLRING3_VM_R0_ASSERTION:
2128	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2129	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2130	#ifdef RT_ARCH_X86
2131	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2132	#else
2133	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2134	#endif
2135	#ifdef VMM_R0_SWITCH_STACK
2136	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2137	#endif
2138	LogRel((pVM->vmm.s.szRing0AssertMsg1));
2139	LogRel((pVM->vmm.s.szRing0AssertMsg2));
2140	return VERR_VMM_RING0_ASSERTION;
2141
2142	/*
2143	* A forced switch to ring 0 for preemption purposes.
2144	*/
2145	case VMMCALLRING3_VM_R0_PREEMPT:
2146	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2147	break;
2148
2149	default:
2150	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2151	return VERR_INTERNAL_ERROR;
2152	}
2153
2154	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2155	return VINF_SUCCESS;
2156	}
2157
2158
2159	/**
2160	* Displays the Force action Flags.
2161	*
2162	* @param pVM The VM handle.
2163	* @param pHlp The output helpers.
2164	* @param pszArgs The additional arguments (ignored).
2165	*/
2166	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2167	{
2168	int c;
2169	uint32_t f;
2170	#define PRINT_FLAG(prf,flag) do { \
2171	if (f & (prf##flag)) \
2172	{ \
2173	static const char *s_psz = #flag; \
2174	if (!(c % 6)) \
2175	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2176	else \
2177	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2178	c++; \
2179	f &= ~(prf##flag); \
2180	} \
2181	} while (0)
2182
2183	#define PRINT_GROUP(prf,grp,sfx) do { \
2184	if (f & (prf##grp##sfx)) \
2185	{ \
2186	static const char *s_psz = #grp; \
2187	if (!(c % 5)) \
2188	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2189	else \
2190	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2191	c++; \
2192	} \
2193	} while (0)
2194
2195	/*
2196	* The global flags.
2197	*/
2198	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2199	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2200
2201	/* show the flag mnemonics */
2202	c = 0;
2203	f = fGlobalForcedActions;
2204	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2205	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2206	PRINT_FLAG(VM_FF_,PDM_DMA);
2207	PRINT_FLAG(VM_FF_,DBGF);
2208	PRINT_FLAG(VM_FF_,REQUEST);
2209	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2210	PRINT_FLAG(VM_FF_,RESET);
2211	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2212	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2213	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2214	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2215	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2216	if (f)
2217	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2218	else
2219	pHlp->pfnPrintf(pHlp, "\n");
2220
2221	/* the groups */
2222	c = 0;
2223	f = fGlobalForcedActions;
2224	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2225	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2226	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2227	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2228	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2229	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2230	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2231	PRINT_GROUP(VM_FF_,ALL_BUT_RAW,_MASK);
2232	if (c)
2233	pHlp->pfnPrintf(pHlp, "\n");
2234
2235	/*
2236	* Per CPU flags.
2237	*/
2238	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2239	{
2240	const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2241	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2242
2243	/* show the flag mnemonics */
2244	c = 0;
2245	f = fLocalForcedActions;
2246	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2247	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2248	PRINT_FLAG(VMCPU_FF_,TIMER);
2249	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2250	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2251	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2252	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2253	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2254	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2255	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2256	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2257	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2258	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2259	PRINT_FLAG(VMCPU_FF_,TO_R3);
2260	if (f)
2261	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2262	else
2263	pHlp->pfnPrintf(pHlp, "\n");
2264
2265	/* the groups */
2266	c = 0;
2267	f = fLocalForcedActions;
2268	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2269	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2270	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2271	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2272	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2273	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2274	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2275	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2276	PRINT_GROUP(VMCPU_FF_,HWACCM_TO_R3,_MASK);
2277	PRINT_GROUP(VMCPU_FF_,ALL_BUT_RAW,_MASK);
2278	if (c)
2279	pHlp->pfnPrintf(pHlp, "\n");
2280	}
2281
2282	#undef PRINT_FLAG
2283	#undef PRINT_GROUP
2284	}
2285

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source: vbox/trunk/src/VBox/VMM/VMM.cpp@ 30660

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