VMM.cpp@ 32725

Last change on this file since 32725 was 32489, checked in by vboxsync, 14 years ago
VMM: More work on the periodic preemption timer (no actual timers yet).
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 82.4 KB

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1	/* $Id: VMM.cpp 32489 2010-09-14 15:50:31Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually.
27	*
28	* @see grp_vmm, grp_vm
29	*
30	*
31	* @section sec_vmmstate VMM State
32	*
33	* @image html VM_Statechart_Diagram.gif
34	*
35	* To be written.
36	*
37	*
38	* @subsection subsec_vmm_init VMM Initialization
39	*
40	* To be written.
41	*
42	*
43	* @subsection subsec_vmm_term VMM Termination
44	*
45	* To be written.
46	*
47	*/
48
49	/*******************************************************************************
50	* Header Files *
51	*******************************************************************************/
52	#define LOG_GROUP LOG_GROUP_VMM
53	#include <VBox/vmm.h>
54	#include <VBox/vmapi.h>
55	#include <VBox/pgm.h>
56	#include <VBox/cfgm.h>
57	#include <VBox/pdmqueue.h>
58	#include <VBox/pdmcritsect.h>
59	#include <VBox/pdmapi.h>
60	#include <VBox/cpum.h>
61	#include <VBox/mm.h>
62	#include <VBox/iom.h>
63	#include <VBox/trpm.h>
64	#include <VBox/selm.h>
65	#include <VBox/em.h>
66	#include <VBox/sup.h>
67	#include <VBox/dbgf.h>
68	#include <VBox/csam.h>
69	#include <VBox/patm.h>
70	#include <VBox/rem.h>
71	#include <VBox/ssm.h>
72	#include <VBox/tm.h>
73	#include "VMMInternal.h"
74	#include "VMMSwitcher/VMMSwitcher.h"
75	#include <VBox/vm.h>
76	#include <VBox/ftm.h>
77
78	#include <VBox/err.h>
79	#include <VBox/param.h>
80	#include <VBox/version.h>
81	#include <VBox/x86.h>
82	#include <VBox/hwaccm.h>
83	#include <iprt/assert.h>
84	#include <iprt/alloc.h>
85	#include <iprt/asm.h>
86	#include <iprt/time.h>
87	#include <iprt/semaphore.h>
88	#include <iprt/stream.h>
89	#include <iprt/string.h>
90	#include <iprt/stdarg.h>
91	#include <iprt/ctype.h>
92
93
94
95	/*******************************************************************************
96	* Defined Constants And Macros *
97	*******************************************************************************/
98	/** The saved state version. */
99	#define VMM_SAVED_STATE_VERSION 4
100	/** The saved state version used by v3.0 and earlier. (Teleportation) */
101	#define VMM_SAVED_STATE_VERSION_3_0 3
102
103
104	/*******************************************************************************
105	* Internal Functions *
106	*******************************************************************************/
107	static int vmmR3InitStacks(PVM pVM);
108	static int vmmR3InitLoggers(PVM pVM);
109	static void vmmR3InitRegisterStats(PVM pVM);
110	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
111	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
112	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
113	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
114	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
115
116
117	/**
118	* Initializes the VMM.
119	*
120	* @returns VBox status code.
121	* @param pVM The VM to operate on.
122	*/
123	VMMR3DECL(int) VMMR3Init(PVM pVM)
124	{
125	LogFlow(("VMMR3Init\n"));
126
127	/*
128	* Assert alignment, sizes and order.
129	*/
130	AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
131	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
132	AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
133
134	/*
135	* Init basic VM VMM members.
136	*/
137	pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
138	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
139	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
140	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
141	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
142	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
143
144	/** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
145	* The EMT yield interval. The EMT yielding is a hack we employ to play a
146	* bit nicer with the rest of the system (like for instance the GUI).
147	*/
148	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
149	23 /* Value arrived at after experimenting with the grub boot prompt. */);
150	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
151
152
153	/** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
154	* Controls whether we employ per-cpu preemption timers to limit the time
155	* spent executing guest code. This option is not available on all
156	* platforms and we will silently ignore this setting then. If we are
157	* running in VT-x mode, we will use the VMX-preemption timer instead of
158	* this one when possible.
159	*/
160	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
161	rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
162	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
163
164	/*
165	* Initialize the VMM sync critical section and semaphores.
166	*/
167	rc = RTCritSectInit(&pVM->vmm.s.CritSectSync);
168	AssertRCReturn(rc, rc);
169	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
170	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
171	return VERR_NO_MEMORY;
172	for (VMCPUID i = 0; i < pVM->cCpus; i++)
173	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
174	for (VMCPUID i = 0; i < pVM->cCpus; i++)
175	{
176	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
177	AssertRCReturn(rc, rc);
178	}
179	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
180	AssertRCReturn(rc, rc);
181	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
182	AssertRCReturn(rc, rc);
183	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
184	AssertRCReturn(rc, rc);
185	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
186	AssertRCReturn(rc, rc);
187
188	/* GC switchers are enabled by default. Turned off by HWACCM. */
189	pVM->vmm.s.fSwitcherDisabled = false;
190
191	/*
192	* Register the saved state data unit.
193	*/
194	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
195	NULL, NULL, NULL,
196	NULL, vmmR3Save, NULL,
197	NULL, vmmR3Load, NULL);
198	if (RT_FAILURE(rc))
199	return rc;
200
201	/*
202	* Register the Ring-0 VM handle with the session for fast ioctl calls.
203	*/
204	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
205	if (RT_FAILURE(rc))
206	return rc;
207
208	/*
209	* Init various sub-components.
210	*/
211	rc = vmmR3SwitcherInit(pVM);
212	if (RT_SUCCESS(rc))
213	{
214	rc = vmmR3InitStacks(pVM);
215	if (RT_SUCCESS(rc))
216	{
217	rc = vmmR3InitLoggers(pVM);
218
219	#ifdef VBOX_WITH_NMI
220	/*
221	* Allocate mapping for the host APIC.
222	*/
223	if (RT_SUCCESS(rc))
224	{
225	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
226	AssertRC(rc);
227	}
228	#endif
229	if (RT_SUCCESS(rc))
230	{
231	/*
232	* Debug info and statistics.
233	*/
234	DBGFR3InfoRegisterInternal(pVM, "ff", "Displays the current Forced actions Flags.", vmmR3InfoFF);
235	vmmR3InitRegisterStats(pVM);
236
237	return VINF_SUCCESS;
238	}
239	}
240	/** @todo: Need failure cleanup. */
241
242	//more todo in here?
243	//if (RT_SUCCESS(rc))
244	//{
245	//}
246	//int rc2 = vmmR3TermCoreCode(pVM);
247	//AssertRC(rc2));
248	}
249
250	return rc;
251	}
252
253
254	/**
255	* Allocate & setup the VMM RC stack(s) (for EMTs).
256	*
257	* The stacks are also used for long jumps in Ring-0.
258	*
259	* @returns VBox status code.
260	* @param pVM Pointer to the shared VM structure.
261	*
262	* @remarks The optional guard page gets it protection setup up during R3 init
263	* completion because of init order issues.
264	*/
265	static int vmmR3InitStacks(PVM pVM)
266	{
267	int rc = VINF_SUCCESS;
268	#ifdef VMM_R0_SWITCH_STACK
269	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
270	#else
271	uint32_t fFlags = 0;
272	#endif
273
274	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
275	{
276	PVMCPU pVCpu = &pVM->aCpus[idCpu];
277
278	#ifdef VBOX_STRICT_VMM_STACK
279	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
280	#else
281	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
282	#endif
283	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
284	if (RT_SUCCESS(rc))
285	{
286	#ifdef VBOX_STRICT_VMM_STACK
287	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
288	#endif
289	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
290	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
291	if (!VMMIsHwVirtExtForced(pVM))
292	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
293	else
294	#endif
295	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
296	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
297	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
298	AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
299
300	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
301	}
302	}
303
304	return rc;
305	}
306
307
308	/**
309	* Initialize the loggers.
310	*
311	* @returns VBox status code.
312	* @param pVM Pointer to the shared VM structure.
313	*/
314	static int vmmR3InitLoggers(PVM pVM)
315	{
316	int rc;
317
318	/*
319	* Allocate RC & R0 Logger instances (they are finalized in the relocator).
320	*/
321	#ifdef LOG_ENABLED
322	PRTLOGGER pLogger = RTLogDefaultInstance();
323	if (pLogger)
324	{
325	pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
326	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
327	if (RT_FAILURE(rc))
328	return rc;
329	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
330
331	# ifdef VBOX_WITH_R0_LOGGING
332	for (VMCPUID i = 0; i < pVM->cCpus; i++)
333	{
334	PVMCPU pVCpu = &pVM->aCpus[i];
335
336	rc = MMR3HyperAllocOnceNoRelEx(pVM, RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[pLogger->cGroups]),
337	0, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
338	(void **)&pVCpu->vmm.s.pR0LoggerR3);
339	if (RT_FAILURE(rc))
340	return rc;
341	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
342	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
343	pVCpu->vmm.s.pR0LoggerR3->cbLogger = RT_OFFSETOF(RTLOGGER, afGroups[pLogger->cGroups]);
344	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
345	}
346	# endif
347	}
348	#endif /* LOG_ENABLED */
349
350	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
351	/*
352	* Allocate RC release logger instances (finalized in the relocator).
353	*/
354	PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
355	if (pRelLogger)
356	{
357	pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
358	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
359	if (RT_FAILURE(rc))
360	return rc;
361	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
362	}
363	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
364	return VINF_SUCCESS;
365	}
366
367
368	/**
369	* VMMR3Init worker that register the statistics with STAM.
370	*
371	* @param pVM The shared VM structure.
372	*/
373	static void vmmR3InitRegisterStats(PVM pVM)
374	{
375	/*
376	* Statistics.
377	*/
378	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
379	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
380	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
381	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
382	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
383	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
384	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
385	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
386	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
387	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
388	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
389	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
390	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_READ returns.");
391	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_WRITE returns.");
392	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ returns.");
393	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_WRITE returns.");
394	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ_WRITE returns.");
395	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
396	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
397	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
398	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
399	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
400	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
401	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
402	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
403	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
404	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
405	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
406	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
407	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
408	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
409	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
410	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
411	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
412	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
413	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
414	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
415	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
416	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
417	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HWACCM_PATCH_TPR_INSTR returns.");
418	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
419	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
420	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
421	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
422	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
423	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
424	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
425	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
426	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
427	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
428
429	#ifdef VBOX_WITH_STATISTICS
430	for (VMCPUID i = 0; i < pVM->cCpus; i++)
431	{
432	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
433	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
434	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
435	}
436	#endif
437	}
438
439
440	/**
441	* Initializes the per-VCPU VMM.
442	*
443	* @returns VBox status code.
444	* @param pVM The VM to operate on.
445	*/
446	VMMR3DECL(int) VMMR3InitCPU(PVM pVM)
447	{
448	LogFlow(("VMMR3InitCPU\n"));
449	return VINF_SUCCESS;
450	}
451
452
453	/**
454	* Ring-3 init finalizing.
455	*
456	* @returns VBox status code.
457	* @param pVM The VM handle.
458	*/
459	VMMR3DECL(int) VMMR3InitFinalize(PVM pVM)
460	{
461	int rc;
462
463	/*
464	* Set page attributes to r/w for stack pages.
465	*/
466	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
467	{
468	rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
469	X86_PTE_P \| X86_PTE_A \| X86_PTE_D \| X86_PTE_RW);
470	AssertRCReturn(rc, rc);
471	}
472
473	/*
474	* Create the EMT yield timer.
475	*/
476	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
477	AssertRCReturn(rc, rc);
478
479	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
480	AssertRCReturn(rc, rc);
481
482	#ifdef VBOX_WITH_NMI
483	/*
484	* Map the host APIC into GC - This is AMD/Intel + Host OS specific!
485	*/
486	rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
487	X86_PTE_P \| X86_PTE_RW \| X86_PTE_PWT \| X86_PTE_PCD \| X86_PTE_A \| X86_PTE_D);
488	AssertRCReturn(rc, rc);
489	#endif
490
491	#ifdef VBOX_STRICT_VMM_STACK
492	/*
493	* Setup the stack guard pages: Two inaccessible pages at each sides of the
494	* stack to catch over/under-flows.
495	*/
496	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
497	{
498	uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
499
500	memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
501	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /fSet/);
502
503	memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
504	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /fSet/);
505	}
506	pVM->vmm.s.fStackGuardsStationed = true;
507	#endif
508
509	/*
510	* Disable the periodic preemption timers if we can use the VMX-preemption
511	* timer instead.
512	*/
513	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
514	&& HWACCMR3IsVmxPreemptionTimerUsed(pVM))
515	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
516	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
517
518	return VINF_SUCCESS;
519	}
520
521
522	/**
523	* Initializes the R0 VMM.
524	*
525	* @returns VBox status code.
526	* @param pVM The VM to operate on.
527	*/
528	VMMR3DECL(int) VMMR3InitR0(PVM pVM)
529	{
530	int rc;
531	PVMCPU pVCpu = VMMGetCpu(pVM);
532	Assert(pVCpu && pVCpu->idCpu == 0);
533
534	#ifdef LOG_ENABLED
535	/*
536	* Initialize the ring-0 logger if we haven't done so yet.
537	*/
538	if ( pVCpu->vmm.s.pR0LoggerR3
539	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
540	{
541	rc = VMMR3UpdateLoggers(pVM);
542	if (RT_FAILURE(rc))
543	return rc;
544	}
545	#endif
546
547	/*
548	* Call Ring-0 entry with init code.
549	*/
550	for (;;)
551	{
552	#ifdef NO_SUPCALLR0VMM
553	//rc = VERR_GENERAL_FAILURE;
554	rc = VINF_SUCCESS;
555	#else
556	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
557	#endif
558	/*
559	* Flush the logs.
560	*/
561	#ifdef LOG_ENABLED
562	if ( pVCpu->vmm.s.pR0LoggerR3
563	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
564	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
565	#endif
566	if (rc != VINF_VMM_CALL_HOST)
567	break;
568	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
569	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
570	break;
571	/* Resume R0 */
572	}
573
574	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
575	{
576	LogRel(("R0 init failed, rc=%Rra\n", rc));
577	if (RT_SUCCESS(rc))
578	rc = VERR_INTERNAL_ERROR;
579	}
580	return rc;
581	}
582
583
584	/**
585	* Initializes the RC VMM.
586	*
587	* @returns VBox status code.
588	* @param pVM The VM to operate on.
589	*/
590	VMMR3DECL(int) VMMR3InitRC(PVM pVM)
591	{
592	PVMCPU pVCpu = VMMGetCpu(pVM);
593	Assert(pVCpu && pVCpu->idCpu == 0);
594
595	/* In VMX mode, there's no need to init RC. */
596	if (pVM->vmm.s.fSwitcherDisabled)
597	return VINF_SUCCESS;
598
599	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
600
601	/*
602	* Call VMMGCInit():
603	* -# resolve the address.
604	* -# setup stackframe and EIP to use the trampoline.
605	* -# do a generic hypervisor call.
606	*/
607	RTRCPTR RCPtrEP;
608	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
609	if (RT_SUCCESS(rc))
610	{
611	CPUMHyperSetCtxCore(pVCpu, NULL);
612	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
613	uint64_t u64TS = RTTimeProgramStartNanoTS();
614	CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
615	CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
616	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
617	CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
618	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
619	CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
620	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
621	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
622	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
623
624	for (;;)
625	{
626	#ifdef NO_SUPCALLR0VMM
627	//rc = VERR_GENERAL_FAILURE;
628	rc = VINF_SUCCESS;
629	#else
630	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
631	#endif
632	#ifdef LOG_ENABLED
633	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
634	if ( pLogger
635	&& pLogger->offScratch > 0)
636	RTLogFlushRC(NULL, pLogger);
637	#endif
638	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
639	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
640	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
641	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
642	#endif
643	if (rc != VINF_VMM_CALL_HOST)
644	break;
645	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
646	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
647	break;
648	}
649
650	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
651	{
652	VMMR3FatalDump(pVM, pVCpu, rc);
653	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
654	rc = VERR_INTERNAL_ERROR;
655	}
656	AssertRC(rc);
657	}
658	return rc;
659	}
660
661
662	/**
663	* Terminate the VMM bits.
664	*
665	* @returns VINF_SUCCESS.
666	* @param pVM The VM handle.
667	*/
668	VMMR3DECL(int) VMMR3Term(PVM pVM)
669	{
670	PVMCPU pVCpu = VMMGetCpu(pVM);
671	Assert(pVCpu && pVCpu->idCpu == 0);
672
673	/*
674	* Call Ring-0 entry with termination code.
675	*/
676	int rc;
677	for (;;)
678	{
679	#ifdef NO_SUPCALLR0VMM
680	//rc = VERR_GENERAL_FAILURE;
681	rc = VINF_SUCCESS;
682	#else
683	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
684	#endif
685	/*
686	* Flush the logs.
687	*/
688	#ifdef LOG_ENABLED
689	if ( pVCpu->vmm.s.pR0LoggerR3
690	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
691	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
692	#endif
693	if (rc != VINF_VMM_CALL_HOST)
694	break;
695	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
696	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
697	break;
698	/* Resume R0 */
699	}
700	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
701	{
702	LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
703	if (RT_SUCCESS(rc))
704	rc = VERR_INTERNAL_ERROR;
705	}
706
707	RTCritSectDelete(&pVM->vmm.s.CritSectSync);
708	for (VMCPUID i = 0; i < pVM->cCpus; i++)
709	{
710	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
711	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
712	}
713	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
714	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
715	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
716	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
717	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
718	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
719	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
720	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
721
722	#ifdef VBOX_STRICT_VMM_STACK
723	/*
724	* Make the two stack guard pages present again.
725	*/
726	if (pVM->vmm.s.fStackGuardsStationed)
727	{
728	for (VMCPUID i = 0; i < pVM->cCpus; i++)
729	{
730	uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
731	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /fSet/);
732	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /fSet/);
733	}
734	pVM->vmm.s.fStackGuardsStationed = false;
735	}
736	#endif
737	return rc;
738	}
739
740
741	/**
742	* Terminates the per-VCPU VMM.
743	*
744	* Termination means cleaning up and freeing all resources,
745	* the VM it self is at this point powered off or suspended.
746	*
747	* @returns VBox status code.
748	* @param pVM The VM to operate on.
749	*/
750	VMMR3DECL(int) VMMR3TermCPU(PVM pVM)
751	{
752	return VINF_SUCCESS;
753	}
754
755
756	/**
757	* Applies relocations to data and code managed by this
758	* component. This function will be called at init and
759	* whenever the VMM need to relocate it self inside the GC.
760	*
761	* The VMM will need to apply relocations to the core code.
762	*
763	* @param pVM The VM handle.
764	* @param offDelta The relocation delta.
765	*/
766	VMMR3DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
767	{
768	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
769
770	/*
771	* Recalc the RC address.
772	*/
773	#ifdef VBOX_WITH_RAW_MODE
774	pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
775	#endif
776
777	/*
778	* The stack.
779	*/
780	for (VMCPUID i = 0; i < pVM->cCpus; i++)
781	{
782	PVMCPU pVCpu = &pVM->aCpus[i];
783
784	CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
785
786	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
787	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
788	}
789
790	/*
791	* All the switchers.
792	*/
793	vmmR3SwitcherRelocate(pVM, offDelta);
794
795	/*
796	* Get other RC entry points.
797	*/
798	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
799	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
800
801	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
802	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
803
804	/*
805	* Update the logger.
806	*/
807	VMMR3UpdateLoggers(pVM);
808	}
809
810
811	/**
812	* Updates the settings for the RC and R0 loggers.
813	*
814	* @returns VBox status code.
815	* @param pVM The VM handle.
816	*/
817	VMMR3DECL(int) VMMR3UpdateLoggers(PVM pVM)
818	{
819	/*
820	* Simply clone the logger instance (for RC).
821	*/
822	int rc = VINF_SUCCESS;
823	RTRCPTR RCPtrLoggerFlush = 0;
824
825	if (pVM->vmm.s.pRCLoggerR3
826	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
827	\|\| pVM->vmm.s.pRCRelLoggerR3
828	#endif
829	)
830	{
831	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
832	AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
833	}
834
835	if (pVM->vmm.s.pRCLoggerR3)
836	{
837	RTRCPTR RCPtrLoggerWrapper = 0;
838	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
839	AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
840
841	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
842	rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
843	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
844	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
845	}
846
847	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
848	if (pVM->vmm.s.pRCRelLoggerR3)
849	{
850	RTRCPTR RCPtrLoggerWrapper = 0;
851	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
852	AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
853
854	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
855	rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
856	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
857	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
858	}
859	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
860
861	#ifdef LOG_ENABLED
862	/*
863	* For the ring-0 EMT logger, we use a per-thread logger instance
864	* in ring-0. Only initialize it once.
865	*/
866	for (VMCPUID i = 0; i < pVM->cCpus; i++)
867	{
868	PVMCPU pVCpu = &pVM->aCpus[i];
869	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
870	if (pR0LoggerR3)
871	{
872	if (!pR0LoggerR3->fCreated)
873	{
874	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
875	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
876	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
877
878	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
879	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
880	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
881
882	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
883	(PFNRTLOGGER )&pfnLoggerWrapper, (PFNRTLOGFLUSH )&pfnLoggerFlush,
884	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
885	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
886
887	RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
888	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
889	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
890	rc = RTLogSetCustomPrefixCallback(&pR0LoggerR3->Logger, (PFNRTLOGPREFIX )&pfnLoggerPrefix, NULL);
891	AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
892
893	pR0LoggerR3->idCpu = i;
894	pR0LoggerR3->fCreated = true;
895	pR0LoggerR3->fFlushingDisabled = false;
896
897	}
898
899	rc = RTLogCopyGroupsAndFlags(&pR0LoggerR3->Logger, NULL /* default */, pVM->vmm.s.pRCLoggerR3->fFlags, RTLOGFLAGS_BUFFERED);
900	AssertRC(rc);
901	}
902	}
903	#endif
904	return rc;
905	}
906
907
908	/**
909	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
910	*
911	* @returns Pointer to the buffer.
912	* @param pVM The VM handle.
913	*/
914	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
915	{
916	if (HWACCMIsEnabled(pVM))
917	return pVM->vmm.s.szRing0AssertMsg1;
918
919	RTRCPTR RCPtr;
920	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
921	if (RT_SUCCESS(rc))
922	return (const char *)MMHyperRCToR3(pVM, RCPtr);
923
924	return NULL;
925	}
926
927
928	/**
929	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
930	*
931	* @returns Pointer to the buffer.
932	* @param pVM The VM handle.
933	*/
934	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
935	{
936	if (HWACCMIsEnabled(pVM))
937	return pVM->vmm.s.szRing0AssertMsg2;
938
939	RTRCPTR RCPtr;
940	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
941	if (RT_SUCCESS(rc))
942	return (const char *)MMHyperRCToR3(pVM, RCPtr);
943
944	return NULL;
945	}
946
947
948	/**
949	* Execute state save operation.
950	*
951	* @returns VBox status code.
952	* @param pVM VM Handle.
953	* @param pSSM SSM operation handle.
954	*/
955	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
956	{
957	LogFlow(("vmmR3Save:\n"));
958
959	/*
960	* Save the started/stopped state of all CPUs except 0 as it will always
961	* be running. This avoids breaking the saved state version. :-)
962	*/
963	for (VMCPUID i = 1; i < pVM->cCpus; i++)
964	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
965
966	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
967	}
968
969
970	/**
971	* Execute state load operation.
972	*
973	* @returns VBox status code.
974	* @param pVM VM Handle.
975	* @param pSSM SSM operation handle.
976	* @param uVersion Data layout version.
977	* @param uPass The data pass.
978	*/
979	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
980	{
981	LogFlow(("vmmR3Load:\n"));
982	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
983
984	/*
985	* Validate version.
986	*/
987	if ( uVersion != VMM_SAVED_STATE_VERSION
988	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
989	{
990	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
991	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
992	}
993
994	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
995	{
996	/* Ignore the stack bottom, stack pointer and stack bits. */
997	RTRCPTR RCPtrIgnored;
998	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
999	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1000	#ifdef RT_OS_DARWIN
1001	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1002	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1003	&& SSMR3HandleRevision(pSSM) >= 48858
1004	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1005	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1006	)
1007	SSMR3Skip(pSSM, 16384);
1008	else
1009	SSMR3Skip(pSSM, 8192);
1010	#else
1011	SSMR3Skip(pSSM, 8192);
1012	#endif
1013	}
1014
1015	/*
1016	* Restore the VMCPU states. VCPU 0 is always started.
1017	*/
1018	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1019	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1020	{
1021	bool fStarted;
1022	int rc = SSMR3GetBool(pSSM, &fStarted);
1023	if (RT_FAILURE(rc))
1024	return rc;
1025	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1026	}
1027
1028	/* terminator */
1029	uint32_t u32;
1030	int rc = SSMR3GetU32(pSSM, &u32);
1031	if (RT_FAILURE(rc))
1032	return rc;
1033	if (u32 != UINT32_MAX)
1034	{
1035	AssertMsgFailed(("u32=%#x\n", u32));
1036	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1037	}
1038	return VINF_SUCCESS;
1039	}
1040
1041
1042	/**
1043	* Resolve a builtin RC symbol.
1044	*
1045	* Called by PDM when loading or relocating RC modules.
1046	*
1047	* @returns VBox status
1048	* @param pVM VM Handle.
1049	* @param pszSymbol Symbol to resolv
1050	* @param pRCPtrValue Where to store the symbol value.
1051	*
1052	* @remark This has to work before VMMR3Relocate() is called.
1053	*/
1054	VMMR3DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1055	{
1056	if (!strcmp(pszSymbol, "g_Logger"))
1057	{
1058	if (pVM->vmm.s.pRCLoggerR3)
1059	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1060	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1061	}
1062	else if (!strcmp(pszSymbol, "g_RelLogger"))
1063	{
1064	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1065	if (pVM->vmm.s.pRCRelLoggerR3)
1066	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1067	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1068	#else
1069	*pRCPtrValue = NIL_RTRCPTR;
1070	#endif
1071	}
1072	else
1073	return VERR_SYMBOL_NOT_FOUND;
1074	return VINF_SUCCESS;
1075	}
1076
1077
1078	/**
1079	* Suspends the CPU yielder.
1080	*
1081	* @param pVM The VM handle.
1082	*/
1083	VMMR3DECL(void) VMMR3YieldSuspend(PVM pVM)
1084	{
1085	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1086	if (!pVM->vmm.s.cYieldResumeMillies)
1087	{
1088	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1089	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1090	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1091	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1092	else
1093	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1094	TMTimerStop(pVM->vmm.s.pYieldTimer);
1095	}
1096	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1097	}
1098
1099
1100	/**
1101	* Stops the CPU yielder.
1102	*
1103	* @param pVM The VM handle.
1104	*/
1105	VMMR3DECL(void) VMMR3YieldStop(PVM pVM)
1106	{
1107	if (!pVM->vmm.s.cYieldResumeMillies)
1108	TMTimerStop(pVM->vmm.s.pYieldTimer);
1109	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1110	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1111	}
1112
1113
1114	/**
1115	* Resumes the CPU yielder when it has been a suspended or stopped.
1116	*
1117	* @param pVM The VM handle.
1118	*/
1119	VMMR3DECL(void) VMMR3YieldResume(PVM pVM)
1120	{
1121	if (pVM->vmm.s.cYieldResumeMillies)
1122	{
1123	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1124	pVM->vmm.s.cYieldResumeMillies = 0;
1125	}
1126	}
1127
1128
1129	/**
1130	* Internal timer callback function.
1131	*
1132	* @param pVM The VM.
1133	* @param pTimer The timer handle.
1134	* @param pvUser User argument specified upon timer creation.
1135	*/
1136	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1137	{
1138	/*
1139	* This really needs some careful tuning. While we shouldn't be too greedy since
1140	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1141	* because that'll cause us to stop up.
1142	*
1143	* The current logic is to use the default interval when there is no lag worth
1144	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1145	*
1146	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1147	* so the lag is up to date.)
1148	*/
1149	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1150	if ( u64Lag < 50000000 /* 50ms */
1151	\|\| ( u64Lag < 1000000000 /* 1s */
1152	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1153	)
1154	{
1155	uint64_t u64Elapsed = RTTimeNanoTS();
1156	pVM->vmm.s.u64LastYield = u64Elapsed;
1157
1158	RTThreadYield();
1159
1160	#ifdef LOG_ENABLED
1161	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1162	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1163	#endif
1164	}
1165	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1166	}
1167
1168
1169	/**
1170	* Executes guest code in the raw-mode context.
1171	*
1172	* @param pVM VM handle.
1173	* @param pVCpu The VMCPU to operate on.
1174	*/
1175	VMMR3DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1176	{
1177	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1178
1179	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1180
1181	/*
1182	* Set the EIP and ESP.
1183	*/
1184	CPUMSetHyperEIP(pVCpu, CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1185	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1186	: pVM->vmm.s.pfnCPUMRCResumeGuest);
1187	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
1188
1189	/*
1190	* We hide log flushes (outer) and hypervisor interrupts (inner).
1191	*/
1192	for (;;)
1193	{
1194	#ifdef VBOX_STRICT
1195	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1196	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1197	PGMMapCheck(pVM);
1198	#endif
1199	int rc;
1200	do
1201	{
1202	#ifdef NO_SUPCALLR0VMM
1203	rc = VERR_GENERAL_FAILURE;
1204	#else
1205	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1206	if (RT_LIKELY(rc == VINF_SUCCESS))
1207	rc = pVCpu->vmm.s.iLastGZRc;
1208	#endif
1209	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1210
1211	/*
1212	* Flush the logs.
1213	*/
1214	#ifdef LOG_ENABLED
1215	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1216	if ( pLogger
1217	&& pLogger->offScratch > 0)
1218	RTLogFlushRC(NULL, pLogger);
1219	#endif
1220	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1221	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1222	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1223	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1224	#endif
1225	if (rc != VINF_VMM_CALL_HOST)
1226	{
1227	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1228	return rc;
1229	}
1230	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1231	if (RT_FAILURE(rc))
1232	return rc;
1233	/* Resume GC */
1234	}
1235	}
1236
1237
1238	/**
1239	* Executes guest code (Intel VT-x and AMD-V).
1240	*
1241	* @param pVM VM handle.
1242	* @param pVCpu The VMCPU to operate on.
1243	*/
1244	VMMR3DECL(int) VMMR3HwAccRunGC(PVM pVM, PVMCPU pVCpu)
1245	{
1246	Log2(("VMMR3HwAccRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1247
1248	for (;;)
1249	{
1250	int rc;
1251	do
1252	{
1253	#ifdef NO_SUPCALLR0VMM
1254	rc = VERR_GENERAL_FAILURE;
1255	#else
1256	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HWACC_RUN, pVCpu->idCpu);
1257	if (RT_LIKELY(rc == VINF_SUCCESS))
1258	rc = pVCpu->vmm.s.iLastGZRc;
1259	#endif
1260	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1261
1262	#ifdef LOG_ENABLED
1263	/*
1264	* Flush the log
1265	*/
1266	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1267	if ( pR0LoggerR3
1268	&& pR0LoggerR3->Logger.offScratch > 0)
1269	RTLogFlushToLogger(&pR0LoggerR3->Logger, NULL);
1270	#endif /* !LOG_ENABLED */
1271	if (rc != VINF_VMM_CALL_HOST)
1272	{
1273	Log2(("VMMR3HwAccRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1274	return rc;
1275	}
1276	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1277	if (RT_FAILURE(rc))
1278	return rc;
1279	/* Resume R0 */
1280	}
1281	}
1282
1283	/**
1284	* VCPU worker for VMMSendSipi.
1285	*
1286	* @param pVM The VM to operate on.
1287	* @param idCpu Virtual CPU to perform SIPI on
1288	* @param uVector SIPI vector
1289	*/
1290	DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1291	{
1292	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1293	VMCPU_ASSERT_EMT(pVCpu);
1294
1295	/** @todo what are we supposed to do if the processor is already running? */
1296	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1297	return VERR_ACCESS_DENIED;
1298
1299
1300	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1301
1302	pCtx->cs = uVector << 8;
1303	pCtx->csHid.u64Base = uVector << 12;
1304	pCtx->csHid.u32Limit = 0x0000ffff;
1305	pCtx->rip = 0;
1306
1307	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1308
1309	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1310	EMSetState(pVCpu, EMSTATE_HALTED);
1311	return VINF_EM_RESCHEDULE;
1312	# else /* And if we go the VMCPU::enmState way it can stay here. */
1313	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1314	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1315	return VINF_SUCCESS;
1316	# endif
1317	}
1318
1319	DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1320	{
1321	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1322	VMCPU_ASSERT_EMT(pVCpu);
1323
1324	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1325	CPUMR3ResetCpu(pVCpu);
1326	return VINF_EM_WAIT_SIPI;
1327	}
1328
1329	/**
1330	* Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1331	* and unhalting processor
1332	*
1333	* @param pVM The VM to operate on.
1334	* @param idCpu Virtual CPU to perform SIPI on
1335	* @param uVector SIPI vector
1336	*/
1337	VMMR3DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1338	{
1339	AssertReturnVoid(idCpu < pVM->cCpus);
1340
1341	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1342	AssertRC(rc);
1343	}
1344
1345	/**
1346	* Sends init IPI to the virtual CPU.
1347	*
1348	* @param pVM The VM to operate on.
1349	* @param idCpu Virtual CPU to perform int IPI on
1350	*/
1351	VMMR3DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1352	{
1353	AssertReturnVoid(idCpu < pVM->cCpus);
1354
1355	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1356	AssertRC(rc);
1357	}
1358
1359	/**
1360	* Registers the guest memory range that can be used for patching
1361	*
1362	* @returns VBox status code.
1363	* @param pVM The VM to operate on.
1364	* @param pPatchMem Patch memory range
1365	* @param cbPatchMem Size of the memory range
1366	*/
1367	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1368	{
1369	if (HWACCMIsEnabled(pVM))
1370	return HWACMMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1371
1372	return VERR_NOT_SUPPORTED;
1373	}
1374
1375	/**
1376	* Deregisters the guest memory range that can be used for patching
1377	*
1378	* @returns VBox status code.
1379	* @param pVM The VM to operate on.
1380	* @param pPatchMem Patch memory range
1381	* @param cbPatchMem Size of the memory range
1382	*/
1383	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1384	{
1385	if (HWACCMIsEnabled(pVM))
1386	return HWACMMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1387
1388	return VINF_SUCCESS;
1389	}
1390
1391
1392	/**
1393	* VCPU worker for VMMR3SynchronizeAllVCpus.
1394	*
1395	* @param pVM The VM to operate on.
1396	* @param idCpu Virtual CPU to perform SIPI on
1397	* @param uVector SIPI vector
1398	*/
1399	DECLCALLBACK(int) vmmR3SyncVCpu(PVM pVM)
1400	{
1401	/* Block until the job in the caller has finished. */
1402	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1403	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1404	return VINF_SUCCESS;
1405	}
1406
1407
1408	/**
1409	* Atomically execute a callback handler
1410	* Note: This is very expensive; avoid using it frequently!
1411	*
1412	* @param pVM The VM to operate on.
1413	* @param pfnHandler Callback handler
1414	* @param pvUser User specified parameter
1415	*
1416	* @thread EMT
1417	*/
1418	VMMR3DECL(int) VMMR3AtomicExecuteHandler(PVM pVM, PFNATOMICHANDLER pfnHandler, void *pvUser)
1419	{
1420	int rc;
1421	PVMCPU pVCpu = VMMGetCpu(pVM);
1422	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1423
1424	/* Shortcut for the uniprocessor case. */
1425	if (pVM->cCpus == 1)
1426	return pfnHandler(pVM, pvUser);
1427
1428	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1429	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
1430	{
1431	if (idCpu != pVCpu->idCpu)
1432	{
1433	rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SyncVCpu, 1, pVM);
1434	AssertRC(rc);
1435	}
1436	}
1437	/* Wait until all other VCPUs are waiting for us. */
1438	while (RTCritSectGetWaiters(&pVM->vmm.s.CritSectSync) != (int32_t)(pVM->cCpus - 1))
1439	RTThreadSleep(1);
1440
1441	rc = pfnHandler(pVM, pvUser);
1442	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1443	return rc;
1444	}
1445
1446
1447	/**
1448	* Count returns and have the last non-caller EMT wake up the caller.
1449	*
1450	* @returns VBox strict informational status code for EM scheduling. No failures
1451	* will be returned here, those are for the caller only.
1452	*
1453	* @param pVM The VM handle.
1454	*/
1455	DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1456	{
1457	int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1458	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1459	if (cReturned == pVM->cCpus - 1U)
1460	{
1461	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1462	AssertLogRelRC(rc);
1463	}
1464
1465	AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1466	\|\| (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1467	("%Rrc\n", rcRet),
1468	VERR_IPE_UNEXPECTED_INFO_STATUS);
1469	return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1470	}
1471
1472
1473	/**
1474	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1475	*
1476	* @returns VBox strict informational status code for EM scheduling. No failures
1477	* will be returned here, those are for the caller only. When
1478	* fIsCaller is set, VINF_SUCESS is always returned.
1479	*
1480	* @param pVM The VM handle.
1481	* @param pVCpu The VMCPU structure for the calling EMT.
1482	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1483	* not.
1484	* @param fFlags The flags.
1485	* @param pfnRendezvous The callback.
1486	* @param pvUser The user argument for the callback.
1487	*/
1488	static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1489	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1490	{
1491	int rc;
1492
1493	/*
1494	* Enter, the last EMT triggers the next callback phase.
1495	*/
1496	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1497	if (cEntered != pVM->cCpus)
1498	{
1499	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1500	{
1501	/* Wait for our turn. */
1502	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1503	AssertLogRelRC(rc);
1504	}
1505	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1506	{
1507	/* Wait for the last EMT to arrive and wake everyone up. */
1508	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1509	AssertLogRelRC(rc);
1510	}
1511	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1512	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1513	{
1514	/* Wait for our turn. */
1515	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1516	AssertLogRelRC(rc);
1517	}
1518	else
1519	{
1520	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1521
1522	/*
1523	* The execute once is handled specially to optimize the code flow.
1524	*
1525	* The last EMT to arrive will perform the callback and the other
1526	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1527	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1528	* returns, that EMT will initiate the normal return sequence.
1529	*/
1530	if (!fIsCaller)
1531	{
1532	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1533	AssertLogRelRC(rc);
1534
1535	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1536	}
1537	return VINF_SUCCESS;
1538	}
1539	}
1540	else
1541	{
1542	/*
1543	* All EMTs are waiting, clear the FF and take action according to the
1544	* execution method.
1545	*/
1546	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1547
1548	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1549	{
1550	/* Wake up everyone. */
1551	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1552	AssertLogRelRC(rc);
1553	}
1554	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1555	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1556	{
1557	/* Figure out who to wake up and wake it up. If it's ourself, then
1558	it's easy otherwise wait for our turn. */
1559	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1560	? 0
1561	: pVM->cCpus - 1U;
1562	if (pVCpu->idCpu != iFirst)
1563	{
1564	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1565	AssertLogRelRC(rc);
1566	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1567	AssertLogRelRC(rc);
1568	}
1569	}
1570	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1571	}
1572
1573
1574	/*
1575	* Do the callback and update the status if necessary.
1576	*/
1577	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1578	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1579	{
1580	VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1581	if (rcStrict != VINF_SUCCESS)
1582	{
1583	AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1584	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1585	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1586	int32_t i32RendezvousStatus;
1587	do
1588	{
1589	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1590	if ( rcStrict == i32RendezvousStatus
1591	\|\| RT_FAILURE(i32RendezvousStatus)
1592	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1593	&& rcStrict > i32RendezvousStatus))
1594	break;
1595	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1596	}
1597	}
1598
1599	/*
1600	* Increment the done counter and take action depending on whether we're
1601	* the last to finish callback execution.
1602	*/
1603	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1604	if ( cDone != pVM->cCpus
1605	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1606	{
1607	/* Signal the next EMT? */
1608	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1609	{
1610	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1611	AssertLogRelRC(rc);
1612	}
1613	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1614	{
1615	Assert(cDone == pVCpu->idCpu + 1U);
1616	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1617	AssertLogRelRC(rc);
1618	}
1619	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1620	{
1621	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1622	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1623	AssertLogRelRC(rc);
1624	}
1625
1626	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1627	if (!fIsCaller)
1628	{
1629	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1630	AssertLogRelRC(rc);
1631	}
1632	}
1633	else
1634	{
1635	/* Callback execution is all done, tell the rest to return. */
1636	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1637	AssertLogRelRC(rc);
1638	}
1639
1640	if (!fIsCaller)
1641	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1642	return VINF_SUCCESS;
1643	}
1644
1645
1646	/**
1647	* Called in response to VM_FF_EMT_RENDEZVOUS.
1648	*
1649	* @returns VBox strict status code - EM scheduling. No errors will be returned
1650	* here, nor will any non-EM scheduling status codes be returned.
1651	*
1652	* @param pVM The VM handle
1653	* @param pVCpu The handle of the calling EMT.
1654	*
1655	* @thread EMT
1656	*/
1657	VMMR3DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1658	{
1659	return vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1660	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1661	}
1662
1663
1664	/**
1665	* EMT rendezvous.
1666	*
1667	* Gathers all the EMTs and execute some code on each of them, either in a one
1668	* by one fashion or all at once.
1669	*
1670	* @returns VBox strict status code. This will be the the first error,
1671	* VINF_SUCCESS, or an EM scheduling status code.
1672	*
1673	* @param pVM The VM handle.
1674	* @param fFlags Flags indicating execution methods. See
1675	* grp_VMMR3EmtRendezvous_fFlags.
1676	* @param pfnRendezvous The callback.
1677	* @param pvUser User argument for the callback.
1678	*
1679	* @thread Any.
1680	*/
1681	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1682	{
1683	/*
1684	* Validate input.
1685	*/
1686	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1687	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1688	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1689	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1690	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1691	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1692	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1693
1694	VBOXSTRICTRC rcStrict;
1695	PVMCPU pVCpu = VMMGetCpu(pVM);
1696	if (!pVCpu)
1697	/*
1698	* Forward the request to an EMT thread.
1699	*/
1700	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1701	(PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1702	else if (pVM->cCpus == 1)
1703	/*
1704	* Shortcut for the single EMT case.
1705	*/
1706	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1707	else
1708	{
1709	/*
1710	* Spin lock. If busy, wait for the other EMT to finish while keeping a
1711	* lookout of the RENDEZVOUS FF.
1712	*/
1713	int rc;
1714	rcStrict = VINF_SUCCESS;
1715	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1716	{
1717	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1718	{
1719	if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1720	{
1721	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1722	if ( rc != VINF_SUCCESS
1723	&& ( rcStrict == VINF_SUCCESS
1724	\|\| rcStrict > rc))
1725	rcStrict = rc;
1726	/** @todo Perhaps deal with termination here? */
1727	}
1728	ASMNopPause();
1729	}
1730	}
1731	Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1732
1733	/*
1734	* Clear the slate. This is a semaphore ping-pong orgy. :-)
1735	*/
1736	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1737	{
1738	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1739	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1740	}
1741	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1742	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1743	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1744	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1745	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1746	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1747	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1748	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1749	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1750	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1751	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1752
1753	/*
1754	* Set the FF and poke the other EMTs.
1755	*/
1756	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1757	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1758
1759	/*
1760	* Do the same ourselves.
1761	*/
1762	vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1763
1764	/*
1765	* The caller waits for the other EMTs to be done and return before doing
1766	* the cleanup. This makes away with wakeup / reset races we would otherwise
1767	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1768	*/
1769	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1770	AssertLogRelRC(rc);
1771
1772	/*
1773	* Get the return code and clean up a little bit.
1774	*/
1775	int rcMy = pVM->vmm.s.i32RendezvousStatus;
1776	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1777
1778	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1779
1780	/*
1781	* Merge rcStrict and rcMy.
1782	*/
1783	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1784	if ( rcMy != VINF_SUCCESS
1785	&& ( rcStrict == VINF_SUCCESS
1786	\|\| rcStrict > rcMy))
1787	rcStrict = rcMy;
1788	}
1789
1790	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1791	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1792	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1793	VERR_IPE_UNEXPECTED_INFO_STATUS);
1794	return VBOXSTRICTRC_VAL(rcStrict);
1795	}
1796
1797
1798	/**
1799	* Read from the ring 0 jump buffer stack
1800	*
1801	* @returns VBox status code.
1802	*
1803	* @param pVM Pointer to the shared VM structure.
1804	* @param idCpu The ID of the source CPU context (for the address).
1805	* @param R0Addr Where to start reading.
1806	* @param pvBuf Where to store the data we've read.
1807	* @param cbRead The number of bytes to read.
1808	*/
1809	VMMR3DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1810	{
1811	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1812	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1813
1814	#ifdef VMM_R0_SWITCH_STACK
1815	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1816	#else
1817	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1818	#endif
1819	if ( off > VMM_STACK_SIZE
1820	\|\| off + cbRead >= VMM_STACK_SIZE)
1821	return VERR_INVALID_POINTER;
1822
1823	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1824	return VINF_SUCCESS;
1825	}
1826
1827
1828	/**
1829	* Calls a RC function.
1830	*
1831	* @param pVM The VM handle.
1832	* @param RCPtrEntry The address of the RC function.
1833	* @param cArgs The number of arguments in the ....
1834	* @param ... Arguments to the function.
1835	*/
1836	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1837	{
1838	va_list args;
1839	va_start(args, cArgs);
1840	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1841	va_end(args);
1842	return rc;
1843	}
1844
1845
1846	/**
1847	* Calls a RC function.
1848	*
1849	* @param pVM The VM handle.
1850	* @param RCPtrEntry The address of the RC function.
1851	* @param cArgs The number of arguments in the ....
1852	* @param args Arguments to the function.
1853	*/
1854	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1855	{
1856	/* Raw mode implies 1 VCPU. */
1857	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1858	PVMCPU pVCpu = &pVM->aCpus[0];
1859
1860	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1861
1862	/*
1863	* Setup the call frame using the trampoline.
1864	*/
1865	CPUMHyperSetCtxCore(pVCpu, NULL);
1866	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1867	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32));
1868	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1869	int i = cArgs;
1870	while (i-- > 0)
1871	*pFrame++ = va_arg(args, RTGCUINTPTR32);
1872
1873	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1874	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1875	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
1876
1877	/*
1878	* We hide log flushes (outer) and hypervisor interrupts (inner).
1879	*/
1880	for (;;)
1881	{
1882	int rc;
1883	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1884	do
1885	{
1886	#ifdef NO_SUPCALLR0VMM
1887	rc = VERR_GENERAL_FAILURE;
1888	#else
1889	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1890	if (RT_LIKELY(rc == VINF_SUCCESS))
1891	rc = pVCpu->vmm.s.iLastGZRc;
1892	#endif
1893	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1894
1895	/*
1896	* Flush the logs.
1897	*/
1898	#ifdef LOG_ENABLED
1899	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1900	if ( pLogger
1901	&& pLogger->offScratch > 0)
1902	RTLogFlushRC(NULL, pLogger);
1903	#endif
1904	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1905	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1906	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1907	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1908	#endif
1909	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
1910	VMMR3FatalDump(pVM, pVCpu, rc);
1911	if (rc != VINF_VMM_CALL_HOST)
1912	{
1913	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1914	return rc;
1915	}
1916	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1917	if (RT_FAILURE(rc))
1918	return rc;
1919	}
1920	}
1921
1922
1923	/**
1924	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1925	*
1926	* @returns VBox status code.
1927	* @param pVM The VM to operate on.
1928	* @param uOperation Operation to execute.
1929	* @param u64Arg Constant argument.
1930	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1931	* details.
1932	*/
1933	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1934	{
1935	PVMCPU pVCpu = VMMGetCpu(pVM);
1936	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1937
1938	/*
1939	* Call Ring-0 entry with init code.
1940	*/
1941	int rc;
1942	for (;;)
1943	{
1944	#ifdef NO_SUPCALLR0VMM
1945	rc = VERR_GENERAL_FAILURE;
1946	#else
1947	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1948	#endif
1949	/*
1950	* Flush the logs.
1951	*/
1952	#ifdef LOG_ENABLED
1953	if ( pVCpu->vmm.s.pR0LoggerR3
1954	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1955	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
1956	#endif
1957	if (rc != VINF_VMM_CALL_HOST)
1958	break;
1959	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1960	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1961	break;
1962	/* Resume R0 */
1963	}
1964
1965	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
1966	("uOperation=%u rc=%Rrc\n", uOperation, rc),
1967	VERR_INTERNAL_ERROR);
1968	return rc;
1969	}
1970
1971
1972	/**
1973	* Resumes executing hypervisor code when interrupted by a queue flush or a
1974	* debug event.
1975	*
1976	* @returns VBox status code.
1977	* @param pVM VM handle.
1978	* @param pVCpu VMCPU handle.
1979	*/
1980	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
1981	{
1982	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
1983	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1984
1985	/*
1986	* We hide log flushes (outer) and hypervisor interrupts (inner).
1987	*/
1988	for (;;)
1989	{
1990	int rc;
1991	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1992	do
1993	{
1994	#ifdef NO_SUPCALLR0VMM
1995	rc = VERR_GENERAL_FAILURE;
1996	#else
1997	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1998	if (RT_LIKELY(rc == VINF_SUCCESS))
1999	rc = pVCpu->vmm.s.iLastGZRc;
2000	#endif
2001	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2002
2003	/*
2004	* Flush the loggers,
2005	*/
2006	#ifdef LOG_ENABLED
2007	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2008	if ( pLogger
2009	&& pLogger->offScratch > 0)
2010	RTLogFlushRC(NULL, pLogger);
2011	#endif
2012	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2013	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2014	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2015	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2016	#endif
2017	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2018	VMMR3FatalDump(pVM, pVCpu, rc);
2019	if (rc != VINF_VMM_CALL_HOST)
2020	{
2021	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2022	return rc;
2023	}
2024	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2025	if (RT_FAILURE(rc))
2026	return rc;
2027	}
2028	}
2029
2030
2031	/**
2032	* Service a call to the ring-3 host code.
2033	*
2034	* @returns VBox status code.
2035	* @param pVM VM handle.
2036	* @param pVCpu VMCPU handle
2037	* @remark Careful with critsects.
2038	*/
2039	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2040	{
2041	/*
2042	* We must also check for pending critsect exits or else we can deadlock
2043	* when entering other critsects here.
2044	*/
2045	if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2046	PDMCritSectFF(pVCpu);
2047
2048	switch (pVCpu->vmm.s.enmCallRing3Operation)
2049	{
2050	/*
2051	* Acquire the PDM lock.
2052	*/
2053	case VMMCALLRING3_PDM_LOCK:
2054	{
2055	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2056	break;
2057	}
2058
2059	/*
2060	* Grow the PGM pool.
2061	*/
2062	case VMMCALLRING3_PGM_POOL_GROW:
2063	{
2064	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2065	break;
2066	}
2067
2068	/*
2069	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2070	*/
2071	case VMMCALLRING3_PGM_MAP_CHUNK:
2072	{
2073	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2074	break;
2075	}
2076
2077	/*
2078	* Allocates more handy pages.
2079	*/
2080	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2081	{
2082	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2083	break;
2084	}
2085
2086	/*
2087	* Allocates a large page.
2088	*/
2089	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2090	{
2091	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2092	break;
2093	}
2094
2095	/*
2096	* Acquire the PGM lock.
2097	*/
2098	case VMMCALLRING3_PGM_LOCK:
2099	{
2100	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2101	break;
2102	}
2103
2104	/*
2105	* Acquire the MM hypervisor heap lock.
2106	*/
2107	case VMMCALLRING3_MMHYPER_LOCK:
2108	{
2109	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2110	break;
2111	}
2112
2113	/*
2114	* Flush REM handler notifications.
2115	*/
2116	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2117	{
2118	REMR3ReplayHandlerNotifications(pVM);
2119	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2120	break;
2121	}
2122
2123	/*
2124	* This is a noop. We just take this route to avoid unnecessary
2125	* tests in the loops.
2126	*/
2127	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2128	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2129	LogAlways(("FLUSH\n"));
2130	break;
2131
2132	/*
2133	* Set the VM error message.
2134	*/
2135	case VMMCALLRING3_VM_SET_ERROR:
2136	VMR3SetErrorWorker(pVM);
2137	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2138	break;
2139
2140	/*
2141	* Set the VM runtime error message.
2142	*/
2143	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2144	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2145	break;
2146
2147	/*
2148	* Signal a ring 0 hypervisor assertion.
2149	* Cancel the longjmp operation that's in progress.
2150	*/
2151	case VMMCALLRING3_VM_R0_ASSERTION:
2152	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2153	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2154	#ifdef RT_ARCH_X86
2155	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2156	#else
2157	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2158	#endif
2159	#ifdef VMM_R0_SWITCH_STACK
2160	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2161	#endif
2162	LogRel((pVM->vmm.s.szRing0AssertMsg1));
2163	LogRel((pVM->vmm.s.szRing0AssertMsg2));
2164	return VERR_VMM_RING0_ASSERTION;
2165
2166	/*
2167	* A forced switch to ring 0 for preemption purposes.
2168	*/
2169	case VMMCALLRING3_VM_R0_PREEMPT:
2170	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2171	break;
2172
2173	case VMMCALLRING3_FTM_SET_CHECKPOINT:
2174	pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2175	break;
2176
2177	default:
2178	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2179	return VERR_INTERNAL_ERROR;
2180	}
2181
2182	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2183	return VINF_SUCCESS;
2184	}
2185
2186
2187	/**
2188	* Displays the Force action Flags.
2189	*
2190	* @param pVM The VM handle.
2191	* @param pHlp The output helpers.
2192	* @param pszArgs The additional arguments (ignored).
2193	*/
2194	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2195	{
2196	int c;
2197	uint32_t f;
2198	#define PRINT_FLAG(prf,flag) do { \
2199	if (f & (prf##flag)) \
2200	{ \
2201	static const char *s_psz = #flag; \
2202	if (!(c % 6)) \
2203	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2204	else \
2205	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2206	c++; \
2207	f &= ~(prf##flag); \
2208	} \
2209	} while (0)
2210
2211	#define PRINT_GROUP(prf,grp,sfx) do { \
2212	if (f & (prf##grp##sfx)) \
2213	{ \
2214	static const char *s_psz = #grp; \
2215	if (!(c % 5)) \
2216	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2217	else \
2218	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2219	c++; \
2220	} \
2221	} while (0)
2222
2223	/*
2224	* The global flags.
2225	*/
2226	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2227	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2228
2229	/* show the flag mnemonics */
2230	c = 0;
2231	f = fGlobalForcedActions;
2232	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2233	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2234	PRINT_FLAG(VM_FF_,PDM_DMA);
2235	PRINT_FLAG(VM_FF_,DBGF);
2236	PRINT_FLAG(VM_FF_,REQUEST);
2237	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2238	PRINT_FLAG(VM_FF_,RESET);
2239	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2240	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2241	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2242	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2243	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2244	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2245	if (f)
2246	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2247	else
2248	pHlp->pfnPrintf(pHlp, "\n");
2249
2250	/* the groups */
2251	c = 0;
2252	f = fGlobalForcedActions;
2253	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2254	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2255	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2256	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2257	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2258	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2259	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2260	PRINT_GROUP(VM_FF_,ALL_BUT_RAW,_MASK);
2261	if (c)
2262	pHlp->pfnPrintf(pHlp, "\n");
2263
2264	/*
2265	* Per CPU flags.
2266	*/
2267	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2268	{
2269	const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2270	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2271
2272	/* show the flag mnemonics */
2273	c = 0;
2274	f = fLocalForcedActions;
2275	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2276	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2277	PRINT_FLAG(VMCPU_FF_,TIMER);
2278	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2279	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2280	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2281	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2282	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2283	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2284	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2285	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2286	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2287	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2288	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2289	PRINT_FLAG(VMCPU_FF_,TO_R3);
2290	if (f)
2291	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2292	else
2293	pHlp->pfnPrintf(pHlp, "\n");
2294
2295	/* the groups */
2296	c = 0;
2297	f = fLocalForcedActions;
2298	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2299	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2300	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2301	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2302	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2303	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2304	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2305	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2306	PRINT_GROUP(VMCPU_FF_,HWACCM_TO_R3,_MASK);
2307	PRINT_GROUP(VMCPU_FF_,ALL_BUT_RAW,_MASK);
2308	if (c)
2309	pHlp->pfnPrintf(pHlp, "\n");
2310	}
2311
2312	#undef PRINT_FLAG
2313	#undef PRINT_GROUP
2314	}
2315

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source: vbox/trunk/src/VBox/VMM/VMM.cpp@ 32725

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