VMM.cpp@ 32792

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1	/* $Id: VMM.cpp 32792 2010-09-28 13:52:18Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually.
27	*
28	* @see grp_vmm, grp_vm
29	*
30	*
31	* @section sec_vmmstate VMM State
32	*
33	* @image html VM_Statechart_Diagram.gif
34	*
35	* To be written.
36	*
37	*
38	* @subsection subsec_vmm_init VMM Initialization
39	*
40	* To be written.
41	*
42	*
43	* @subsection subsec_vmm_term VMM Termination
44	*
45	* To be written.
46	*
47	*/
48
49	/*******************************************************************************
50	* Header Files *
51	*******************************************************************************/
52	#define LOG_GROUP LOG_GROUP_VMM
53	#include <VBox/vmm.h>
54	#include <VBox/vmapi.h>
55	#include <VBox/pgm.h>
56	#include <VBox/cfgm.h>
57	#include <VBox/pdmqueue.h>
58	#include <VBox/pdmcritsect.h>
59	#include <VBox/pdmapi.h>
60	#include <VBox/cpum.h>
61	#include <VBox/mm.h>
62	#include <VBox/iom.h>
63	#include <VBox/trpm.h>
64	#include <VBox/selm.h>
65	#include <VBox/em.h>
66	#include <VBox/sup.h>
67	#include <VBox/dbgf.h>
68	#include <VBox/csam.h>
69	#include <VBox/patm.h>
70	#include <VBox/rem.h>
71	#include <VBox/ssm.h>
72	#include <VBox/tm.h>
73	#include "VMMInternal.h"
74	#include "VMMSwitcher/VMMSwitcher.h"
75	#include <VBox/vm.h>
76	#include <VBox/ftm.h>
77
78	#include <VBox/err.h>
79	#include <VBox/param.h>
80	#include <VBox/version.h>
81	#include <VBox/x86.h>
82	#include <VBox/hwaccm.h>
83	#include <iprt/assert.h>
84	#include <iprt/alloc.h>
85	#include <iprt/asm.h>
86	#include <iprt/time.h>
87	#include <iprt/semaphore.h>
88	#include <iprt/stream.h>
89	#include <iprt/string.h>
90	#include <iprt/stdarg.h>
91	#include <iprt/ctype.h>
92
93
94
95	/*******************************************************************************
96	* Defined Constants And Macros *
97	*******************************************************************************/
98	/** The saved state version. */
99	#define VMM_SAVED_STATE_VERSION 4
100	/** The saved state version used by v3.0 and earlier. (Teleportation) */
101	#define VMM_SAVED_STATE_VERSION_3_0 3
102
103
104	/*******************************************************************************
105	* Internal Functions *
106	*******************************************************************************/
107	static int vmmR3InitStacks(PVM pVM);
108	static int vmmR3InitLoggers(PVM pVM);
109	static void vmmR3InitRegisterStats(PVM pVM);
110	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
111	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
112	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
113	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
114	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
115
116
117	/**
118	* Initializes the VMM.
119	*
120	* @returns VBox status code.
121	* @param pVM The VM to operate on.
122	*/
123	VMMR3DECL(int) VMMR3Init(PVM pVM)
124	{
125	LogFlow(("VMMR3Init\n"));
126
127	/*
128	* Assert alignment, sizes and order.
129	*/
130	AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
131	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
132	AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
133
134	/*
135	* Init basic VM VMM members.
136	*/
137	pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
138	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
139	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
140	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
141	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
142	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
143
144	/** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
145	* The EMT yield interval. The EMT yielding is a hack we employ to play a
146	* bit nicer with the rest of the system (like for instance the GUI).
147	*/
148	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
149	23 /* Value arrived at after experimenting with the grub boot prompt. */);
150	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
151
152
153	/** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
154	* Controls whether we employ per-cpu preemption timers to limit the time
155	* spent executing guest code. This option is not available on all
156	* platforms and we will silently ignore this setting then. If we are
157	* running in VT-x mode, we will use the VMX-preemption timer instead of
158	* this one when possible.
159	*/
160	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
161	rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
162	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
163
164	/*
165	* Initialize the VMM sync critical section and semaphores.
166	*/
167	rc = RTCritSectInit(&pVM->vmm.s.CritSectSync);
168	AssertRCReturn(rc, rc);
169	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
170	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
171	return VERR_NO_MEMORY;
172	for (VMCPUID i = 0; i < pVM->cCpus; i++)
173	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
174	for (VMCPUID i = 0; i < pVM->cCpus; i++)
175	{
176	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
177	AssertRCReturn(rc, rc);
178	}
179	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
180	AssertRCReturn(rc, rc);
181	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
182	AssertRCReturn(rc, rc);
183	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
184	AssertRCReturn(rc, rc);
185	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
186	AssertRCReturn(rc, rc);
187
188	/* GC switchers are enabled by default. Turned off by HWACCM. */
189	pVM->vmm.s.fSwitcherDisabled = false;
190
191	/*
192	* Register the saved state data unit.
193	*/
194	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
195	NULL, NULL, NULL,
196	NULL, vmmR3Save, NULL,
197	NULL, vmmR3Load, NULL);
198	if (RT_FAILURE(rc))
199	return rc;
200
201	/*
202	* Register the Ring-0 VM handle with the session for fast ioctl calls.
203	*/
204	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
205	if (RT_FAILURE(rc))
206	return rc;
207
208	/*
209	* Init various sub-components.
210	*/
211	rc = vmmR3SwitcherInit(pVM);
212	if (RT_SUCCESS(rc))
213	{
214	rc = vmmR3InitStacks(pVM);
215	if (RT_SUCCESS(rc))
216	{
217	rc = vmmR3InitLoggers(pVM);
218
219	#ifdef VBOX_WITH_NMI
220	/*
221	* Allocate mapping for the host APIC.
222	*/
223	if (RT_SUCCESS(rc))
224	{
225	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
226	AssertRC(rc);
227	}
228	#endif
229	if (RT_SUCCESS(rc))
230	{
231	/*
232	* Debug info and statistics.
233	*/
234	DBGFR3InfoRegisterInternal(pVM, "ff", "Displays the current Forced actions Flags.", vmmR3InfoFF);
235	vmmR3InitRegisterStats(pVM);
236
237	return VINF_SUCCESS;
238	}
239	}
240	/** @todo: Need failure cleanup. */
241
242	//more todo in here?
243	//if (RT_SUCCESS(rc))
244	//{
245	//}
246	//int rc2 = vmmR3TermCoreCode(pVM);
247	//AssertRC(rc2));
248	}
249
250	return rc;
251	}
252
253
254	/**
255	* Allocate & setup the VMM RC stack(s) (for EMTs).
256	*
257	* The stacks are also used for long jumps in Ring-0.
258	*
259	* @returns VBox status code.
260	* @param pVM Pointer to the shared VM structure.
261	*
262	* @remarks The optional guard page gets it protection setup up during R3 init
263	* completion because of init order issues.
264	*/
265	static int vmmR3InitStacks(PVM pVM)
266	{
267	int rc = VINF_SUCCESS;
268	#ifdef VMM_R0_SWITCH_STACK
269	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
270	#else
271	uint32_t fFlags = 0;
272	#endif
273
274	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
275	{
276	PVMCPU pVCpu = &pVM->aCpus[idCpu];
277
278	#ifdef VBOX_STRICT_VMM_STACK
279	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
280	#else
281	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
282	#endif
283	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
284	if (RT_SUCCESS(rc))
285	{
286	#ifdef VBOX_STRICT_VMM_STACK
287	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
288	#endif
289	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
290	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
291	if (!VMMIsHwVirtExtForced(pVM))
292	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
293	else
294	#endif
295	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
296	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
297	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
298	AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
299
300	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
301	}
302	}
303
304	return rc;
305	}
306
307
308	/**
309	* Initialize the loggers.
310	*
311	* @returns VBox status code.
312	* @param pVM Pointer to the shared VM structure.
313	*/
314	static int vmmR3InitLoggers(PVM pVM)
315	{
316	int rc;
317
318	/*
319	* Allocate RC & R0 Logger instances (they are finalized in the relocator).
320	*/
321	#ifdef LOG_ENABLED
322	PRTLOGGER pLogger = RTLogDefaultInstance();
323	if (pLogger)
324	{
325	pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
326	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
327	if (RT_FAILURE(rc))
328	return rc;
329	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
330
331	# ifdef VBOX_WITH_R0_LOGGING
332	for (VMCPUID i = 0; i < pVM->cCpus; i++)
333	{
334	PVMCPU pVCpu = &pVM->aCpus[i];
335
336	rc = MMR3HyperAllocOnceNoRelEx(pVM, RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[pLogger->cGroups]),
337	0, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
338	(void **)&pVCpu->vmm.s.pR0LoggerR3);
339	if (RT_FAILURE(rc))
340	return rc;
341	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
342	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
343	pVCpu->vmm.s.pR0LoggerR3->cbLogger = RT_OFFSETOF(RTLOGGER, afGroups[pLogger->cGroups]);
344	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
345	}
346	# endif
347	}
348	#endif /* LOG_ENABLED */
349
350	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
351	/*
352	* Allocate RC release logger instances (finalized in the relocator).
353	*/
354	PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
355	if (pRelLogger)
356	{
357	pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
358	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
359	if (RT_FAILURE(rc))
360	return rc;
361	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
362	}
363	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
364	return VINF_SUCCESS;
365	}
366
367
368	/**
369	* VMMR3Init worker that register the statistics with STAM.
370	*
371	* @param pVM The shared VM structure.
372	*/
373	static void vmmR3InitRegisterStats(PVM pVM)
374	{
375	/*
376	* Statistics.
377	*/
378	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
379	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
380	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
381	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
382	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
383	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
384	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
385	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
386	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
387	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
388	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
389	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
390	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_READ returns.");
391	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_WRITE returns.");
392	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ returns.");
393	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_WRITE returns.");
394	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ_WRITE returns.");
395	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
396	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
397	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
398	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
399	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
400	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
401	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
402	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
403	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
404	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
405	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
406	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
407	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
408	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
409	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
410	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
411	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
412	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
413	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
414	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
415	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
416	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
417	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
418	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
419	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
420	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
421	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
422	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
423	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
424	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HWACCM_PATCH_TPR_INSTR returns.");
425	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
426	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
427	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
428	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
429	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
430	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
431	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
432	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
433	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
434	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
435
436	#ifdef VBOX_WITH_STATISTICS
437	for (VMCPUID i = 0; i < pVM->cCpus; i++)
438	{
439	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
440	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
441	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
442	}
443	#endif
444	}
445
446
447	/**
448	* Initializes the per-VCPU VMM.
449	*
450	* @returns VBox status code.
451	* @param pVM The VM to operate on.
452	*/
453	VMMR3DECL(int) VMMR3InitCPU(PVM pVM)
454	{
455	LogFlow(("VMMR3InitCPU\n"));
456	return VINF_SUCCESS;
457	}
458
459
460	/**
461	* Ring-3 init finalizing.
462	*
463	* @returns VBox status code.
464	* @param pVM The VM handle.
465	*/
466	VMMR3DECL(int) VMMR3InitFinalize(PVM pVM)
467	{
468	int rc;
469
470	/*
471	* Set page attributes to r/w for stack pages.
472	*/
473	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
474	{
475	rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
476	X86_PTE_P \| X86_PTE_A \| X86_PTE_D \| X86_PTE_RW);
477	AssertRCReturn(rc, rc);
478	}
479
480	/*
481	* Create the EMT yield timer.
482	*/
483	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
484	AssertRCReturn(rc, rc);
485
486	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
487	AssertRCReturn(rc, rc);
488
489	#ifdef VBOX_WITH_NMI
490	/*
491	* Map the host APIC into GC - This is AMD/Intel + Host OS specific!
492	*/
493	rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
494	X86_PTE_P \| X86_PTE_RW \| X86_PTE_PWT \| X86_PTE_PCD \| X86_PTE_A \| X86_PTE_D);
495	AssertRCReturn(rc, rc);
496	#endif
497
498	#ifdef VBOX_STRICT_VMM_STACK
499	/*
500	* Setup the stack guard pages: Two inaccessible pages at each sides of the
501	* stack to catch over/under-flows.
502	*/
503	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
504	{
505	uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
506
507	memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
508	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /fSet/);
509
510	memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
511	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /fSet/);
512	}
513	pVM->vmm.s.fStackGuardsStationed = true;
514	#endif
515
516	/*
517	* Disable the periodic preemption timers if we can use the VMX-preemption
518	* timer instead.
519	*/
520	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
521	&& HWACCMR3IsVmxPreemptionTimerUsed(pVM))
522	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
523	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
524
525	return VINF_SUCCESS;
526	}
527
528
529	/**
530	* Initializes the R0 VMM.
531	*
532	* @returns VBox status code.
533	* @param pVM The VM to operate on.
534	*/
535	VMMR3DECL(int) VMMR3InitR0(PVM pVM)
536	{
537	int rc;
538	PVMCPU pVCpu = VMMGetCpu(pVM);
539	Assert(pVCpu && pVCpu->idCpu == 0);
540
541	#ifdef LOG_ENABLED
542	/*
543	* Initialize the ring-0 logger if we haven't done so yet.
544	*/
545	if ( pVCpu->vmm.s.pR0LoggerR3
546	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
547	{
548	rc = VMMR3UpdateLoggers(pVM);
549	if (RT_FAILURE(rc))
550	return rc;
551	}
552	#endif
553
554	/*
555	* Call Ring-0 entry with init code.
556	*/
557	for (;;)
558	{
559	#ifdef NO_SUPCALLR0VMM
560	//rc = VERR_GENERAL_FAILURE;
561	rc = VINF_SUCCESS;
562	#else
563	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
564	#endif
565	/*
566	* Flush the logs.
567	*/
568	#ifdef LOG_ENABLED
569	if ( pVCpu->vmm.s.pR0LoggerR3
570	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
571	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
572	#endif
573	if (rc != VINF_VMM_CALL_HOST)
574	break;
575	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
576	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
577	break;
578	/* Resume R0 */
579	}
580
581	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
582	{
583	LogRel(("R0 init failed, rc=%Rra\n", rc));
584	if (RT_SUCCESS(rc))
585	rc = VERR_INTERNAL_ERROR;
586	}
587	return rc;
588	}
589
590
591	/**
592	* Initializes the RC VMM.
593	*
594	* @returns VBox status code.
595	* @param pVM The VM to operate on.
596	*/
597	VMMR3DECL(int) VMMR3InitRC(PVM pVM)
598	{
599	PVMCPU pVCpu = VMMGetCpu(pVM);
600	Assert(pVCpu && pVCpu->idCpu == 0);
601
602	/* In VMX mode, there's no need to init RC. */
603	if (pVM->vmm.s.fSwitcherDisabled)
604	return VINF_SUCCESS;
605
606	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
607
608	/*
609	* Call VMMGCInit():
610	* -# resolve the address.
611	* -# setup stackframe and EIP to use the trampoline.
612	* -# do a generic hypervisor call.
613	*/
614	RTRCPTR RCPtrEP;
615	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
616	if (RT_SUCCESS(rc))
617	{
618	CPUMHyperSetCtxCore(pVCpu, NULL);
619	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
620	uint64_t u64TS = RTTimeProgramStartNanoTS();
621	CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
622	CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
623	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
624	CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
625	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
626	CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
627	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
628	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
629	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
630
631	for (;;)
632	{
633	#ifdef NO_SUPCALLR0VMM
634	//rc = VERR_GENERAL_FAILURE;
635	rc = VINF_SUCCESS;
636	#else
637	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
638	#endif
639	#ifdef LOG_ENABLED
640	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
641	if ( pLogger
642	&& pLogger->offScratch > 0)
643	RTLogFlushRC(NULL, pLogger);
644	#endif
645	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
646	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
647	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
648	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
649	#endif
650	if (rc != VINF_VMM_CALL_HOST)
651	break;
652	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
653	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
654	break;
655	}
656
657	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
658	{
659	VMMR3FatalDump(pVM, pVCpu, rc);
660	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
661	rc = VERR_INTERNAL_ERROR;
662	}
663	AssertRC(rc);
664	}
665	return rc;
666	}
667
668
669	/**
670	* Terminate the VMM bits.
671	*
672	* @returns VINF_SUCCESS.
673	* @param pVM The VM handle.
674	*/
675	VMMR3DECL(int) VMMR3Term(PVM pVM)
676	{
677	PVMCPU pVCpu = VMMGetCpu(pVM);
678	Assert(pVCpu && pVCpu->idCpu == 0);
679
680	/*
681	* Call Ring-0 entry with termination code.
682	*/
683	int rc;
684	for (;;)
685	{
686	#ifdef NO_SUPCALLR0VMM
687	//rc = VERR_GENERAL_FAILURE;
688	rc = VINF_SUCCESS;
689	#else
690	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
691	#endif
692	/*
693	* Flush the logs.
694	*/
695	#ifdef LOG_ENABLED
696	if ( pVCpu->vmm.s.pR0LoggerR3
697	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
698	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
699	#endif
700	if (rc != VINF_VMM_CALL_HOST)
701	break;
702	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
703	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
704	break;
705	/* Resume R0 */
706	}
707	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
708	{
709	LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
710	if (RT_SUCCESS(rc))
711	rc = VERR_INTERNAL_ERROR;
712	}
713
714	RTCritSectDelete(&pVM->vmm.s.CritSectSync);
715	for (VMCPUID i = 0; i < pVM->cCpus; i++)
716	{
717	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
718	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
719	}
720	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
721	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
722	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
723	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
724	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
725	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
726	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
727	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
728
729	#ifdef VBOX_STRICT_VMM_STACK
730	/*
731	* Make the two stack guard pages present again.
732	*/
733	if (pVM->vmm.s.fStackGuardsStationed)
734	{
735	for (VMCPUID i = 0; i < pVM->cCpus; i++)
736	{
737	uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
738	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /fSet/);
739	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /fSet/);
740	}
741	pVM->vmm.s.fStackGuardsStationed = false;
742	}
743	#endif
744	return rc;
745	}
746
747
748	/**
749	* Terminates the per-VCPU VMM.
750	*
751	* Termination means cleaning up and freeing all resources,
752	* the VM it self is at this point powered off or suspended.
753	*
754	* @returns VBox status code.
755	* @param pVM The VM to operate on.
756	*/
757	VMMR3DECL(int) VMMR3TermCPU(PVM pVM)
758	{
759	return VINF_SUCCESS;
760	}
761
762
763	/**
764	* Applies relocations to data and code managed by this
765	* component. This function will be called at init and
766	* whenever the VMM need to relocate it self inside the GC.
767	*
768	* The VMM will need to apply relocations to the core code.
769	*
770	* @param pVM The VM handle.
771	* @param offDelta The relocation delta.
772	*/
773	VMMR3DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
774	{
775	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
776
777	/*
778	* Recalc the RC address.
779	*/
780	#ifdef VBOX_WITH_RAW_MODE
781	pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
782	#endif
783
784	/*
785	* The stack.
786	*/
787	for (VMCPUID i = 0; i < pVM->cCpus; i++)
788	{
789	PVMCPU pVCpu = &pVM->aCpus[i];
790
791	CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
792
793	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
794	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
795	}
796
797	/*
798	* All the switchers.
799	*/
800	vmmR3SwitcherRelocate(pVM, offDelta);
801
802	/*
803	* Get other RC entry points.
804	*/
805	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
806	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
807
808	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
809	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
810
811	/*
812	* Update the logger.
813	*/
814	VMMR3UpdateLoggers(pVM);
815	}
816
817
818	/**
819	* Updates the settings for the RC and R0 loggers.
820	*
821	* @returns VBox status code.
822	* @param pVM The VM handle.
823	*/
824	VMMR3DECL(int) VMMR3UpdateLoggers(PVM pVM)
825	{
826	/*
827	* Simply clone the logger instance (for RC).
828	*/
829	int rc = VINF_SUCCESS;
830	RTRCPTR RCPtrLoggerFlush = 0;
831
832	if (pVM->vmm.s.pRCLoggerR3
833	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
834	\|\| pVM->vmm.s.pRCRelLoggerR3
835	#endif
836	)
837	{
838	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
839	AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
840	}
841
842	if (pVM->vmm.s.pRCLoggerR3)
843	{
844	RTRCPTR RCPtrLoggerWrapper = 0;
845	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
846	AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
847
848	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
849	rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
850	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
851	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
852	}
853
854	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
855	if (pVM->vmm.s.pRCRelLoggerR3)
856	{
857	RTRCPTR RCPtrLoggerWrapper = 0;
858	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
859	AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
860
861	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
862	rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
863	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
864	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
865	}
866	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
867
868	#ifdef LOG_ENABLED
869	/*
870	* For the ring-0 EMT logger, we use a per-thread logger instance
871	* in ring-0. Only initialize it once.
872	*/
873	for (VMCPUID i = 0; i < pVM->cCpus; i++)
874	{
875	PVMCPU pVCpu = &pVM->aCpus[i];
876	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
877	if (pR0LoggerR3)
878	{
879	if (!pR0LoggerR3->fCreated)
880	{
881	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
882	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
883	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
884
885	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
886	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
887	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
888
889	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
890	(PFNRTLOGGER )&pfnLoggerWrapper, (PFNRTLOGFLUSH )&pfnLoggerFlush,
891	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
892	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
893
894	RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
895	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
896	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
897	rc = RTLogSetCustomPrefixCallback(&pR0LoggerR3->Logger, (PFNRTLOGPREFIX )&pfnLoggerPrefix, NULL);
898	AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
899
900	pR0LoggerR3->idCpu = i;
901	pR0LoggerR3->fCreated = true;
902	pR0LoggerR3->fFlushingDisabled = false;
903
904	}
905
906	rc = RTLogCopyGroupsAndFlags(&pR0LoggerR3->Logger, NULL /* default */, pVM->vmm.s.pRCLoggerR3->fFlags, RTLOGFLAGS_BUFFERED);
907	AssertRC(rc);
908	}
909	}
910	#endif
911	return rc;
912	}
913
914
915	/**
916	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
917	*
918	* @returns Pointer to the buffer.
919	* @param pVM The VM handle.
920	*/
921	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
922	{
923	if (HWACCMIsEnabled(pVM))
924	return pVM->vmm.s.szRing0AssertMsg1;
925
926	RTRCPTR RCPtr;
927	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
928	if (RT_SUCCESS(rc))
929	return (const char *)MMHyperRCToR3(pVM, RCPtr);
930
931	return NULL;
932	}
933
934
935	/**
936	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
937	*
938	* @returns Pointer to the buffer.
939	* @param pVM The VM handle.
940	*/
941	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
942	{
943	if (HWACCMIsEnabled(pVM))
944	return pVM->vmm.s.szRing0AssertMsg2;
945
946	RTRCPTR RCPtr;
947	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
948	if (RT_SUCCESS(rc))
949	return (const char *)MMHyperRCToR3(pVM, RCPtr);
950
951	return NULL;
952	}
953
954
955	/**
956	* Execute state save operation.
957	*
958	* @returns VBox status code.
959	* @param pVM VM Handle.
960	* @param pSSM SSM operation handle.
961	*/
962	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
963	{
964	LogFlow(("vmmR3Save:\n"));
965
966	/*
967	* Save the started/stopped state of all CPUs except 0 as it will always
968	* be running. This avoids breaking the saved state version. :-)
969	*/
970	for (VMCPUID i = 1; i < pVM->cCpus; i++)
971	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
972
973	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
974	}
975
976
977	/**
978	* Execute state load operation.
979	*
980	* @returns VBox status code.
981	* @param pVM VM Handle.
982	* @param pSSM SSM operation handle.
983	* @param uVersion Data layout version.
984	* @param uPass The data pass.
985	*/
986	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
987	{
988	LogFlow(("vmmR3Load:\n"));
989	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
990
991	/*
992	* Validate version.
993	*/
994	if ( uVersion != VMM_SAVED_STATE_VERSION
995	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
996	{
997	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
998	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
999	}
1000
1001	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1002	{
1003	/* Ignore the stack bottom, stack pointer and stack bits. */
1004	RTRCPTR RCPtrIgnored;
1005	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1006	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1007	#ifdef RT_OS_DARWIN
1008	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1009	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1010	&& SSMR3HandleRevision(pSSM) >= 48858
1011	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1012	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1013	)
1014	SSMR3Skip(pSSM, 16384);
1015	else
1016	SSMR3Skip(pSSM, 8192);
1017	#else
1018	SSMR3Skip(pSSM, 8192);
1019	#endif
1020	}
1021
1022	/*
1023	* Restore the VMCPU states. VCPU 0 is always started.
1024	*/
1025	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1026	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1027	{
1028	bool fStarted;
1029	int rc = SSMR3GetBool(pSSM, &fStarted);
1030	if (RT_FAILURE(rc))
1031	return rc;
1032	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1033	}
1034
1035	/* terminator */
1036	uint32_t u32;
1037	int rc = SSMR3GetU32(pSSM, &u32);
1038	if (RT_FAILURE(rc))
1039	return rc;
1040	if (u32 != UINT32_MAX)
1041	{
1042	AssertMsgFailed(("u32=%#x\n", u32));
1043	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1044	}
1045	return VINF_SUCCESS;
1046	}
1047
1048
1049	/**
1050	* Resolve a builtin RC symbol.
1051	*
1052	* Called by PDM when loading or relocating RC modules.
1053	*
1054	* @returns VBox status
1055	* @param pVM VM Handle.
1056	* @param pszSymbol Symbol to resolv
1057	* @param pRCPtrValue Where to store the symbol value.
1058	*
1059	* @remark This has to work before VMMR3Relocate() is called.
1060	*/
1061	VMMR3DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1062	{
1063	if (!strcmp(pszSymbol, "g_Logger"))
1064	{
1065	if (pVM->vmm.s.pRCLoggerR3)
1066	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1067	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1068	}
1069	else if (!strcmp(pszSymbol, "g_RelLogger"))
1070	{
1071	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1072	if (pVM->vmm.s.pRCRelLoggerR3)
1073	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1074	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1075	#else
1076	*pRCPtrValue = NIL_RTRCPTR;
1077	#endif
1078	}
1079	else
1080	return VERR_SYMBOL_NOT_FOUND;
1081	return VINF_SUCCESS;
1082	}
1083
1084
1085	/**
1086	* Suspends the CPU yielder.
1087	*
1088	* @param pVM The VM handle.
1089	*/
1090	VMMR3DECL(void) VMMR3YieldSuspend(PVM pVM)
1091	{
1092	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1093	if (!pVM->vmm.s.cYieldResumeMillies)
1094	{
1095	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1096	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1097	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1098	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1099	else
1100	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1101	TMTimerStop(pVM->vmm.s.pYieldTimer);
1102	}
1103	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1104	}
1105
1106
1107	/**
1108	* Stops the CPU yielder.
1109	*
1110	* @param pVM The VM handle.
1111	*/
1112	VMMR3DECL(void) VMMR3YieldStop(PVM pVM)
1113	{
1114	if (!pVM->vmm.s.cYieldResumeMillies)
1115	TMTimerStop(pVM->vmm.s.pYieldTimer);
1116	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1117	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1118	}
1119
1120
1121	/**
1122	* Resumes the CPU yielder when it has been a suspended or stopped.
1123	*
1124	* @param pVM The VM handle.
1125	*/
1126	VMMR3DECL(void) VMMR3YieldResume(PVM pVM)
1127	{
1128	if (pVM->vmm.s.cYieldResumeMillies)
1129	{
1130	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1131	pVM->vmm.s.cYieldResumeMillies = 0;
1132	}
1133	}
1134
1135
1136	/**
1137	* Internal timer callback function.
1138	*
1139	* @param pVM The VM.
1140	* @param pTimer The timer handle.
1141	* @param pvUser User argument specified upon timer creation.
1142	*/
1143	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1144	{
1145	/*
1146	* This really needs some careful tuning. While we shouldn't be too greedy since
1147	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1148	* because that'll cause us to stop up.
1149	*
1150	* The current logic is to use the default interval when there is no lag worth
1151	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1152	*
1153	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1154	* so the lag is up to date.)
1155	*/
1156	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1157	if ( u64Lag < 50000000 /* 50ms */
1158	\|\| ( u64Lag < 1000000000 /* 1s */
1159	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1160	)
1161	{
1162	uint64_t u64Elapsed = RTTimeNanoTS();
1163	pVM->vmm.s.u64LastYield = u64Elapsed;
1164
1165	RTThreadYield();
1166
1167	#ifdef LOG_ENABLED
1168	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1169	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1170	#endif
1171	}
1172	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1173	}
1174
1175
1176	/**
1177	* Executes guest code in the raw-mode context.
1178	*
1179	* @param pVM VM handle.
1180	* @param pVCpu The VMCPU to operate on.
1181	*/
1182	VMMR3DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1183	{
1184	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1185
1186	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1187
1188	/*
1189	* Set the EIP and ESP.
1190	*/
1191	CPUMSetHyperEIP(pVCpu, CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1192	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1193	: pVM->vmm.s.pfnCPUMRCResumeGuest);
1194	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
1195
1196	/*
1197	* We hide log flushes (outer) and hypervisor interrupts (inner).
1198	*/
1199	for (;;)
1200	{
1201	#ifdef VBOX_STRICT
1202	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1203	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1204	PGMMapCheck(pVM);
1205	#endif
1206	int rc;
1207	do
1208	{
1209	#ifdef NO_SUPCALLR0VMM
1210	rc = VERR_GENERAL_FAILURE;
1211	#else
1212	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1213	if (RT_LIKELY(rc == VINF_SUCCESS))
1214	rc = pVCpu->vmm.s.iLastGZRc;
1215	#endif
1216	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1217
1218	/*
1219	* Flush the logs.
1220	*/
1221	#ifdef LOG_ENABLED
1222	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1223	if ( pLogger
1224	&& pLogger->offScratch > 0)
1225	RTLogFlushRC(NULL, pLogger);
1226	#endif
1227	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1228	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1229	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1230	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1231	#endif
1232	if (rc != VINF_VMM_CALL_HOST)
1233	{
1234	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1235	return rc;
1236	}
1237	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1238	if (RT_FAILURE(rc))
1239	return rc;
1240	/* Resume GC */
1241	}
1242	}
1243
1244
1245	/**
1246	* Executes guest code (Intel VT-x and AMD-V).
1247	*
1248	* @param pVM VM handle.
1249	* @param pVCpu The VMCPU to operate on.
1250	*/
1251	VMMR3DECL(int) VMMR3HwAccRunGC(PVM pVM, PVMCPU pVCpu)
1252	{
1253	Log2(("VMMR3HwAccRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1254
1255	for (;;)
1256	{
1257	int rc;
1258	do
1259	{
1260	#ifdef NO_SUPCALLR0VMM
1261	rc = VERR_GENERAL_FAILURE;
1262	#else
1263	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HWACC_RUN, pVCpu->idCpu);
1264	if (RT_LIKELY(rc == VINF_SUCCESS))
1265	rc = pVCpu->vmm.s.iLastGZRc;
1266	#endif
1267	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1268
1269	#ifdef LOG_ENABLED
1270	/*
1271	* Flush the log
1272	*/
1273	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1274	if ( pR0LoggerR3
1275	&& pR0LoggerR3->Logger.offScratch > 0)
1276	RTLogFlushToLogger(&pR0LoggerR3->Logger, NULL);
1277	#endif /* !LOG_ENABLED */
1278	if (rc != VINF_VMM_CALL_HOST)
1279	{
1280	Log2(("VMMR3HwAccRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1281	return rc;
1282	}
1283	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1284	if (RT_FAILURE(rc))
1285	return rc;
1286	/* Resume R0 */
1287	}
1288	}
1289
1290	/**
1291	* VCPU worker for VMMSendSipi.
1292	*
1293	* @param pVM The VM to operate on.
1294	* @param idCpu Virtual CPU to perform SIPI on
1295	* @param uVector SIPI vector
1296	*/
1297	DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1298	{
1299	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1300	VMCPU_ASSERT_EMT(pVCpu);
1301
1302	/** @todo what are we supposed to do if the processor is already running? */
1303	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1304	return VERR_ACCESS_DENIED;
1305
1306
1307	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1308
1309	pCtx->cs = uVector << 8;
1310	pCtx->csHid.u64Base = uVector << 12;
1311	pCtx->csHid.u32Limit = 0x0000ffff;
1312	pCtx->rip = 0;
1313
1314	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1315
1316	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1317	EMSetState(pVCpu, EMSTATE_HALTED);
1318	return VINF_EM_RESCHEDULE;
1319	# else /* And if we go the VMCPU::enmState way it can stay here. */
1320	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1321	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1322	return VINF_SUCCESS;
1323	# endif
1324	}
1325
1326	DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1327	{
1328	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1329	VMCPU_ASSERT_EMT(pVCpu);
1330
1331	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1332	CPUMR3ResetCpu(pVCpu);
1333	return VINF_EM_WAIT_SIPI;
1334	}
1335
1336	/**
1337	* Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1338	* and unhalting processor
1339	*
1340	* @param pVM The VM to operate on.
1341	* @param idCpu Virtual CPU to perform SIPI on
1342	* @param uVector SIPI vector
1343	*/
1344	VMMR3DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1345	{
1346	AssertReturnVoid(idCpu < pVM->cCpus);
1347
1348	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1349	AssertRC(rc);
1350	}
1351
1352	/**
1353	* Sends init IPI to the virtual CPU.
1354	*
1355	* @param pVM The VM to operate on.
1356	* @param idCpu Virtual CPU to perform int IPI on
1357	*/
1358	VMMR3DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1359	{
1360	AssertReturnVoid(idCpu < pVM->cCpus);
1361
1362	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1363	AssertRC(rc);
1364	}
1365
1366	/**
1367	* Registers the guest memory range that can be used for patching
1368	*
1369	* @returns VBox status code.
1370	* @param pVM The VM to operate on.
1371	* @param pPatchMem Patch memory range
1372	* @param cbPatchMem Size of the memory range
1373	*/
1374	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1375	{
1376	if (HWACCMIsEnabled(pVM))
1377	return HWACMMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1378
1379	return VERR_NOT_SUPPORTED;
1380	}
1381
1382	/**
1383	* Deregisters the guest memory range that can be used for patching
1384	*
1385	* @returns VBox status code.
1386	* @param pVM The VM to operate on.
1387	* @param pPatchMem Patch memory range
1388	* @param cbPatchMem Size of the memory range
1389	*/
1390	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1391	{
1392	if (HWACCMIsEnabled(pVM))
1393	return HWACMMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1394
1395	return VINF_SUCCESS;
1396	}
1397
1398
1399	/**
1400	* VCPU worker for VMMR3SynchronizeAllVCpus.
1401	*
1402	* @param pVM The VM to operate on.
1403	* @param idCpu Virtual CPU to perform SIPI on
1404	* @param uVector SIPI vector
1405	*/
1406	DECLCALLBACK(int) vmmR3SyncVCpu(PVM pVM)
1407	{
1408	/* Block until the job in the caller has finished. */
1409	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1410	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1411	return VINF_SUCCESS;
1412	}
1413
1414
1415	/**
1416	* Atomically execute a callback handler
1417	* Note: This is very expensive; avoid using it frequently!
1418	*
1419	* @param pVM The VM to operate on.
1420	* @param pfnHandler Callback handler
1421	* @param pvUser User specified parameter
1422	*
1423	* @thread EMT
1424	*/
1425	VMMR3DECL(int) VMMR3AtomicExecuteHandler(PVM pVM, PFNATOMICHANDLER pfnHandler, void *pvUser)
1426	{
1427	int rc;
1428	PVMCPU pVCpu = VMMGetCpu(pVM);
1429	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1430
1431	/* Shortcut for the uniprocessor case. */
1432	if (pVM->cCpus == 1)
1433	return pfnHandler(pVM, pvUser);
1434
1435	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1436	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
1437	{
1438	if (idCpu != pVCpu->idCpu)
1439	{
1440	rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SyncVCpu, 1, pVM);
1441	AssertRC(rc);
1442	}
1443	}
1444	/* Wait until all other VCPUs are waiting for us. */
1445	while (RTCritSectGetWaiters(&pVM->vmm.s.CritSectSync) != (int32_t)(pVM->cCpus - 1))
1446	RTThreadSleep(1);
1447
1448	rc = pfnHandler(pVM, pvUser);
1449	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1450	return rc;
1451	}
1452
1453
1454	/**
1455	* Count returns and have the last non-caller EMT wake up the caller.
1456	*
1457	* @returns VBox strict informational status code for EM scheduling. No failures
1458	* will be returned here, those are for the caller only.
1459	*
1460	* @param pVM The VM handle.
1461	*/
1462	DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1463	{
1464	int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1465	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1466	if (cReturned == pVM->cCpus - 1U)
1467	{
1468	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1469	AssertLogRelRC(rc);
1470	}
1471
1472	AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1473	\|\| (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1474	("%Rrc\n", rcRet),
1475	VERR_IPE_UNEXPECTED_INFO_STATUS);
1476	return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1477	}
1478
1479
1480	/**
1481	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1482	*
1483	* @returns VBox strict informational status code for EM scheduling. No failures
1484	* will be returned here, those are for the caller only. When
1485	* fIsCaller is set, VINF_SUCESS is always returned.
1486	*
1487	* @param pVM The VM handle.
1488	* @param pVCpu The VMCPU structure for the calling EMT.
1489	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1490	* not.
1491	* @param fFlags The flags.
1492	* @param pfnRendezvous The callback.
1493	* @param pvUser The user argument for the callback.
1494	*/
1495	static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1496	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1497	{
1498	int rc;
1499
1500	/*
1501	* Enter, the last EMT triggers the next callback phase.
1502	*/
1503	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1504	if (cEntered != pVM->cCpus)
1505	{
1506	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1507	{
1508	/* Wait for our turn. */
1509	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1510	AssertLogRelRC(rc);
1511	}
1512	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1513	{
1514	/* Wait for the last EMT to arrive and wake everyone up. */
1515	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1516	AssertLogRelRC(rc);
1517	}
1518	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1519	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1520	{
1521	/* Wait for our turn. */
1522	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1523	AssertLogRelRC(rc);
1524	}
1525	else
1526	{
1527	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1528
1529	/*
1530	* The execute once is handled specially to optimize the code flow.
1531	*
1532	* The last EMT to arrive will perform the callback and the other
1533	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1534	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1535	* returns, that EMT will initiate the normal return sequence.
1536	*/
1537	if (!fIsCaller)
1538	{
1539	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1540	AssertLogRelRC(rc);
1541
1542	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1543	}
1544	return VINF_SUCCESS;
1545	}
1546	}
1547	else
1548	{
1549	/*
1550	* All EMTs are waiting, clear the FF and take action according to the
1551	* execution method.
1552	*/
1553	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1554
1555	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1556	{
1557	/* Wake up everyone. */
1558	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1559	AssertLogRelRC(rc);
1560	}
1561	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1562	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1563	{
1564	/* Figure out who to wake up and wake it up. If it's ourself, then
1565	it's easy otherwise wait for our turn. */
1566	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1567	? 0
1568	: pVM->cCpus - 1U;
1569	if (pVCpu->idCpu != iFirst)
1570	{
1571	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1572	AssertLogRelRC(rc);
1573	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1574	AssertLogRelRC(rc);
1575	}
1576	}
1577	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1578	}
1579
1580
1581	/*
1582	* Do the callback and update the status if necessary.
1583	*/
1584	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1585	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1586	{
1587	VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1588	if (rcStrict != VINF_SUCCESS)
1589	{
1590	AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1591	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1592	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1593	int32_t i32RendezvousStatus;
1594	do
1595	{
1596	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1597	if ( rcStrict == i32RendezvousStatus
1598	\|\| RT_FAILURE(i32RendezvousStatus)
1599	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1600	&& rcStrict > i32RendezvousStatus))
1601	break;
1602	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1603	}
1604	}
1605
1606	/*
1607	* Increment the done counter and take action depending on whether we're
1608	* the last to finish callback execution.
1609	*/
1610	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1611	if ( cDone != pVM->cCpus
1612	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1613	{
1614	/* Signal the next EMT? */
1615	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1616	{
1617	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1618	AssertLogRelRC(rc);
1619	}
1620	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1621	{
1622	Assert(cDone == pVCpu->idCpu + 1U);
1623	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1624	AssertLogRelRC(rc);
1625	}
1626	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1627	{
1628	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1629	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1630	AssertLogRelRC(rc);
1631	}
1632
1633	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1634	if (!fIsCaller)
1635	{
1636	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1637	AssertLogRelRC(rc);
1638	}
1639	}
1640	else
1641	{
1642	/* Callback execution is all done, tell the rest to return. */
1643	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1644	AssertLogRelRC(rc);
1645	}
1646
1647	if (!fIsCaller)
1648	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1649	return VINF_SUCCESS;
1650	}
1651
1652
1653	/**
1654	* Called in response to VM_FF_EMT_RENDEZVOUS.
1655	*
1656	* @returns VBox strict status code - EM scheduling. No errors will be returned
1657	* here, nor will any non-EM scheduling status codes be returned.
1658	*
1659	* @param pVM The VM handle
1660	* @param pVCpu The handle of the calling EMT.
1661	*
1662	* @thread EMT
1663	*/
1664	VMMR3DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1665	{
1666	return vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1667	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1668	}
1669
1670
1671	/**
1672	* EMT rendezvous.
1673	*
1674	* Gathers all the EMTs and execute some code on each of them, either in a one
1675	* by one fashion or all at once.
1676	*
1677	* @returns VBox strict status code. This will be the the first error,
1678	* VINF_SUCCESS, or an EM scheduling status code.
1679	*
1680	* @param pVM The VM handle.
1681	* @param fFlags Flags indicating execution methods. See
1682	* grp_VMMR3EmtRendezvous_fFlags.
1683	* @param pfnRendezvous The callback.
1684	* @param pvUser User argument for the callback.
1685	*
1686	* @thread Any.
1687	*/
1688	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1689	{
1690	/*
1691	* Validate input.
1692	*/
1693	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1694	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1695	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1696	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1697	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1698	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1699	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1700
1701	VBOXSTRICTRC rcStrict;
1702	PVMCPU pVCpu = VMMGetCpu(pVM);
1703	if (!pVCpu)
1704	/*
1705	* Forward the request to an EMT thread.
1706	*/
1707	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1708	(PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1709	else if (pVM->cCpus == 1)
1710	/*
1711	* Shortcut for the single EMT case.
1712	*/
1713	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1714	else
1715	{
1716	/*
1717	* Spin lock. If busy, wait for the other EMT to finish while keeping a
1718	* lookout of the RENDEZVOUS FF.
1719	*/
1720	int rc;
1721	rcStrict = VINF_SUCCESS;
1722	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1723	{
1724	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1725	{
1726	if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1727	{
1728	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1729	if ( rc != VINF_SUCCESS
1730	&& ( rcStrict == VINF_SUCCESS
1731	\|\| rcStrict > rc))
1732	rcStrict = rc;
1733	/** @todo Perhaps deal with termination here? */
1734	}
1735	ASMNopPause();
1736	}
1737	}
1738	Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1739
1740	/*
1741	* Clear the slate. This is a semaphore ping-pong orgy. :-)
1742	*/
1743	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1744	{
1745	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1746	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1747	}
1748	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1749	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1750	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1751	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1752	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1753	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1754	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1755	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1756	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1757	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1758	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1759
1760	/*
1761	* Set the FF and poke the other EMTs.
1762	*/
1763	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1764	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1765
1766	/*
1767	* Do the same ourselves.
1768	*/
1769	vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1770
1771	/*
1772	* The caller waits for the other EMTs to be done and return before doing
1773	* the cleanup. This makes away with wakeup / reset races we would otherwise
1774	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1775	*/
1776	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1777	AssertLogRelRC(rc);
1778
1779	/*
1780	* Get the return code and clean up a little bit.
1781	*/
1782	int rcMy = pVM->vmm.s.i32RendezvousStatus;
1783	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1784
1785	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1786
1787	/*
1788	* Merge rcStrict and rcMy.
1789	*/
1790	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1791	if ( rcMy != VINF_SUCCESS
1792	&& ( rcStrict == VINF_SUCCESS
1793	\|\| rcStrict > rcMy))
1794	rcStrict = rcMy;
1795	}
1796
1797	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1798	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1799	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1800	VERR_IPE_UNEXPECTED_INFO_STATUS);
1801	return VBOXSTRICTRC_VAL(rcStrict);
1802	}
1803
1804
1805	/**
1806	* Read from the ring 0 jump buffer stack
1807	*
1808	* @returns VBox status code.
1809	*
1810	* @param pVM Pointer to the shared VM structure.
1811	* @param idCpu The ID of the source CPU context (for the address).
1812	* @param R0Addr Where to start reading.
1813	* @param pvBuf Where to store the data we've read.
1814	* @param cbRead The number of bytes to read.
1815	*/
1816	VMMR3DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1817	{
1818	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1819	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1820
1821	#ifdef VMM_R0_SWITCH_STACK
1822	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1823	#else
1824	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1825	#endif
1826	if ( off > VMM_STACK_SIZE
1827	\|\| off + cbRead >= VMM_STACK_SIZE)
1828	return VERR_INVALID_POINTER;
1829
1830	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1831	return VINF_SUCCESS;
1832	}
1833
1834
1835	/**
1836	* Calls a RC function.
1837	*
1838	* @param pVM The VM handle.
1839	* @param RCPtrEntry The address of the RC function.
1840	* @param cArgs The number of arguments in the ....
1841	* @param ... Arguments to the function.
1842	*/
1843	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1844	{
1845	va_list args;
1846	va_start(args, cArgs);
1847	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1848	va_end(args);
1849	return rc;
1850	}
1851
1852
1853	/**
1854	* Calls a RC function.
1855	*
1856	* @param pVM The VM handle.
1857	* @param RCPtrEntry The address of the RC function.
1858	* @param cArgs The number of arguments in the ....
1859	* @param args Arguments to the function.
1860	*/
1861	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1862	{
1863	/* Raw mode implies 1 VCPU. */
1864	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1865	PVMCPU pVCpu = &pVM->aCpus[0];
1866
1867	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1868
1869	/*
1870	* Setup the call frame using the trampoline.
1871	*/
1872	CPUMHyperSetCtxCore(pVCpu, NULL);
1873	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1874	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32));
1875	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1876	int i = cArgs;
1877	while (i-- > 0)
1878	*pFrame++ = va_arg(args, RTGCUINTPTR32);
1879
1880	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1881	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1882	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
1883
1884	/*
1885	* We hide log flushes (outer) and hypervisor interrupts (inner).
1886	*/
1887	for (;;)
1888	{
1889	int rc;
1890	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1891	do
1892	{
1893	#ifdef NO_SUPCALLR0VMM
1894	rc = VERR_GENERAL_FAILURE;
1895	#else
1896	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1897	if (RT_LIKELY(rc == VINF_SUCCESS))
1898	rc = pVCpu->vmm.s.iLastGZRc;
1899	#endif
1900	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1901
1902	/*
1903	* Flush the logs.
1904	*/
1905	#ifdef LOG_ENABLED
1906	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1907	if ( pLogger
1908	&& pLogger->offScratch > 0)
1909	RTLogFlushRC(NULL, pLogger);
1910	#endif
1911	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1912	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1913	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1914	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1915	#endif
1916	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
1917	VMMR3FatalDump(pVM, pVCpu, rc);
1918	if (rc != VINF_VMM_CALL_HOST)
1919	{
1920	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1921	return rc;
1922	}
1923	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1924	if (RT_FAILURE(rc))
1925	return rc;
1926	}
1927	}
1928
1929
1930	/**
1931	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1932	*
1933	* @returns VBox status code.
1934	* @param pVM The VM to operate on.
1935	* @param uOperation Operation to execute.
1936	* @param u64Arg Constant argument.
1937	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1938	* details.
1939	*/
1940	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1941	{
1942	PVMCPU pVCpu = VMMGetCpu(pVM);
1943	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1944
1945	/*
1946	* Call Ring-0 entry with init code.
1947	*/
1948	int rc;
1949	for (;;)
1950	{
1951	#ifdef NO_SUPCALLR0VMM
1952	rc = VERR_GENERAL_FAILURE;
1953	#else
1954	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1955	#endif
1956	/*
1957	* Flush the logs.
1958	*/
1959	#ifdef LOG_ENABLED
1960	if ( pVCpu->vmm.s.pR0LoggerR3
1961	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1962	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
1963	#endif
1964	if (rc != VINF_VMM_CALL_HOST)
1965	break;
1966	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1967	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1968	break;
1969	/* Resume R0 */
1970	}
1971
1972	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
1973	("uOperation=%u rc=%Rrc\n", uOperation, rc),
1974	VERR_INTERNAL_ERROR);
1975	return rc;
1976	}
1977
1978
1979	/**
1980	* Resumes executing hypervisor code when interrupted by a queue flush or a
1981	* debug event.
1982	*
1983	* @returns VBox status code.
1984	* @param pVM VM handle.
1985	* @param pVCpu VMCPU handle.
1986	*/
1987	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
1988	{
1989	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
1990	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1991
1992	/*
1993	* We hide log flushes (outer) and hypervisor interrupts (inner).
1994	*/
1995	for (;;)
1996	{
1997	int rc;
1998	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1999	do
2000	{
2001	#ifdef NO_SUPCALLR0VMM
2002	rc = VERR_GENERAL_FAILURE;
2003	#else
2004	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2005	if (RT_LIKELY(rc == VINF_SUCCESS))
2006	rc = pVCpu->vmm.s.iLastGZRc;
2007	#endif
2008	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2009
2010	/*
2011	* Flush the loggers,
2012	*/
2013	#ifdef LOG_ENABLED
2014	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2015	if ( pLogger
2016	&& pLogger->offScratch > 0)
2017	RTLogFlushRC(NULL, pLogger);
2018	#endif
2019	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2020	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2021	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2022	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2023	#endif
2024	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2025	VMMR3FatalDump(pVM, pVCpu, rc);
2026	if (rc != VINF_VMM_CALL_HOST)
2027	{
2028	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2029	return rc;
2030	}
2031	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2032	if (RT_FAILURE(rc))
2033	return rc;
2034	}
2035	}
2036
2037
2038	/**
2039	* Service a call to the ring-3 host code.
2040	*
2041	* @returns VBox status code.
2042	* @param pVM VM handle.
2043	* @param pVCpu VMCPU handle
2044	* @remark Careful with critsects.
2045	*/
2046	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2047	{
2048	/*
2049	* We must also check for pending critsect exits or else we can deadlock
2050	* when entering other critsects here.
2051	*/
2052	if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2053	PDMCritSectFF(pVCpu);
2054
2055	switch (pVCpu->vmm.s.enmCallRing3Operation)
2056	{
2057	/*
2058	* Acquire the PDM lock.
2059	*/
2060	case VMMCALLRING3_PDM_LOCK:
2061	{
2062	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2063	break;
2064	}
2065
2066	/*
2067	* Grow the PGM pool.
2068	*/
2069	case VMMCALLRING3_PGM_POOL_GROW:
2070	{
2071	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2072	break;
2073	}
2074
2075	/*
2076	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2077	*/
2078	case VMMCALLRING3_PGM_MAP_CHUNK:
2079	{
2080	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2081	break;
2082	}
2083
2084	/*
2085	* Allocates more handy pages.
2086	*/
2087	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2088	{
2089	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2090	break;
2091	}
2092
2093	/*
2094	* Allocates a large page.
2095	*/
2096	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2097	{
2098	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2099	break;
2100	}
2101
2102	/*
2103	* Acquire the PGM lock.
2104	*/
2105	case VMMCALLRING3_PGM_LOCK:
2106	{
2107	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2108	break;
2109	}
2110
2111	/*
2112	* Acquire the MM hypervisor heap lock.
2113	*/
2114	case VMMCALLRING3_MMHYPER_LOCK:
2115	{
2116	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2117	break;
2118	}
2119
2120	/*
2121	* Flush REM handler notifications.
2122	*/
2123	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2124	{
2125	REMR3ReplayHandlerNotifications(pVM);
2126	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2127	break;
2128	}
2129
2130	/*
2131	* This is a noop. We just take this route to avoid unnecessary
2132	* tests in the loops.
2133	*/
2134	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2135	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2136	LogAlways(("FLUSH\n"));
2137	break;
2138
2139	/*
2140	* Set the VM error message.
2141	*/
2142	case VMMCALLRING3_VM_SET_ERROR:
2143	VMR3SetErrorWorker(pVM);
2144	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2145	break;
2146
2147	/*
2148	* Set the VM runtime error message.
2149	*/
2150	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2151	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2152	break;
2153
2154	/*
2155	* Signal a ring 0 hypervisor assertion.
2156	* Cancel the longjmp operation that's in progress.
2157	*/
2158	case VMMCALLRING3_VM_R0_ASSERTION:
2159	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2160	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2161	#ifdef RT_ARCH_X86
2162	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2163	#else
2164	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2165	#endif
2166	#ifdef VMM_R0_SWITCH_STACK
2167	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2168	#endif
2169	LogRel((pVM->vmm.s.szRing0AssertMsg1));
2170	LogRel((pVM->vmm.s.szRing0AssertMsg2));
2171	return VERR_VMM_RING0_ASSERTION;
2172
2173	/*
2174	* A forced switch to ring 0 for preemption purposes.
2175	*/
2176	case VMMCALLRING3_VM_R0_PREEMPT:
2177	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2178	break;
2179
2180	case VMMCALLRING3_FTM_SET_CHECKPOINT:
2181	pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2182	break;
2183
2184	default:
2185	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2186	return VERR_INTERNAL_ERROR;
2187	}
2188
2189	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2190	return VINF_SUCCESS;
2191	}
2192
2193
2194	/**
2195	* Displays the Force action Flags.
2196	*
2197	* @param pVM The VM handle.
2198	* @param pHlp The output helpers.
2199	* @param pszArgs The additional arguments (ignored).
2200	*/
2201	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2202	{
2203	int c;
2204	uint32_t f;
2205	#define PRINT_FLAG(prf,flag) do { \
2206	if (f & (prf##flag)) \
2207	{ \
2208	static const char *s_psz = #flag; \
2209	if (!(c % 6)) \
2210	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2211	else \
2212	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2213	c++; \
2214	f &= ~(prf##flag); \
2215	} \
2216	} while (0)
2217
2218	#define PRINT_GROUP(prf,grp,sfx) do { \
2219	if (f & (prf##grp##sfx)) \
2220	{ \
2221	static const char *s_psz = #grp; \
2222	if (!(c % 5)) \
2223	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2224	else \
2225	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2226	c++; \
2227	} \
2228	} while (0)
2229
2230	/*
2231	* The global flags.
2232	*/
2233	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2234	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2235
2236	/* show the flag mnemonics */
2237	c = 0;
2238	f = fGlobalForcedActions;
2239	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2240	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2241	PRINT_FLAG(VM_FF_,PDM_DMA);
2242	PRINT_FLAG(VM_FF_,DBGF);
2243	PRINT_FLAG(VM_FF_,REQUEST);
2244	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2245	PRINT_FLAG(VM_FF_,RESET);
2246	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2247	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2248	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2249	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2250	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2251	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2252	if (f)
2253	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2254	else
2255	pHlp->pfnPrintf(pHlp, "\n");
2256
2257	/* the groups */
2258	c = 0;
2259	f = fGlobalForcedActions;
2260	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2261	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2262	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2263	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2264	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2265	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2266	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2267	PRINT_GROUP(VM_FF_,ALL_BUT_RAW,_MASK);
2268	if (c)
2269	pHlp->pfnPrintf(pHlp, "\n");
2270
2271	/*
2272	* Per CPU flags.
2273	*/
2274	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2275	{
2276	const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2277	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2278
2279	/* show the flag mnemonics */
2280	c = 0;
2281	f = fLocalForcedActions;
2282	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2283	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2284	PRINT_FLAG(VMCPU_FF_,TIMER);
2285	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2286	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2287	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2288	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2289	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2290	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2291	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2292	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2293	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2294	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2295	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2296	PRINT_FLAG(VMCPU_FF_,TO_R3);
2297	if (f)
2298	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2299	else
2300	pHlp->pfnPrintf(pHlp, "\n");
2301
2302	/* the groups */
2303	c = 0;
2304	f = fLocalForcedActions;
2305	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2306	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2307	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2308	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2309	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2310	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2311	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2312	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2313	PRINT_GROUP(VMCPU_FF_,HWACCM_TO_R3,_MASK);
2314	PRINT_GROUP(VMCPU_FF_,ALL_BUT_RAW,_MASK);
2315	if (c)
2316	pHlp->pfnPrintf(pHlp, "\n");
2317	}
2318
2319	#undef PRINT_FLAG
2320	#undef PRINT_GROUP
2321	}
2322

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source: vbox/trunk/src/VBox/VMM/VMM.cpp@ 32792

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