VMM.cpp@ 34320

Last change on this file since 34320 was 34320, checked in by vboxsync, 14 years ago
VMM: Moved the fUsePeriodicPreemptionTimers LogRel statement till the end of the ring-0 init.
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File size: 84.5 KB

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1	/* $Id: VMM.cpp 34320 2010-11-24 13:12:59Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually.
27	*
28	* @see grp_vmm, grp_vm
29	*
30	*
31	* @section sec_vmmstate VMM State
32	*
33	* @image html VM_Statechart_Diagram.gif
34	*
35	* To be written.
36	*
37	*
38	* @subsection subsec_vmm_init VMM Initialization
39	*
40	* To be written.
41	*
42	*
43	* @subsection subsec_vmm_term VMM Termination
44	*
45	* To be written.
46	*
47	*/
48
49	/*******************************************************************************
50	* Header Files *
51	*******************************************************************************/
52	#define LOG_GROUP LOG_GROUP_VMM
53	#include <VBox/vmm.h>
54	#include <VBox/vmapi.h>
55	#include <VBox/pgm.h>
56	#include <VBox/cfgm.h>
57	#include <VBox/pdmqueue.h>
58	#include <VBox/pdmcritsect.h>
59	#include <VBox/pdmapi.h>
60	#include <VBox/cpum.h>
61	#include <VBox/mm.h>
62	#include <VBox/iom.h>
63	#include <VBox/trpm.h>
64	#include <VBox/selm.h>
65	#include <VBox/em.h>
66	#include <VBox/sup.h>
67	#include <VBox/dbgf.h>
68	#include <VBox/csam.h>
69	#include <VBox/patm.h>
70	#include <VBox/rem.h>
71	#include <VBox/ssm.h>
72	#include <VBox/tm.h>
73	#include "VMMInternal.h"
74	#include "VMMSwitcher/VMMSwitcher.h"
75	#include <VBox/vm.h>
76	#include <VBox/ftm.h>
77
78	#include <VBox/err.h>
79	#include <VBox/param.h>
80	#include <VBox/version.h>
81	#include <VBox/x86.h>
82	#include <VBox/hwaccm.h>
83	#include <iprt/assert.h>
84	#include <iprt/alloc.h>
85	#include <iprt/asm.h>
86	#include <iprt/time.h>
87	#include <iprt/semaphore.h>
88	#include <iprt/stream.h>
89	#include <iprt/string.h>
90	#include <iprt/stdarg.h>
91	#include <iprt/ctype.h>
92
93
94
95	/*******************************************************************************
96	* Defined Constants And Macros *
97	*******************************************************************************/
98	/** The saved state version. */
99	#define VMM_SAVED_STATE_VERSION 4
100	/** The saved state version used by v3.0 and earlier. (Teleportation) */
101	#define VMM_SAVED_STATE_VERSION_3_0 3
102
103
104	/*******************************************************************************
105	* Internal Functions *
106	*******************************************************************************/
107	static int vmmR3InitStacks(PVM pVM);
108	static int vmmR3InitLoggers(PVM pVM);
109	static void vmmR3InitRegisterStats(PVM pVM);
110	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
111	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
112	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
113	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
114	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
115
116
117	/**
118	* Initializes the VMM.
119	*
120	* @returns VBox status code.
121	* @param pVM The VM to operate on.
122	*/
123	VMMR3DECL(int) VMMR3Init(PVM pVM)
124	{
125	LogFlow(("VMMR3Init\n"));
126
127	/*
128	* Assert alignment, sizes and order.
129	*/
130	AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
131	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
132	AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
133
134	/*
135	* Init basic VM VMM members.
136	*/
137	pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
138	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
139	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
140	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
141	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
142	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
143
144	/** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
145	* The EMT yield interval. The EMT yielding is a hack we employ to play a
146	* bit nicer with the rest of the system (like for instance the GUI).
147	*/
148	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
149	23 /* Value arrived at after experimenting with the grub boot prompt. */);
150	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
151
152
153	/** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
154	* Controls whether we employ per-cpu preemption timers to limit the time
155	* spent executing guest code. This option is not available on all
156	* platforms and we will silently ignore this setting then. If we are
157	* running in VT-x mode, we will use the VMX-preemption timer instead of
158	* this one when possible.
159	*/
160	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
161	rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
162	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
163
164	/*
165	* Initialize the VMM sync critical section and semaphores.
166	*/
167	rc = RTCritSectInit(&pVM->vmm.s.CritSectSync);
168	AssertRCReturn(rc, rc);
169	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
170	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
171	return VERR_NO_MEMORY;
172	for (VMCPUID i = 0; i < pVM->cCpus; i++)
173	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
174	for (VMCPUID i = 0; i < pVM->cCpus; i++)
175	{
176	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
177	AssertRCReturn(rc, rc);
178	}
179	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
180	AssertRCReturn(rc, rc);
181	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
182	AssertRCReturn(rc, rc);
183	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
184	AssertRCReturn(rc, rc);
185	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
186	AssertRCReturn(rc, rc);
187
188	/* GC switchers are enabled by default. Turned off by HWACCM. */
189	pVM->vmm.s.fSwitcherDisabled = false;
190
191	/*
192	* Register the saved state data unit.
193	*/
194	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
195	NULL, NULL, NULL,
196	NULL, vmmR3Save, NULL,
197	NULL, vmmR3Load, NULL);
198	if (RT_FAILURE(rc))
199	return rc;
200
201	/*
202	* Register the Ring-0 VM handle with the session for fast ioctl calls.
203	*/
204	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
205	if (RT_FAILURE(rc))
206	return rc;
207
208	/*
209	* Init various sub-components.
210	*/
211	rc = vmmR3SwitcherInit(pVM);
212	if (RT_SUCCESS(rc))
213	{
214	rc = vmmR3InitStacks(pVM);
215	if (RT_SUCCESS(rc))
216	{
217	rc = vmmR3InitLoggers(pVM);
218
219	#ifdef VBOX_WITH_NMI
220	/*
221	* Allocate mapping for the host APIC.
222	*/
223	if (RT_SUCCESS(rc))
224	{
225	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
226	AssertRC(rc);
227	}
228	#endif
229	if (RT_SUCCESS(rc))
230	{
231	/*
232	* Debug info and statistics.
233	*/
234	DBGFR3InfoRegisterInternal(pVM, "ff", "Displays the current Forced actions Flags.", vmmR3InfoFF);
235	vmmR3InitRegisterStats(pVM);
236
237	return VINF_SUCCESS;
238	}
239	}
240	/** @todo: Need failure cleanup. */
241
242	//more todo in here?
243	//if (RT_SUCCESS(rc))
244	//{
245	//}
246	//int rc2 = vmmR3TermCoreCode(pVM);
247	//AssertRC(rc2));
248	}
249
250	return rc;
251	}
252
253
254	/**
255	* Allocate & setup the VMM RC stack(s) (for EMTs).
256	*
257	* The stacks are also used for long jumps in Ring-0.
258	*
259	* @returns VBox status code.
260	* @param pVM Pointer to the shared VM structure.
261	*
262	* @remarks The optional guard page gets it protection setup up during R3 init
263	* completion because of init order issues.
264	*/
265	static int vmmR3InitStacks(PVM pVM)
266	{
267	int rc = VINF_SUCCESS;
268	#ifdef VMM_R0_SWITCH_STACK
269	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
270	#else
271	uint32_t fFlags = 0;
272	#endif
273
274	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
275	{
276	PVMCPU pVCpu = &pVM->aCpus[idCpu];
277
278	#ifdef VBOX_STRICT_VMM_STACK
279	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
280	#else
281	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
282	#endif
283	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
284	if (RT_SUCCESS(rc))
285	{
286	#ifdef VBOX_STRICT_VMM_STACK
287	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
288	#endif
289	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
290	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
291	if (!VMMIsHwVirtExtForced(pVM))
292	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
293	else
294	#endif
295	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
296	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
297	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
298	AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
299
300	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
301	}
302	}
303
304	return rc;
305	}
306
307
308	/**
309	* Initialize the loggers.
310	*
311	* @returns VBox status code.
312	* @param pVM Pointer to the shared VM structure.
313	*/
314	static int vmmR3InitLoggers(PVM pVM)
315	{
316	int rc;
317
318	/*
319	* Allocate RC & R0 Logger instances (they are finalized in the relocator).
320	*/
321	#ifdef LOG_ENABLED
322	PRTLOGGER pLogger = RTLogDefaultInstance();
323	if (pLogger)
324	{
325	pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
326	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
327	if (RT_FAILURE(rc))
328	return rc;
329	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
330
331	# ifdef VBOX_WITH_R0_LOGGING
332	for (VMCPUID i = 0; i < pVM->cCpus; i++)
333	{
334	PVMCPU pVCpu = &pVM->aCpus[i];
335
336	rc = MMR3HyperAllocOnceNoRelEx(pVM, RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[pLogger->cGroups]),
337	0, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
338	(void **)&pVCpu->vmm.s.pR0LoggerR3);
339	if (RT_FAILURE(rc))
340	return rc;
341	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
342	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
343	pVCpu->vmm.s.pR0LoggerR3->cbLogger = RT_OFFSETOF(RTLOGGER, afGroups[pLogger->cGroups]);
344	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
345	}
346	# endif
347	}
348	#endif /* LOG_ENABLED */
349
350	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
351	/*
352	* Allocate RC release logger instances (finalized in the relocator).
353	*/
354	PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
355	if (pRelLogger)
356	{
357	pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
358	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
359	if (RT_FAILURE(rc))
360	return rc;
361	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
362	}
363	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
364	return VINF_SUCCESS;
365	}
366
367
368	/**
369	* VMMR3Init worker that register the statistics with STAM.
370	*
371	* @param pVM The shared VM structure.
372	*/
373	static void vmmR3InitRegisterStats(PVM pVM)
374	{
375	/*
376	* Statistics.
377	*/
378	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
379	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
380	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
381	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
382	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
383	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
384	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
385	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
386	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
387	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
388	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
389	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
390	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_READ returns.");
391	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_WRITE returns.");
392	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ returns.");
393	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_WRITE returns.");
394	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ_WRITE returns.");
395	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
396	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
397	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
398	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
399	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
400	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
401	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
402	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
403	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
404	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
405	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
406	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
407	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
408	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
409	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
410	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
411	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
412	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
413	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
414	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
415	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
416	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
417	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
418	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
419	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
420	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
421	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
422	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
423	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
424	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
425	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HWACCM_PATCH_TPR_INSTR returns.");
426	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
427	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
428	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
429	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
430	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
431	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
432	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
433	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
434	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
435	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
436
437	#ifdef VBOX_WITH_STATISTICS
438	for (VMCPUID i = 0; i < pVM->cCpus; i++)
439	{
440	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
441	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
442	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
443	}
444	#endif
445	}
446
447
448	/**
449	* Initializes the per-VCPU VMM.
450	*
451	* @returns VBox status code.
452	* @param pVM The VM to operate on.
453	*/
454	VMMR3DECL(int) VMMR3InitCPU(PVM pVM)
455	{
456	LogFlow(("VMMR3InitCPU\n"));
457	return VINF_SUCCESS;
458	}
459
460
461	/**
462	* Initializes the R0 VMM.
463	*
464	* @returns VBox status code.
465	* @param pVM The VM to operate on.
466	*/
467	VMMR3DECL(int) VMMR3InitR0(PVM pVM)
468	{
469	int rc;
470	PVMCPU pVCpu = VMMGetCpu(pVM);
471	Assert(pVCpu && pVCpu->idCpu == 0);
472
473	#ifdef LOG_ENABLED
474	/*
475	* Initialize the ring-0 logger if we haven't done so yet.
476	*/
477	if ( pVCpu->vmm.s.pR0LoggerR3
478	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
479	{
480	rc = VMMR3UpdateLoggers(pVM);
481	if (RT_FAILURE(rc))
482	return rc;
483	}
484	#endif
485
486	/*
487	* Call Ring-0 entry with init code.
488	*/
489	for (;;)
490	{
491	#ifdef NO_SUPCALLR0VMM
492	//rc = VERR_GENERAL_FAILURE;
493	rc = VINF_SUCCESS;
494	#else
495	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
496	#endif
497	/*
498	* Flush the logs.
499	*/
500	#ifdef LOG_ENABLED
501	if ( pVCpu->vmm.s.pR0LoggerR3
502	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
503	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
504	#endif
505	if (rc != VINF_VMM_CALL_HOST)
506	break;
507	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
508	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
509	break;
510	/* Resume R0 */
511	}
512
513	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
514	{
515	LogRel(("R0 init failed, rc=%Rra\n", rc));
516	if (RT_SUCCESS(rc))
517	rc = VERR_INTERNAL_ERROR;
518	}
519	return rc;
520	}
521
522
523	/**
524	* Initializes the RC VMM.
525	*
526	* @returns VBox status code.
527	* @param pVM The VM to operate on.
528	*/
529	VMMR3DECL(int) VMMR3InitRC(PVM pVM)
530	{
531	PVMCPU pVCpu = VMMGetCpu(pVM);
532	Assert(pVCpu && pVCpu->idCpu == 0);
533
534	/* In VMX mode, there's no need to init RC. */
535	if (pVM->vmm.s.fSwitcherDisabled)
536	return VINF_SUCCESS;
537
538	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
539
540	/*
541	* Call VMMGCInit():
542	* -# resolve the address.
543	* -# setup stackframe and EIP to use the trampoline.
544	* -# do a generic hypervisor call.
545	*/
546	RTRCPTR RCPtrEP;
547	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
548	if (RT_SUCCESS(rc))
549	{
550	CPUMHyperSetCtxCore(pVCpu, NULL);
551	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
552	uint64_t u64TS = RTTimeProgramStartNanoTS();
553	CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
554	CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
555	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
556	CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
557	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
558	CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
559	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
560	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
561	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
562
563	for (;;)
564	{
565	#ifdef NO_SUPCALLR0VMM
566	//rc = VERR_GENERAL_FAILURE;
567	rc = VINF_SUCCESS;
568	#else
569	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
570	#endif
571	#ifdef LOG_ENABLED
572	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
573	if ( pLogger
574	&& pLogger->offScratch > 0)
575	RTLogFlushRC(NULL, pLogger);
576	#endif
577	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
578	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
579	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
580	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
581	#endif
582	if (rc != VINF_VMM_CALL_HOST)
583	break;
584	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
585	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
586	break;
587	}
588
589	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
590	{
591	VMMR3FatalDump(pVM, pVCpu, rc);
592	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
593	rc = VERR_INTERNAL_ERROR;
594	}
595	AssertRC(rc);
596	}
597	return rc;
598	}
599
600
601	/**
602	* Called when an init phase completes.
603	*
604	* @returns VBox status code.
605	* @param pVM The VM handle.
606	* @param enmWhat Which init phase.
607	*/
608	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
609	{
610	int rc = VINF_SUCCESS;
611
612	switch (enmWhat)
613	{
614	case VMINITCOMPLETED_RING3:
615	{
616	/*
617	* Set page attributes to r/w for stack pages.
618	*/
619	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
620	{
621	rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
622	X86_PTE_P \| X86_PTE_A \| X86_PTE_D \| X86_PTE_RW);
623	AssertRCReturn(rc, rc);
624	}
625
626	/*
627	* Create the EMT yield timer.
628	*/
629	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
630	AssertRCReturn(rc, rc);
631
632	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
633	AssertRCReturn(rc, rc);
634
635	#ifdef VBOX_WITH_NMI
636	/*
637	* Map the host APIC into GC - This is AMD/Intel + Host OS specific!
638	*/
639	rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
640	X86_PTE_P \| X86_PTE_RW \| X86_PTE_PWT \| X86_PTE_PCD \| X86_PTE_A \| X86_PTE_D);
641	AssertRCReturn(rc, rc);
642	#endif
643
644	#ifdef VBOX_STRICT_VMM_STACK
645	/*
646	* Setup the stack guard pages: Two inaccessible pages at each sides of the
647	* stack to catch over/under-flows.
648	*/
649	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
650	{
651	uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
652
653	memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
654	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /fSet/);
655
656	memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
657	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /fSet/);
658	}
659	pVM->vmm.s.fStackGuardsStationed = true;
660	#endif
661	break;
662	}
663
664	case VMINITCOMPLETED_RING0:
665	{
666	/*
667	* Disable the periodic preemption timers if we can use the
668	* VMX-preemption timer instead.
669	*/
670	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
671	&& HWACCMR3IsVmxPreemptionTimerUsed(pVM))
672	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
673	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
674	break;
675	}
676
677	default: /* shuts up gcc */
678	break;
679	}
680
681	return rc;
682	}
683
684
685	/**
686	* Terminate the VMM bits.
687	*
688	* @returns VINF_SUCCESS.
689	* @param pVM The VM handle.
690	*/
691	VMMR3DECL(int) VMMR3Term(PVM pVM)
692	{
693	PVMCPU pVCpu = VMMGetCpu(pVM);
694	Assert(pVCpu && pVCpu->idCpu == 0);
695
696	/*
697	* Call Ring-0 entry with termination code.
698	*/
699	int rc;
700	for (;;)
701	{
702	#ifdef NO_SUPCALLR0VMM
703	//rc = VERR_GENERAL_FAILURE;
704	rc = VINF_SUCCESS;
705	#else
706	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
707	#endif
708	/*
709	* Flush the logs.
710	*/
711	#ifdef LOG_ENABLED
712	if ( pVCpu->vmm.s.pR0LoggerR3
713	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
714	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
715	#endif
716	if (rc != VINF_VMM_CALL_HOST)
717	break;
718	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
719	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
720	break;
721	/* Resume R0 */
722	}
723	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
724	{
725	LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
726	if (RT_SUCCESS(rc))
727	rc = VERR_INTERNAL_ERROR;
728	}
729
730	RTCritSectDelete(&pVM->vmm.s.CritSectSync);
731	for (VMCPUID i = 0; i < pVM->cCpus; i++)
732	{
733	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
734	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
735	}
736	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
737	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
738	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
739	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
740	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
741	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
742	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
743	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
744
745	#ifdef VBOX_STRICT_VMM_STACK
746	/*
747	* Make the two stack guard pages present again.
748	*/
749	if (pVM->vmm.s.fStackGuardsStationed)
750	{
751	for (VMCPUID i = 0; i < pVM->cCpus; i++)
752	{
753	uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
754	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /fSet/);
755	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /fSet/);
756	}
757	pVM->vmm.s.fStackGuardsStationed = false;
758	}
759	#endif
760	return rc;
761	}
762
763
764	/**
765	* Terminates the per-VCPU VMM.
766	*
767	* Termination means cleaning up and freeing all resources,
768	* the VM it self is at this point powered off or suspended.
769	*
770	* @returns VBox status code.
771	* @param pVM The VM to operate on.
772	*/
773	VMMR3DECL(int) VMMR3TermCPU(PVM pVM)
774	{
775	return VINF_SUCCESS;
776	}
777
778
779	/**
780	* Applies relocations to data and code managed by this
781	* component. This function will be called at init and
782	* whenever the VMM need to relocate it self inside the GC.
783	*
784	* The VMM will need to apply relocations to the core code.
785	*
786	* @param pVM The VM handle.
787	* @param offDelta The relocation delta.
788	*/
789	VMMR3DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
790	{
791	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
792
793	/*
794	* Recalc the RC address.
795	*/
796	#ifdef VBOX_WITH_RAW_MODE
797	pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
798	#endif
799
800	/*
801	* The stack.
802	*/
803	for (VMCPUID i = 0; i < pVM->cCpus; i++)
804	{
805	PVMCPU pVCpu = &pVM->aCpus[i];
806
807	CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
808
809	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
810	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
811	}
812
813	/*
814	* All the switchers.
815	*/
816	vmmR3SwitcherRelocate(pVM, offDelta);
817
818	/*
819	* Get other RC entry points.
820	*/
821	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
822	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
823
824	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
825	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
826
827	/*
828	* Update the logger.
829	*/
830	VMMR3UpdateLoggers(pVM);
831	}
832
833
834	/**
835	* Updates the settings for the RC and R0 loggers.
836	*
837	* @returns VBox status code.
838	* @param pVM The VM handle.
839	*/
840	VMMR3DECL(int) VMMR3UpdateLoggers(PVM pVM)
841	{
842	/*
843	* Simply clone the logger instance (for RC).
844	*/
845	int rc = VINF_SUCCESS;
846	RTRCPTR RCPtrLoggerFlush = 0;
847
848	if (pVM->vmm.s.pRCLoggerR3
849	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
850	\|\| pVM->vmm.s.pRCRelLoggerR3
851	#endif
852	)
853	{
854	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
855	AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
856	}
857
858	if (pVM->vmm.s.pRCLoggerR3)
859	{
860	RTRCPTR RCPtrLoggerWrapper = 0;
861	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
862	AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
863
864	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
865	rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
866	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
867	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
868	}
869
870	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
871	if (pVM->vmm.s.pRCRelLoggerR3)
872	{
873	RTRCPTR RCPtrLoggerWrapper = 0;
874	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
875	AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
876
877	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
878	rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
879	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
880	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
881	}
882	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
883
884	#ifdef LOG_ENABLED
885	/*
886	* For the ring-0 EMT logger, we use a per-thread logger instance
887	* in ring-0. Only initialize it once.
888	*/
889	for (VMCPUID i = 0; i < pVM->cCpus; i++)
890	{
891	PVMCPU pVCpu = &pVM->aCpus[i];
892	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
893	if (pR0LoggerR3)
894	{
895	if (!pR0LoggerR3->fCreated)
896	{
897	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
898	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
899	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
900
901	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
902	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
903	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
904
905	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
906	(PFNRTLOGGER )&pfnLoggerWrapper, (PFNRTLOGFLUSH )&pfnLoggerFlush,
907	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
908	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
909
910	RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
911	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
912	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
913	rc = RTLogSetCustomPrefixCallback(&pR0LoggerR3->Logger, (PFNRTLOGPREFIX )&pfnLoggerPrefix, NULL);
914	AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
915
916	pR0LoggerR3->idCpu = i;
917	pR0LoggerR3->fCreated = true;
918	pR0LoggerR3->fFlushingDisabled = false;
919
920	}
921
922	rc = RTLogCopyGroupsAndFlags(&pR0LoggerR3->Logger, NULL /* default */, pVM->vmm.s.pRCLoggerR3->fFlags, RTLOGFLAGS_BUFFERED);
923	AssertRC(rc);
924	}
925	}
926	#endif
927	return rc;
928	}
929
930
931	/**
932	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
933	*
934	* @returns Pointer to the buffer.
935	* @param pVM The VM handle.
936	*/
937	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
938	{
939	if (HWACCMIsEnabled(pVM))
940	return pVM->vmm.s.szRing0AssertMsg1;
941
942	RTRCPTR RCPtr;
943	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
944	if (RT_SUCCESS(rc))
945	return (const char *)MMHyperRCToR3(pVM, RCPtr);
946
947	return NULL;
948	}
949
950
951	/**
952	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
953	*
954	* @returns Pointer to the buffer.
955	* @param pVM The VM handle.
956	*/
957	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
958	{
959	if (HWACCMIsEnabled(pVM))
960	return pVM->vmm.s.szRing0AssertMsg2;
961
962	RTRCPTR RCPtr;
963	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
964	if (RT_SUCCESS(rc))
965	return (const char *)MMHyperRCToR3(pVM, RCPtr);
966
967	return NULL;
968	}
969
970
971	/**
972	* Execute state save operation.
973	*
974	* @returns VBox status code.
975	* @param pVM VM Handle.
976	* @param pSSM SSM operation handle.
977	*/
978	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
979	{
980	LogFlow(("vmmR3Save:\n"));
981
982	/*
983	* Save the started/stopped state of all CPUs except 0 as it will always
984	* be running. This avoids breaking the saved state version. :-)
985	*/
986	for (VMCPUID i = 1; i < pVM->cCpus; i++)
987	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
988
989	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
990	}
991
992
993	/**
994	* Execute state load operation.
995	*
996	* @returns VBox status code.
997	* @param pVM VM Handle.
998	* @param pSSM SSM operation handle.
999	* @param uVersion Data layout version.
1000	* @param uPass The data pass.
1001	*/
1002	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1003	{
1004	LogFlow(("vmmR3Load:\n"));
1005	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1006
1007	/*
1008	* Validate version.
1009	*/
1010	if ( uVersion != VMM_SAVED_STATE_VERSION
1011	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1012	{
1013	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1014	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1015	}
1016
1017	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1018	{
1019	/* Ignore the stack bottom, stack pointer and stack bits. */
1020	RTRCPTR RCPtrIgnored;
1021	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1022	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1023	#ifdef RT_OS_DARWIN
1024	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1025	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1026	&& SSMR3HandleRevision(pSSM) >= 48858
1027	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1028	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1029	)
1030	SSMR3Skip(pSSM, 16384);
1031	else
1032	SSMR3Skip(pSSM, 8192);
1033	#else
1034	SSMR3Skip(pSSM, 8192);
1035	#endif
1036	}
1037
1038	/*
1039	* Restore the VMCPU states. VCPU 0 is always started.
1040	*/
1041	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1042	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1043	{
1044	bool fStarted;
1045	int rc = SSMR3GetBool(pSSM, &fStarted);
1046	if (RT_FAILURE(rc))
1047	return rc;
1048	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1049	}
1050
1051	/* terminator */
1052	uint32_t u32;
1053	int rc = SSMR3GetU32(pSSM, &u32);
1054	if (RT_FAILURE(rc))
1055	return rc;
1056	if (u32 != UINT32_MAX)
1057	{
1058	AssertMsgFailed(("u32=%#x\n", u32));
1059	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1060	}
1061	return VINF_SUCCESS;
1062	}
1063
1064
1065	/**
1066	* Resolve a builtin RC symbol.
1067	*
1068	* Called by PDM when loading or relocating RC modules.
1069	*
1070	* @returns VBox status
1071	* @param pVM VM Handle.
1072	* @param pszSymbol Symbol to resolv
1073	* @param pRCPtrValue Where to store the symbol value.
1074	*
1075	* @remark This has to work before VMMR3Relocate() is called.
1076	*/
1077	VMMR3DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1078	{
1079	if (!strcmp(pszSymbol, "g_Logger"))
1080	{
1081	if (pVM->vmm.s.pRCLoggerR3)
1082	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1083	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1084	}
1085	else if (!strcmp(pszSymbol, "g_RelLogger"))
1086	{
1087	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1088	if (pVM->vmm.s.pRCRelLoggerR3)
1089	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1090	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1091	#else
1092	*pRCPtrValue = NIL_RTRCPTR;
1093	#endif
1094	}
1095	else
1096	return VERR_SYMBOL_NOT_FOUND;
1097	return VINF_SUCCESS;
1098	}
1099
1100
1101	/**
1102	* Suspends the CPU yielder.
1103	*
1104	* @param pVM The VM handle.
1105	*/
1106	VMMR3DECL(void) VMMR3YieldSuspend(PVM pVM)
1107	{
1108	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1109	if (!pVM->vmm.s.cYieldResumeMillies)
1110	{
1111	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1112	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1113	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1114	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1115	else
1116	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1117	TMTimerStop(pVM->vmm.s.pYieldTimer);
1118	}
1119	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1120	}
1121
1122
1123	/**
1124	* Stops the CPU yielder.
1125	*
1126	* @param pVM The VM handle.
1127	*/
1128	VMMR3DECL(void) VMMR3YieldStop(PVM pVM)
1129	{
1130	if (!pVM->vmm.s.cYieldResumeMillies)
1131	TMTimerStop(pVM->vmm.s.pYieldTimer);
1132	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1133	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1134	}
1135
1136
1137	/**
1138	* Resumes the CPU yielder when it has been a suspended or stopped.
1139	*
1140	* @param pVM The VM handle.
1141	*/
1142	VMMR3DECL(void) VMMR3YieldResume(PVM pVM)
1143	{
1144	if (pVM->vmm.s.cYieldResumeMillies)
1145	{
1146	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1147	pVM->vmm.s.cYieldResumeMillies = 0;
1148	}
1149	}
1150
1151
1152	/**
1153	* Internal timer callback function.
1154	*
1155	* @param pVM The VM.
1156	* @param pTimer The timer handle.
1157	* @param pvUser User argument specified upon timer creation.
1158	*/
1159	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1160	{
1161	/*
1162	* This really needs some careful tuning. While we shouldn't be too greedy since
1163	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1164	* because that'll cause us to stop up.
1165	*
1166	* The current logic is to use the default interval when there is no lag worth
1167	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1168	*
1169	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1170	* so the lag is up to date.)
1171	*/
1172	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1173	if ( u64Lag < 50000000 /* 50ms */
1174	\|\| ( u64Lag < 1000000000 /* 1s */
1175	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1176	)
1177	{
1178	uint64_t u64Elapsed = RTTimeNanoTS();
1179	pVM->vmm.s.u64LastYield = u64Elapsed;
1180
1181	RTThreadYield();
1182
1183	#ifdef LOG_ENABLED
1184	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1185	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1186	#endif
1187	}
1188	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1189	}
1190
1191
1192	/**
1193	* Executes guest code in the raw-mode context.
1194	*
1195	* @param pVM VM handle.
1196	* @param pVCpu The VMCPU to operate on.
1197	*/
1198	VMMR3DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1199	{
1200	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1201
1202	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1203
1204	/*
1205	* Set the EIP and ESP.
1206	*/
1207	CPUMSetHyperEIP(pVCpu, CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1208	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1209	: pVM->vmm.s.pfnCPUMRCResumeGuest);
1210	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
1211
1212	/*
1213	* We hide log flushes (outer) and hypervisor interrupts (inner).
1214	*/
1215	for (;;)
1216	{
1217	#ifdef VBOX_STRICT
1218	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1219	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1220	PGMMapCheck(pVM);
1221	#endif
1222	int rc;
1223	do
1224	{
1225	#ifdef NO_SUPCALLR0VMM
1226	rc = VERR_GENERAL_FAILURE;
1227	#else
1228	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1229	if (RT_LIKELY(rc == VINF_SUCCESS))
1230	rc = pVCpu->vmm.s.iLastGZRc;
1231	#endif
1232	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1233
1234	/*
1235	* Flush the logs.
1236	*/
1237	#ifdef LOG_ENABLED
1238	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1239	if ( pLogger
1240	&& pLogger->offScratch > 0)
1241	RTLogFlushRC(NULL, pLogger);
1242	#endif
1243	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1244	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1245	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1246	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1247	#endif
1248	if (rc != VINF_VMM_CALL_HOST)
1249	{
1250	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1251	return rc;
1252	}
1253	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1254	if (RT_FAILURE(rc))
1255	return rc;
1256	/* Resume GC */
1257	}
1258	}
1259
1260
1261	/**
1262	* Executes guest code (Intel VT-x and AMD-V).
1263	*
1264	* @param pVM VM handle.
1265	* @param pVCpu The VMCPU to operate on.
1266	*/
1267	VMMR3DECL(int) VMMR3HwAccRunGC(PVM pVM, PVMCPU pVCpu)
1268	{
1269	Log2(("VMMR3HwAccRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1270
1271	for (;;)
1272	{
1273	int rc;
1274	do
1275	{
1276	#ifdef NO_SUPCALLR0VMM
1277	rc = VERR_GENERAL_FAILURE;
1278	#else
1279	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HWACC_RUN, pVCpu->idCpu);
1280	if (RT_LIKELY(rc == VINF_SUCCESS))
1281	rc = pVCpu->vmm.s.iLastGZRc;
1282	#endif
1283	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1284
1285	#if 0 /* todo triggers too often */
1286	Assert(!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TO_R3));
1287	#endif
1288
1289	#ifdef LOG_ENABLED
1290	/*
1291	* Flush the log
1292	*/
1293	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1294	if ( pR0LoggerR3
1295	&& pR0LoggerR3->Logger.offScratch > 0)
1296	RTLogFlushToLogger(&pR0LoggerR3->Logger, NULL);
1297	#endif /* !LOG_ENABLED */
1298	if (rc != VINF_VMM_CALL_HOST)
1299	{
1300	Log2(("VMMR3HwAccRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1301	return rc;
1302	}
1303	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1304	if (RT_FAILURE(rc))
1305	return rc;
1306	/* Resume R0 */
1307	}
1308	}
1309
1310	/**
1311	* VCPU worker for VMMSendSipi.
1312	*
1313	* @param pVM The VM to operate on.
1314	* @param idCpu Virtual CPU to perform SIPI on
1315	* @param uVector SIPI vector
1316	*/
1317	DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1318	{
1319	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1320	VMCPU_ASSERT_EMT(pVCpu);
1321
1322	/** @todo what are we supposed to do if the processor is already running? */
1323	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1324	return VERR_ACCESS_DENIED;
1325
1326
1327	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1328
1329	pCtx->cs = uVector << 8;
1330	pCtx->csHid.u64Base = uVector << 12;
1331	pCtx->csHid.u32Limit = 0x0000ffff;
1332	pCtx->rip = 0;
1333
1334	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1335
1336	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1337	EMSetState(pVCpu, EMSTATE_HALTED);
1338	return VINF_EM_RESCHEDULE;
1339	# else /* And if we go the VMCPU::enmState way it can stay here. */
1340	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1341	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1342	return VINF_SUCCESS;
1343	# endif
1344	}
1345
1346	DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1347	{
1348	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1349	VMCPU_ASSERT_EMT(pVCpu);
1350
1351	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1352	CPUMR3ResetCpu(pVCpu);
1353	return VINF_EM_WAIT_SIPI;
1354	}
1355
1356	/**
1357	* Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1358	* and unhalting processor
1359	*
1360	* @param pVM The VM to operate on.
1361	* @param idCpu Virtual CPU to perform SIPI on
1362	* @param uVector SIPI vector
1363	*/
1364	VMMR3DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1365	{
1366	AssertReturnVoid(idCpu < pVM->cCpus);
1367
1368	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1369	AssertRC(rc);
1370	}
1371
1372	/**
1373	* Sends init IPI to the virtual CPU.
1374	*
1375	* @param pVM The VM to operate on.
1376	* @param idCpu Virtual CPU to perform int IPI on
1377	*/
1378	VMMR3DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1379	{
1380	AssertReturnVoid(idCpu < pVM->cCpus);
1381
1382	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1383	AssertRC(rc);
1384	}
1385
1386	/**
1387	* Registers the guest memory range that can be used for patching
1388	*
1389	* @returns VBox status code.
1390	* @param pVM The VM to operate on.
1391	* @param pPatchMem Patch memory range
1392	* @param cbPatchMem Size of the memory range
1393	*/
1394	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1395	{
1396	if (HWACCMIsEnabled(pVM))
1397	return HWACMMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1398
1399	return VERR_NOT_SUPPORTED;
1400	}
1401
1402	/**
1403	* Deregisters the guest memory range that can be used for patching
1404	*
1405	* @returns VBox status code.
1406	* @param pVM The VM to operate on.
1407	* @param pPatchMem Patch memory range
1408	* @param cbPatchMem Size of the memory range
1409	*/
1410	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1411	{
1412	if (HWACCMIsEnabled(pVM))
1413	return HWACMMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1414
1415	return VINF_SUCCESS;
1416	}
1417
1418
1419	/**
1420	* VCPU worker for VMMR3SynchronizeAllVCpus.
1421	*
1422	* @param pVM The VM to operate on.
1423	* @param idCpu Virtual CPU to perform SIPI on
1424	* @param uVector SIPI vector
1425	*/
1426	DECLCALLBACK(int) vmmR3SyncVCpu(PVM pVM)
1427	{
1428	/* Block until the job in the caller has finished. */
1429	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1430	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1431	return VINF_SUCCESS;
1432	}
1433
1434
1435	/**
1436	* Atomically execute a callback handler
1437	* Note: This is very expensive; avoid using it frequently!
1438	*
1439	* @param pVM The VM to operate on.
1440	* @param pfnHandler Callback handler
1441	* @param pvUser User specified parameter
1442	*
1443	* @thread EMT
1444	*/
1445	VMMR3DECL(int) VMMR3AtomicExecuteHandler(PVM pVM, PFNATOMICHANDLER pfnHandler, void *pvUser)
1446	{
1447	int rc;
1448	PVMCPU pVCpu = VMMGetCpu(pVM);
1449	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1450
1451	/* Shortcut for the uniprocessor case. */
1452	if (pVM->cCpus == 1)
1453	return pfnHandler(pVM, pvUser);
1454
1455	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1456	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
1457	{
1458	if (idCpu != pVCpu->idCpu)
1459	{
1460	rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SyncVCpu, 1, pVM);
1461	AssertRC(rc);
1462	}
1463	}
1464	/* Wait until all other VCPUs are waiting for us. */
1465	while (RTCritSectGetWaiters(&pVM->vmm.s.CritSectSync) != (int32_t)(pVM->cCpus - 1))
1466	RTThreadSleep(1);
1467
1468	rc = pfnHandler(pVM, pvUser);
1469	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1470	return rc;
1471	}
1472
1473
1474	/**
1475	* Count returns and have the last non-caller EMT wake up the caller.
1476	*
1477	* @returns VBox strict informational status code for EM scheduling. No failures
1478	* will be returned here, those are for the caller only.
1479	*
1480	* @param pVM The VM handle.
1481	*/
1482	DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1483	{
1484	int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1485	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1486	if (cReturned == pVM->cCpus - 1U)
1487	{
1488	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1489	AssertLogRelRC(rc);
1490	}
1491
1492	AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1493	\|\| (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1494	("%Rrc\n", rcRet),
1495	VERR_IPE_UNEXPECTED_INFO_STATUS);
1496	return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1497	}
1498
1499
1500	/**
1501	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1502	*
1503	* @returns VBox strict informational status code for EM scheduling. No failures
1504	* will be returned here, those are for the caller only. When
1505	* fIsCaller is set, VINF_SUCCESS is always returned.
1506	*
1507	* @param pVM The VM handle.
1508	* @param pVCpu The VMCPU structure for the calling EMT.
1509	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1510	* not.
1511	* @param fFlags The flags.
1512	* @param pfnRendezvous The callback.
1513	* @param pvUser The user argument for the callback.
1514	*/
1515	static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1516	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1517	{
1518	int rc;
1519
1520	/*
1521	* Enter, the last EMT triggers the next callback phase.
1522	*/
1523	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1524	if (cEntered != pVM->cCpus)
1525	{
1526	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1527	{
1528	/* Wait for our turn. */
1529	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1530	AssertLogRelRC(rc);
1531	}
1532	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1533	{
1534	/* Wait for the last EMT to arrive and wake everyone up. */
1535	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1536	AssertLogRelRC(rc);
1537	}
1538	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1539	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1540	{
1541	/* Wait for our turn. */
1542	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1543	AssertLogRelRC(rc);
1544	}
1545	else
1546	{
1547	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1548
1549	/*
1550	* The execute once is handled specially to optimize the code flow.
1551	*
1552	* The last EMT to arrive will perform the callback and the other
1553	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1554	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1555	* returns, that EMT will initiate the normal return sequence.
1556	*/
1557	if (!fIsCaller)
1558	{
1559	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1560	AssertLogRelRC(rc);
1561
1562	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1563	}
1564	return VINF_SUCCESS;
1565	}
1566	}
1567	else
1568	{
1569	/*
1570	* All EMTs are waiting, clear the FF and take action according to the
1571	* execution method.
1572	*/
1573	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1574
1575	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1576	{
1577	/* Wake up everyone. */
1578	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1579	AssertLogRelRC(rc);
1580	}
1581	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1582	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1583	{
1584	/* Figure out who to wake up and wake it up. If it's ourself, then
1585	it's easy otherwise wait for our turn. */
1586	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1587	? 0
1588	: pVM->cCpus - 1U;
1589	if (pVCpu->idCpu != iFirst)
1590	{
1591	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1592	AssertLogRelRC(rc);
1593	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1594	AssertLogRelRC(rc);
1595	}
1596	}
1597	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1598	}
1599
1600
1601	/*
1602	* Do the callback and update the status if necessary.
1603	*/
1604	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1605	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1606	{
1607	VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1608	if (rcStrict != VINF_SUCCESS)
1609	{
1610	AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1611	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1612	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1613	int32_t i32RendezvousStatus;
1614	do
1615	{
1616	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1617	if ( rcStrict == i32RendezvousStatus
1618	\|\| RT_FAILURE(i32RendezvousStatus)
1619	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1620	&& rcStrict > i32RendezvousStatus))
1621	break;
1622	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1623	}
1624	}
1625
1626	/*
1627	* Increment the done counter and take action depending on whether we're
1628	* the last to finish callback execution.
1629	*/
1630	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1631	if ( cDone != pVM->cCpus
1632	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1633	{
1634	/* Signal the next EMT? */
1635	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1636	{
1637	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1638	AssertLogRelRC(rc);
1639	}
1640	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1641	{
1642	Assert(cDone == pVCpu->idCpu + 1U);
1643	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1644	AssertLogRelRC(rc);
1645	}
1646	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1647	{
1648	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1649	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1650	AssertLogRelRC(rc);
1651	}
1652
1653	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1654	if (!fIsCaller)
1655	{
1656	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1657	AssertLogRelRC(rc);
1658	}
1659	}
1660	else
1661	{
1662	/* Callback execution is all done, tell the rest to return. */
1663	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1664	AssertLogRelRC(rc);
1665	}
1666
1667	if (!fIsCaller)
1668	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1669	return VINF_SUCCESS;
1670	}
1671
1672
1673	/**
1674	* Called in response to VM_FF_EMT_RENDEZVOUS.
1675	*
1676	* @returns VBox strict status code - EM scheduling. No errors will be returned
1677	* here, nor will any non-EM scheduling status codes be returned.
1678	*
1679	* @param pVM The VM handle
1680	* @param pVCpu The handle of the calling EMT.
1681	*
1682	* @thread EMT
1683	*/
1684	VMMR3DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1685	{
1686	return vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1687	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1688	}
1689
1690
1691	/**
1692	* EMT rendezvous.
1693	*
1694	* Gathers all the EMTs and execute some code on each of them, either in a one
1695	* by one fashion or all at once.
1696	*
1697	* @returns VBox strict status code. This will be the the first error,
1698	* VINF_SUCCESS, or an EM scheduling status code.
1699	*
1700	* @param pVM The VM handle.
1701	* @param fFlags Flags indicating execution methods. See
1702	* grp_VMMR3EmtRendezvous_fFlags.
1703	* @param pfnRendezvous The callback.
1704	* @param pvUser User argument for the callback.
1705	*
1706	* @thread Any.
1707	*/
1708	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1709	{
1710	/*
1711	* Validate input.
1712	*/
1713	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1714	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1715	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1716	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1717	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1718	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1719	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1720
1721	VBOXSTRICTRC rcStrict;
1722	PVMCPU pVCpu = VMMGetCpu(pVM);
1723	if (!pVCpu)
1724	/*
1725	* Forward the request to an EMT thread.
1726	*/
1727	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1728	(PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1729	else if (pVM->cCpus == 1)
1730	/*
1731	* Shortcut for the single EMT case.
1732	*/
1733	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1734	else
1735	{
1736	/*
1737	* Spin lock. If busy, wait for the other EMT to finish while keeping a
1738	* lookout of the RENDEZVOUS FF.
1739	*/
1740	int rc;
1741	rcStrict = VINF_SUCCESS;
1742	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1743	{
1744	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1745	{
1746	if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1747	{
1748	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1749	if ( rc != VINF_SUCCESS
1750	&& ( rcStrict == VINF_SUCCESS
1751	\|\| rcStrict > rc))
1752	rcStrict = rc;
1753	/** @todo Perhaps deal with termination here? */
1754	}
1755	ASMNopPause();
1756	}
1757	}
1758	Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1759
1760	/*
1761	* Clear the slate. This is a semaphore ping-pong orgy. :-)
1762	*/
1763	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1764	{
1765	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1766	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1767	}
1768	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1769	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1770	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1771	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1772	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1773	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1774	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1775	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1776	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1777	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1778	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1779
1780	/*
1781	* Set the FF and poke the other EMTs.
1782	*/
1783	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1784	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1785
1786	/*
1787	* Do the same ourselves.
1788	*/
1789	vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1790
1791	/*
1792	* The caller waits for the other EMTs to be done and return before doing
1793	* the cleanup. This makes away with wakeup / reset races we would otherwise
1794	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1795	*/
1796	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1797	AssertLogRelRC(rc);
1798
1799	/*
1800	* Get the return code and clean up a little bit.
1801	*/
1802	int rcMy = pVM->vmm.s.i32RendezvousStatus;
1803	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1804
1805	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1806
1807	/*
1808	* Merge rcStrict and rcMy.
1809	*/
1810	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1811	if ( rcMy != VINF_SUCCESS
1812	&& ( rcStrict == VINF_SUCCESS
1813	\|\| rcStrict > rcMy))
1814	rcStrict = rcMy;
1815	}
1816
1817	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1818	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1819	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1820	VERR_IPE_UNEXPECTED_INFO_STATUS);
1821	return VBOXSTRICTRC_VAL(rcStrict);
1822	}
1823
1824
1825	/**
1826	* Read from the ring 0 jump buffer stack
1827	*
1828	* @returns VBox status code.
1829	*
1830	* @param pVM Pointer to the shared VM structure.
1831	* @param idCpu The ID of the source CPU context (for the address).
1832	* @param R0Addr Where to start reading.
1833	* @param pvBuf Where to store the data we've read.
1834	* @param cbRead The number of bytes to read.
1835	*/
1836	VMMR3DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1837	{
1838	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1839	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1840
1841	#ifdef VMM_R0_SWITCH_STACK
1842	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1843	#else
1844	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1845	#endif
1846	if ( off > VMM_STACK_SIZE
1847	\|\| off + cbRead >= VMM_STACK_SIZE)
1848	return VERR_INVALID_POINTER;
1849
1850	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1851	return VINF_SUCCESS;
1852	}
1853
1854
1855	/**
1856	* Calls a RC function.
1857	*
1858	* @param pVM The VM handle.
1859	* @param RCPtrEntry The address of the RC function.
1860	* @param cArgs The number of arguments in the ....
1861	* @param ... Arguments to the function.
1862	*/
1863	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1864	{
1865	va_list args;
1866	va_start(args, cArgs);
1867	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1868	va_end(args);
1869	return rc;
1870	}
1871
1872
1873	/**
1874	* Calls a RC function.
1875	*
1876	* @param pVM The VM handle.
1877	* @param RCPtrEntry The address of the RC function.
1878	* @param cArgs The number of arguments in the ....
1879	* @param args Arguments to the function.
1880	*/
1881	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1882	{
1883	/* Raw mode implies 1 VCPU. */
1884	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1885	PVMCPU pVCpu = &pVM->aCpus[0];
1886
1887	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1888
1889	/*
1890	* Setup the call frame using the trampoline.
1891	*/
1892	CPUMHyperSetCtxCore(pVCpu, NULL);
1893	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1894	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32));
1895	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1896	int i = cArgs;
1897	while (i-- > 0)
1898	*pFrame++ = va_arg(args, RTGCUINTPTR32);
1899
1900	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1901	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1902	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
1903
1904	/*
1905	* We hide log flushes (outer) and hypervisor interrupts (inner).
1906	*/
1907	for (;;)
1908	{
1909	int rc;
1910	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1911	do
1912	{
1913	#ifdef NO_SUPCALLR0VMM
1914	rc = VERR_GENERAL_FAILURE;
1915	#else
1916	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1917	if (RT_LIKELY(rc == VINF_SUCCESS))
1918	rc = pVCpu->vmm.s.iLastGZRc;
1919	#endif
1920	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1921
1922	/*
1923	* Flush the logs.
1924	*/
1925	#ifdef LOG_ENABLED
1926	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1927	if ( pLogger
1928	&& pLogger->offScratch > 0)
1929	RTLogFlushRC(NULL, pLogger);
1930	#endif
1931	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1932	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1933	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1934	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1935	#endif
1936	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
1937	VMMR3FatalDump(pVM, pVCpu, rc);
1938	if (rc != VINF_VMM_CALL_HOST)
1939	{
1940	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1941	return rc;
1942	}
1943	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1944	if (RT_FAILURE(rc))
1945	return rc;
1946	}
1947	}
1948
1949
1950	/**
1951	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1952	*
1953	* @returns VBox status code.
1954	* @param pVM The VM to operate on.
1955	* @param uOperation Operation to execute.
1956	* @param u64Arg Constant argument.
1957	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1958	* details.
1959	*/
1960	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1961	{
1962	PVMCPU pVCpu = VMMGetCpu(pVM);
1963	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1964
1965	/*
1966	* Call Ring-0 entry with init code.
1967	*/
1968	int rc;
1969	for (;;)
1970	{
1971	#ifdef NO_SUPCALLR0VMM
1972	rc = VERR_GENERAL_FAILURE;
1973	#else
1974	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1975	#endif
1976	/*
1977	* Flush the logs.
1978	*/
1979	#ifdef LOG_ENABLED
1980	if ( pVCpu->vmm.s.pR0LoggerR3
1981	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1982	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
1983	#endif
1984	if (rc != VINF_VMM_CALL_HOST)
1985	break;
1986	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1987	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1988	break;
1989	/* Resume R0 */
1990	}
1991
1992	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
1993	("uOperation=%u rc=%Rrc\n", uOperation, rc),
1994	VERR_INTERNAL_ERROR);
1995	return rc;
1996	}
1997
1998
1999	/**
2000	* Resumes executing hypervisor code when interrupted by a queue flush or a
2001	* debug event.
2002	*
2003	* @returns VBox status code.
2004	* @param pVM VM handle.
2005	* @param pVCpu VMCPU handle.
2006	*/
2007	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2008	{
2009	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2010	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2011
2012	/*
2013	* We hide log flushes (outer) and hypervisor interrupts (inner).
2014	*/
2015	for (;;)
2016	{
2017	int rc;
2018	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2019	do
2020	{
2021	#ifdef NO_SUPCALLR0VMM
2022	rc = VERR_GENERAL_FAILURE;
2023	#else
2024	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2025	if (RT_LIKELY(rc == VINF_SUCCESS))
2026	rc = pVCpu->vmm.s.iLastGZRc;
2027	#endif
2028	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2029
2030	/*
2031	* Flush the loggers,
2032	*/
2033	#ifdef LOG_ENABLED
2034	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2035	if ( pLogger
2036	&& pLogger->offScratch > 0)
2037	RTLogFlushRC(NULL, pLogger);
2038	#endif
2039	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2040	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2041	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2042	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2043	#endif
2044	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2045	VMMR3FatalDump(pVM, pVCpu, rc);
2046	if (rc != VINF_VMM_CALL_HOST)
2047	{
2048	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2049	return rc;
2050	}
2051	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2052	if (RT_FAILURE(rc))
2053	return rc;
2054	}
2055	}
2056
2057
2058	/**
2059	* Service a call to the ring-3 host code.
2060	*
2061	* @returns VBox status code.
2062	* @param pVM VM handle.
2063	* @param pVCpu VMCPU handle
2064	* @remark Careful with critsects.
2065	*/
2066	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2067	{
2068	/*
2069	* We must also check for pending critsect exits or else we can deadlock
2070	* when entering other critsects here.
2071	*/
2072	if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2073	PDMCritSectFF(pVCpu);
2074
2075	switch (pVCpu->vmm.s.enmCallRing3Operation)
2076	{
2077	/*
2078	* Acquire the PDM lock.
2079	*/
2080	case VMMCALLRING3_PDM_LOCK:
2081	{
2082	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2083	break;
2084	}
2085
2086	/*
2087	* Grow the PGM pool.
2088	*/
2089	case VMMCALLRING3_PGM_POOL_GROW:
2090	{
2091	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2092	break;
2093	}
2094
2095	/*
2096	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2097	*/
2098	case VMMCALLRING3_PGM_MAP_CHUNK:
2099	{
2100	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2101	break;
2102	}
2103
2104	/*
2105	* Allocates more handy pages.
2106	*/
2107	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2108	{
2109	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2110	break;
2111	}
2112
2113	/*
2114	* Allocates a large page.
2115	*/
2116	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2117	{
2118	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2119	break;
2120	}
2121
2122	/*
2123	* Acquire the PGM lock.
2124	*/
2125	case VMMCALLRING3_PGM_LOCK:
2126	{
2127	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2128	break;
2129	}
2130
2131	/*
2132	* Acquire the MM hypervisor heap lock.
2133	*/
2134	case VMMCALLRING3_MMHYPER_LOCK:
2135	{
2136	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2137	break;
2138	}
2139
2140	/*
2141	* Flush REM handler notifications.
2142	*/
2143	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2144	{
2145	REMR3ReplayHandlerNotifications(pVM);
2146	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2147	break;
2148	}
2149
2150	/*
2151	* This is a noop. We just take this route to avoid unnecessary
2152	* tests in the loops.
2153	*/
2154	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2155	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2156	LogAlways(("FLUSH\n"));
2157	break;
2158
2159	/*
2160	* Set the VM error message.
2161	*/
2162	case VMMCALLRING3_VM_SET_ERROR:
2163	VMR3SetErrorWorker(pVM);
2164	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2165	break;
2166
2167	/*
2168	* Set the VM runtime error message.
2169	*/
2170	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2171	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2172	break;
2173
2174	/*
2175	* Signal a ring 0 hypervisor assertion.
2176	* Cancel the longjmp operation that's in progress.
2177	*/
2178	case VMMCALLRING3_VM_R0_ASSERTION:
2179	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2180	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2181	#ifdef RT_ARCH_X86
2182	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2183	#else
2184	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2185	#endif
2186	#ifdef VMM_R0_SWITCH_STACK
2187	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2188	#endif
2189	LogRel((pVM->vmm.s.szRing0AssertMsg1));
2190	LogRel((pVM->vmm.s.szRing0AssertMsg2));
2191	return VERR_VMM_RING0_ASSERTION;
2192
2193	/*
2194	* A forced switch to ring 0 for preemption purposes.
2195	*/
2196	case VMMCALLRING3_VM_R0_PREEMPT:
2197	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2198	break;
2199
2200	case VMMCALLRING3_FTM_SET_CHECKPOINT:
2201	pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2202	break;
2203
2204	default:
2205	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2206	return VERR_INTERNAL_ERROR;
2207	}
2208
2209	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2210	return VINF_SUCCESS;
2211	}
2212
2213
2214	/**
2215	* Displays the Force action Flags.
2216	*
2217	* @param pVM The VM handle.
2218	* @param pHlp The output helpers.
2219	* @param pszArgs The additional arguments (ignored).
2220	*/
2221	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2222	{
2223	int c;
2224	uint32_t f;
2225	#define PRINT_FLAG(prf,flag) do { \
2226	if (f & (prf##flag)) \
2227	{ \
2228	static const char *s_psz = #flag; \
2229	if (!(c % 6)) \
2230	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2231	else \
2232	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2233	c++; \
2234	f &= ~(prf##flag); \
2235	} \
2236	} while (0)
2237
2238	#define PRINT_GROUP(prf,grp,sfx) do { \
2239	if (f & (prf##grp##sfx)) \
2240	{ \
2241	static const char *s_psz = #grp; \
2242	if (!(c % 5)) \
2243	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2244	else \
2245	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2246	c++; \
2247	} \
2248	} while (0)
2249
2250	/*
2251	* The global flags.
2252	*/
2253	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2254	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2255
2256	/* show the flag mnemonics */
2257	c = 0;
2258	f = fGlobalForcedActions;
2259	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2260	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2261	PRINT_FLAG(VM_FF_,PDM_DMA);
2262	PRINT_FLAG(VM_FF_,DBGF);
2263	PRINT_FLAG(VM_FF_,REQUEST);
2264	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2265	PRINT_FLAG(VM_FF_,RESET);
2266	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2267	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2268	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2269	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2270	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2271	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2272	if (f)
2273	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2274	else
2275	pHlp->pfnPrintf(pHlp, "\n");
2276
2277	/* the groups */
2278	c = 0;
2279	f = fGlobalForcedActions;
2280	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2281	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2282	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2283	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2284	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2285	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2286	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2287	PRINT_GROUP(VM_FF_,ALL_BUT_RAW,_MASK);
2288	if (c)
2289	pHlp->pfnPrintf(pHlp, "\n");
2290
2291	/*
2292	* Per CPU flags.
2293	*/
2294	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2295	{
2296	const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2297	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2298
2299	/* show the flag mnemonics */
2300	c = 0;
2301	f = fLocalForcedActions;
2302	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2303	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2304	PRINT_FLAG(VMCPU_FF_,TIMER);
2305	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2306	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2307	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2308	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2309	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2310	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2311	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2312	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2313	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2314	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2315	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2316	PRINT_FLAG(VMCPU_FF_,TO_R3);
2317	if (f)
2318	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2319	else
2320	pHlp->pfnPrintf(pHlp, "\n");
2321
2322	/* the groups */
2323	c = 0;
2324	f = fLocalForcedActions;
2325	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2326	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2327	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2328	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2329	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2330	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2331	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2332	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2333	PRINT_GROUP(VMCPU_FF_,HWACCM_TO_R3,_MASK);
2334	PRINT_GROUP(VMCPU_FF_,ALL_BUT_RAW,_MASK);
2335	if (c)
2336	pHlp->pfnPrintf(pHlp, "\n");
2337	}
2338
2339	#undef PRINT_FLAG
2340	#undef PRINT_GROUP
2341	}
2342

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source: vbox/trunk/src/VBox/VMM/VMM.cpp@ 34320

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