GIMAllHv.cpp@ 57952

Last change on this file since 57952 was 57851, checked in by vboxsync, 9 years ago
VMM: unused parameter warning fixes.
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1	/* $Id: GIMAllHv.cpp 57851 2015-09-22 13:10:34Z vboxsync $ */
2	/** @file
3	* GIM - Guest Interface Manager, Microsoft Hyper-V, All Contexts.
4	*/
5
6	/*
7	* Copyright (C) 2014-2015 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_GIM
23	#include "GIMHvInternal.h"
24	#include "GIMInternal.h"
25
26	#include <VBox/err.h>
27	#include <VBox/vmm/hm.h>
28	#include <VBox/vmm/tm.h>
29	#include <VBox/vmm/vm.h>
30	#include <VBox/vmm/pgm.h>
31	#include <VBox/vmm/pdmdev.h>
32	#include <VBox/vmm/pdmapi.h>
33
34	#include <iprt/asm-amd64-x86.h>
35
36
37	/**
38	* Handles the Hyper-V hypercall.
39	*
40	* @returns VBox status code.
41	* @param pVCpu Pointer to the VMCPU.
42	* @param pCtx Pointer to the guest-CPU context.
43	*/
44	VMM_INT_DECL(int) gimHvHypercall(PVMCPU pVCpu, PCPUMCTX pCtx)
45	{
46	NOREF(pCtx);
47	PVM pVM = pVCpu->CTX_SUFF(pVM);
48	if (!MSR_GIM_HV_HYPERCALL_IS_ENABLED(pVM->gim.s.u.Hv.u64HypercallMsr))
49	return VERR_GIM_HYPERCALLS_NOT_ENABLED;
50
51	/** @todo Handle hypercalls. Fail for now */
52	return VERR_GIM_IPE_3;
53	}
54
55
56	/**
57	* Returns whether the guest has configured and enabled the use of Hyper-V's
58	* hypercall interface.
59	*
60	* @returns true if hypercalls are enabled, false otherwise.
61	* @param pVCpu Pointer to the VMCPU.
62	*/
63	VMM_INT_DECL(bool) gimHvAreHypercallsEnabled(PVMCPU pVCpu)
64	{
65	return MSR_GIM_HV_HYPERCALL_IS_ENABLED(pVCpu->CTX_SUFF(pVM)->gim.s.u.Hv.u64HypercallMsr);
66	}
67
68
69	/**
70	* Returns whether the guest has configured and enabled the use of Hyper-V's
71	* paravirtualized TSC.
72	*
73	* @returns true if paravirt. TSC is enabled, false otherwise.
74	* @param pVM Pointer to the VM.
75	*/
76	VMM_INT_DECL(bool) gimHvIsParavirtTscEnabled(PVM pVM)
77	{
78	return MSR_GIM_HV_REF_TSC_IS_ENABLED(pVM->gim.s.u.Hv.u64TscPageMsr);
79	}
80
81
82	#ifdef IN_RING3
83	/**
84	* Gets the descriptive OS ID variant as identified via the
85	* MSR_GIM_HV_GUEST_OS_ID MSR.
86	*
87	* @returns The name.
88	* @param uGuestOsIdMsr The MSR_GIM_HV_GUEST_OS_ID MSR.
89	*/
90	static const char *gimHvGetGuestOsIdVariantName(uint64_t uGuestOsIdMsr)
91	{
92	/* Refer the Hyper-V spec, section 3.6 "Reporting the Guest OS Identity". */
93	uint32_t uVendor = MSR_GIM_HV_GUEST_OS_ID_VENDOR(uGuestOsIdMsr);
94	if (uVendor == 1 /* Microsoft */)
95	{
96	uint32_t uOsVariant = MSR_GIM_HV_GUEST_OS_ID_OS_VARIANT(uGuestOsIdMsr);
97	switch (uOsVariant)
98	{
99	case 0: return "Undefined";
100	case 1: return "MS-DOS";
101	case 2: return "Windows 3.x";
102	case 3: return "Windows 9x";
103	case 4: return "Windows NT or derivative";
104	case 5: return "Windows CE";
105	default: return "Unknown";
106	}
107	}
108	return "Unknown";
109	}
110	#endif
111
112
113	/**
114	* MSR read handler for Hyper-V.
115	*
116	* @returns Strict VBox status code like CPUMQueryGuestMsr().
117	* @retval VINF_CPUM_R3_MSR_READ
118	* @retval VERR_CPUM_RAISE_GP_0
119	*
120	* @param pVCpu Pointer to the VMCPU.
121	* @param idMsr The MSR being read.
122	* @param pRange The range this MSR belongs to.
123	* @param puValue Where to store the MSR value read.
124	*/
125	VMM_INT_DECL(VBOXSTRICTRC) gimHvReadMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
126	{
127	NOREF(pRange);
128	PVM pVM = pVCpu->CTX_SUFF(pVM);
129	PGIMHV pHv = &pVM->gim.s.u.Hv;
130
131	switch (idMsr)
132	{
133	case MSR_GIM_HV_TIME_REF_COUNT:
134	{
135	/* Hyper-V reports the time in 100 ns units (10 MHz). */
136	uint64_t u64Tsc = TMCpuTickGet(pVCpu);
137	uint64_t u64TscHz = pHv->cTscTicksPerSecond;
138	uint64_t u64Tsc100Ns = u64TscHz / UINT64_C(10000000); /* 100 ns */
139	*puValue = (u64Tsc / u64Tsc100Ns);
140	return VINF_SUCCESS;
141	}
142
143	case MSR_GIM_HV_VP_INDEX:
144	*puValue = pVCpu->idCpu;
145	return VINF_SUCCESS;
146
147	case MSR_GIM_HV_TPR:
148	PDMApicReadMSR(pVM, pVCpu->idCpu, 0x80, puValue);
149	return VINF_SUCCESS;
150
151	case MSR_GIM_HV_EOI:
152	PDMApicReadMSR(pVM, pVCpu->idCpu, 0x0B, puValue);
153	return VINF_SUCCESS;
154
155	case MSR_GIM_HV_ICR:
156	PDMApicReadMSR(pVM, pVCpu->idCpu, 0x30, puValue);
157	return VINF_SUCCESS;
158
159	case MSR_GIM_HV_GUEST_OS_ID:
160	*puValue = pHv->u64GuestOsIdMsr;
161	return VINF_SUCCESS;
162
163	case MSR_GIM_HV_HYPERCALL:
164	*puValue = pHv->u64HypercallMsr;
165	return VINF_SUCCESS;
166
167	case MSR_GIM_HV_REF_TSC:
168	*puValue = pHv->u64TscPageMsr;
169	return VINF_SUCCESS;
170
171	case MSR_GIM_HV_TSC_FREQ:
172	*puValue = TMCpuTicksPerSecond(pVM);
173	return VINF_SUCCESS;
174
175	case MSR_GIM_HV_APIC_FREQ:
176	{
177	int rc = PDMApicGetTimerFreq(pVM, puValue);
178	if (RT_FAILURE(rc))
179	return VERR_CPUM_RAISE_GP_0;
180	return VINF_SUCCESS;
181	}
182
183	case MSR_GIM_HV_RESET:
184	*puValue = 0;
185	return VINF_SUCCESS;
186
187	case MSR_GIM_HV_CRASH_CTL:
188	*puValue = pHv->uCrashCtl;
189	return VINF_SUCCESS;
190
191	case MSR_GIM_HV_CRASH_P0: *puValue = pHv->uCrashP0; return VINF_SUCCESS;
192	case MSR_GIM_HV_CRASH_P1: *puValue = pHv->uCrashP1; return VINF_SUCCESS;
193	case MSR_GIM_HV_CRASH_P2: *puValue = pHv->uCrashP2; return VINF_SUCCESS;
194	case MSR_GIM_HV_CRASH_P3: *puValue = pHv->uCrashP3; return VINF_SUCCESS;
195	case MSR_GIM_HV_CRASH_P4: *puValue = pHv->uCrashP4; return VINF_SUCCESS;
196
197	default:
198	{
199	#ifdef IN_RING3
200	static uint32_t s_cTimes = 0;
201	if (s_cTimes++ < 20)
202	LogRel(("GIM: HyperV: Unknown/invalid RdMsr (%#x) -> #GP(0)\n", idMsr));
203	#endif
204	LogFunc(("Unknown/invalid RdMsr (%#RX32) -> #GP(0)\n", idMsr));
205	break;
206	}
207	}
208
209	return VERR_CPUM_RAISE_GP_0;
210	}
211
212
213	/**
214	* MSR write handler for Hyper-V.
215	*
216	* @returns Strict VBox status code like CPUMSetGuestMsr().
217	* @retval VINF_CPUM_R3_MSR_WRITE
218	* @retval VERR_CPUM_RAISE_GP_0
219	*
220	* @param pVCpu Pointer to the VMCPU.
221	* @param idMsr The MSR being written.
222	* @param pRange The range this MSR belongs to.
223	* @param uRawValue The raw value with the ignored bits not masked.
224	*/
225	VMM_INT_DECL(VBOXSTRICTRC) gimHvWriteMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uRawValue)
226	{
227	NOREF(pRange);
228	PVM pVM = pVCpu->CTX_SUFF(pVM);
229	PGIMHV pHv = &pVM->gim.s.u.Hv;
230
231	switch (idMsr)
232	{
233	case MSR_GIM_HV_TPR:
234	PDMApicWriteMSR(pVM, pVCpu->idCpu, 0x80, uRawValue);
235	return VINF_SUCCESS;
236
237	case MSR_GIM_HV_EOI:
238	PDMApicWriteMSR(pVM, pVCpu->idCpu, 0x0B, uRawValue);
239	return VINF_SUCCESS;
240
241	case MSR_GIM_HV_ICR:
242	PDMApicWriteMSR(pVM, pVCpu->idCpu, 0x30, uRawValue);
243	return VINF_SUCCESS;
244
245	case MSR_GIM_HV_GUEST_OS_ID:
246	{
247	#ifndef IN_RING3
248	return VINF_CPUM_R3_MSR_WRITE;
249	#else
250	/* Disable the hypercall-page if 0 is written to this MSR. */
251	if (!uRawValue)
252	{
253	gimR3HvDisableHypercallPage(pVM);
254	pHv->u64HypercallMsr &= ~MSR_GIM_HV_HYPERCALL_ENABLE_BIT;
255	}
256	else
257	{
258	LogRel(("GIM: HyperV: Guest OS reported ID %#RX64\n", uRawValue));
259	LogRel(("GIM: HyperV: Open-source=%RTbool Vendor=%#x OS=%#x (%s) Major=%u Minor=%u ServicePack=%u Build=%u\n",
260	MSR_GIM_HV_GUEST_OS_ID_IS_OPENSOURCE(uRawValue), MSR_GIM_HV_GUEST_OS_ID_VENDOR(uRawValue),
261	MSR_GIM_HV_GUEST_OS_ID_OS_VARIANT(uRawValue), gimHvGetGuestOsIdVariantName(uRawValue),
262	MSR_GIM_HV_GUEST_OS_ID_MAJOR_VERSION(uRawValue), MSR_GIM_HV_GUEST_OS_ID_MINOR_VERSION(uRawValue),
263	MSR_GIM_HV_GUEST_OS_ID_SERVICE_VERSION(uRawValue), MSR_GIM_HV_GUEST_OS_ID_BUILD(uRawValue)));
264
265	/* Update the CPUID leaf, see Hyper-V spec. "Microsoft Hypervisor CPUID Leaves". */
266	CPUMCPUIDLEAF HyperLeaf;
267	RT_ZERO(HyperLeaf);
268	HyperLeaf.uLeaf = UINT32_C(0x40000002);
269	HyperLeaf.uEax = MSR_GIM_HV_GUEST_OS_ID_BUILD(uRawValue);
270	HyperLeaf.uEbx = MSR_GIM_HV_GUEST_OS_ID_MINOR_VERSION(uRawValue)
271	\| (MSR_GIM_HV_GUEST_OS_ID_MAJOR_VERSION(uRawValue) << 16);
272	HyperLeaf.uEcx = MSR_GIM_HV_GUEST_OS_ID_SERVICE_VERSION(uRawValue);
273	HyperLeaf.uEdx = MSR_GIM_HV_GUEST_OS_ID_SERVICE_VERSION(uRawValue)
274	\| (MSR_GIM_HV_GUEST_OS_ID_BUILD(uRawValue) << 24);
275	int rc2 = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
276	AssertRC(rc2);
277	}
278	pHv->u64GuestOsIdMsr = uRawValue;
279	return VINF_SUCCESS;
280	#endif /* IN_RING3 */
281	}
282
283	case MSR_GIM_HV_HYPERCALL:
284	{
285	#ifndef IN_RING3
286	return VINF_CPUM_R3_MSR_WRITE;
287	#else /* IN_RING3 */
288	/*
289	* For now ignore writes to the hypercall MSR (i.e. keeps it disabled).
290	* This is required to boot FreeBSD 10.1 (with Hyper-V enabled ofc),
291	* see @bugref{7270#c116}.
292	*/
293	return VINF_SUCCESS;
294	# if 0
295	/* First, update all but the hypercall enable bit. */
296	pHv->u64HypercallMsr = (uRawValue & ~MSR_GIM_HV_HYPERCALL_ENABLE_BIT);
297
298	/* Hypercalls can only be enabled when the guest has set the Guest-OS Id Msr. */
299	bool fEnable = RT_BOOL(uRawValue & MSR_GIM_HV_HYPERCALL_ENABLE_BIT);
300	if ( fEnable
301	&& !pHv->u64GuestOsIdMsr)
302	{
303	return VINF_SUCCESS;
304	}
305
306	/* Is the guest disabling the hypercall-page? Allow it regardless of the Guest-OS Id Msr. */
307	if (!fEnable)
308	{
309	gimR3HvDisableHypercallPage(pVM);
310	pHv->u64HypercallMsr = uRawValue;
311	return VINF_SUCCESS;
312	}
313
314	/* Enable the hypercall-page. */
315	RTGCPHYS GCPhysHypercallPage = MSR_GIM_HV_HYPERCALL_GUEST_PFN(uRawValue) << PAGE_SHIFT;
316	int rc = gimR3HvEnableHypercallPage(pVM, GCPhysHypercallPage);
317	if (RT_SUCCESS(rc))
318	{
319	pHv->u64HypercallMsr = uRawValue;
320	return VINF_SUCCESS;
321	}
322
323	return VERR_CPUM_RAISE_GP_0;
324	# endif
325	#endif /* IN_RING3 */
326	}
327
328	case MSR_GIM_HV_REF_TSC:
329	{
330	#ifndef IN_RING3
331	return VINF_CPUM_R3_MSR_WRITE;
332	#else /* IN_RING3 */
333	/* First, update all but the TSC-page enable bit. */
334	pHv->u64TscPageMsr = (uRawValue & ~MSR_GIM_HV_REF_TSC_ENABLE_BIT);
335
336	/* Is the guest disabling the TSC-page? */
337	bool fEnable = RT_BOOL(uRawValue & MSR_GIM_HV_REF_TSC_ENABLE_BIT);
338	if (!fEnable)
339	{
340	gimR3HvDisableTscPage(pVM);
341	pHv->u64TscPageMsr = uRawValue;
342	return VINF_SUCCESS;
343	}
344
345	/* Enable the TSC-page. */
346	RTGCPHYS GCPhysTscPage = MSR_GIM_HV_REF_TSC_GUEST_PFN(uRawValue) << PAGE_SHIFT;
347	int rc = gimR3HvEnableTscPage(pVM, GCPhysTscPage, false /* fUseThisTscSequence /, 0 / uTscSequence */);
348	if (RT_SUCCESS(rc))
349	{
350	pHv->u64TscPageMsr = uRawValue;
351	return VINF_SUCCESS;
352	}
353
354	return VERR_CPUM_RAISE_GP_0;
355	#endif /* IN_RING3 */
356	}
357
358	case MSR_GIM_HV_RESET:
359	{
360	#ifndef IN_RING3
361	return VINF_CPUM_R3_MSR_WRITE;
362	#else
363	if (MSR_GIM_HV_RESET_IS_SET(uRawValue))
364	{
365	LogRel(("GIM: HyperV: Reset initiated through MSR\n"));
366	int rc = PDMDevHlpVMReset(pVM->gim.s.pDevInsR3);
367	AssertRC(rc);
368	}
369	/* else: Ignore writes to other bits. */
370	return VINF_SUCCESS;
371	#endif /* IN_RING3 */
372	}
373
374	case MSR_GIM_HV_CRASH_CTL:
375	{
376	#ifndef IN_RING3
377	return VINF_CPUM_R3_MSR_WRITE;
378	#else
379	if (uRawValue & MSR_GIM_HV_CRASH_CTL_NOTIFY_BIT)
380	{
381	LogRel(("GIM: HyperV: Guest indicates a fatal condition! P0=%#RX64 P1=%#RX64 P2=%#RX64 P3=%#RX64 P4=%#RX64\n",
382	pHv->uCrashP0, pHv->uCrashP1, pHv->uCrashP2, pHv->uCrashP3, pHv->uCrashP4));
383	}
384	return VINF_SUCCESS;
385	#endif
386	}
387
388	case MSR_GIM_HV_CRASH_P0: pHv->uCrashP0 = uRawValue; return VINF_SUCCESS;
389	case MSR_GIM_HV_CRASH_P1: pHv->uCrashP1 = uRawValue; return VINF_SUCCESS;
390	case MSR_GIM_HV_CRASH_P2: pHv->uCrashP2 = uRawValue; return VINF_SUCCESS;
391	case MSR_GIM_HV_CRASH_P3: pHv->uCrashP3 = uRawValue; return VINF_SUCCESS;
392	case MSR_GIM_HV_CRASH_P4: pHv->uCrashP4 = uRawValue; return VINF_SUCCESS;
393
394	case MSR_GIM_HV_TIME_REF_COUNT: /* Read-only MSRs. */
395	case MSR_GIM_HV_VP_INDEX:
396	case MSR_GIM_HV_TSC_FREQ:
397	case MSR_GIM_HV_APIC_FREQ:
398	LogFunc(("WrMsr on read-only MSR %#RX32 -> #GP(0)\n", idMsr));
399	return VERR_CPUM_RAISE_GP_0;
400
401	default:
402	{
403	#ifdef IN_RING3
404	static uint32_t s_cTimes = 0;
405	if (s_cTimes++ < 20)
406	LogRel(("GIM: HyperV: Unknown/invalid WrMsr (%#x,%#x`%08x) -> #GP(0)\n", idMsr,
407	uRawValue & UINT64_C(0xffffffff00000000), uRawValue & UINT64_C(0xffffffff)));
408	#endif
409	LogFunc(("Unknown/invalid WrMsr (%#RX32,%#RX64) -> #GP(0)\n", idMsr, uRawValue));
410	break;
411	}
412	}
413
414	return VERR_CPUM_RAISE_GP_0;
415	}
416

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source: vbox/trunk/src/VBox/VMM/VMMAll/GIMAllHv.cpp@ 57952

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