VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/GIMAllHv.cpp@ 53404

Last change on this file since 53404 was 52671, checked in by vboxsync, 10 years ago

VMM/GIM: Use the PDM interface to query the APIC timer freq.
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File size: 9.7 KB
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1/* $Id: GIMAllHv.cpp 52671 2014-09-10 11:04:48Z vboxsync $ */
2/** @file
3 * GIM - Guest Interface Manager, Microsoft Hyper-V, All Contexts.
4 */
5
6/*
7 * Copyright (C) 2014 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/*******************************************************************************
19* Header Files *
20*******************************************************************************/
21#define LOG_GROUP LOG_GROUP_GIM
22#include "GIMHvInternal.h"
23#include "GIMInternal.h"
24
25#include <VBox/err.h>
26#include <VBox/vmm/hm.h>
27#include <VBox/vmm/tm.h>
28#include <VBox/vmm/vm.h>
29#include <VBox/vmm/pgm.h>
30#include <VBox/vmm/pdmdev.h>
31#include <VBox/vmm/pdmapi.h>
32
33#include <iprt/asm-amd64-x86.h>
34#include <iprt/spinlock.h>
35
36
37/**
38 * Handles the Hyper-V hypercall.
39 *
40 * @returns VBox status code.
41 * @param pVCpu Pointer to the VMCPU.
42 * @param pCtx Pointer to the guest-CPU context.
43 */
44VMM_INT_DECL(int) GIMHvHypercall(PVMCPU pVCpu, PCPUMCTX pCtx)
45{
46 PVM pVM = pVCpu->CTX_SUFF(pVM);
47 if (!MSR_GIM_HV_HYPERCALL_IS_ENABLED(pVM->gim.s.u.Hv.u64HypercallMsr))
48 return VERR_GIM_HYPERCALLS_NOT_ENABLED;
49
50 /** @todo Handle hypercalls. Fail for now */
51 return VERR_GIM_IPE_3;
52}
53
54
55/**
56 * Returns whether the guest has configured and enabled the use of Hyper-V's
57 * hypercall interface.
58 *
59 * @returns true if hypercalls are enabled, false otherwise.
60 * @param pVCpu Pointer to the VMCPU.
61 */
62VMM_INT_DECL(bool) GIMHvAreHypercallsEnabled(PVMCPU pVCpu)
63{
64 return MSR_GIM_HV_HYPERCALL_IS_ENABLED(pVCpu->CTX_SUFF(pVM)->gim.s.u.Hv.u64HypercallMsr);
65}
66
67
68/**
69 * Returns whether the guest has configured and enabled the use of Hyper-V's
70 * paravirtualized TSC.
71 *
72 * @returns true if paravirt. TSC is enabled, false otherwise.
73 * @param pVM Pointer to the VM.
74 */
75VMM_INT_DECL(bool) GIMHvIsParavirtTscEnabled(PVM pVM)
76{
77 return MSR_GIM_HV_REF_TSC_IS_ENABLED(pVM->gim.s.u.Hv.u64TscPageMsr);
78}
79
80
81/**
82 * MSR read handler for Hyper-V.
83 *
84 * @returns VBox status code.
85 * @param pVCpu Pointer to the VMCPU.
86 * @param idMsr The MSR being read.
87 * @param pRange The range this MSR belongs to.
88 * @param puValue Where to store the MSR value read.
89 */
90VMM_INT_DECL(int) GIMHvReadMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
91{
92 NOREF(pRange);
93 PVM pVM = pVCpu->CTX_SUFF(pVM);
94 PGIMHV pHv = &pVM->gim.s.u.Hv;
95
96 switch (idMsr)
97 {
98 case MSR_GIM_HV_TIME_REF_COUNT:
99 {
100 /* Hyper-V reports the time in 100 ns units (10 MHz). */
101 uint64_t u64Tsc = TMCpuTickGet(pVCpu);
102 uint64_t u64TscHz = TMCpuTicksPerSecond(pVM);
103 uint64_t u64Tsc100Ns = u64TscHz / UINT64_C(10000000); /* 100 ns */
104 *puValue = (u64Tsc / u64Tsc100Ns);
105 return VINF_SUCCESS;
106 }
107
108 case MSR_GIM_HV_VP_INDEX:
109 *puValue = pVCpu->idCpu;
110 return VINF_SUCCESS;
111
112 case MSR_GIM_HV_TPR:
113 PDMApicReadMSR(pVM, pVCpu->idCpu, 0x80, puValue);
114 return VINF_SUCCESS;
115
116 case MSR_GIM_HV_EOI:
117 PDMApicReadMSR(pVM, pVCpu->idCpu, 0x0B, puValue);
118 return VINF_SUCCESS;
119
120 case MSR_GIM_HV_ICR:
121 PDMApicReadMSR(pVM, pVCpu->idCpu, 0x30, puValue);
122 return VINF_SUCCESS;
123
124 case MSR_GIM_HV_GUEST_OS_ID:
125 *puValue = pHv->u64GuestOsIdMsr;
126 return VINF_SUCCESS;
127
128 case MSR_GIM_HV_HYPERCALL:
129 *puValue = pHv->u64HypercallMsr;
130 return VINF_SUCCESS;
131
132 case MSR_GIM_HV_REF_TSC:
133 *puValue = pHv->u64TscPageMsr;
134 return VINF_SUCCESS;
135
136 case MSR_GIM_HV_TSC_FREQ:
137 *puValue = TMCpuTicksPerSecond(pVM);
138 return VINF_SUCCESS;
139
140 case MSR_GIM_HV_APIC_FREQ:
141 {
142 int rc = PDMApicGetTimerFreq(pVM, puValue);
143 if (RT_FAILURE(rc))
144 return VERR_CPUM_RAISE_GP_0;
145 return VINF_SUCCESS;
146 }
147
148 case MSR_GIM_HV_RESET:
149 *puValue = 0;
150 return VINF_SUCCESS;
151
152 default:
153#ifdef IN_RING3
154 static uint32_t s_cTimes = 0;
155 if (s_cTimes++ < 20)
156 LogRel(("GIM: HyperV: Unknown/invalid RdMsr (%#x) -> #GP(0)\n", idMsr));
157#endif
158 LogFunc(("Unknown/invalid RdMsr (%#RX32) -> #GP(0)\n", idMsr));
159 break;
160 }
161
162 return VERR_CPUM_RAISE_GP_0;
163}
164
165
166/**
167 * MSR write handler for Hyper-V.
168 *
169 * @returns VBox status code.
170 * @param pVCpu Pointer to the VMCPU.
171 * @param idMsr The MSR being written.
172 * @param pRange The range this MSR belongs to.
173 * @param uRawValue The raw value with the ignored bits not masked.
174 */
175VMM_INT_DECL(int) GIMHvWriteMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uRawValue)
176{
177 NOREF(pRange);
178 PVM pVM = pVCpu->CTX_SUFF(pVM);
179 PGIMHV pHv = &pVM->gim.s.u.Hv;
180
181 switch (idMsr)
182 {
183 case MSR_GIM_HV_TPR:
184 PDMApicWriteMSR(pVM, pVCpu->idCpu, 0x80, uRawValue);
185 return VINF_SUCCESS;
186
187 case MSR_GIM_HV_EOI:
188 PDMApicWriteMSR(pVM, pVCpu->idCpu, 0x0B, uRawValue);
189 return VINF_SUCCESS;
190
191 case MSR_GIM_HV_ICR:
192 PDMApicWriteMSR(pVM, pVCpu->idCpu, 0x30, uRawValue);
193 return VINF_SUCCESS;
194
195 case MSR_GIM_HV_GUEST_OS_ID:
196 {
197#ifndef IN_RING3
198 return VERR_EM_INTERPRETER;
199#else
200 /* Disable the hypercall-page if 0 is written to this MSR. */
201 if (!uRawValue)
202 {
203 GIMR3HvDisableHypercallPage(pVM);
204 pHv->u64HypercallMsr &= ~MSR_GIM_HV_HYPERCALL_ENABLE_BIT;
205 }
206 pHv->u64GuestOsIdMsr = uRawValue;
207 return VINF_SUCCESS;
208#endif /* !IN_RING3 */
209 }
210
211 case MSR_GIM_HV_HYPERCALL:
212 {
213#ifndef IN_RING3
214 return VERR_EM_INTERPRETER;
215#else /* IN_RING3 */
216 /* First, update all but the hypercall enable bit. */
217 pHv->u64HypercallMsr = (uRawValue & ~MSR_GIM_HV_HYPERCALL_ENABLE_BIT);
218
219 /* Hypercalls can only be enabled when the guest has set the Guest-OS Id Msr. */
220 bool fEnable = RT_BOOL(uRawValue & MSR_GIM_HV_HYPERCALL_ENABLE_BIT);
221 if ( fEnable
222 && !pHv->u64GuestOsIdMsr)
223 {
224 return VINF_SUCCESS;
225 }
226
227 /* Is the guest disabling the hypercall-page? Allow it regardless of the Guest-OS Id Msr. */
228 if (!fEnable)
229 {
230 GIMR3HvDisableHypercallPage(pVM);
231 pHv->u64HypercallMsr = uRawValue;
232 return VINF_SUCCESS;
233 }
234
235 /* Enable the hypercall-page. */
236 RTGCPHYS GCPhysHypercallPage = MSR_GIM_HV_HYPERCALL_GUEST_PFN(uRawValue) << PAGE_SHIFT;
237 int rc = GIMR3HvEnableHypercallPage(pVM, GCPhysHypercallPage);
238 if (RT_SUCCESS(rc))
239 {
240 pHv->u64HypercallMsr = uRawValue;
241 return VINF_SUCCESS;
242 }
243
244 return VERR_CPUM_RAISE_GP_0;
245#endif /* !IN_RING3 */
246 }
247
248 case MSR_GIM_HV_REF_TSC:
249 {
250#ifndef IN_RING3
251 return VERR_EM_INTERPRETER;
252#else /* IN_RING3 */
253 /* First, update all but the TSC-page enable bit. */
254 pHv->u64TscPageMsr = (uRawValue & ~MSR_GIM_HV_REF_TSC_ENABLE_BIT);
255
256 /* Is the guest disabling the TSC-page? */
257 bool fEnable = RT_BOOL(uRawValue & MSR_GIM_HV_REF_TSC_ENABLE_BIT);
258 if (!fEnable)
259 {
260 GIMR3HvDisableTscPage(pVM);
261 pHv->u64TscPageMsr = uRawValue;
262 return VINF_SUCCESS;
263 }
264
265 /* Enable the TSC-page. */
266 RTGCPHYS GCPhysTscPage = MSR_GIM_HV_REF_TSC_GUEST_PFN(uRawValue) << PAGE_SHIFT;
267 int rc = GIMR3HvEnableTscPage(pVM, GCPhysTscPage, false /* fUseThisTscSequence */, 0 /* uTscSequence */);
268 if (RT_SUCCESS(rc))
269 {
270 pHv->u64TscPageMsr = uRawValue;
271 return VINF_SUCCESS;
272 }
273
274 return VERR_CPUM_RAISE_GP_0;
275#endif /* !IN_RING3 */
276 }
277
278 case MSR_GIM_HV_RESET:
279 {
280#ifndef IN_RING3
281 return VERR_EM_INTERPRETER;
282#else
283 if (MSR_GIM_HV_RESET_IS_SET(uRawValue))
284 {
285 LogRel(("GIM: HyperV: Reset initiated through MSR.\n"));
286 int rc = PDMDevHlpVMReset(pVM->gim.s.pDevInsR3);
287 AssertRC(rc);
288 }
289 /* else: Ignore writes to other bits. */
290 return VINF_SUCCESS;
291#endif /* !IN_RING3 */
292 }
293
294 case MSR_GIM_HV_TIME_REF_COUNT: /* Read-only MSRs. */
295 case MSR_GIM_HV_VP_INDEX:
296 case MSR_GIM_HV_TSC_FREQ:
297 case MSR_GIM_HV_APIC_FREQ:
298 LogFunc(("WrMsr on read-only MSR %#RX32 -> #GP(0)\n", idMsr));
299 return VERR_CPUM_RAISE_GP_0;
300
301 default:
302#ifdef IN_RING3
303 static uint32_t s_cTimes = 0;
304 if (s_cTimes++ < 20)
305 LogRel(("GIM: HyperV: Unknown/invalid WrMsr (%#x,%#x`%08x) -> #GP(0)\n", idMsr, uRawValue & UINT64_C(0xffffffff00000000),
306 uRawValue & UINT64_C(0xffffffff)));
307#endif
308 LogFunc(("Unknown/invalid WrMsr (%#RX32,%#RX64) -> #GP(0)\n", idMsr, uRawValue));
309 break;
310 }
311
312 return VERR_CPUM_RAISE_GP_0;
313}
314
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