GIMAllHv.cpp@ 57529

Last change on this file since 57529 was 57513, checked in by vboxsync, 9 years ago
GIM/HyperV: Update 0x40000002 cpuid as per the Hyper-V spec. when guest writes to it.
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1	/* $Id: GIMAllHv.cpp 57513 2015-08-24 15:38:11Z vboxsync $ */
2	/** @file
3	* GIM - Guest Interface Manager, Microsoft Hyper-V, All Contexts.
4	*/
5
6	/*
7	* Copyright (C) 2014-2015 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_GIM
23	#include "GIMHvInternal.h"
24	#include "GIMInternal.h"
25
26	#include <VBox/err.h>
27	#include <VBox/vmm/hm.h>
28	#include <VBox/vmm/tm.h>
29	#include <VBox/vmm/vm.h>
30	#include <VBox/vmm/pgm.h>
31	#include <VBox/vmm/pdmdev.h>
32	#include <VBox/vmm/pdmapi.h>
33
34	#include <iprt/asm-amd64-x86.h>
35
36
37	/**
38	* Handles the Hyper-V hypercall.
39	*
40	* @returns VBox status code.
41	* @param pVCpu Pointer to the VMCPU.
42	* @param pCtx Pointer to the guest-CPU context.
43	*/
44	VMM_INT_DECL(int) gimHvHypercall(PVMCPU pVCpu, PCPUMCTX pCtx)
45	{
46	PVM pVM = pVCpu->CTX_SUFF(pVM);
47	if (!MSR_GIM_HV_HYPERCALL_IS_ENABLED(pVM->gim.s.u.Hv.u64HypercallMsr))
48	return VERR_GIM_HYPERCALLS_NOT_ENABLED;
49
50	/** @todo Handle hypercalls. Fail for now */
51	return VERR_GIM_IPE_3;
52	}
53
54
55	/**
56	* Returns whether the guest has configured and enabled the use of Hyper-V's
57	* hypercall interface.
58	*
59	* @returns true if hypercalls are enabled, false otherwise.
60	* @param pVCpu Pointer to the VMCPU.
61	*/
62	VMM_INT_DECL(bool) gimHvAreHypercallsEnabled(PVMCPU pVCpu)
63	{
64	return MSR_GIM_HV_HYPERCALL_IS_ENABLED(pVCpu->CTX_SUFF(pVM)->gim.s.u.Hv.u64HypercallMsr);
65	}
66
67
68	/**
69	* Returns whether the guest has configured and enabled the use of Hyper-V's
70	* paravirtualized TSC.
71	*
72	* @returns true if paravirt. TSC is enabled, false otherwise.
73	* @param pVM Pointer to the VM.
74	*/
75	VMM_INT_DECL(bool) gimHvIsParavirtTscEnabled(PVM pVM)
76	{
77	return MSR_GIM_HV_REF_TSC_IS_ENABLED(pVM->gim.s.u.Hv.u64TscPageMsr);
78	}
79
80
81	/**
82	* Gets the descriptive OS ID variant as identified via the
83	* MSR_GIM_HV_GUEST_OS_ID MSR.
84	*
85	* @returns The name.
86	* @param uGuestOsIdMsr The MSR_GIM_HV_GUEST_OS_ID MSR.
87	*/
88	static const char *gimHvGetGuestOsIdVariantName(uint64_t uGuestOsIdMsr)
89	{
90	/* Refer the Hyper-V spec, section 3.6 "Reporting the Guest OS Identity". */
91	uint32_t uVendor = MSR_GIM_HV_GUEST_OS_ID_VENDOR(uGuestOsIdMsr);
92	if (uVendor == 1 /* Microsoft */)
93	{
94	uint32_t uOsVariant = MSR_GIM_HV_GUEST_OS_ID_OS_VARIANT(uGuestOsIdMsr);
95	switch (uOsVariant)
96	{
97	case 0: return "Undefined";
98	case 1: return "MS-DOS";
99	case 2: return "Windows 3.x";
100	case 3: return "Windows 9x";
101	case 4: return "Windows NT or derivative";
102	case 5: return "Windows CE";
103	default: return "Unknown";
104	}
105	}
106	return "Unknown";
107	}
108
109
110	/**
111	* MSR read handler for Hyper-V.
112	*
113	* @returns Strict VBox status code like CPUMQueryGuestMsr().
114	* @retval VINF_CPUM_R3_MSR_READ
115	* @retval VERR_CPUM_RAISE_GP_0
116	*
117	* @param pVCpu Pointer to the VMCPU.
118	* @param idMsr The MSR being read.
119	* @param pRange The range this MSR belongs to.
120	* @param puValue Where to store the MSR value read.
121	*/
122	VMM_INT_DECL(VBOXSTRICTRC) gimHvReadMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
123	{
124	NOREF(pRange);
125	PVM pVM = pVCpu->CTX_SUFF(pVM);
126	PGIMHV pHv = &pVM->gim.s.u.Hv;
127
128	switch (idMsr)
129	{
130	case MSR_GIM_HV_TIME_REF_COUNT:
131	{
132	/* Hyper-V reports the time in 100 ns units (10 MHz). */
133	uint64_t u64Tsc = TMCpuTickGet(pVCpu);
134	uint64_t u64TscHz = pHv->cTscTicksPerSecond;
135	uint64_t u64Tsc100Ns = u64TscHz / UINT64_C(10000000); /* 100 ns */
136	*puValue = (u64Tsc / u64Tsc100Ns);
137	return VINF_SUCCESS;
138	}
139
140	case MSR_GIM_HV_VP_INDEX:
141	*puValue = pVCpu->idCpu;
142	return VINF_SUCCESS;
143
144	case MSR_GIM_HV_TPR:
145	PDMApicReadMSR(pVM, pVCpu->idCpu, 0x80, puValue);
146	return VINF_SUCCESS;
147
148	case MSR_GIM_HV_EOI:
149	PDMApicReadMSR(pVM, pVCpu->idCpu, 0x0B, puValue);
150	return VINF_SUCCESS;
151
152	case MSR_GIM_HV_ICR:
153	PDMApicReadMSR(pVM, pVCpu->idCpu, 0x30, puValue);
154	return VINF_SUCCESS;
155
156	case MSR_GIM_HV_GUEST_OS_ID:
157	*puValue = pHv->u64GuestOsIdMsr;
158	return VINF_SUCCESS;
159
160	case MSR_GIM_HV_HYPERCALL:
161	*puValue = pHv->u64HypercallMsr;
162	return VINF_SUCCESS;
163
164	case MSR_GIM_HV_REF_TSC:
165	*puValue = pHv->u64TscPageMsr;
166	return VINF_SUCCESS;
167
168	case MSR_GIM_HV_TSC_FREQ:
169	*puValue = TMCpuTicksPerSecond(pVM);
170	return VINF_SUCCESS;
171
172	case MSR_GIM_HV_APIC_FREQ:
173	{
174	int rc = PDMApicGetTimerFreq(pVM, puValue);
175	if (RT_FAILURE(rc))
176	return VERR_CPUM_RAISE_GP_0;
177	return VINF_SUCCESS;
178	}
179
180	case MSR_GIM_HV_RESET:
181	*puValue = 0;
182	return VINF_SUCCESS;
183
184	case MSR_GIM_HV_CRASH_CTL:
185	*puValue = pHv->uCrashCtl;
186	return VINF_SUCCESS;
187
188	case MSR_GIM_HV_CRASH_P0: *puValue = pHv->uCrashP0; return VINF_SUCCESS;
189	case MSR_GIM_HV_CRASH_P1: *puValue = pHv->uCrashP1; return VINF_SUCCESS;
190	case MSR_GIM_HV_CRASH_P2: *puValue = pHv->uCrashP2; return VINF_SUCCESS;
191	case MSR_GIM_HV_CRASH_P3: *puValue = pHv->uCrashP3; return VINF_SUCCESS;
192	case MSR_GIM_HV_CRASH_P4: *puValue = pHv->uCrashP4; return VINF_SUCCESS;
193
194	default:
195	{
196	#ifdef IN_RING3
197	static uint32_t s_cTimes = 0;
198	if (s_cTimes++ < 20)
199	LogRel(("GIM: HyperV: Unknown/invalid RdMsr (%#x) -> #GP(0)\n", idMsr));
200	#endif
201	LogFunc(("Unknown/invalid RdMsr (%#RX32) -> #GP(0)\n", idMsr));
202	break;
203	}
204	}
205
206	return VERR_CPUM_RAISE_GP_0;
207	}
208
209
210	/**
211	* MSR write handler for Hyper-V.
212	*
213	* @returns Strict VBox status code like CPUMSetGuestMsr().
214	* @retval VINF_CPUM_R3_MSR_WRITE
215	* @retval VERR_CPUM_RAISE_GP_0
216	*
217	* @param pVCpu Pointer to the VMCPU.
218	* @param idMsr The MSR being written.
219	* @param pRange The range this MSR belongs to.
220	* @param uRawValue The raw value with the ignored bits not masked.
221	*/
222	VMM_INT_DECL(VBOXSTRICTRC) gimHvWriteMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uRawValue)
223	{
224	NOREF(pRange);
225	PVM pVM = pVCpu->CTX_SUFF(pVM);
226	PGIMHV pHv = &pVM->gim.s.u.Hv;
227
228	switch (idMsr)
229	{
230	case MSR_GIM_HV_TPR:
231	PDMApicWriteMSR(pVM, pVCpu->idCpu, 0x80, uRawValue);
232	return VINF_SUCCESS;
233
234	case MSR_GIM_HV_EOI:
235	PDMApicWriteMSR(pVM, pVCpu->idCpu, 0x0B, uRawValue);
236	return VINF_SUCCESS;
237
238	case MSR_GIM_HV_ICR:
239	PDMApicWriteMSR(pVM, pVCpu->idCpu, 0x30, uRawValue);
240	return VINF_SUCCESS;
241
242	case MSR_GIM_HV_GUEST_OS_ID:
243	{
244	#ifndef IN_RING3
245	return VINF_CPUM_R3_MSR_WRITE;
246	#else
247	/* Disable the hypercall-page if 0 is written to this MSR. */
248	if (!uRawValue)
249	{
250	gimR3HvDisableHypercallPage(pVM);
251	pHv->u64HypercallMsr &= ~MSR_GIM_HV_HYPERCALL_ENABLE_BIT;
252	}
253	else
254	{
255	LogRel(("GIM: HyperV: Guest OS reported ID %#RX64\n", uRawValue));
256	LogRel(("GIM: HyperV: Open-source=%RTbool Vendor=%#x OS=%#x (%s) Major=%u Minor=%u ServicePack=%u Build=%u\n",
257	MSR_GIM_HV_GUEST_OS_ID_IS_OPENSOURCE(uRawValue), MSR_GIM_HV_GUEST_OS_ID_VENDOR(uRawValue),
258	MSR_GIM_HV_GUEST_OS_ID_OS_VARIANT(uRawValue), gimHvGetGuestOsIdVariantName(uRawValue),
259	MSR_GIM_HV_GUEST_OS_ID_MAJOR_VERSION(uRawValue), MSR_GIM_HV_GUEST_OS_ID_MINOR_VERSION(uRawValue),
260	MSR_GIM_HV_GUEST_OS_ID_SERVICE_VERSION(uRawValue), MSR_GIM_HV_GUEST_OS_ID_BUILD(uRawValue)));
261
262	/* Update the CPUID leaf, see Hyper-V spec. "Microsoft Hypervisor CPUID Leaves". */
263	CPUMCPUIDLEAF HyperLeaf;
264	RT_ZERO(HyperLeaf);
265	HyperLeaf.uLeaf = UINT32_C(0x40000002);
266	HyperLeaf.uEax = MSR_GIM_HV_GUEST_OS_ID_BUILD(uRawValue);
267	HyperLeaf.uEbx = MSR_GIM_HV_GUEST_OS_ID_MINOR_VERSION(uRawValue)
268	\| (MSR_GIM_HV_GUEST_OS_ID_MAJOR_VERSION(uRawValue) << 16);
269	HyperLeaf.uEcx = MSR_GIM_HV_GUEST_OS_ID_SERVICE_VERSION(uRawValue);
270	HyperLeaf.uEdx = MSR_GIM_HV_GUEST_OS_ID_SERVICE_VERSION(uRawValue)
271	\| (MSR_GIM_HV_GUEST_OS_ID_BUILD(uRawValue) << 24);
272	int rc2 = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
273	AssertRC(rc2);
274	}
275	pHv->u64GuestOsIdMsr = uRawValue;
276	return VINF_SUCCESS;
277	#endif /* IN_RING3 */
278	}
279
280	case MSR_GIM_HV_HYPERCALL:
281	{
282	#ifndef IN_RING3
283	return VINF_CPUM_R3_MSR_WRITE;
284	#else /* IN_RING3 */
285	/*
286	* For now ignore writes to the hypercall MSR (i.e. keeps it disabled).
287	* This is required to boot FreeBSD 10.1 (with Hyper-V enabled ofc),
288	* see @bugref{7270#c116}.
289	*/
290	return VINF_SUCCESS;
291	# if 0
292	/* First, update all but the hypercall enable bit. */
293	pHv->u64HypercallMsr = (uRawValue & ~MSR_GIM_HV_HYPERCALL_ENABLE_BIT);
294
295	/* Hypercalls can only be enabled when the guest has set the Guest-OS Id Msr. */
296	bool fEnable = RT_BOOL(uRawValue & MSR_GIM_HV_HYPERCALL_ENABLE_BIT);
297	if ( fEnable
298	&& !pHv->u64GuestOsIdMsr)
299	{
300	return VINF_SUCCESS;
301	}
302
303	/* Is the guest disabling the hypercall-page? Allow it regardless of the Guest-OS Id Msr. */
304	if (!fEnable)
305	{
306	gimR3HvDisableHypercallPage(pVM);
307	pHv->u64HypercallMsr = uRawValue;
308	return VINF_SUCCESS;
309	}
310
311	/* Enable the hypercall-page. */
312	RTGCPHYS GCPhysHypercallPage = MSR_GIM_HV_HYPERCALL_GUEST_PFN(uRawValue) << PAGE_SHIFT;
313	int rc = gimR3HvEnableHypercallPage(pVM, GCPhysHypercallPage);
314	if (RT_SUCCESS(rc))
315	{
316	pHv->u64HypercallMsr = uRawValue;
317	return VINF_SUCCESS;
318	}
319
320	return VERR_CPUM_RAISE_GP_0;
321	# endif
322	#endif /* IN_RING3 */
323	}
324
325	case MSR_GIM_HV_REF_TSC:
326	{
327	#ifndef IN_RING3
328	return VINF_CPUM_R3_MSR_WRITE;
329	#else /* IN_RING3 */
330	/* First, update all but the TSC-page enable bit. */
331	pHv->u64TscPageMsr = (uRawValue & ~MSR_GIM_HV_REF_TSC_ENABLE_BIT);
332
333	/* Is the guest disabling the TSC-page? */
334	bool fEnable = RT_BOOL(uRawValue & MSR_GIM_HV_REF_TSC_ENABLE_BIT);
335	if (!fEnable)
336	{
337	gimR3HvDisableTscPage(pVM);
338	pHv->u64TscPageMsr = uRawValue;
339	return VINF_SUCCESS;
340	}
341
342	/* Enable the TSC-page. */
343	RTGCPHYS GCPhysTscPage = MSR_GIM_HV_REF_TSC_GUEST_PFN(uRawValue) << PAGE_SHIFT;
344	int rc = gimR3HvEnableTscPage(pVM, GCPhysTscPage, false /* fUseThisTscSequence /, 0 / uTscSequence */);
345	if (RT_SUCCESS(rc))
346	{
347	pHv->u64TscPageMsr = uRawValue;
348	return VINF_SUCCESS;
349	}
350
351	return VERR_CPUM_RAISE_GP_0;
352	#endif /* IN_RING3 */
353	}
354
355	case MSR_GIM_HV_RESET:
356	{
357	#ifndef IN_RING3
358	return VINF_CPUM_R3_MSR_WRITE;
359	#else
360	if (MSR_GIM_HV_RESET_IS_SET(uRawValue))
361	{
362	LogRel(("GIM: HyperV: Reset initiated through MSR\n"));
363	int rc = PDMDevHlpVMReset(pVM->gim.s.pDevInsR3);
364	AssertRC(rc);
365	}
366	/* else: Ignore writes to other bits. */
367	return VINF_SUCCESS;
368	#endif /* IN_RING3 */
369	}
370
371	case MSR_GIM_HV_CRASH_CTL:
372	{
373	#ifndef IN_RING3
374	return VINF_CPUM_R3_MSR_WRITE;
375	#else
376	if (uRawValue & MSR_GIM_HV_CRASH_CTL_NOTIFY_BIT)
377	{
378	LogRel(("GIM: HyperV: Guest indicates a fatal condition! P0=%#RX64 P1=%#RX64 P2=%#RX64 P3=%#RX64 P4=%#RX64\n",
379	pHv->uCrashP0, pHv->uCrashP1, pHv->uCrashP2, pHv->uCrashP3, pHv->uCrashP4));
380	}
381	return VINF_SUCCESS;
382	#endif
383	}
384
385	case MSR_GIM_HV_CRASH_P0: pHv->uCrashP0 = uRawValue; return VINF_SUCCESS;
386	case MSR_GIM_HV_CRASH_P1: pHv->uCrashP1 = uRawValue; return VINF_SUCCESS;
387	case MSR_GIM_HV_CRASH_P2: pHv->uCrashP2 = uRawValue; return VINF_SUCCESS;
388	case MSR_GIM_HV_CRASH_P3: pHv->uCrashP3 = uRawValue; return VINF_SUCCESS;
389	case MSR_GIM_HV_CRASH_P4: pHv->uCrashP4 = uRawValue; return VINF_SUCCESS;
390
391	case MSR_GIM_HV_TIME_REF_COUNT: /* Read-only MSRs. */
392	case MSR_GIM_HV_VP_INDEX:
393	case MSR_GIM_HV_TSC_FREQ:
394	case MSR_GIM_HV_APIC_FREQ:
395	LogFunc(("WrMsr on read-only MSR %#RX32 -> #GP(0)\n", idMsr));
396	return VERR_CPUM_RAISE_GP_0;
397
398	default:
399	{
400	#ifdef IN_RING3
401	static uint32_t s_cTimes = 0;
402	if (s_cTimes++ < 20)
403	LogRel(("GIM: HyperV: Unknown/invalid WrMsr (%#x,%#x`%08x) -> #GP(0)\n", idMsr,
404	uRawValue & UINT64_C(0xffffffff00000000), uRawValue & UINT64_C(0xffffffff)));
405	#endif
406	LogFunc(("Unknown/invalid WrMsr (%#RX32,%#RX64) -> #GP(0)\n", idMsr, uRawValue));
407	break;
408	}
409	}
410
411	return VERR_CPUM_RAISE_GP_0;
412	}
413

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source: vbox/trunk/src/VBox/VMM/VMMAll/GIMAllHv.cpp@ 57529

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