GIMAllKvm.cpp@ 55747

Last change on this file since 55747 was 55714, checked in by vboxsync, 10 years ago
VMM/GIM: scoping.
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1	/* $Id: GIMAllKvm.cpp 55714 2015-05-07 12:01:21Z vboxsync $ */
2	/** @file
3	* GIM - Guest Interface Manager, KVM, All Contexts.
4	*/
5
6	/*
7	* Copyright (C) 2015 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/*******************************************************************************
19	* Header Files *
20	*******************************************************************************/
21	#define LOG_GROUP LOG_GROUP_GIM
22	#include "GIMKvmInternal.h"
23	#include "GIMInternal.h"
24
25	#include <VBox/err.h>
26	#include <VBox/dis.h>
27	#include <VBox/vmm/hm.h>
28	#include <VBox/vmm/em.h>
29	#include <VBox/vmm/tm.h>
30	#include <VBox/vmm/vm.h>
31	#include <VBox/vmm/pgm.h>
32	#include <VBox/vmm/pdmdev.h>
33	#include <VBox/vmm/pdmapi.h>
34	#include <VBox/sup.h>
35
36	#include <iprt/asm-amd64-x86.h>
37
38
39	/**
40	* Handles the KVM hypercall.
41	*
42	* @returns VBox status code.
43	* @param pVCpu Pointer to the VMCPU.
44	* @param pCtx Pointer to the guest-CPU context.
45	*/
46	VMM_INT_DECL(int) gimKvmHypercall(PVMCPU pVCpu, PCPUMCTX pCtx)
47	{
48	/*
49	* Get the hypercall operation and arguments.
50	*/
51	bool const fIs64BitMode = CPUMIsGuestIn64BitCodeEx(pCtx);
52	uint64_t uHyperOp = pCtx->rax;
53	uint64_t uHyperArg0 = pCtx->rbx;
54	uint64_t uHyperArg1 = pCtx->rcx;
55	uint64_t uHyperArg2 = pCtx->rdi;
56	uint64_t uHyperArg3 = pCtx->rsi;
57	uint64_t uHyperRet = KVM_HYPERCALL_RET_ENOSYS;
58	uint64_t uAndMask = UINT64_C(0xffffffffffffffff);
59	if (!fIs64BitMode)
60	{
61	uAndMask = UINT64_C(0xffffffff);
62	uHyperOp &= UINT64_C(0xffffffff);
63	uHyperArg0 &= UINT64_C(0xffffffff);
64	uHyperArg1 &= UINT64_C(0xffffffff);
65	uHyperArg2 &= UINT64_C(0xffffffff);
66	uHyperArg3 &= UINT64_C(0xffffffff);
67	uHyperRet &= UINT64_C(0xffffffff);
68	}
69
70	/*
71	* Verify that guest ring-0 is the one making the hypercall.
72	*/
73	uint32_t uCpl = CPUMGetGuestCPL(pVCpu);
74	if (uCpl)
75	{
76	pCtx->rax = KVM_HYPERCALL_RET_EPERM & uAndMask;
77	return VINF_SUCCESS;
78	}
79
80	/*
81	* Do the work.
82	*/
83	switch (uHyperOp)
84	{
85	case KVM_HYPERCALL_OP_KICK_CPU:
86	{
87	PVM pVM = pVCpu->CTX_SUFF(pVM);
88	if (uHyperArg1 < pVM->cCpus)
89	{
90	PVMCPU pVCpuTarget = &pVM->aCpus[uHyperArg1]; /** ASSUMES pVCpu index == ApicId of the VCPU. */
91	VMCPU_FF_SET(pVCpuTarget, VMCPU_FF_UNHALT);
92	#ifdef IN_RING0
93	GVMMR0SchedWakeUp(pVM, pVCpuTarget->idCpu);
94	#elif defined(IN_RING3)
95	int rc2 = SUPR3CallVMMR0(pVM->pVMR0, pVCpuTarget->idCpu, VMMR0_DO_GVMM_SCHED_WAKE_UP, NULL);
96	AssertRC(rc2);
97	#endif
98	uHyperRet = KVM_HYPERCALL_RET_SUCCESS;
99	}
100	break;
101	}
102
103	case KVM_HYPERCALL_OP_VAPIC_POLL_IRQ:
104	uHyperRet = KVM_HYPERCALL_RET_SUCCESS;
105	break;
106
107	default:
108	break;
109	}
110
111	/*
112	* Place the result in rax/eax.
113	*/
114	pCtx->rax = uHyperRet & uAndMask;
115	return VINF_SUCCESS;
116	}
117
118
119	/**
120	* Returns whether the guest has configured and enabled the use of KVM's
121	* hypercall interface.
122	*
123	* @returns true if hypercalls are enabled, false otherwise.
124	* @param pVCpu Pointer to the VMCPU.
125	*/
126	VMM_INT_DECL(bool) gimKvmAreHypercallsEnabled(PVMCPU pVCpu)
127	{
128	/* KVM paravirt interface doesn't have hypercall control bits like Hyper-V does
129	that guests can control. It's always enabled. */
130	return true;
131	}
132
133
134	/**
135	* Returns whether the guest has configured and enabled the use of KVM's
136	* paravirtualized TSC.
137	*
138	* @returns true if paravirt. TSC is enabled, false otherwise.
139	* @param pVM Pointer to the VM.
140	*/
141	VMM_INT_DECL(bool) gimKvmIsParavirtTscEnabled(PVM pVM)
142	{
143	uint32_t cCpus = pVM->cCpus;
144	for (uint32_t i = 0; i < cCpus; i++)
145	{
146	PVMCPU pVCpu = &pVM->aCpus[i];
147	PGIMKVMCPU pGimKvmCpu = &pVCpu->gim.s.u.KvmCpu;
148	if (MSR_GIM_KVM_SYSTEM_TIME_IS_ENABLED(pGimKvmCpu->u64SystemTimeMsr))
149	return true;
150	}
151	return false;
152	}
153
154
155	/**
156	* MSR read handler for KVM.
157	*
158	* @returns Strict VBox status code like CPUMQueryGuestMsr().
159	* @retval VINF_CPUM_R3_MSR_READ
160	* @retval VERR_CPUM_RAISE_GP_0
161	*
162	* @param pVCpu Pointer to the VMCPU.
163	* @param idMsr The MSR being read.
164	* @param pRange The range this MSR belongs to.
165	* @param puValue Where to store the MSR value read.
166	*/
167	VMM_INT_DECL(VBOXSTRICTRC) gimKvmReadMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
168	{
169	NOREF(pRange);
170	PVM pVM = pVCpu->CTX_SUFF(pVM);
171	PGIMKVM pKvm = &pVM->gim.s.u.Kvm;
172	PGIMKVMCPU pKvmCpu = &pVCpu->gim.s.u.KvmCpu;
173
174	switch (idMsr)
175	{
176	case MSR_GIM_KVM_SYSTEM_TIME:
177	case MSR_GIM_KVM_SYSTEM_TIME_OLD:
178	*puValue = pKvmCpu->u64SystemTimeMsr;
179	return VINF_SUCCESS;
180
181	case MSR_GIM_KVM_WALL_CLOCK:
182	case MSR_GIM_KVM_WALL_CLOCK_OLD:
183	*puValue = pKvm->u64WallClockMsr;
184	return VINF_SUCCESS;
185
186	default:
187	{
188	#ifdef IN_RING3
189	static uint32_t s_cTimes = 0;
190	if (s_cTimes++ < 20)
191	LogRel(("GIM: KVM: Unknown/invalid RdMsr (%#x) -> #GP(0)\n", idMsr));
192	#endif
193	LogFunc(("Unknown/invalid RdMsr (%#RX32) -> #GP(0)\n", idMsr));
194	break;
195	}
196	}
197
198	return VERR_CPUM_RAISE_GP_0;
199	}
200
201
202	/**
203	* MSR write handler for KVM.
204	*
205	* @returns Strict VBox status code like CPUMSetGuestMsr().
206	* @retval VINF_CPUM_R3_MSR_WRITE
207	* @retval VERR_CPUM_RAISE_GP_0
208	*
209	* @param pVCpu Pointer to the VMCPU.
210	* @param idMsr The MSR being written.
211	* @param pRange The range this MSR belongs to.
212	* @param uRawValue The raw value with the ignored bits not masked.
213	*/
214	VMM_INT_DECL(VBOXSTRICTRC) gimKvmWriteMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uRawValue)
215	{
216	NOREF(pRange);
217	PVM pVM = pVCpu->CTX_SUFF(pVM);
218	PGIMKVM pKvm = &pVM->gim.s.u.Kvm;
219	PGIMKVMCPU pKvmCpu = &pVCpu->gim.s.u.KvmCpu;
220
221	switch (idMsr)
222	{
223	case MSR_GIM_KVM_SYSTEM_TIME:
224	case MSR_GIM_KVM_SYSTEM_TIME_OLD:
225	{
226	bool fEnable = RT_BOOL(uRawValue & MSR_GIM_KVM_SYSTEM_TIME_ENABLE_BIT);
227	#ifndef IN_RING3
228	if (fEnable)
229	{
230	RTCCUINTREG fEFlags = ASMIntDisableFlags();
231	pKvmCpu->uTsc = TMCpuTickGetNoCheck(pVCpu);
232	pKvmCpu->uVirtNanoTS = TMVirtualGetNoCheck(pVM);
233	ASMSetFlags(fEFlags);
234	}
235	return VINF_CPUM_R3_MSR_WRITE;
236	#else
237	if (!fEnable)
238	{
239	gimR3KvmDisableSystemTime(pVM);
240	pKvmCpu->u64SystemTimeMsr = uRawValue;
241	return VINF_SUCCESS;
242	}
243
244	/* Is the system-time struct. already enabled? If so, get flags that need preserving. */
245	uint8_t fFlags = 0;
246	GIMKVMSYSTEMTIME SystemTime;
247	RT_ZERO(SystemTime);
248	if ( MSR_GIM_KVM_SYSTEM_TIME_IS_ENABLED(pKvmCpu->u64SystemTimeMsr)
249	&& MSR_GIM_KVM_SYSTEM_TIME_GUEST_GPA(uRawValue) == pKvmCpu->GCPhysSystemTime)
250	{
251	int rc2 = PGMPhysSimpleReadGCPhys(pVM, &SystemTime, pKvmCpu->GCPhysSystemTime, sizeof(GIMKVMSYSTEMTIME));
252	if (RT_SUCCESS(rc2))
253	fFlags = (SystemTime.fFlags & GIM_KVM_SYSTEM_TIME_FLAGS_GUEST_PAUSED);
254	}
255
256	/* Enable and populate the system-time struct. */
257	pKvmCpu->u64SystemTimeMsr = uRawValue;
258	pKvmCpu->GCPhysSystemTime = MSR_GIM_KVM_SYSTEM_TIME_GUEST_GPA(uRawValue);
259	pKvmCpu->u32SystemTimeVersion += 2;
260	int rc = gimR3KvmEnableSystemTime(pVM, pVCpu, pKvmCpu, fFlags);
261	if (RT_FAILURE(rc))
262	{
263	pKvmCpu->u64SystemTimeMsr = 0;
264	return VERR_CPUM_RAISE_GP_0;
265	}
266	return VINF_SUCCESS;
267	#endif /* IN_RING3 */
268	}
269
270	case MSR_GIM_KVM_WALL_CLOCK:
271	case MSR_GIM_KVM_WALL_CLOCK_OLD:
272	{
273	#ifndef IN_RING3
274
275	return VINF_CPUM_R3_MSR_WRITE;
276	#else
277	/* Enable the wall-clock struct. */
278	RTGCPHYS GCPhysWallClock = MSR_GIM_KVM_WALL_CLOCK_GUEST_GPA(uRawValue);
279	if (RT_LIKELY(RT_ALIGN_64(GCPhysWallClock, 4) == GCPhysWallClock))
280	{
281	int rc = gimR3KvmEnableWallClock(pVM, GCPhysWallClock);
282	if (RT_SUCCESS(rc))
283	{
284	pKvm->u64WallClockMsr = uRawValue;
285	return VINF_SUCCESS;
286	}
287	}
288	return VERR_CPUM_RAISE_GP_0;
289	#endif /* IN_RING3 */
290	}
291
292	default:
293	{
294	#ifdef IN_RING3
295	static uint32_t s_cTimes = 0;
296	if (s_cTimes++ < 20)
297	LogRel(("GIM: KVM: Unknown/invalid WrMsr (%#x,%#x`%08x) -> #GP(0)\n", idMsr,
298	uRawValue & UINT64_C(0xffffffff00000000), uRawValue & UINT64_C(0xffffffff)));
299	#endif
300	LogFunc(("Unknown/invalid WrMsr (%#RX32,%#RX64) -> #GP(0)\n", idMsr, uRawValue));
301	break;
302	}
303	}
304
305	return VERR_CPUM_RAISE_GP_0;
306	}
307
308
309	/**
310	* Whether we need to trap #UD exceptions in the guest.
311	*
312	* On AMD-V we need to trap them because paravirtualized Linux/KVM guests use
313	* the Intel VMCALL instruction to make hypercalls and we need to trap and
314	* optionally patch them to the AMD-V VMMCALL instruction and handle the
315	* hypercall.
316	*
317	* I guess this was done so that guest teleporation between an AMD and an Intel
318	* machine would working without any changes at the time of teleporation.
319	* However, this also means we -always- need to intercept #UD exceptions on one
320	* of the two CPU models (Intel or AMD). Hyper-V solves this problem more
321	* elegantly by letting the hypervisor supply an opaque hypercall page.
322	*
323	* For raw-mode VMs, this function will always return true. See gimR3KvmInit().
324	*
325	* @param pVCpu Pointer to the VMCPU.
326	*/
327	VMM_INT_DECL(bool) gimKvmShouldTrapXcptUD(PVMCPU pVCpu)
328	{
329	PVM pVM = pVCpu->CTX_SUFF(pVM);
330	return pVM->gim.s.u.Kvm.fTrapXcptUD;
331	}
332
333
334	/**
335	* Exception handler for #UD.
336	*
337	* @param pVCpu Pointer to the VMCPU.
338	* @param pCtx Pointer to the guest-CPU context.
339	* @param pDis Pointer to the disassembled instruction state at RIP.
340	* Optional, can be NULL.
341	*/
342	VMM_INT_DECL(int) gimKvmXcptUD(PVMCPU pVCpu, PCPUMCTX pCtx, PDISCPUSTATE pDis)
343	{
344	/*
345	* If we didn't ask for #UD to be trapped, bail.
346	*/
347	PVM pVM = pVCpu->CTX_SUFF(pVM);
348	PGIMKVM pKvm = &pVM->gim.s.u.Kvm;
349	if (RT_UNLIKELY(!pVM->gim.s.u.Kvm.fTrapXcptUD))
350	return VERR_GIM_OPERATION_FAILED;
351
352	/*
353	* Make sure guest ring-0 is the one making the hypercall.
354	*/
355	if (CPUMGetGuestCPL(pVCpu))
356	return VERR_GIM_HYPERCALL_ACCESS_DENIED;
357
358	int rc = VINF_SUCCESS;
359	if (!pDis)
360	{
361	/*
362	* Disassemble the instruction at RIP to figure out if it's the Intel
363	* VMCALL instruction and if so, handle it as a hypercall.
364	*/
365	DISCPUSTATE Dis;
366	rc = EMInterpretDisasCurrent(pVM, pVCpu, &Dis, NULL /* pcbInstr */);
367	pDis = &Dis;
368	}
369
370	if (RT_SUCCESS(rc))
371	{
372	/*
373	* Patch the instruction to so we don't have to spend time disassembling it each time.
374	* Makes sense only for HM as with raw-mode we will be getting a #UD regardless.
375	*/
376	if ( pDis->pCurInstr->uOpcode == OP_VMCALL
377	\|\| pDis->pCurInstr->uOpcode == OP_VMMCALL)
378	{
379	if ( pDis->pCurInstr->uOpcode != pKvm->uOpCodeNative
380	&& HMIsEnabled(pVM))
381	{
382	uint8_t abHypercall[3];
383	size_t cbWritten = 0;
384	rc = VMMPatchHypercall(pVM, &abHypercall, sizeof(abHypercall), &cbWritten);
385	AssertRC(rc);
386	Assert(sizeof(abHypercall) == pDis->cbInstr);
387	Assert(sizeof(abHypercall) == cbWritten);
388
389	rc = PGMPhysSimpleWriteGCPtr(pVCpu, pCtx->rip, &abHypercall, sizeof(abHypercall));
390	}
391
392	/*
393	* Perform the hypercall and update RIP.
394	*
395	* For HM, we can simply resume guest execution without perform the hypercall now and
396	* do it on the next VMCALL/VMMCALL exit handler on the patched instruction.
397	*
398	* For raw-mode we need to do this now anyway. So we do it here regardless with an added
399	* advantage is that it saves one world-switch for the HM case.
400	*/
401	if (RT_SUCCESS(rc))
402	{
403	int rc2 = gimKvmHypercall(pVCpu, pCtx);
404	AssertRC(rc2);
405	pCtx->rip += pDis->cbInstr;
406	}
407	return rc;
408	}
409	}
410
411	return VERR_GIM_OPERATION_FAILED;
412	}
413

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source: vbox/trunk/src/VBox/VMM/VMMAll/GIMAllKvm.cpp@ 55747

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