GIMAllKvm.cpp@ 61544

Last change on this file since 61544 was 61544, checked in by vboxsync, 9 years ago
VMM/GIM: Fix up hypercall rc handling and also a bug while disassembling hypercalls. IEM/REM being able to handle VMCALL/VMMCALL to hook into GIM is still a todo but this change temporarily works around by adding new GIM and GIM provider interfaces to kinda do the same work. The Xcpt handlers were not re-used as they check for whether or not the provider requested UD trapping in the first place.
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1	/* $Id: GIMAllKvm.cpp 61544 2016-06-07 14:42:20Z vboxsync $ */
2	/** @file
3	* GIM - Guest Interface Manager, KVM, All Contexts.
4	*/
5
6	/*
7	* Copyright (C) 2015 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_GIM
23	#include "GIMKvmInternal.h"
24	#include "GIMInternal.h"
25
26	#include <VBox/err.h>
27	#include <VBox/dis.h>
28	#include <VBox/vmm/hm.h>
29	#include <VBox/vmm/em.h>
30	#include <VBox/vmm/tm.h>
31	#include <VBox/vmm/vm.h>
32	#include <VBox/vmm/pgm.h>
33	#include <VBox/vmm/pdmdev.h>
34	#include <VBox/vmm/pdmapi.h>
35	#include <VBox/sup.h>
36
37	#include <iprt/asm-amd64-x86.h>
38	#include <iprt/time.h>
39
40
41	/**
42	* Handles the KVM hypercall.
43	*
44	* @returns Strict VBox status code.
45	* @retval VINF_SUCCESS if the hypercall succeeded (even if its operation
46	* failed).
47	* @retval VINF_GIM_R3_HYPERCALL re-start the hypercall from ring-3.
48	* @retval VERR_GIM_HYPERCALL_ACCESS_DENIED CPL is insufficient.
49	*
50	* @param pVCpu The cross context virtual CPU structure.
51	* @param pCtx Pointer to the guest-CPU context.
52	*
53	* @thread EMT(pVCpu).
54	*/
55	VMM_INT_DECL(VBOXSTRICTRC) gimKvmHypercall(PVMCPU pVCpu, PCPUMCTX pCtx)
56	{
57	VMCPU_ASSERT_EMT(pVCpu);
58
59	PVM pVM = pVCpu->CTX_SUFF(pVM);
60	STAM_REL_COUNTER_INC(&pVM->gim.s.StatHypercalls);
61
62	/*
63	* Get the hypercall operation and arguments.
64	*/
65	bool const fIs64BitMode = CPUMIsGuestIn64BitCodeEx(pCtx);
66	uint64_t uHyperOp = pCtx->rax;
67	uint64_t uHyperArg0 = pCtx->rbx;
68	uint64_t uHyperArg1 = pCtx->rcx;
69	uint64_t uHyperArg2 = pCtx->rdi;
70	uint64_t uHyperArg3 = pCtx->rsi;
71	uint64_t uHyperRet = KVM_HYPERCALL_RET_ENOSYS;
72	uint64_t uAndMask = UINT64_C(0xffffffffffffffff);
73	if (!fIs64BitMode)
74	{
75	uAndMask = UINT64_C(0xffffffff);
76	uHyperOp &= UINT64_C(0xffffffff);
77	uHyperArg0 &= UINT64_C(0xffffffff);
78	uHyperArg1 &= UINT64_C(0xffffffff);
79	uHyperArg2 &= UINT64_C(0xffffffff);
80	uHyperArg3 &= UINT64_C(0xffffffff);
81	uHyperRet &= UINT64_C(0xffffffff);
82	}
83
84	/*
85	* Verify that guest ring-0 is the one making the hypercall.
86	*/
87	uint32_t uCpl = CPUMGetGuestCPL(pVCpu);
88	if (RT_UNLIKELY(uCpl))
89	{
90	pCtx->rax = KVM_HYPERCALL_RET_EPERM & uAndMask;
91	return VERR_GIM_HYPERCALL_ACCESS_DENIED;
92	}
93
94	/*
95	* Do the work.
96	*/
97	int rc = VINF_SUCCESS;
98	switch (uHyperOp)
99	{
100	case KVM_HYPERCALL_OP_KICK_CPU:
101	{
102	if (uHyperArg1 < pVM->cCpus)
103	{
104	PVMCPU pVCpuTarget = &pVM->aCpus[uHyperArg1]; /** ASSUMES pVCpu index == ApicId of the VCPU. */
105	VMCPU_FF_SET(pVCpuTarget, VMCPU_FF_UNHALT);
106	#ifdef IN_RING0
107	/*
108	* We might be here with preemption disabled or enabled (i.e. depending on thread-context hooks
109	* being used), so don't try obtaining the GVMMR0 used lock here. See @bugref{7270#c148}.
110	*/
111	GVMMR0SchedWakeUpEx(pVM, pVCpuTarget->idCpu, false /* fTakeUsedLock */);
112	#elif defined(IN_RING3)
113	int rc2 = SUPR3CallVMMR0(pVM->pVMR0, pVCpuTarget->idCpu, VMMR0_DO_GVMM_SCHED_WAKE_UP, NULL /* pvArg */);
114	AssertRC(rc2);
115	#elif defined(IN_RC)
116	/* Nothing to do for raw-mode, shouldn't really be used by raw-mode guests anyway. */
117	Assert(pVM->cCpus == 1);
118	#endif
119	uHyperRet = KVM_HYPERCALL_RET_SUCCESS;
120	}
121	else
122	{
123	/* Shouldn't ever happen! If it does, throw a guru, as otherwise it'll lead to deadlocks in the guest anyway! */
124	rc = VERR_GIM_HYPERCALL_FAILED;
125	}
126	break;
127	}
128
129	case KVM_HYPERCALL_OP_VAPIC_POLL_IRQ:
130	uHyperRet = KVM_HYPERCALL_RET_SUCCESS;
131	break;
132
133	default:
134	break;
135	}
136
137	/*
138	* Place the result in rax/eax.
139	*/
140	pCtx->rax = uHyperRet & uAndMask;
141	return rc;
142	}
143
144
145	/**
146	* Returns whether the guest has configured and enabled the use of KVM's
147	* hypercall interface.
148	*
149	* @returns true if hypercalls are enabled, false otherwise.
150	* @param pVCpu The cross context virtual CPU structure.
151	*/
152	VMM_INT_DECL(bool) gimKvmAreHypercallsEnabled(PVMCPU pVCpu)
153	{
154	NOREF(pVCpu);
155	/* KVM paravirt interface doesn't have hypercall control bits (like Hyper-V does)
156	that guests can control, i.e. hypercalls are always enabled. */
157	return true;
158	}
159
160
161	/**
162	* Returns whether the guest has configured and enabled the use of KVM's
163	* paravirtualized TSC.
164	*
165	* @returns true if paravirt. TSC is enabled, false otherwise.
166	* @param pVM The cross context VM structure.
167	*/
168	VMM_INT_DECL(bool) gimKvmIsParavirtTscEnabled(PVM pVM)
169	{
170	uint32_t cCpus = pVM->cCpus;
171	for (uint32_t i = 0; i < cCpus; i++)
172	{
173	PVMCPU pVCpu = &pVM->aCpus[i];
174	PGIMKVMCPU pGimKvmCpu = &pVCpu->gim.s.u.KvmCpu;
175	if (MSR_GIM_KVM_SYSTEM_TIME_IS_ENABLED(pGimKvmCpu->u64SystemTimeMsr))
176	return true;
177	}
178	return false;
179	}
180
181
182	/**
183	* MSR read handler for KVM.
184	*
185	* @returns Strict VBox status code like CPUMQueryGuestMsr().
186	* @retval VINF_CPUM_R3_MSR_READ
187	* @retval VERR_CPUM_RAISE_GP_0
188	*
189	* @param pVCpu The cross context virtual CPU structure.
190	* @param idMsr The MSR being read.
191	* @param pRange The range this MSR belongs to.
192	* @param puValue Where to store the MSR value read.
193	*/
194	VMM_INT_DECL(VBOXSTRICTRC) gimKvmReadMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
195	{
196	NOREF(pRange);
197	PVM pVM = pVCpu->CTX_SUFF(pVM);
198	PGIMKVM pKvm = &pVM->gim.s.u.Kvm;
199	PGIMKVMCPU pKvmCpu = &pVCpu->gim.s.u.KvmCpu;
200
201	switch (idMsr)
202	{
203	case MSR_GIM_KVM_SYSTEM_TIME:
204	case MSR_GIM_KVM_SYSTEM_TIME_OLD:
205	*puValue = pKvmCpu->u64SystemTimeMsr;
206	return VINF_SUCCESS;
207
208	case MSR_GIM_KVM_WALL_CLOCK:
209	case MSR_GIM_KVM_WALL_CLOCK_OLD:
210	*puValue = pKvm->u64WallClockMsr;
211	return VINF_SUCCESS;
212
213	default:
214	{
215	#ifdef IN_RING3
216	static uint32_t s_cTimes = 0;
217	if (s_cTimes++ < 20)
218	LogRel(("GIM: KVM: Unknown/invalid RdMsr (%#x) -> #GP(0)\n", idMsr));
219	#endif
220	LogFunc(("Unknown/invalid RdMsr (%#RX32) -> #GP(0)\n", idMsr));
221	break;
222	}
223	}
224
225	return VERR_CPUM_RAISE_GP_0;
226	}
227
228
229	/**
230	* MSR write handler for KVM.
231	*
232	* @returns Strict VBox status code like CPUMSetGuestMsr().
233	* @retval VINF_CPUM_R3_MSR_WRITE
234	* @retval VERR_CPUM_RAISE_GP_0
235	*
236	* @param pVCpu The cross context virtual CPU structure.
237	* @param idMsr The MSR being written.
238	* @param pRange The range this MSR belongs to.
239	* @param uRawValue The raw value with the ignored bits not masked.
240	*/
241	VMM_INT_DECL(VBOXSTRICTRC) gimKvmWriteMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uRawValue)
242	{
243	NOREF(pRange);
244	PVM pVM = pVCpu->CTX_SUFF(pVM);
245	PGIMKVMCPU pKvmCpu = &pVCpu->gim.s.u.KvmCpu;
246
247	switch (idMsr)
248	{
249	case MSR_GIM_KVM_SYSTEM_TIME:
250	case MSR_GIM_KVM_SYSTEM_TIME_OLD:
251	{
252	bool fEnable = RT_BOOL(uRawValue & MSR_GIM_KVM_SYSTEM_TIME_ENABLE_BIT);
253	#ifdef IN_RING0
254	NOREF(fEnable); NOREF(pKvmCpu);
255	gimR0KvmUpdateSystemTime(pVM, pVCpu);
256	return VINF_CPUM_R3_MSR_WRITE;
257	#elif defined(IN_RC)
258	Assert(pVM->cCpus == 1);
259	if (fEnable)
260	{
261	RTCCUINTREG fEFlags = ASMIntDisableFlags();
262	pKvmCpu->uTsc = TMCpuTickGetNoCheck(pVCpu) \| UINT64_C(1);
263	pKvmCpu->uVirtNanoTS = TMVirtualGetNoCheck(pVM) \| UINT64_C(1);
264	ASMSetFlags(fEFlags);
265	}
266	return VINF_CPUM_R3_MSR_WRITE;
267	#else /* IN_RING3 */
268	if (!fEnable)
269	{
270	gimR3KvmDisableSystemTime(pVM);
271	pKvmCpu->u64SystemTimeMsr = uRawValue;
272	return VINF_SUCCESS;
273	}
274
275	/* Is the system-time struct. already enabled? If so, get flags that need preserving. */
276	uint8_t fFlags = 0;
277	GIMKVMSYSTEMTIME SystemTime;
278	RT_ZERO(SystemTime);
279	if ( MSR_GIM_KVM_SYSTEM_TIME_IS_ENABLED(pKvmCpu->u64SystemTimeMsr)
280	&& MSR_GIM_KVM_SYSTEM_TIME_GUEST_GPA(uRawValue) == pKvmCpu->GCPhysSystemTime)
281	{
282	int rc2 = PGMPhysSimpleReadGCPhys(pVM, &SystemTime, pKvmCpu->GCPhysSystemTime, sizeof(GIMKVMSYSTEMTIME));
283	if (RT_SUCCESS(rc2))
284	pKvmCpu->fSystemTimeFlags = (SystemTime.fFlags & GIM_KVM_SYSTEM_TIME_FLAGS_GUEST_PAUSED);
285	}
286
287	/* Enable and populate the system-time struct. */
288	pKvmCpu->u64SystemTimeMsr = uRawValue;
289	pKvmCpu->GCPhysSystemTime = MSR_GIM_KVM_SYSTEM_TIME_GUEST_GPA(uRawValue);
290	pKvmCpu->u32SystemTimeVersion += 2;
291	int rc = gimR3KvmEnableSystemTime(pVM, pVCpu);
292	if (RT_FAILURE(rc))
293	{
294	pKvmCpu->u64SystemTimeMsr = 0;
295	return VERR_CPUM_RAISE_GP_0;
296	}
297	return VINF_SUCCESS;
298	#endif
299	}
300
301	case MSR_GIM_KVM_WALL_CLOCK:
302	case MSR_GIM_KVM_WALL_CLOCK_OLD:
303	{
304	#ifndef IN_RING3
305	return VINF_CPUM_R3_MSR_WRITE;
306	#else
307	/* Enable the wall-clock struct. */
308	RTGCPHYS GCPhysWallClock = MSR_GIM_KVM_WALL_CLOCK_GUEST_GPA(uRawValue);
309	if (RT_LIKELY(RT_ALIGN_64(GCPhysWallClock, 4) == GCPhysWallClock))
310	{
311	int rc = gimR3KvmEnableWallClock(pVM, GCPhysWallClock);
312	if (RT_SUCCESS(rc))
313	{
314	PGIMKVM pKvm = &pVM->gim.s.u.Kvm;
315	pKvm->u64WallClockMsr = uRawValue;
316	return VINF_SUCCESS;
317	}
318	}
319	return VERR_CPUM_RAISE_GP_0;
320	#endif /* IN_RING3 */
321	}
322
323	default:
324	{
325	#ifdef IN_RING3
326	static uint32_t s_cTimes = 0;
327	if (s_cTimes++ < 20)
328	LogRel(("GIM: KVM: Unknown/invalid WrMsr (%#x,%#x`%08x) -> #GP(0)\n", idMsr,
329	uRawValue & UINT64_C(0xffffffff00000000), uRawValue & UINT64_C(0xffffffff)));
330	#endif
331	LogFunc(("Unknown/invalid WrMsr (%#RX32,%#RX64) -> #GP(0)\n", idMsr, uRawValue));
332	break;
333	}
334	}
335
336	return VERR_CPUM_RAISE_GP_0;
337	}
338
339
340	/**
341	* Whether we need to trap \#UD exceptions in the guest.
342	*
343	* On AMD-V we need to trap them because paravirtualized Linux/KVM guests use
344	* the Intel VMCALL instruction to make hypercalls and we need to trap and
345	* optionally patch them to the AMD-V VMMCALL instruction and handle the
346	* hypercall.
347	*
348	* I guess this was done so that guest teleporation between an AMD and an Intel
349	* machine would working without any changes at the time of teleporation.
350	* However, this also means we -always- need to intercept \#UD exceptions on one
351	* of the two CPU models (Intel or AMD). Hyper-V solves this problem more
352	* elegantly by letting the hypervisor supply an opaque hypercall page.
353	*
354	* For raw-mode VMs, this function will always return true. See gimR3KvmInit().
355	*
356	* @param pVCpu The cross context virtual CPU structure.
357	*/
358	VMM_INT_DECL(bool) gimKvmShouldTrapXcptUD(PVMCPU pVCpu)
359	{
360	PVM pVM = pVCpu->CTX_SUFF(pVM);
361	return pVM->gim.s.u.Kvm.fTrapXcptUD;
362	}
363
364
365	/**
366	* Checks the currently disassembled instrunction and executes the hypercall if
367	* it's a hypercall instruction.
368	*
369	* @returns Strict VBox status code.
370	* @param pVCpu The cross context virtual CPU structure.
371	* @param pCtx Pointer to the guest-CPU context.
372	* @param pDis Pointer to the disassembled instruction state at RIP.
373	*
374	* @thread EMT(pVCpu).
375	*
376	* @todo Make this function static when @bugref{7270#c168} is addressed.
377	*/
378	VMM_INT_DECL(VBOXSTRICTRC) gimKvmExecHypercallInstr(PVMCPU pVCpu, PCPUMCTX pCtx, PDISCPUSTATE pDis)
379	{
380	Assert(pVCpu);
381	Assert(pCtx);
382	Assert(pDis);
383	VMCPU_ASSERT_EMT(pVCpu);
384
385	/*
386	* If the instruction at RIP is the Intel VMCALL instruction or
387	* the AMD VMMCALL instruction handle it as a hypercall.
388	*
389	* Linux/KVM guests always uses the Intel VMCALL instruction but we patch
390	* it to the host-native one whenever we encounter it so subsequent calls
391	* will not require disassembly (when coming from HM).
392	*/
393	if ( pDis->pCurInstr->uOpcode == OP_VMCALL
394	\|\| pDis->pCurInstr->uOpcode == OP_VMMCALL)
395	{
396	/*
397	* Perform the hypercall.
398	*
399	* For HM, we can simply resume guest execution without performing the hypercall now and
400	* do it on the next VMCALL/VMMCALL exit handler on the patched instruction.
401	*
402	* For raw-mode we need to do this now anyway. So we do it here regardless with an added
403	* advantage is that it saves one world-switch for the HM case.
404	*/
405	VBOXSTRICTRC rcStrict = gimKvmHypercall(pVCpu, pCtx);
406	if (rcStrict == VINF_SUCCESS)
407	{
408	/*
409	* Patch the instruction to so we don't have to spend time disassembling it each time.
410	* Makes sense only for HM as with raw-mode we will be getting a #UD regardless.
411	*/
412	PVM pVM = pVCpu->CTX_SUFF(pVM);
413	PCGIMKVM pKvm = &pVM->gim.s.u.Kvm;
414	if ( pDis->pCurInstr->uOpcode != pKvm->uOpCodeNative
415	&& HMIsEnabled(pVM))
416	{
417	/** @todo r=ramshankar: we probably should be doing this in an
418	* EMT rendezvous and using proper AVL-tree patching to
419	* keep track at RIP so that non-patched VMCALL's still
420	* produce \#UD. */
421	uint8_t abHypercall[3];
422	size_t cbWritten = 0;
423	int rc = VMMPatchHypercall(pVM, &abHypercall, sizeof(abHypercall), &cbWritten);
424	AssertRC(rc);
425	Assert(sizeof(abHypercall) == pDis->cbInstr);
426	Assert(sizeof(abHypercall) == cbWritten);
427
428	rc = PGMPhysSimpleWriteGCPtr(pVCpu, pCtx->rip, &abHypercall, sizeof(abHypercall));
429	AssertRC(rc);
430
431	/** @todo Add stats for patching. */
432	}
433	}
434	else
435	{
436	/* The KVM provider doesn't have any concept of continuing hypercalls. */
437	Assert(rcStrict != VINF_GIM_HYPERCALL_CONTINUING);
438	#ifdef IN_RING3
439	Assert(rcStrict != VINF_GIM_R3_HYPERCALL);
440	#endif
441	}
442	return rcStrict;
443	}
444
445	return VERR_GIM_INVALID_HYPERCALL_INSTR;
446	}
447
448
449	/**
450	* Exception handler for \#UD.
451	*
452	* @returns Strict VBox status code.
453	* @retval VINF_SUCCESS if the hypercall succeeded (even if its operation
454	* failed).
455	* @retval VINF_GIM_R3_HYPERCALL re-start the hypercall from ring-3.
456	* @retval VERR_GIM_HYPERCALL_ACCESS_DENIED CPL is insufficient.
457	* @retval VERR_GIM_INVALID_HYPERCALL_INSTR instruction at RIP is not a valid
458	* hypercall instruction.
459	*
460	* @param pVCpu The cross context virtual CPU structure.
461	* @param pCtx Pointer to the guest-CPU context.
462	* @param pDis Pointer to the disassembled instruction state at RIP.
463	* Optional, can be NULL.
464	* @param pcbInstr Where to store the instruction length of the hypercall
465	* instruction. Optional, can be NULL.
466	*
467	* @thread EMT(pVCpu).
468	*/
469	VMM_INT_DECL(VBOXSTRICTRC) gimKvmXcptUD(PVMCPU pVCpu, PCPUMCTX pCtx, PDISCPUSTATE pDis, uint8_t *pcbInstr)
470	{
471	VMCPU_ASSERT_EMT(pVCpu);
472
473	/*
474	* If we didn't ask for #UD to be trapped, bail.
475	*/
476	PVM pVM = pVCpu->CTX_SUFF(pVM);
477	PCGIMKVM pKvm = &pVM->gim.s.u.Kvm;
478	if (RT_UNLIKELY(!pKvm->fTrapXcptUD))
479	return VERR_GIM_IPE_3;
480
481	VBOXSTRICTRC rcStrict = VINF_SUCCESS;
482	if (!pDis)
483	{
484	unsigned cbInstr;
485	DISCPUSTATE Dis;
486	int rc = EMInterpretDisasCurrent(pVM, pVCpu, &Dis, &cbInstr);
487	if (RT_SUCCESS(rc))
488	{
489	if (pcbInstr)
490	*pcbInstr = (uint8_t)cbInstr;
491	return gimKvmExecHypercallInstr(pVCpu, pCtx, &Dis);
492	}
493
494	Log(("GIM: KVM: Failed to disassemble instruction at CS:RIP=%04x:%08RX64. rc=%Rrc\n", pCtx->cs.Sel, pCtx->rip, rc));
495	return rc;
496	}
497
498	return gimKvmExecHypercallInstr(pVCpu, pCtx, pDis);
499	}
500

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source: vbox/trunk/src/VBox/VMM/VMMAll/GIMAllKvm.cpp@ 61544

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