HMVMXAll.cpp@ 74204

Last change on this file since 74204 was 74189, checked in by vboxsync, 6 years ago
VMM/IEM: Nested VMX: bugref:9180 Don't include success as part of diagnostics as it would overwrite failures from the previous instruction that we want to inspect.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 45.9 KB

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1	/* $Id: HMVMXAll.cpp 74189 2018-09-11 09:19:34Z vboxsync $ */
2	/** @file
3	* HM VMX (VT-x) - All contexts.
4	*/
5
6	/*
7	* Copyright (C) 2018 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_HM
23	#define VMCPU_INCL_CPUM_GST_CTX
24	#include "HMInternal.h"
25	#include <VBox/vmm/vm.h>
26	#include <VBox/vmm/pdmapi.h>
27
28
29	/*********************************************************************************************************************************
30	* Global Variables *
31	*********************************************************************************************************************************/
32	#define VMXV_DIAG_DESC(a_Def, a_Desc) #a_Def " - " #a_Desc
33	/** VMX virtual-instructions and VM-exit diagnostics. */
34	static const char * const g_apszVmxVDiagDesc[] =
35	{
36	/* Internal processing errors. */
37	VMXV_DIAG_DESC(kVmxVDiag_Ipe_1 , "Ipe_1" ),
38	VMXV_DIAG_DESC(kVmxVDiag_Ipe_2 , "Ipe_2" ),
39	VMXV_DIAG_DESC(kVmxVDiag_Ipe_3 , "Ipe_3" ),
40	VMXV_DIAG_DESC(kVmxVDiag_Ipe_4 , "Ipe_4" ),
41	VMXV_DIAG_DESC(kVmxVDiag_Ipe_5 , "Ipe_5" ),
42	VMXV_DIAG_DESC(kVmxVDiag_Ipe_6 , "Ipe_6" ),
43	VMXV_DIAG_DESC(kVmxVDiag_Ipe_7 , "Ipe_7" ),
44	VMXV_DIAG_DESC(kVmxVDiag_Ipe_8 , "Ipe_8" ),
45	VMXV_DIAG_DESC(kVmxVDiag_Ipe_9 , "Ipe_9" ),
46	/* VMXON. */
47	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_A20M , "A20M" ),
48	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_Cpl , "Cpl" ),
49	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_Cr0Fixed0 , "Cr0Fixed0" ),
50	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_Cr4Fixed0 , "Cr4Fixed0" ),
51	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_Intercept , "Intercept" ),
52	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_LongModeCS , "LongModeCS" ),
53	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_MsrFeatCtl , "MsrFeatCtl" ),
54	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_PtrAbnormal , "PtrAbnormal" ),
55	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_PtrAlign , "PtrAlign" ),
56	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_PtrMap , "PtrMap" ),
57	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_PtrReadPhys , "PtrReadPhys" ),
58	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_PtrWidth , "PtrWidth" ),
59	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_RealOrV86Mode , "RealOrV86Mode" ),
60	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_ShadowVmcs , "ShadowVmcs" ),
61	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_VmxAlreadyRoot , "VmxAlreadyRoot" ),
62	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_Vmxe , "Vmxe" ),
63	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_VmcsRevId , "VmcsRevId" ),
64	VMXV_DIAG_DESC(kVmxVDiag_Vmxon_VmxRootCpl , "VmxRootCpl" ),
65	/* VMXOFF. */
66	VMXV_DIAG_DESC(kVmxVDiag_Vmxoff_Cpl , "Cpl" ),
67	VMXV_DIAG_DESC(kVmxVDiag_Vmxoff_Intercept , "Intercept" ),
68	VMXV_DIAG_DESC(kVmxVDiag_Vmxoff_LongModeCS , "LongModeCS" ),
69	VMXV_DIAG_DESC(kVmxVDiag_Vmxoff_RealOrV86Mode , "RealOrV86Mode" ),
70	VMXV_DIAG_DESC(kVmxVDiag_Vmxoff_Vmxe , "Vmxe" ),
71	VMXV_DIAG_DESC(kVmxVDiag_Vmxoff_VmxRoot , "VmxRoot" ),
72	/* VMPTRLD. */
73	VMXV_DIAG_DESC(kVmxVDiag_Vmptrld_Cpl , "Cpl" ),
74	VMXV_DIAG_DESC(kVmxVDiag_Vmptrld_LongModeCS , "LongModeCS" ),
75	VMXV_DIAG_DESC(kVmxVDiag_Vmptrld_PtrAbnormal , "PtrAbnormal" ),
76	VMXV_DIAG_DESC(kVmxVDiag_Vmptrld_PtrAlign , "PtrAlign" ),
77	VMXV_DIAG_DESC(kVmxVDiag_Vmptrld_PtrMap , "PtrMap" ),
78	VMXV_DIAG_DESC(kVmxVDiag_Vmptrld_PtrReadPhys , "PtrReadPhys" ),
79	VMXV_DIAG_DESC(kVmxVDiag_Vmptrld_PtrVmxon , "PtrVmxon" ),
80	VMXV_DIAG_DESC(kVmxVDiag_Vmptrld_PtrWidth , "PtrWidth" ),
81	VMXV_DIAG_DESC(kVmxVDiag_Vmptrld_RealOrV86Mode , "RealOrV86Mode" ),
82	VMXV_DIAG_DESC(kVmxVDiag_Vmptrld_ShadowVmcs , "ShadowVmcs" ),
83	VMXV_DIAG_DESC(kVmxVDiag_Vmptrld_VmcsRevId , "VmcsRevId" ),
84	VMXV_DIAG_DESC(kVmxVDiag_Vmptrld_VmxRoot , "VmxRoot" ),
85	/* VMPTRST. */
86	VMXV_DIAG_DESC(kVmxVDiag_Vmptrst_Cpl , "Cpl" ),
87	VMXV_DIAG_DESC(kVmxVDiag_Vmptrst_LongModeCS , "LongModeCS" ),
88	VMXV_DIAG_DESC(kVmxVDiag_Vmptrst_PtrMap , "PtrMap" ),
89	VMXV_DIAG_DESC(kVmxVDiag_Vmptrst_RealOrV86Mode , "RealOrV86Mode" ),
90	VMXV_DIAG_DESC(kVmxVDiag_Vmptrst_VmxRoot , "VmxRoot" ),
91	/* VMCLEAR. */
92	VMXV_DIAG_DESC(kVmxVDiag_Vmclear_Cpl , "Cpl" ),
93	VMXV_DIAG_DESC(kVmxVDiag_Vmclear_LongModeCS , "LongModeCS" ),
94	VMXV_DIAG_DESC(kVmxVDiag_Vmclear_PtrAbnormal , "PtrAbnormal" ),
95	VMXV_DIAG_DESC(kVmxVDiag_Vmclear_PtrAlign , "PtrAlign" ),
96	VMXV_DIAG_DESC(kVmxVDiag_Vmclear_PtrMap , "PtrMap" ),
97	VMXV_DIAG_DESC(kVmxVDiag_Vmclear_PtrReadPhys , "PtrReadPhys" ),
98	VMXV_DIAG_DESC(kVmxVDiag_Vmclear_PtrVmxon , "PtrVmxon" ),
99	VMXV_DIAG_DESC(kVmxVDiag_Vmclear_PtrWidth , "PtrWidth" ),
100	VMXV_DIAG_DESC(kVmxVDiag_Vmclear_RealOrV86Mode , "RealOrV86Mode" ),
101	VMXV_DIAG_DESC(kVmxVDiag_Vmclear_VmxRoot , "VmxRoot" ),
102	/* VMWRITE. */
103	VMXV_DIAG_DESC(kVmxVDiag_Vmwrite_Cpl , "Cpl" ),
104	VMXV_DIAG_DESC(kVmxVDiag_Vmwrite_FieldInvalid , "FieldInvalid" ),
105	VMXV_DIAG_DESC(kVmxVDiag_Vmwrite_FieldRo , "FieldRo" ),
106	VMXV_DIAG_DESC(kVmxVDiag_Vmwrite_LinkPtrInvalid , "LinkPtrInvalid" ),
107	VMXV_DIAG_DESC(kVmxVDiag_Vmwrite_LongModeCS , "LongModeCS" ),
108	VMXV_DIAG_DESC(kVmxVDiag_Vmwrite_PtrInvalid , "PtrInvalid" ),
109	VMXV_DIAG_DESC(kVmxVDiag_Vmwrite_PtrMap , "PtrMap" ),
110	VMXV_DIAG_DESC(kVmxVDiag_Vmwrite_RealOrV86Mode , "RealOrV86Mode" ),
111	VMXV_DIAG_DESC(kVmxVDiag_Vmwrite_VmxRoot , "VmxRoot" ),
112	/* VMREAD. */
113	VMXV_DIAG_DESC(kVmxVDiag_Vmread_Cpl , "Cpl" ),
114	VMXV_DIAG_DESC(kVmxVDiag_Vmread_FieldInvalid , "FieldInvalid" ),
115	VMXV_DIAG_DESC(kVmxVDiag_Vmread_LinkPtrInvalid , "LinkPtrInvalid" ),
116	VMXV_DIAG_DESC(kVmxVDiag_Vmread_LongModeCS , "LongModeCS" ),
117	VMXV_DIAG_DESC(kVmxVDiag_Vmread_PtrInvalid , "PtrInvalid" ),
118	VMXV_DIAG_DESC(kVmxVDiag_Vmread_PtrMap , "PtrMap" ),
119	VMXV_DIAG_DESC(kVmxVDiag_Vmread_RealOrV86Mode , "RealOrV86Mode" ),
120	VMXV_DIAG_DESC(kVmxVDiag_Vmread_VmxRoot , "VmxRoot" ),
121	/* VMLAUNCH/VMRESUME. */
122	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrApicAccess , "AddrApicAccess" ),
123	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrEntryMsrLoad , "AddrEntryMsrLoad" ),
124	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrExitMsrLoad , "AddrExitMsrLoad" ),
125	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrExitMsrStore , "AddrExitMsrStore" ),
126	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrIoBitmapA , "AddrIoBitmapA" ),
127	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrIoBitmapB , "AddrIoBitmapB" ),
128	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrMsrBitmap , "AddrMsrBitmap" ),
129	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrVirtApicPage , "AddrVirtApicPage" ),
130	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrVmcsLinkPtr , "AddrVmcsLinkPtr" ),
131	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrVmreadBitmap , "AddrVmreadBitmap" ),
132	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrVmwriteBitmap , "AddrVmwriteBitmap" ),
133	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_ApicRegVirt , "ApicRegVirt" ),
134	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_BlocKMovSS , "BlockMovSS" ),
135	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_Cpl , "Cpl" ),
136	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_Cr3TargetCount , "Cr3TargetCount" ),
137	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_EntryCtlsAllowed1 , "EntryCtlsAllowed1" ),
138	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_EntryCtlsDisallowed0 , "EntryCtlsDisallowed0" ),
139	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_EntryInstrLen , "EntryInstrLen" ),
140	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_EntryInstrLenZero , "EntryInstrLenZero" ),
141	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_EntryIntInfoErrCodePe , "EntryIntInfoErrCodePe" ),
142	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_EntryIntInfoErrCodeVec , "EntryIntInfoErrCodeVec" ),
143	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_EntryIntInfoTypeVecRsvd , "EntryIntInfoTypeVecRsvd" ),
144	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_EntryXcptErrCodeRsvd , "EntryXcptErrCodeRsvd" ),
145	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_ExitCtlsAllowed1 , "ExitCtlsAllowed1" ),
146	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_ExitCtlsDisallowed0 , "ExitCtlsDisallowed0" ),
147	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestActStateHlt , "GuestActStateHlt" ),
148	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestActStateRsvd , "GuestActStateRsvd" ),
149	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestActStateShutdown , "GuestActStateShutdown" ),
150	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestActStateSsDpl , "GuestActStateSsDpl" ),
151	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestActStateStiMovSs , "GuestActStateStiMovSs" ),
152	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestCr0Fixed0 , "GuestCr0Fixed0" ),
153	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestCr0Fixed1 , "GuestCr0Fixed1" ),
154	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestCr0PgPe , "GuestCr0PgPe" ),
155	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestCr3 , "GuestCr3" ),
156	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestCr4Fixed0 , "GuestCr4Fixed0" ),
157	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestCr4Fixed1 , "GuestCr4Fixed1" ),
158	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestDebugCtl , "GuestDebugCtl" ),
159	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestDr7 , "GuestDr7" ),
160	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestEferMsr , "GuestEferMsr" ),
161	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestEferMsrRsvd , "GuestEferMsrRsvd" ),
162	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestGdtrBase , "GuestGdtrBase" ),
163	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestGdtrLimit , "GuestGdtrLimit" ),
164	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestIdtrBase , "GuestIdtrBase" ),
165	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestIdtrLimit , "GuestIdtrLimit" ),
166	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestIntStateEnclave , "GuestIntStateEnclave" ),
167	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestIntStateExtInt , "GuestIntStateExtInt" ),
168	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestIntStateNmi , "GuestIntStateNmi" ),
169	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestIntStateRFlagsSti , "GuestIntStateRFlagsSti" ),
170	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestIntStateRsvd , "GuestIntStateRsvd" ),
171	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestIntStateSmi , "GuestIntStateSmi" ),
172	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestIntStateStiMovSs , "GuestIntStateStiMovSs" ),
173	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestIntStateVirtNmi , "GuestIntStateVirtNmi" ),
174	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPae , "GuestPae" ),
175	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPatMsr , "GuestPatMsr" ),
176	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPcide , "GuestPcide" ),
177	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPdpteCr3ReadPhys , "GuestPdpteCr3ReadPhys" ),
178	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPdpte0Rsvd , "GuestPdpte0Rsvd" ),
179	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPdpte1Rsvd , "GuestPdpte1Rsvd" ),
180	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPdpte2Rsvd , "GuestPdpte2Rsvd" ),
181	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPdpte3Rsvd , "GuestPdpte3Rsvd" ),
182	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPndDbgXcptBsNoTf , "GuestPndDbgXcptBsNoTf" ),
183	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPndDbgXcptBsTf , "GuestPndDbgXcptBsTf" ),
184	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPndDbgXcptRsvd , "GuestPndDbgXcptRsvd" ),
185	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPndDbgXcptRtm , "GuestPndDbgXcptRtm" ),
186	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestRip , "GuestRip" ),
187	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestRipRsvd , "GuestRipRsvd" ),
188	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestRFlagsIf , "GuestRFlagsIf" ),
189	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestRFlagsRsvd , "GuestRFlagsRsvd" ),
190	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestRFlagsVm , "GuestRFlagsVm" ),
191	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrCsDefBig , "GuestSegAttrCsDefBig" ),
192	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrCsDplEqSs , "GuestSegAttrCsDplEqSs" ),
193	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrCsDplLtSs , "GuestSegAttrCsDplLtSs" ),
194	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrCsDplZero , "GuestSegAttrCsDplZero" ),
195	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrCsType , "GuestSegAttrCsType" ),
196	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrCsTypeRead , "GuestSegAttrCsTypeRead" ),
197	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrDescTypeCs , "GuestSegAttrDescTypeCs" ),
198	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrDescTypeDs , "GuestSegAttrDescTypeDs" ),
199	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrDescTypeEs , "GuestSegAttrDescTypeEs" ),
200	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrDescTypeFs , "GuestSegAttrDescTypeFs" ),
201	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrDescTypeGs , "GuestSegAttrDescTypeGs" ),
202	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrDescTypeSs , "GuestSegAttrDescTypeSs" ),
203	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrDplRplCs , "GuestSegAttrDplRplCs" ),
204	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrDplRplDs , "GuestSegAttrDplRplDs" ),
205	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrDplRplEs , "GuestSegAttrDplRplEs" ),
206	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrDplRplFs , "GuestSegAttrDplRplFs" ),
207	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrDplRplGs , "GuestSegAttrDplRplGs" ),
208	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrDplRplSs , "GuestSegAttrDplRplSs" ),
209	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrGranCs , "GuestSegAttrGranCs" ),
210	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrGranDs , "GuestSegAttrGranDs" ),
211	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrGranEs , "GuestSegAttrGranEs" ),
212	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrGranFs , "GuestSegAttrGranFs" ),
213	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrGranGs , "GuestSegAttrGranGs" ),
214	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrGranSs , "GuestSegAttrGranSs" ),
215	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrLdtrDescType , "GuestSegAttrLdtrDescType" ),
216	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrLdtrGran , "GuestSegAttrLdtrGran" ),
217	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrLdtrPresent , "GuestSegAttrLdtrPresent" ),
218	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrLdtrRsvd , "GuestSegAttrLdtrRsvd" ),
219	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrLdtrType , "GuestSegAttrLdtrType" ),
220	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrPresentCs , "GuestSegAttrPresentCs" ),
221	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrPresentDs , "GuestSegAttrPresentDs" ),
222	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrPresentEs , "GuestSegAttrPresentEs" ),
223	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrPresentFs , "GuestSegAttrPresentFs" ),
224	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrPresentGs , "GuestSegAttrPresentGs" ),
225	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrPresentSs , "GuestSegAttrPresentSs" ),
226	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrRsvdCs , "GuestSegAttrRsvdCs" ),
227	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrRsvdDs , "GuestSegAttrRsvdDs" ),
228	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrRsvdEs , "GuestSegAttrRsvdEs" ),
229	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrRsvdFs , "GuestSegAttrRsvdFs" ),
230	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrRsvdGs , "GuestSegAttrRsvdGs" ),
231	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrRsvdSs , "GuestSegAttrRsvdSs" ),
232	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrSsDplEqRpl , "GuestSegAttrSsDplEqRpl" ),
233	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrSsDplZero , "GuestSegAttrSsDplZero " ),
234	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrSsType , "GuestSegAttrSsType" ),
235	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrTrDescType , "GuestSegAttrTrDescType" ),
236	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrTrGran , "GuestSegAttrTrGran" ),
237	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrTrPresent , "GuestSegAttrTrPresent" ),
238	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrTrRsvd , "GuestSegAttrTrRsvd" ),
239	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrTrType , "GuestSegAttrTrType" ),
240	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrTrUnusable , "GuestSegAttrTrUnusable" ),
241	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrTypeAccCs , "GuestSegAttrTypeAccCs" ),
242	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrTypeAccDs , "GuestSegAttrTypeAccDs" ),
243	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrTypeAccEs , "GuestSegAttrTypeAccEs" ),
244	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrTypeAccFs , "GuestSegAttrTypeAccFs" ),
245	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrTypeAccGs , "GuestSegAttrTypeAccGs" ),
246	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrTypeAccSs , "GuestSegAttrTypeAccSs" ),
247	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrV86Cs , "GuestSegAttrV86Cs" ),
248	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrV86Ds , "GuestSegAttrV86Ds" ),
249	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrV86Es , "GuestSegAttrV86Es" ),
250	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrV86Fs , "GuestSegAttrV86Fs" ),
251	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrV86Gs , "GuestSegAttrV86Gs" ),
252	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegAttrV86Ss , "GuestSegAttrV86Ss" ),
253	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegBaseCs , "GuestSegBaseCs" ),
254	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegBaseDs , "GuestSegBaseDs" ),
255	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegBaseEs , "GuestSegBaseEs" ),
256	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegBaseFs , "GuestSegBaseFs" ),
257	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegBaseGs , "GuestSegBaseGs" ),
258	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegBaseLdtr , "GuestSegBaseLdtr" ),
259	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegBaseSs , "GuestSegBaseSs" ),
260	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegBaseTr , "GuestSegBaseTr" ),
261	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegBaseV86Cs , "GuestSegBaseV86Cs" ),
262	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegBaseV86Ds , "GuestSegBaseV86Ds" ),
263	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegBaseV86Es , "GuestSegBaseV86Es" ),
264	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegBaseV86Fs , "GuestSegBaseV86Fs" ),
265	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegBaseV86Gs , "GuestSegBaseV86Gs" ),
266	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegBaseV86Ss , "GuestSegBaseV86Ss" ),
267	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegLimitV86Cs , "GuestSegLimitV86Cs" ),
268	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegLimitV86Ds , "GuestSegLimitV86Ds" ),
269	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegLimitV86Es , "GuestSegLimitV86Es" ),
270	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegLimitV86Fs , "GuestSegLimitV86Fs" ),
271	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegLimitV86Gs , "GuestSegLimitV86Gs" ),
272	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegLimitV86Ss , "GuestSegLimitV86Ss" ),
273	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegSelCsSsRpl , "GuestSegSelCsSsRpl" ),
274	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegSelLdtr , "GuestSegSelLdtr" ),
275	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegSelTr , "GuestSegSelTr" ),
276	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSysenterEspEip , "GuestSysenterEspEip" ),
277	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VmcsLinkPtrCurVmcs , "VmcsLinkPtrCurVmcs" ),
278	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VmcsLinkPtrReadPhys , "VmcsLinkPtrReadPhys" ),
279	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VmcsLinkPtrRevId , "VmcsLinkPtrRevId" ),
280	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VmcsLinkPtrShadow , "VmcsLinkPtrShadow" ),
281	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostCr0Fixed0 , "HostCr0Fixed0" ),
282	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostCr0Fixed1 , "HostCr0Fixed1" ),
283	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostCr3 , "HostCr3" ),
284	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostCr4Fixed0 , "HostCr4Fixed0" ),
285	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostCr4Fixed1 , "HostCr4Fixed1" ),
286	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostCr4Pae , "HostCr4Pae" ),
287	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostCr4Pcide , "HostCr4Pcide" ),
288	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostCsTr , "HostCsTr" ),
289	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostEferMsr , "HostEferMsr" ),
290	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostEferMsrRsvd , "HostEferMsrRsvd" ),
291	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostGuestLongMode , "HostGuestLongMode" ),
292	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostGuestLongModeNoCpu , "HostGuestLongModeNoCpu" ),
293	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostLongMode , "HostLongMode" ),
294	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostPatMsr , "HostPatMsr" ),
295	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostRip , "HostRip" ),
296	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostRipRsvd , "HostRipRsvd" ),
297	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostSel , "HostSel" ),
298	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostSegBase , "HostSegBase" ),
299	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostSs , "HostSs" ),
300	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostSysenterEspEip , "HostSysenterEspEip" ),
301	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_LongModeCS , "LongModeCS" ),
302	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_NmiWindowExit , "NmiWindowExit" ),
303	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_PinCtlsAllowed1 , "PinCtlsAllowed1" ),
304	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_PinCtlsDisallowed0 , "PinCtlsDisallowed0" ),
305	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_ProcCtlsAllowed1 , "ProcCtlsAllowed1" ),
306	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_ProcCtlsDisallowed0 , "ProcCtlsDisallowed0" ),
307	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_ProcCtls2Allowed1 , "ProcCtls2Allowed1" ),
308	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_ProcCtls2Disallowed0 , "ProcCtls2Disallowed0" ),
309	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_PtrInvalid , "PtrInvalid" ),
310	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_PtrReadPhys , "PtrReadPhys" ),
311	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_RealOrV86Mode , "RealOrV86Mode" ),
312	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_SavePreemptTimer , "SavePreemptTimer" ),
313	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_TprThresholdRsvd , "TprThresholdRsvd" ),
314	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_TprThresholdVTpr , "TprThresholdVTpr" ),
315	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VirtApicPagePtrReadPhys , "VirtApicPageReadPhys" ),
316	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VirtIntDelivery , "VirtIntDelivery" ),
317	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VirtNmi , "VirtNmi" ),
318	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VirtX2ApicTprShadow , "VirtX2ApicTprShadow" ),
319	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VirtX2ApicVirtApic , "VirtX2ApicVirtApic" ),
320	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VmcsClear , "VmcsClear" ),
321	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VmcsLaunch , "VmcsLaunch" ),
322	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VmreadBitmapPtrReadPhys , "VmreadBitmapPtrReadPhys" ),
323	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VmwriteBitmapPtrReadPhys , "VmwriteBitmapPtrReadPhys" ),
324	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VmxRoot , "VmxRoot" ),
325	VMXV_DIAG_DESC(kVmxVDiag_Vmentry_Vpid , "Vpid" )
326	/* kVmxVDiag_End */
327	};
328	AssertCompile(RT_ELEMENTS(g_apszVmxVDiagDesc) == kVmxVDiag_End);
329	#undef VMXV_DIAG_DESC
330
331
332	/**
333	* Gets a copy of the VMX host MSRs that were read by HM during ring-0
334	* initialization.
335	*
336	* @return VBox status code.
337	* @param pVM The cross context VM structure.
338	* @param pVmxMsrs Where to store the VMXMSRS struct (only valid when
339	* VINF_SUCCESS is returned).
340	*
341	* @remarks Caller needs to take care not to call this function too early. Call
342	* after HM initialization is fully complete.
343	*/
344	VMM_INT_DECL(int) HMVmxGetHostMsrs(PVM pVM, PVMXMSRS pVmxMsrs)
345	{
346	AssertPtrReturn(pVM, VERR_INVALID_PARAMETER);
347	AssertPtrReturn(pVmxMsrs, VERR_INVALID_PARAMETER);
348	if (pVM->hm.s.vmx.fSupported)
349	{
350	*pVmxMsrs = pVM->hm.s.vmx.Msrs;
351	return VINF_SUCCESS;
352	}
353	return VERR_VMX_NOT_SUPPORTED;
354	}
355
356
357	/**
358	* Gets the specified VMX host MSR that was read by HM during ring-0
359	* initialization.
360	*
361	* @return VBox status code.
362	* @param pVM The cross context VM structure.
363	* @param idMsr The MSR.
364	* @param puValue Where to store the MSR value (only updated when VINF_SUCCESS
365	* is returned).
366	*
367	* @remarks Caller needs to take care not to call this function too early. Call
368	* after HM initialization is fully complete.
369	*/
370	VMM_INT_DECL(int) HMVmxGetHostMsr(PVM pVM, uint32_t idMsr, uint64_t *puValue)
371	{
372	AssertPtrReturn(pVM, VERR_INVALID_PARAMETER);
373	AssertPtrReturn(puValue, VERR_INVALID_PARAMETER);
374
375	if (pVM->hm.s.vmx.fSupported)
376	{
377	PCVMXMSRS pVmxMsrs = &pVM->hm.s.vmx.Msrs;
378	switch (idMsr)
379	{
380	case MSR_IA32_FEATURE_CONTROL: *puValue = pVmxMsrs->u64FeatCtrl; break;
381	case MSR_IA32_VMX_BASIC: *puValue = pVmxMsrs->u64Basic; break;
382	case MSR_IA32_VMX_PINBASED_CTLS: *puValue = pVmxMsrs->PinCtls.u; break;
383	case MSR_IA32_VMX_PROCBASED_CTLS: *puValue = pVmxMsrs->ProcCtls.u; break;
384	case MSR_IA32_VMX_PROCBASED_CTLS2: *puValue = pVmxMsrs->ProcCtls2.u; break;
385	case MSR_IA32_VMX_EXIT_CTLS: *puValue = pVmxMsrs->ExitCtls.u; break;
386	case MSR_IA32_VMX_ENTRY_CTLS: *puValue = pVmxMsrs->EntryCtls.u; break;
387	case MSR_IA32_VMX_TRUE_PINBASED_CTLS: *puValue = pVmxMsrs->TruePinCtls.u; break;
388	case MSR_IA32_VMX_TRUE_PROCBASED_CTLS: *puValue = pVmxMsrs->TrueProcCtls.u; break;
389	case MSR_IA32_VMX_TRUE_ENTRY_CTLS: *puValue = pVmxMsrs->TrueEntryCtls.u; break;
390	case MSR_IA32_VMX_TRUE_EXIT_CTLS: *puValue = pVmxMsrs->TrueExitCtls.u; break;
391	case MSR_IA32_VMX_MISC: *puValue = pVmxMsrs->u64Misc; break;
392	case MSR_IA32_VMX_CR0_FIXED0: *puValue = pVmxMsrs->u64Cr0Fixed0; break;
393	case MSR_IA32_VMX_CR0_FIXED1: *puValue = pVmxMsrs->u64Cr0Fixed1; break;
394	case MSR_IA32_VMX_CR4_FIXED0: *puValue = pVmxMsrs->u64Cr4Fixed0; break;
395	case MSR_IA32_VMX_CR4_FIXED1: *puValue = pVmxMsrs->u64Cr4Fixed1; break;
396	case MSR_IA32_VMX_VMCS_ENUM: *puValue = pVmxMsrs->u64VmcsEnum; break;
397	case MSR_IA32_VMX_VMFUNC: *puValue = pVmxMsrs->u64VmFunc; break;
398	case MSR_IA32_VMX_EPT_VPID_CAP: *puValue = pVmxMsrs->u64EptVpidCaps; break;
399	default:
400	{
401	AssertMsgFailed(("Invalid MSR %#x\n", idMsr));
402	return VERR_NOT_FOUND;
403	}
404	}
405	return VINF_SUCCESS;
406	}
407	return VERR_VMX_NOT_SUPPORTED;
408	}
409
410
411	/**
412	* Gets the description of a VMX instruction/Vm-exit diagnostic.
413	*
414	* @returns The descriptive string.
415	* @param enmDiag The VMX diagnostic.
416	*/
417	VMM_INT_DECL(const char *) HMVmxGetDiagDesc(VMXVDIAG enmDiag)
418	{
419	if (RT_LIKELY((unsigned)enmDiag < RT_ELEMENTS(g_apszVmxVDiagDesc)))
420	return g_apszVmxVDiagDesc[enmDiag];
421	return "Unknown/invalid";
422	}
423
424
425	/**
426	* Checks if a code selector (CS) is suitable for execution using hardware-assisted
427	* VMX when unrestricted execution isn't available.
428	*
429	* @returns true if selector is suitable for VMX, otherwise
430	* false.
431	* @param pSel Pointer to the selector to check (CS).
432	* @param uStackDpl The CPL, aka the DPL of the stack segment.
433	*/
434	static bool hmVmxIsCodeSelectorOk(PCCPUMSELREG pSel, unsigned uStackDpl)
435	{
436	/*
437	* Segment must be an accessed code segment, it must be present and it must
438	* be usable.
439	* Note! These are all standard requirements and if CS holds anything else
440	* we've got buggy code somewhere!
441	*/
442	AssertCompile(X86DESCATTR_TYPE == 0xf);
443	AssertMsgReturn( (pSel->Attr.u & (X86_SEL_TYPE_ACCESSED \| X86_SEL_TYPE_CODE \| X86DESCATTR_DT \| X86DESCATTR_P \| X86DESCATTR_UNUSABLE))
444	== (X86_SEL_TYPE_ACCESSED \| X86_SEL_TYPE_CODE \| X86DESCATTR_DT \| X86DESCATTR_P),
445	("%#x\n", pSel->Attr.u),
446	false);
447
448	/* For conforming segments, CS.DPL must be <= SS.DPL, while CS.DPL
449	must equal SS.DPL for non-confroming segments.
450	Note! This is also a hard requirement like above. */
451	AssertMsgReturn( pSel->Attr.n.u4Type & X86_SEL_TYPE_CONF
452	? pSel->Attr.n.u2Dpl <= uStackDpl
453	: pSel->Attr.n.u2Dpl == uStackDpl,
454	("u4Type=%#x u2Dpl=%u uStackDpl=%u\n", pSel->Attr.n.u4Type, pSel->Attr.n.u2Dpl, uStackDpl),
455	false);
456
457	/*
458	* The following two requirements are VT-x specific:
459	* - G bit must be set if any high limit bits are set.
460	* - G bit must be clear if any low limit bits are clear.
461	*/
462	if ( ((pSel->u32Limit & 0xfff00000) == 0x00000000 \|\| pSel->Attr.n.u1Granularity)
463	&& ((pSel->u32Limit & 0x00000fff) == 0x00000fff \|\| !pSel->Attr.n.u1Granularity))
464	return true;
465	return false;
466	}
467
468
469	/**
470	* Checks if a data selector (DS/ES/FS/GS) is suitable for execution using
471	* hardware-assisted VMX when unrestricted execution isn't available.
472	*
473	* @returns true if selector is suitable for VMX, otherwise
474	* false.
475	* @param pSel Pointer to the selector to check
476	* (DS/ES/FS/GS).
477	*/
478	static bool hmVmxIsDataSelectorOk(PCCPUMSELREG pSel)
479	{
480	/*
481	* Unusable segments are OK. These days they should be marked as such, as
482	* but as an alternative we for old saved states and AMD<->VT-x migration
483	* we also treat segments with all the attributes cleared as unusable.
484	*/
485	if (pSel->Attr.n.u1Unusable \|\| !pSel->Attr.u)
486	return true;
487
488	/** @todo tighten these checks. Will require CPUM load adjusting. */
489
490	/* Segment must be accessed. */
491	if (pSel->Attr.u & X86_SEL_TYPE_ACCESSED)
492	{
493	/* Code segments must also be readable. */
494	if ( !(pSel->Attr.u & X86_SEL_TYPE_CODE)
495	\|\| (pSel->Attr.u & X86_SEL_TYPE_READ))
496	{
497	/* The S bit must be set. */
498	if (pSel->Attr.n.u1DescType)
499	{
500	/* Except for conforming segments, DPL >= RPL. */
501	if ( pSel->Attr.n.u2Dpl >= (pSel->Sel & X86_SEL_RPL)
502	\|\| pSel->Attr.n.u4Type >= X86_SEL_TYPE_ER_ACC)
503	{
504	/* Segment must be present. */
505	if (pSel->Attr.n.u1Present)
506	{
507	/*
508	* The following two requirements are VT-x specific:
509	* - G bit must be set if any high limit bits are set.
510	* - G bit must be clear if any low limit bits are clear.
511	*/
512	if ( ((pSel->u32Limit & 0xfff00000) == 0x00000000 \|\| pSel->Attr.n.u1Granularity)
513	&& ((pSel->u32Limit & 0x00000fff) == 0x00000fff \|\| !pSel->Attr.n.u1Granularity))
514	return true;
515	}
516	}
517	}
518	}
519	}
520
521	return false;
522	}
523
524
525	/**
526	* Checks if the stack selector (SS) is suitable for execution using
527	* hardware-assisted VMX when unrestricted execution isn't available.
528	*
529	* @returns true if selector is suitable for VMX, otherwise
530	* false.
531	* @param pSel Pointer to the selector to check (SS).
532	*/
533	static bool hmVmxIsStackSelectorOk(PCCPUMSELREG pSel)
534	{
535	/*
536	* Unusable segments are OK. These days they should be marked as such, as
537	* but as an alternative we for old saved states and AMD<->VT-x migration
538	* we also treat segments with all the attributes cleared as unusable.
539	*/
540	/** @todo r=bird: actually all zeroes isn't gonna cut it... SS.DPL == CPL. */
541	if (pSel->Attr.n.u1Unusable \|\| !pSel->Attr.u)
542	return true;
543
544	/*
545	* Segment must be an accessed writable segment, it must be present.
546	* Note! These are all standard requirements and if SS holds anything else
547	* we've got buggy code somewhere!
548	*/
549	AssertCompile(X86DESCATTR_TYPE == 0xf);
550	AssertMsgReturn( (pSel->Attr.u & (X86_SEL_TYPE_ACCESSED \| X86_SEL_TYPE_WRITE \| X86DESCATTR_DT \| X86DESCATTR_P \| X86_SEL_TYPE_CODE))
551	== (X86_SEL_TYPE_ACCESSED \| X86_SEL_TYPE_WRITE \| X86DESCATTR_DT \| X86DESCATTR_P),
552	("%#x\n", pSel->Attr.u), false);
553
554	/* DPL must equal RPL.
555	Note! This is also a hard requirement like above. */
556	AssertMsgReturn(pSel->Attr.n.u2Dpl == (pSel->Sel & X86_SEL_RPL),
557	("u2Dpl=%u Sel=%#x\n", pSel->Attr.n.u2Dpl, pSel->Sel), false);
558
559	/*
560	* The following two requirements are VT-x specific:
561	* - G bit must be set if any high limit bits are set.
562	* - G bit must be clear if any low limit bits are clear.
563	*/
564	if ( ((pSel->u32Limit & 0xfff00000) == 0x00000000 \|\| pSel->Attr.n.u1Granularity)
565	&& ((pSel->u32Limit & 0x00000fff) == 0x00000fff \|\| !pSel->Attr.n.u1Granularity))
566	return true;
567	return false;
568	}
569
570
571	/**
572	* Checks if the guest is in a suitable state for hardware-assisted VMX execution.
573	*
574	* @returns @c true if it is suitable, @c false otherwise.
575	* @param pVCpu The cross context virtual CPU structure.
576	* @param pCtx Pointer to the guest CPU context.
577	*
578	* @remarks @a pCtx can be a partial context and thus may not be necessarily the
579	* same as pVCpu->cpum.GstCtx! Thus don't eliminate the @a pCtx parameter.
580	* Secondly, if additional checks are added that require more of the CPU
581	* state, make sure REM (which supplies a partial state) is updated.
582	*/
583	VMM_INT_DECL(bool) HMVmxCanExecuteGuest(PVMCPU pVCpu, PCCPUMCTX pCtx)
584	{
585	PVM pVM = pVCpu->CTX_SUFF(pVM);
586	Assert(HMIsEnabled(pVM));
587	Assert(!CPUMIsGuestVmxEnabled(pCtx));
588	Assert( ( pVM->hm.s.vmx.fUnrestrictedGuest && !pVM->hm.s.vmx.pRealModeTSS)
589	\|\| (!pVM->hm.s.vmx.fUnrestrictedGuest && pVM->hm.s.vmx.pRealModeTSS));
590
591	pVCpu->hm.s.fActive = false;
592
593	bool const fSupportsRealMode = pVM->hm.s.vmx.fUnrestrictedGuest \|\| PDMVmmDevHeapIsEnabled(pVM);
594	if (!pVM->hm.s.vmx.fUnrestrictedGuest)
595	{
596	/*
597	* The VMM device heap is a requirement for emulating real mode or protected mode without paging with the unrestricted
598	* guest execution feature is missing (VT-x only).
599	*/
600	if (fSupportsRealMode)
601	{
602	if (CPUMIsGuestInRealModeEx(pCtx))
603	{
604	/*
605	* In V86 mode (VT-x or not), the CPU enforces real-mode compatible selector
606	* bases and limits, i.e. limit must be 64K and base must be selector * 16.
607	* If this is not true, we cannot execute real mode as V86 and have to fall
608	* back to emulation.
609	*/
610	if ( pCtx->cs.Sel != (pCtx->cs.u64Base >> 4)
611	\|\| pCtx->ds.Sel != (pCtx->ds.u64Base >> 4)
612	\|\| pCtx->es.Sel != (pCtx->es.u64Base >> 4)
613	\|\| pCtx->ss.Sel != (pCtx->ss.u64Base >> 4)
614	\|\| pCtx->fs.Sel != (pCtx->fs.u64Base >> 4)
615	\|\| pCtx->gs.Sel != (pCtx->gs.u64Base >> 4))
616	{
617	STAM_COUNTER_INC(&pVCpu->hm.s.StatVmxCheckBadRmSelBase);
618	return false;
619	}
620	if ( (pCtx->cs.u32Limit != 0xffff)
621	\|\| (pCtx->ds.u32Limit != 0xffff)
622	\|\| (pCtx->es.u32Limit != 0xffff)
623	\|\| (pCtx->ss.u32Limit != 0xffff)
624	\|\| (pCtx->fs.u32Limit != 0xffff)
625	\|\| (pCtx->gs.u32Limit != 0xffff))
626	{
627	STAM_COUNTER_INC(&pVCpu->hm.s.StatVmxCheckBadRmSelLimit);
628	return false;
629	}
630	STAM_COUNTER_INC(&pVCpu->hm.s.StatVmxCheckRmOk);
631	}
632	else
633	{
634	/*
635	* Verify the requirements for executing code in protected mode. VT-x can't
636	* handle the CPU state right after a switch from real to protected mode
637	* (all sorts of RPL & DPL assumptions).
638	*/
639	if (pVCpu->hm.s.vmx.fWasInRealMode)
640	{
641	/** @todo If guest is in V86 mode, these checks should be different! */
642	if ((pCtx->cs.Sel & X86_SEL_RPL) != (pCtx->ss.Sel & X86_SEL_RPL))
643	{
644	STAM_COUNTER_INC(&pVCpu->hm.s.StatVmxCheckBadRpl);
645	return false;
646	}
647	if ( !hmVmxIsCodeSelectorOk(&pCtx->cs, pCtx->ss.Attr.n.u2Dpl)
648	\|\| !hmVmxIsDataSelectorOk(&pCtx->ds)
649	\|\| !hmVmxIsDataSelectorOk(&pCtx->es)
650	\|\| !hmVmxIsDataSelectorOk(&pCtx->fs)
651	\|\| !hmVmxIsDataSelectorOk(&pCtx->gs)
652	\|\| !hmVmxIsStackSelectorOk(&pCtx->ss))
653	{
654	STAM_COUNTER_INC(&pVCpu->hm.s.StatVmxCheckBadSel);
655	return false;
656	}
657	}
658	/* VT-x also chokes on invalid TR or LDTR selectors (minix). */
659	if (pCtx->gdtr.cbGdt)
660	{
661	if ((pCtx->tr.Sel \| X86_SEL_RPL_LDT) > pCtx->gdtr.cbGdt)
662	{
663	STAM_COUNTER_INC(&pVCpu->hm.s.StatVmxCheckBadTr);
664	return false;
665	}
666	else if ((pCtx->ldtr.Sel \| X86_SEL_RPL_LDT) > pCtx->gdtr.cbGdt)
667	{
668	STAM_COUNTER_INC(&pVCpu->hm.s.StatVmxCheckBadLdt);
669	return false;
670	}
671	}
672	STAM_COUNTER_INC(&pVCpu->hm.s.StatVmxCheckPmOk);
673	}
674	}
675	else
676	{
677	if ( !CPUMIsGuestInLongModeEx(pCtx)
678	&& !pVM->hm.s.vmx.fUnrestrictedGuest)
679	{
680	if ( !pVM->hm.s.fNestedPaging /* Requires a fake PD for real and protected mode without paging - stored in the VMM device heap */
681	\|\| CPUMIsGuestInRealModeEx(pCtx)) /* Requires a fake TSS for real mode - stored in the VMM device heap */
682	return false;
683
684	/* Too early for VT-x; Solaris guests will fail with a guru meditation otherwise; same for XP. */
685	if (pCtx->idtr.pIdt == 0 \|\| pCtx->idtr.cbIdt == 0 \|\| pCtx->tr.Sel == 0)
686	return false;
687
688	/*
689	* The guest is about to complete the switch to protected mode. Wait a bit longer.
690	* Windows XP; switch to protected mode; all selectors are marked not present
691	* in the hidden registers (possible recompiler bug; see load_seg_vm).
692	*/
693	/** @todo Is this supposed recompiler bug still relevant with IEM? */
694	if (pCtx->cs.Attr.n.u1Present == 0)
695	return false;
696	if (pCtx->ss.Attr.n.u1Present == 0)
697	return false;
698
699	/*
700	* Windows XP: possible same as above, but new recompiler requires new
701	* heuristics? VT-x doesn't seem to like something about the guest state and
702	* this stuff avoids it.
703	*/
704	/** @todo This check is actually wrong, it doesn't take the direction of the
705	* stack segment into account. But, it does the job for now. */
706	if (pCtx->rsp >= pCtx->ss.u32Limit)
707	return false;
708	}
709	}
710	}
711
712	if (pVM->hm.s.vmx.fEnabled)
713	{
714	uint32_t uCr0Mask;
715
716	/* If bit N is set in cr0_fixed0, then it must be set in the guest's cr0. */
717	uCr0Mask = (uint32_t)pVM->hm.s.vmx.Msrs.u64Cr0Fixed0;
718
719	/* We ignore the NE bit here on purpose; see HMR0.cpp for details. */
720	uCr0Mask &= ~X86_CR0_NE;
721
722	if (fSupportsRealMode)
723	{
724	/* We ignore the PE & PG bits here on purpose; we emulate real and protected mode without paging. */
725	uCr0Mask &= ~(X86_CR0_PG \| X86_CR0_PE);
726	}
727	else
728	{
729	/* We support protected mode without paging using identity mapping. */
730	uCr0Mask &= ~X86_CR0_PG;
731	}
732	if ((pCtx->cr0 & uCr0Mask) != uCr0Mask)
733	return false;
734
735	/* If bit N is cleared in cr0_fixed1, then it must be zero in the guest's cr0. */
736	uCr0Mask = (uint32_t)~pVM->hm.s.vmx.Msrs.u64Cr0Fixed1;
737	if ((pCtx->cr0 & uCr0Mask) != 0)
738	return false;
739
740	/* If bit N is set in cr4_fixed0, then it must be set in the guest's cr4. */
741	uCr0Mask = (uint32_t)pVM->hm.s.vmx.Msrs.u64Cr4Fixed0;
742	uCr0Mask &= ~X86_CR4_VMXE;
743	if ((pCtx->cr4 & uCr0Mask) != uCr0Mask)
744	return false;
745
746	/* If bit N is cleared in cr4_fixed1, then it must be zero in the guest's cr4. */
747	uCr0Mask = (uint32_t)~pVM->hm.s.vmx.Msrs.u64Cr4Fixed1;
748	if ((pCtx->cr4 & uCr0Mask) != 0)
749	return false;
750
751	pVCpu->hm.s.fActive = true;
752	return true;
753	}
754
755	return false;
756	}
757

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source: vbox/trunk/src/VBox/VMM/VMMAll/HMVMXAll.cpp@ 74204

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