VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp@ 80309

Last change on this file since 80309 was 80268, checked in by vboxsync, 5 years ago

VMM: Refactoring VMMAll/* to use VMCC & VMMCPUCC. bugref:9217
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1/* $Id: IEMAllAImplC.cpp 80268 2019-08-14 11:25:13Z vboxsync $ */
2/** @file
3 * IEM - Instruction Implementation in Assembly, portable C variant.
4 */
5
6/*
7 * Copyright (C) 2011-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define VBOX_BUGREF_9217_PART_I
23#include "IEMInternal.h"
24#include <VBox/vmm/vmcc.h>
25#include <VBox/err.h>
26#include <iprt/x86.h>
27#include <iprt/uint128.h>
28
29
30/*********************************************************************************************************************************
31* Global Variables *
32*********************************************************************************************************************************/
33#ifdef RT_ARCH_X86
34/**
35 * Parity calculation table.
36 *
37 * The generator code:
38 * @code
39 * #include <stdio.h>
40 *
41 * int main()
42 * {
43 * unsigned b;
44 * for (b = 0; b < 256; b++)
45 * {
46 * int cOnes = ( b & 1)
47 * + ((b >> 1) & 1)
48 * + ((b >> 2) & 1)
49 * + ((b >> 3) & 1)
50 * + ((b >> 4) & 1)
51 * + ((b >> 5) & 1)
52 * + ((b >> 6) & 1)
53 * + ((b >> 7) & 1);
54 * printf(" /" "* %#04x = %u%u%u%u%u%u%u%ub *" "/ %s,\n",
55 * b,
56 * (b >> 7) & 1,
57 * (b >> 6) & 1,
58 * (b >> 5) & 1,
59 * (b >> 4) & 1,
60 * (b >> 3) & 1,
61 * (b >> 2) & 1,
62 * (b >> 1) & 1,
63 * b & 1,
64 * cOnes & 1 ? "0" : "X86_EFL_PF");
65 * }
66 * return 0;
67 * }
68 * @endcode
69 */
70static uint8_t const g_afParity[256] =
71{
72 /* 0000 = 00000000b */ X86_EFL_PF,
73 /* 0x01 = 00000001b */ 0,
74 /* 0x02 = 00000010b */ 0,
75 /* 0x03 = 00000011b */ X86_EFL_PF,
76 /* 0x04 = 00000100b */ 0,
77 /* 0x05 = 00000101b */ X86_EFL_PF,
78 /* 0x06 = 00000110b */ X86_EFL_PF,
79 /* 0x07 = 00000111b */ 0,
80 /* 0x08 = 00001000b */ 0,
81 /* 0x09 = 00001001b */ X86_EFL_PF,
82 /* 0x0a = 00001010b */ X86_EFL_PF,
83 /* 0x0b = 00001011b */ 0,
84 /* 0x0c = 00001100b */ X86_EFL_PF,
85 /* 0x0d = 00001101b */ 0,
86 /* 0x0e = 00001110b */ 0,
87 /* 0x0f = 00001111b */ X86_EFL_PF,
88 /* 0x10 = 00010000b */ 0,
89 /* 0x11 = 00010001b */ X86_EFL_PF,
90 /* 0x12 = 00010010b */ X86_EFL_PF,
91 /* 0x13 = 00010011b */ 0,
92 /* 0x14 = 00010100b */ X86_EFL_PF,
93 /* 0x15 = 00010101b */ 0,
94 /* 0x16 = 00010110b */ 0,
95 /* 0x17 = 00010111b */ X86_EFL_PF,
96 /* 0x18 = 00011000b */ X86_EFL_PF,
97 /* 0x19 = 00011001b */ 0,
98 /* 0x1a = 00011010b */ 0,
99 /* 0x1b = 00011011b */ X86_EFL_PF,
100 /* 0x1c = 00011100b */ 0,
101 /* 0x1d = 00011101b */ X86_EFL_PF,
102 /* 0x1e = 00011110b */ X86_EFL_PF,
103 /* 0x1f = 00011111b */ 0,
104 /* 0x20 = 00100000b */ 0,
105 /* 0x21 = 00100001b */ X86_EFL_PF,
106 /* 0x22 = 00100010b */ X86_EFL_PF,
107 /* 0x23 = 00100011b */ 0,
108 /* 0x24 = 00100100b */ X86_EFL_PF,
109 /* 0x25 = 00100101b */ 0,
110 /* 0x26 = 00100110b */ 0,
111 /* 0x27 = 00100111b */ X86_EFL_PF,
112 /* 0x28 = 00101000b */ X86_EFL_PF,
113 /* 0x29 = 00101001b */ 0,
114 /* 0x2a = 00101010b */ 0,
115 /* 0x2b = 00101011b */ X86_EFL_PF,
116 /* 0x2c = 00101100b */ 0,
117 /* 0x2d = 00101101b */ X86_EFL_PF,
118 /* 0x2e = 00101110b */ X86_EFL_PF,
119 /* 0x2f = 00101111b */ 0,
120 /* 0x30 = 00110000b */ X86_EFL_PF,
121 /* 0x31 = 00110001b */ 0,
122 /* 0x32 = 00110010b */ 0,
123 /* 0x33 = 00110011b */ X86_EFL_PF,
124 /* 0x34 = 00110100b */ 0,
125 /* 0x35 = 00110101b */ X86_EFL_PF,
126 /* 0x36 = 00110110b */ X86_EFL_PF,
127 /* 0x37 = 00110111b */ 0,
128 /* 0x38 = 00111000b */ 0,
129 /* 0x39 = 00111001b */ X86_EFL_PF,
130 /* 0x3a = 00111010b */ X86_EFL_PF,
131 /* 0x3b = 00111011b */ 0,
132 /* 0x3c = 00111100b */ X86_EFL_PF,
133 /* 0x3d = 00111101b */ 0,
134 /* 0x3e = 00111110b */ 0,
135 /* 0x3f = 00111111b */ X86_EFL_PF,
136 /* 0x40 = 01000000b */ 0,
137 /* 0x41 = 01000001b */ X86_EFL_PF,
138 /* 0x42 = 01000010b */ X86_EFL_PF,
139 /* 0x43 = 01000011b */ 0,
140 /* 0x44 = 01000100b */ X86_EFL_PF,
141 /* 0x45 = 01000101b */ 0,
142 /* 0x46 = 01000110b */ 0,
143 /* 0x47 = 01000111b */ X86_EFL_PF,
144 /* 0x48 = 01001000b */ X86_EFL_PF,
145 /* 0x49 = 01001001b */ 0,
146 /* 0x4a = 01001010b */ 0,
147 /* 0x4b = 01001011b */ X86_EFL_PF,
148 /* 0x4c = 01001100b */ 0,
149 /* 0x4d = 01001101b */ X86_EFL_PF,
150 /* 0x4e = 01001110b */ X86_EFL_PF,
151 /* 0x4f = 01001111b */ 0,
152 /* 0x50 = 01010000b */ X86_EFL_PF,
153 /* 0x51 = 01010001b */ 0,
154 /* 0x52 = 01010010b */ 0,
155 /* 0x53 = 01010011b */ X86_EFL_PF,
156 /* 0x54 = 01010100b */ 0,
157 /* 0x55 = 01010101b */ X86_EFL_PF,
158 /* 0x56 = 01010110b */ X86_EFL_PF,
159 /* 0x57 = 01010111b */ 0,
160 /* 0x58 = 01011000b */ 0,
161 /* 0x59 = 01011001b */ X86_EFL_PF,
162 /* 0x5a = 01011010b */ X86_EFL_PF,
163 /* 0x5b = 01011011b */ 0,
164 /* 0x5c = 01011100b */ X86_EFL_PF,
165 /* 0x5d = 01011101b */ 0,
166 /* 0x5e = 01011110b */ 0,
167 /* 0x5f = 01011111b */ X86_EFL_PF,
168 /* 0x60 = 01100000b */ X86_EFL_PF,
169 /* 0x61 = 01100001b */ 0,
170 /* 0x62 = 01100010b */ 0,
171 /* 0x63 = 01100011b */ X86_EFL_PF,
172 /* 0x64 = 01100100b */ 0,
173 /* 0x65 = 01100101b */ X86_EFL_PF,
174 /* 0x66 = 01100110b */ X86_EFL_PF,
175 /* 0x67 = 01100111b */ 0,
176 /* 0x68 = 01101000b */ 0,
177 /* 0x69 = 01101001b */ X86_EFL_PF,
178 /* 0x6a = 01101010b */ X86_EFL_PF,
179 /* 0x6b = 01101011b */ 0,
180 /* 0x6c = 01101100b */ X86_EFL_PF,
181 /* 0x6d = 01101101b */ 0,
182 /* 0x6e = 01101110b */ 0,
183 /* 0x6f = 01101111b */ X86_EFL_PF,
184 /* 0x70 = 01110000b */ 0,
185 /* 0x71 = 01110001b */ X86_EFL_PF,
186 /* 0x72 = 01110010b */ X86_EFL_PF,
187 /* 0x73 = 01110011b */ 0,
188 /* 0x74 = 01110100b */ X86_EFL_PF,
189 /* 0x75 = 01110101b */ 0,
190 /* 0x76 = 01110110b */ 0,
191 /* 0x77 = 01110111b */ X86_EFL_PF,
192 /* 0x78 = 01111000b */ X86_EFL_PF,
193 /* 0x79 = 01111001b */ 0,
194 /* 0x7a = 01111010b */ 0,
195 /* 0x7b = 01111011b */ X86_EFL_PF,
196 /* 0x7c = 01111100b */ 0,
197 /* 0x7d = 01111101b */ X86_EFL_PF,
198 /* 0x7e = 01111110b */ X86_EFL_PF,
199 /* 0x7f = 01111111b */ 0,
200 /* 0x80 = 10000000b */ 0,
201 /* 0x81 = 10000001b */ X86_EFL_PF,
202 /* 0x82 = 10000010b */ X86_EFL_PF,
203 /* 0x83 = 10000011b */ 0,
204 /* 0x84 = 10000100b */ X86_EFL_PF,
205 /* 0x85 = 10000101b */ 0,
206 /* 0x86 = 10000110b */ 0,
207 /* 0x87 = 10000111b */ X86_EFL_PF,
208 /* 0x88 = 10001000b */ X86_EFL_PF,
209 /* 0x89 = 10001001b */ 0,
210 /* 0x8a = 10001010b */ 0,
211 /* 0x8b = 10001011b */ X86_EFL_PF,
212 /* 0x8c = 10001100b */ 0,
213 /* 0x8d = 10001101b */ X86_EFL_PF,
214 /* 0x8e = 10001110b */ X86_EFL_PF,
215 /* 0x8f = 10001111b */ 0,
216 /* 0x90 = 10010000b */ X86_EFL_PF,
217 /* 0x91 = 10010001b */ 0,
218 /* 0x92 = 10010010b */ 0,
219 /* 0x93 = 10010011b */ X86_EFL_PF,
220 /* 0x94 = 10010100b */ 0,
221 /* 0x95 = 10010101b */ X86_EFL_PF,
222 /* 0x96 = 10010110b */ X86_EFL_PF,
223 /* 0x97 = 10010111b */ 0,
224 /* 0x98 = 10011000b */ 0,
225 /* 0x99 = 10011001b */ X86_EFL_PF,
226 /* 0x9a = 10011010b */ X86_EFL_PF,
227 /* 0x9b = 10011011b */ 0,
228 /* 0x9c = 10011100b */ X86_EFL_PF,
229 /* 0x9d = 10011101b */ 0,
230 /* 0x9e = 10011110b */ 0,
231 /* 0x9f = 10011111b */ X86_EFL_PF,
232 /* 0xa0 = 10100000b */ X86_EFL_PF,
233 /* 0xa1 = 10100001b */ 0,
234 /* 0xa2 = 10100010b */ 0,
235 /* 0xa3 = 10100011b */ X86_EFL_PF,
236 /* 0xa4 = 10100100b */ 0,
237 /* 0xa5 = 10100101b */ X86_EFL_PF,
238 /* 0xa6 = 10100110b */ X86_EFL_PF,
239 /* 0xa7 = 10100111b */ 0,
240 /* 0xa8 = 10101000b */ 0,
241 /* 0xa9 = 10101001b */ X86_EFL_PF,
242 /* 0xaa = 10101010b */ X86_EFL_PF,
243 /* 0xab = 10101011b */ 0,
244 /* 0xac = 10101100b */ X86_EFL_PF,
245 /* 0xad = 10101101b */ 0,
246 /* 0xae = 10101110b */ 0,
247 /* 0xaf = 10101111b */ X86_EFL_PF,
248 /* 0xb0 = 10110000b */ 0,
249 /* 0xb1 = 10110001b */ X86_EFL_PF,
250 /* 0xb2 = 10110010b */ X86_EFL_PF,
251 /* 0xb3 = 10110011b */ 0,
252 /* 0xb4 = 10110100b */ X86_EFL_PF,
253 /* 0xb5 = 10110101b */ 0,
254 /* 0xb6 = 10110110b */ 0,
255 /* 0xb7 = 10110111b */ X86_EFL_PF,
256 /* 0xb8 = 10111000b */ X86_EFL_PF,
257 /* 0xb9 = 10111001b */ 0,
258 /* 0xba = 10111010b */ 0,
259 /* 0xbb = 10111011b */ X86_EFL_PF,
260 /* 0xbc = 10111100b */ 0,
261 /* 0xbd = 10111101b */ X86_EFL_PF,
262 /* 0xbe = 10111110b */ X86_EFL_PF,
263 /* 0xbf = 10111111b */ 0,
264 /* 0xc0 = 11000000b */ X86_EFL_PF,
265 /* 0xc1 = 11000001b */ 0,
266 /* 0xc2 = 11000010b */ 0,
267 /* 0xc3 = 11000011b */ X86_EFL_PF,
268 /* 0xc4 = 11000100b */ 0,
269 /* 0xc5 = 11000101b */ X86_EFL_PF,
270 /* 0xc6 = 11000110b */ X86_EFL_PF,
271 /* 0xc7 = 11000111b */ 0,
272 /* 0xc8 = 11001000b */ 0,
273 /* 0xc9 = 11001001b */ X86_EFL_PF,
274 /* 0xca = 11001010b */ X86_EFL_PF,
275 /* 0xcb = 11001011b */ 0,
276 /* 0xcc = 11001100b */ X86_EFL_PF,
277 /* 0xcd = 11001101b */ 0,
278 /* 0xce = 11001110b */ 0,
279 /* 0xcf = 11001111b */ X86_EFL_PF,
280 /* 0xd0 = 11010000b */ 0,
281 /* 0xd1 = 11010001b */ X86_EFL_PF,
282 /* 0xd2 = 11010010b */ X86_EFL_PF,
283 /* 0xd3 = 11010011b */ 0,
284 /* 0xd4 = 11010100b */ X86_EFL_PF,
285 /* 0xd5 = 11010101b */ 0,
286 /* 0xd6 = 11010110b */ 0,
287 /* 0xd7 = 11010111b */ X86_EFL_PF,
288 /* 0xd8 = 11011000b */ X86_EFL_PF,
289 /* 0xd9 = 11011001b */ 0,
290 /* 0xda = 11011010b */ 0,
291 /* 0xdb = 11011011b */ X86_EFL_PF,
292 /* 0xdc = 11011100b */ 0,
293 /* 0xdd = 11011101b */ X86_EFL_PF,
294 /* 0xde = 11011110b */ X86_EFL_PF,
295 /* 0xdf = 11011111b */ 0,
296 /* 0xe0 = 11100000b */ 0,
297 /* 0xe1 = 11100001b */ X86_EFL_PF,
298 /* 0xe2 = 11100010b */ X86_EFL_PF,
299 /* 0xe3 = 11100011b */ 0,
300 /* 0xe4 = 11100100b */ X86_EFL_PF,
301 /* 0xe5 = 11100101b */ 0,
302 /* 0xe6 = 11100110b */ 0,
303 /* 0xe7 = 11100111b */ X86_EFL_PF,
304 /* 0xe8 = 11101000b */ X86_EFL_PF,
305 /* 0xe9 = 11101001b */ 0,
306 /* 0xea = 11101010b */ 0,
307 /* 0xeb = 11101011b */ X86_EFL_PF,
308 /* 0xec = 11101100b */ 0,
309 /* 0xed = 11101101b */ X86_EFL_PF,
310 /* 0xee = 11101110b */ X86_EFL_PF,
311 /* 0xef = 11101111b */ 0,
312 /* 0xf0 = 11110000b */ X86_EFL_PF,
313 /* 0xf1 = 11110001b */ 0,
314 /* 0xf2 = 11110010b */ 0,
315 /* 0xf3 = 11110011b */ X86_EFL_PF,
316 /* 0xf4 = 11110100b */ 0,
317 /* 0xf5 = 11110101b */ X86_EFL_PF,
318 /* 0xf6 = 11110110b */ X86_EFL_PF,
319 /* 0xf7 = 11110111b */ 0,
320 /* 0xf8 = 11111000b */ 0,
321 /* 0xf9 = 11111001b */ X86_EFL_PF,
322 /* 0xfa = 11111010b */ X86_EFL_PF,
323 /* 0xfb = 11111011b */ 0,
324 /* 0xfc = 11111100b */ X86_EFL_PF,
325 /* 0xfd = 11111101b */ 0,
326 /* 0xfe = 11111110b */ 0,
327 /* 0xff = 11111111b */ X86_EFL_PF,
328};
329#endif /* RT_ARCH_X86 */
330
331
332/**
333 * Calculates the signed flag value given a result and it's bit width.
334 *
335 * The signed flag (SF) is a duplication of the most significant bit in the
336 * result.
337 *
338 * @returns X86_EFL_SF or 0.
339 * @param a_uResult Unsigned result value.
340 * @param a_cBitsWidth The width of the result (8, 16, 32, 64).
341 */
342#define X86_EFL_CALC_SF(a_uResult, a_cBitsWidth) \
343 ( (uint32_t)((a_uResult) >> ((a_cBitsWidth) - X86_EFL_SF_BIT - 1)) & X86_EFL_SF )
344
345/**
346 * Calculates the zero flag value given a result.
347 *
348 * The zero flag (ZF) indicates whether the result is zero or not.
349 *
350 * @returns X86_EFL_ZF or 0.
351 * @param a_uResult Unsigned result value.
352 */
353#define X86_EFL_CALC_ZF(a_uResult) \
354 ( (uint32_t)((a_uResult) == 0) << X86_EFL_ZF_BIT )
355
356/**
357 * Updates the status bits (CF, PF, AF, ZF, SF, and OF) after a logical op.
358 *
359 * CF and OF are defined to be 0 by logical operations. AF on the other hand is
360 * undefined. We do not set AF, as that seems to make the most sense (which
361 * probably makes it the most wrong in real life).
362 *
363 * @returns Status bits.
364 * @param a_pfEFlags Pointer to the 32-bit EFLAGS value to update.
365 * @param a_uResult Unsigned result value.
366 * @param a_cBitsWidth The width of the result (8, 16, 32, 64).
367 * @param a_fExtra Additional bits to set.
368 */
369#define IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(a_pfEFlags, a_uResult, a_cBitsWidth, a_fExtra) \
370 do { \
371 uint32_t fEflTmp = *(a_pfEFlags); \
372 fEflTmp &= ~X86_EFL_STATUS_BITS; \
373 fEflTmp |= g_afParity[(a_uResult) & 0xff]; \
374 fEflTmp |= X86_EFL_CALC_ZF(a_uResult); \
375 fEflTmp |= X86_EFL_CALC_SF(a_uResult, a_cBitsWidth); \
376 fEflTmp |= (a_fExtra); \
377 *(a_pfEFlags) = fEflTmp; \
378 } while (0)
379
380
381#ifdef RT_ARCH_X86
382/*
383 * There are a few 64-bit on 32-bit things we'd rather do in C. Actually, doing
384 * it all in C is probably safer atm., optimize what's necessary later, maybe.
385 */
386
387
388/* Binary ops */
389
390IEM_DECL_IMPL_DEF(void, iemAImpl_add_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
391{
392 uint64_t uDst = *puDst;
393 uint64_t uResult = uDst + uSrc;
394 *puDst = uResult;
395
396 /* Calc EFLAGS. */
397 uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
398 fEfl |= (uResult < uDst) << X86_EFL_CF_BIT;
399 fEfl |= g_afParity[uResult & 0xff];
400 fEfl |= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
401 fEfl |= X86_EFL_CALC_ZF(uResult);
402 fEfl |= X86_EFL_CALC_SF(uResult, 64);
403 fEfl |= (((uDst ^ uSrc ^ RT_BIT_64(63)) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
404 *pfEFlags = fEfl;
405}
406
407
408IEM_DECL_IMPL_DEF(void, iemAImpl_adc_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
409{
410 if (!(*pfEFlags & X86_EFL_CF))
411 iemAImpl_add_u64(puDst, uSrc, pfEFlags);
412 else
413 {
414 uint64_t uDst = *puDst;
415 uint64_t uResult = uDst + uSrc + 1;
416 *puDst = uResult;
417
418 /* Calc EFLAGS. */
419 /** @todo verify AF and OF calculations. */
420 uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
421 fEfl |= (uResult <= uDst) << X86_EFL_CF_BIT;
422 fEfl |= g_afParity[uResult & 0xff];
423 fEfl |= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
424 fEfl |= X86_EFL_CALC_ZF(uResult);
425 fEfl |= X86_EFL_CALC_SF(uResult, 64);
426 fEfl |= (((uDst ^ uSrc ^ RT_BIT_64(63)) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
427 *pfEFlags = fEfl;
428 }
429}
430
431
432IEM_DECL_IMPL_DEF(void, iemAImpl_sub_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
433{
434 uint64_t uDst = *puDst;
435 uint64_t uResult = uDst - uSrc;
436 *puDst = uResult;
437
438 /* Calc EFLAGS. */
439 uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
440 fEfl |= (uDst < uSrc) << X86_EFL_CF_BIT;
441 fEfl |= g_afParity[uResult & 0xff];
442 fEfl |= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
443 fEfl |= X86_EFL_CALC_ZF(uResult);
444 fEfl |= X86_EFL_CALC_SF(uResult, 64);
445 fEfl |= (((uDst ^ uSrc) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
446 *pfEFlags = fEfl;
447}
448
449
450IEM_DECL_IMPL_DEF(void, iemAImpl_sbb_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
451{
452 if (!(*pfEFlags & X86_EFL_CF))
453 iemAImpl_sub_u64(puDst, uSrc, pfEFlags);
454 else
455 {
456 uint64_t uDst = *puDst;
457 uint64_t uResult = uDst - uSrc - 1;
458 *puDst = uResult;
459
460 /* Calc EFLAGS. */
461 /** @todo verify AF and OF calculations. */
462 uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
463 fEfl |= (uDst <= uSrc) << X86_EFL_CF_BIT;
464 fEfl |= g_afParity[uResult & 0xff];
465 fEfl |= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
466 fEfl |= X86_EFL_CALC_ZF(uResult);
467 fEfl |= X86_EFL_CALC_SF(uResult, 64);
468 fEfl |= (((uDst ^ uSrc) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
469 *pfEFlags = fEfl;
470 }
471}
472
473
474IEM_DECL_IMPL_DEF(void, iemAImpl_or_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
475{
476 uint64_t uResult = *puDst | uSrc;
477 *puDst = uResult;
478 IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
479}
480
481
482IEM_DECL_IMPL_DEF(void, iemAImpl_xor_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
483{
484 uint64_t uResult = *puDst ^ uSrc;
485 *puDst = uResult;
486 IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
487}
488
489
490IEM_DECL_IMPL_DEF(void, iemAImpl_and_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
491{
492 uint64_t uResult = *puDst & uSrc;
493 *puDst = uResult;
494 IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
495}
496
497
498IEM_DECL_IMPL_DEF(void, iemAImpl_cmp_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
499{
500 uint64_t uDstTmp = *puDst;
501 iemAImpl_sub_u64(&uDstTmp, uSrc, pfEFlags);
502}
503
504
505IEM_DECL_IMPL_DEF(void, iemAImpl_test_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
506{
507 uint64_t uResult = *puDst & uSrc;
508 IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
509}
510
511
512/** 64-bit locked binary operand operation. */
513# define DO_LOCKED_BIN_OP_U64(a_Mnemonic) \
514 do { \
515 uint64_t uOld = ASMAtomicReadU64(puDst); \
516 uint64_t uTmp; \
517 uint32_t fEflTmp; \
518 do \
519 { \
520 uTmp = uOld; \
521 fEflTmp = *pfEFlags; \
522 iemAImpl_ ## a_Mnemonic ## _u64(&uTmp, uSrc, &fEflTmp); \
523 } while (!ASMAtomicCmpXchgExU64(puDst, uTmp, uOld, &uOld)); \
524 *pfEFlags = fEflTmp; \
525 } while (0)
526
527
528IEM_DECL_IMPL_DEF(void, iemAImpl_add_u64_locked,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
529{
530 DO_LOCKED_BIN_OP_U64(add);
531}
532
533
534IEM_DECL_IMPL_DEF(void, iemAImpl_adc_u64_locked,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
535{
536 DO_LOCKED_BIN_OP_U64(adc);
537}
538
539
540IEM_DECL_IMPL_DEF(void, iemAImpl_sub_u64_locked,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
541{
542 DO_LOCKED_BIN_OP_U64(sub);
543}
544
545
546IEM_DECL_IMPL_DEF(void, iemAImpl_sbb_u64_locked,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
547{
548 DO_LOCKED_BIN_OP_U64(sbb);
549}
550
551
552IEM_DECL_IMPL_DEF(void, iemAImpl_or_u64_locked,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
553{
554 DO_LOCKED_BIN_OP_U64(or);
555}
556
557
558IEM_DECL_IMPL_DEF(void, iemAImpl_xor_u64_locked,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
559{
560 DO_LOCKED_BIN_OP_U64(xor);
561}
562
563
564IEM_DECL_IMPL_DEF(void, iemAImpl_and_u64_locked,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
565{
566 DO_LOCKED_BIN_OP_U64(and);
567}
568
569
570IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t *puDst, uint64_t *puReg, uint32_t *pfEFlags))
571{
572 uint64_t uDst = *puDst;
573 uint64_t uResult = uDst;
574 iemAImpl_add_u64(&uResult, *puReg, pfEFlags);
575 *puDst = uResult;
576 *puReg = uDst;
577}
578
579
580IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t *puDst, uint64_t *puReg, uint32_t *pfEFlags))
581{
582 uint64_t uOld = ASMAtomicReadU64(puDst);
583 uint64_t uTmpDst;
584 uint32_t fEflTmp;
585 do
586 {
587 uTmpDst = uOld;
588 fEflTmp = *pfEFlags;
589 iemAImpl_add_u64(&uTmpDst, *puReg, pfEFlags);
590 } while (!ASMAtomicCmpXchgExU64(puDst, uTmpDst, uOld, &uOld));
591 *puReg = uOld;
592 *pfEFlags = fEflTmp;
593}
594
595
596/* Bit operations (same signature as above). */
597
598IEM_DECL_IMPL_DEF(void, iemAImpl_bt_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
599{
600 /* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
601 logical operation (AND/OR/whatever). */
602 Assert(uSrc < 64);
603 uint64_t uDst = *puDst;
604 if (uDst & RT_BIT_64(uSrc))
605 IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
606 else
607 IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
608}
609
610IEM_DECL_IMPL_DEF(void, iemAImpl_btc_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
611{
612 /* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
613 logical operation (AND/OR/whatever). */
614 Assert(uSrc < 64);
615 uint64_t fMask = RT_BIT_64(uSrc);
616 uint64_t uDst = *puDst;
617 if (uDst & fMask)
618 {
619 uDst &= ~fMask;
620 *puDst = uDst;
621 IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
622 }
623 else
624 {
625 uDst |= fMask;
626 *puDst = uDst;
627 IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
628 }
629}
630
631IEM_DECL_IMPL_DEF(void, iemAImpl_btr_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
632{
633 /* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
634 logical operation (AND/OR/whatever). */
635 Assert(uSrc < 64);
636 uint64_t fMask = RT_BIT_64(uSrc);
637 uint64_t uDst = *puDst;
638 if (uDst & fMask)
639 {
640 uDst &= ~fMask;
641 *puDst = uDst;
642 IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
643 }
644 else
645 IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
646}
647
648IEM_DECL_IMPL_DEF(void, iemAImpl_bts_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
649{
650 /* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
651 logical operation (AND/OR/whatever). */
652 Assert(uSrc < 64);
653 uint64_t fMask = RT_BIT_64(uSrc);
654 uint64_t uDst = *puDst;
655 if (uDst & fMask)
656 IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
657 else
658 {
659 uDst |= fMask;
660 *puDst = uDst;
661 IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
662 }
663}
664
665
666IEM_DECL_IMPL_DEF(void, iemAImpl_btc_u64_locked,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
667{
668 DO_LOCKED_BIN_OP_U64(btc);
669}
670
671IEM_DECL_IMPL_DEF(void, iemAImpl_btr_u64_locked,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
672{
673 DO_LOCKED_BIN_OP_U64(btr);
674}
675
676IEM_DECL_IMPL_DEF(void, iemAImpl_bts_u64_locked,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
677{
678 DO_LOCKED_BIN_OP_U64(bts);
679}
680
681
682/* bit scan */
683
684IEM_DECL_IMPL_DEF(void, iemAImpl_bsf_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
685{
686 /* Note! "undefined" flags: OF, SF, AF, PF, CF. */
687 /** @todo check what real CPUs do. */
688 if (uSrc)
689 {
690 uint8_t iBit;
691 uint32_t u32Src;
692 if (uSrc & UINT32_MAX)
693 {
694 iBit = 0;
695 u32Src = uSrc;
696 }
697 else
698 {
699 iBit = 32;
700 u32Src = uSrc >> 32;
701 }
702 if (!(u32Src & UINT16_MAX))
703 {
704 iBit += 16;
705 u32Src >>= 16;
706 }
707 if (!(u32Src & UINT8_MAX))
708 {
709 iBit += 8;
710 u32Src >>= 8;
711 }
712 if (!(u32Src & 0xf))
713 {
714 iBit += 4;
715 u32Src >>= 4;
716 }
717 if (!(u32Src & 0x3))
718 {
719 iBit += 2;
720 u32Src >>= 2;
721 }
722 if (!(u32Src & 1))
723 {
724 iBit += 1;
725 Assert(u32Src & 2);
726 }
727
728 *puDst = iBit;
729 *pfEFlags &= ~X86_EFL_ZF;
730 }
731 else
732 *pfEFlags |= X86_EFL_ZF;
733}
734
735IEM_DECL_IMPL_DEF(void, iemAImpl_bsr_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
736{
737 /* Note! "undefined" flags: OF, SF, AF, PF, CF. */
738 /** @todo check what real CPUs do. */
739 if (uSrc)
740 {
741 uint8_t iBit;
742 uint32_t u32Src;
743 if (uSrc & UINT64_C(0xffffffff00000000))
744 {
745 iBit = 63;
746 u32Src = uSrc >> 32;
747 }
748 else
749 {
750 iBit = 31;
751 u32Src = uSrc;
752 }
753 if (!(u32Src & UINT32_C(0xffff0000)))
754 {
755 iBit -= 16;
756 u32Src <<= 16;
757 }
758 if (!(u32Src & UINT32_C(0xff000000)))
759 {
760 iBit -= 8;
761 u32Src <<= 8;
762 }
763 if (!(u32Src & UINT32_C(0xf0000000)))
764 {
765 iBit -= 4;
766 u32Src <<= 4;
767 }
768 if (!(u32Src & UINT32_C(0xc0000000)))
769 {
770 iBit -= 2;
771 u32Src <<= 2;
772 }
773 if (!(u32Src & UINT32_C(0x80000000)))
774 {
775 iBit -= 1;
776 Assert(u32Src & RT_BIT(30));
777 }
778
779 *puDst = iBit;
780 *pfEFlags &= ~X86_EFL_ZF;
781 }
782 else
783 *pfEFlags |= X86_EFL_ZF;
784}
785
786
787/* Unary operands. */
788
789IEM_DECL_IMPL_DEF(void, iemAImpl_inc_u64,(uint64_t *puDst, uint32_t *pfEFlags))
790{
791 uint64_t uDst = *puDst;
792 uint64_t uResult = uDst + 1;
793 *puDst = uResult;
794
795 /*
796 * Calc EFLAGS.
797 * CF is NOT modified for hysterical raisins (allegedly for carrying and
798 * borrowing in arithmetic loops on intel 8008).
799 */
800 uint32_t fEfl = *pfEFlags & ~(X86_EFL_STATUS_BITS & ~X86_EFL_CF);
801 fEfl |= g_afParity[uResult & 0xff];
802 fEfl |= ((uint32_t)uResult ^ (uint32_t)uDst) & X86_EFL_AF;
803 fEfl |= X86_EFL_CALC_ZF(uResult);
804 fEfl |= X86_EFL_CALC_SF(uResult, 64);
805 fEfl |= (((uDst ^ RT_BIT_64(63)) & uResult) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
806 *pfEFlags = fEfl;
807}
808
809
810IEM_DECL_IMPL_DEF(void, iemAImpl_dec_u64,(uint64_t *puDst, uint32_t *pfEFlags))
811{
812 uint64_t uDst = *puDst;
813 uint64_t uResult = uDst - 1;
814 *puDst = uResult;
815
816 /*
817 * Calc EFLAGS.
818 * CF is NOT modified for hysterical raisins (allegedly for carrying and
819 * borrowing in arithmetic loops on intel 8008).
820 */
821 uint32_t fEfl = *pfEFlags & ~(X86_EFL_STATUS_BITS & ~X86_EFL_CF);
822 fEfl |= g_afParity[uResult & 0xff];
823 fEfl |= ((uint32_t)uResult ^ (uint32_t)uDst) & X86_EFL_AF;
824 fEfl |= X86_EFL_CALC_ZF(uResult);
825 fEfl |= X86_EFL_CALC_SF(uResult, 64);
826 fEfl |= ((uDst & (uResult ^ RT_BIT_64(63))) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
827 *pfEFlags = fEfl;
828}
829
830
831IEM_DECL_IMPL_DEF(void, iemAImpl_not_u64,(uint64_t *puDst, uint32_t *pfEFlags))
832{
833 uint64_t uDst = *puDst;
834 uint64_t uResult = ~uDst;
835 *puDst = uResult;
836 /* EFLAGS are not modified. */
837 RT_NOREF_PV(pfEFlags);
838}
839
840
841IEM_DECL_IMPL_DEF(void, iemAImpl_neg_u64,(uint64_t *puDst, uint32_t *pfEFlags))
842{
843 uint64_t uDst = 0;
844 uint64_t uSrc = *puDst;
845 uint64_t uResult = uDst - uSrc;
846 *puDst = uResult;
847
848 /* Calc EFLAGS. */
849 uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
850 fEfl |= (uSrc != 0) << X86_EFL_CF_BIT;
851 fEfl |= g_afParity[uResult & 0xff];
852 fEfl |= ((uint32_t)uResult ^ (uint32_t)uDst) & X86_EFL_AF;
853 fEfl |= X86_EFL_CALC_ZF(uResult);
854 fEfl |= X86_EFL_CALC_SF(uResult, 64);
855 fEfl |= ((uSrc & uResult) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
856 *pfEFlags = fEfl;
857}
858
859
860/** 64-bit locked unary operand operation. */
861# define DO_LOCKED_UNARY_OP_U64(a_Mnemonic) \
862 do { \
863 uint64_t uOld = ASMAtomicReadU64(puDst); \
864 uint64_t uTmp; \
865 uint32_t fEflTmp; \
866 do \
867 { \
868 uTmp = uOld; \
869 fEflTmp = *pfEFlags; \
870 iemAImpl_ ## a_Mnemonic ## _u64(&uTmp, &fEflTmp); \
871 } while (!ASMAtomicCmpXchgExU64(puDst, uTmp, uOld, &uOld)); \
872 *pfEFlags = fEflTmp; \
873 } while (0)
874
875IEM_DECL_IMPL_DEF(void, iemAImpl_inc_u64_locked,(uint64_t *puDst, uint32_t *pfEFlags))
876{
877 DO_LOCKED_UNARY_OP_U64(inc);
878}
879
880
881IEM_DECL_IMPL_DEF(void, iemAImpl_dec_u64_locked,(uint64_t *puDst, uint32_t *pfEFlags))
882{
883 DO_LOCKED_UNARY_OP_U64(dec);
884}
885
886
887IEM_DECL_IMPL_DEF(void, iemAImpl_not_u64_locked,(uint64_t *puDst, uint32_t *pfEFlags))
888{
889 DO_LOCKED_UNARY_OP_U64(not);
890}
891
892
893IEM_DECL_IMPL_DEF(void, iemAImpl_neg_u64_locked,(uint64_t *puDst, uint32_t *pfEFlags))
894{
895 DO_LOCKED_UNARY_OP_U64(neg);
896}
897
898
899/* Shift and rotate. */
900
901IEM_DECL_IMPL_DEF(void, iemAImpl_rol_u64,(uint64_t *puDst, uint8_t cShift, uint32_t *pfEFlags))
902{
903 cShift &= 63;
904 if (cShift)
905 {
906 uint64_t uDst = *puDst;
907 uint64_t uResult;
908 uResult = uDst << cShift;
909 uResult |= uDst >> (64 - cShift);
910 *puDst = uResult;
911
912 /* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
913 it the same way as for 1 bit shifts. */
914 AssertCompile(X86_EFL_CF_BIT == 0);
915 uint32_t fEfl = *pfEFlags & ~(X86_EFL_CF | X86_EFL_OF);
916 uint32_t fCarry = (uResult & 1);
917 fEfl |= fCarry;
918 fEfl |= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
919 *pfEFlags = fEfl;
920 }
921}
922
923
924IEM_DECL_IMPL_DEF(void, iemAImpl_ror_u64,(uint64_t *puDst, uint8_t cShift, uint32_t *pfEFlags))
925{
926 cShift &= 63;
927 if (cShift)
928 {
929 uint64_t uDst = *puDst;
930 uint64_t uResult;
931 uResult = uDst >> cShift;
932 uResult |= uDst << (64 - cShift);
933 *puDst = uResult;
934
935 /* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
936 it the same way as for 1 bit shifts (OF = OF XOR New-CF). */
937 AssertCompile(X86_EFL_CF_BIT == 0);
938 uint32_t fEfl = *pfEFlags & ~(X86_EFL_CF | X86_EFL_OF);
939 uint32_t fCarry = (uResult >> 63) & X86_EFL_CF;
940 fEfl |= fCarry;
941 fEfl |= (((uResult >> 62) ^ fCarry) << X86_EFL_OF_BIT) & X86_EFL_OF;
942 *pfEFlags = fEfl;
943 }
944}
945
946
947IEM_DECL_IMPL_DEF(void, iemAImpl_rcl_u64,(uint64_t *puDst, uint8_t cShift, uint32_t *pfEFlags))
948{
949 cShift &= 63;
950 if (cShift)
951 {
952 uint32_t fEfl = *pfEFlags;
953 uint64_t uDst = *puDst;
954 uint64_t uResult;
955 uResult = uDst << cShift;
956 AssertCompile(X86_EFL_CF_BIT == 0);
957 if (cShift > 1)
958 uResult |= uDst >> (65 - cShift);
959 uResult |= (uint64_t)(fEfl & X86_EFL_CF) << (cShift - 1);
960 *puDst = uResult;
961
962 /* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
963 it the same way as for 1 bit shifts. */
964 uint32_t fCarry = (uDst >> (64 - cShift)) & X86_EFL_CF;
965 fEfl &= ~(X86_EFL_CF | X86_EFL_OF);
966 fEfl |= fCarry;
967 fEfl |= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
968 *pfEFlags = fEfl;
969 }
970}
971
972
973IEM_DECL_IMPL_DEF(void, iemAImpl_rcr_u64,(uint64_t *puDst, uint8_t cShift, uint32_t *pfEFlags))
974{
975 cShift &= 63;
976 if (cShift)
977 {
978 uint32_t fEfl = *pfEFlags;
979 uint64_t uDst = *puDst;
980 uint64_t uResult;
981 uResult = uDst >> cShift;
982 AssertCompile(X86_EFL_CF_BIT == 0);
983 if (cShift > 1)
984 uResult |= uDst << (65 - cShift);
985 uResult |= (uint64_t)(fEfl & X86_EFL_CF) << (64 - cShift);
986 *puDst = uResult;
987
988 /* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
989 it the same way as for 1 bit shifts. */
990 uint32_t fCarry = (uDst >> (cShift - 1)) & X86_EFL_CF;
991 fEfl &= ~(X86_EFL_CF | X86_EFL_OF);
992 fEfl |= fCarry;
993 fEfl |= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
994 *pfEFlags = fEfl;
995 }
996}
997
998
999IEM_DECL_IMPL_DEF(void, iemAImpl_shl_u64,(uint64_t *puDst, uint8_t cShift, uint32_t *pfEFlags))
1000{
1001 cShift &= 63;
1002 if (cShift)
1003 {
1004 uint64_t uDst = *puDst;
1005 uint64_t uResult = uDst << cShift;
1006 *puDst = uResult;
1007
1008 /* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1009 it the same way as for 1 bit shifts. The AF bit is undefined, we
1010 always set it to zero atm. */
1011 AssertCompile(X86_EFL_CF_BIT == 0);
1012 uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1013 uint32_t fCarry = (uDst >> (64 - cShift)) & X86_EFL_CF;
1014 fEfl |= fCarry;
1015 fEfl |= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
1016 fEfl |= X86_EFL_CALC_SF(uResult, 64);
1017 fEfl |= X86_EFL_CALC_ZF(uResult);
1018 fEfl |= g_afParity[uResult & 0xff];
1019 *pfEFlags = fEfl;
1020 }
1021}
1022
1023
1024IEM_DECL_IMPL_DEF(void, iemAImpl_shr_u64,(uint64_t *puDst, uint8_t cShift, uint32_t *pfEFlags))
1025{
1026 cShift &= 63;
1027 if (cShift)
1028 {
1029 uint64_t uDst = *puDst;
1030 uint64_t uResult = uDst >> cShift;
1031 *puDst = uResult;
1032
1033 /* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1034 it the same way as for 1 bit shifts. The AF bit is undefined, we
1035 always set it to zero atm. */
1036 AssertCompile(X86_EFL_CF_BIT == 0);
1037 uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1038 fEfl |= (uDst >> (cShift - 1)) & X86_EFL_CF;
1039 fEfl |= (uDst >> 63) << X86_EFL_OF_BIT;
1040 fEfl |= X86_EFL_CALC_SF(uResult, 64);
1041 fEfl |= X86_EFL_CALC_ZF(uResult);
1042 fEfl |= g_afParity[uResult & 0xff];
1043 *pfEFlags = fEfl;
1044 }
1045}
1046
1047
1048IEM_DECL_IMPL_DEF(void, iemAImpl_sar_u64,(uint64_t *puDst, uint8_t cShift, uint32_t *pfEFlags))
1049{
1050 cShift &= 63;
1051 if (cShift)
1052 {
1053 uint64_t uDst = *puDst;
1054 uint64_t uResult = (int64_t)uDst >> cShift;
1055 *puDst = uResult;
1056
1057 /* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1058 it the same way as for 1 bit shifts (0). The AF bit is undefined,
1059 we always set it to zero atm. */
1060 AssertCompile(X86_EFL_CF_BIT == 0);
1061 uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1062 fEfl |= (uDst >> (cShift - 1)) & X86_EFL_CF;
1063 fEfl |= X86_EFL_CALC_SF(uResult, 64);
1064 fEfl |= X86_EFL_CALC_ZF(uResult);
1065 fEfl |= g_afParity[uResult & 0xff];
1066 *pfEFlags = fEfl;
1067 }
1068}
1069
1070
1071IEM_DECL_IMPL_DEF(void, iemAImpl_shld_u64,(uint64_t *puDst, uint64_t uSrc, uint8_t cShift, uint32_t *pfEFlags))
1072{
1073 cShift &= 63;
1074 if (cShift)
1075 {
1076 uint64_t uDst = *puDst;
1077 uint64_t uResult;
1078 uResult = uDst << cShift;
1079 uResult |= uSrc >> (64 - cShift);
1080 *puDst = uResult;
1081
1082 /* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1083 it the same way as for 1 bit shifts. The AF bit is undefined,
1084 we always set it to zero atm. */
1085 AssertCompile(X86_EFL_CF_BIT == 0);
1086 uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1087 fEfl |= (uDst >> (64 - cShift)) & X86_EFL_CF;
1088 fEfl |= (uint32_t)((uDst >> 63) ^ (uint32_t)(uResult >> 63)) << X86_EFL_OF_BIT;
1089 fEfl |= X86_EFL_CALC_SF(uResult, 64);
1090 fEfl |= X86_EFL_CALC_ZF(uResult);
1091 fEfl |= g_afParity[uResult & 0xff];
1092 *pfEFlags = fEfl;
1093 }
1094}
1095
1096
1097IEM_DECL_IMPL_DEF(void, iemAImpl_shrd_u64,(uint64_t *puDst, uint64_t uSrc, uint8_t cShift, uint32_t *pfEFlags))
1098{
1099 cShift &= 63;
1100 if (cShift)
1101 {
1102 uint64_t uDst = *puDst;
1103 uint64_t uResult;
1104 uResult = uDst >> cShift;
1105 uResult |= uSrc << (64 - cShift);
1106 *puDst = uResult;
1107
1108 /* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1109 it the same way as for 1 bit shifts. The AF bit is undefined,
1110 we always set it to zero atm. */
1111 AssertCompile(X86_EFL_CF_BIT == 0);
1112 uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1113 fEfl |= (uDst >> (cShift - 1)) & X86_EFL_CF;
1114 fEfl |= (uint32_t)((uDst >> 63) ^ (uint32_t)(uResult >> 63)) << X86_EFL_OF_BIT;
1115 fEfl |= X86_EFL_CALC_SF(uResult, 64);
1116 fEfl |= X86_EFL_CALC_ZF(uResult);
1117 fEfl |= g_afParity[uResult & 0xff];
1118 *pfEFlags = fEfl;
1119 }
1120}
1121
1122
1123/* misc */
1124
1125IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t *puMem, uint64_t *puReg))
1126{
1127 /* XCHG implies LOCK. */
1128 uint64_t uOldMem = *puMem;
1129 while (!ASMAtomicCmpXchgExU64(puMem, *puReg, uOldMem, &uOldMem))
1130 ASMNopPause();
1131 *puReg = uOldMem;
1132}
1133
1134
1135#endif /* RT_ARCH_X86 */
1136#ifdef RT_ARCH_X86
1137
1138/* multiplication and division */
1139
1140
1141IEM_DECL_IMPL_DEF(int, iemAImpl_mul_u64,(uint64_t *pu64RAX, uint64_t *pu64RDX, uint64_t u64Factor, uint32_t *pfEFlags))
1142{
1143 RTUINT128U Result;
1144 RTUInt128MulU64ByU64(&Result, *pu64RAX, u64Factor);
1145 *pu64RAX = Result.s.Lo;
1146 *pu64RDX = Result.s.Hi;
1147
1148 /* MUL EFLAGS according to Skylake (similar to IMUL). */
1149 *pfEFlags &= ~(X86_EFL_SF | X86_EFL_CF | X86_EFL_OF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_PF);
1150 if (Result.s.Lo & RT_BIT_64(63))
1151 *pfEFlags |= X86_EFL_SF;
1152 *pfEFlags |= g_afParity[Result.s.Lo & 0xff]; /* (Skylake behaviour) */
1153 if (Result.s.Hi != 0)
1154 *pfEFlags |= X86_EFL_CF | X86_EFL_OF;
1155 return 0;
1156}
1157
1158
1159IEM_DECL_IMPL_DEF(int, iemAImpl_imul_u64,(uint64_t *pu64RAX, uint64_t *pu64RDX, uint64_t u64Factor, uint32_t *pfEFlags))
1160{
1161 RTUINT128U Result;
1162 *pfEFlags &= ~( X86_EFL_SF | X86_EFL_CF | X86_EFL_OF
1163 /* Skylake always clears: */ | X86_EFL_AF | X86_EFL_ZF
1164 /* Skylake may set: */ | X86_EFL_PF);
1165
1166 if ((int64_t)*pu64RAX >= 0)
1167 {
1168 if ((int64_t)u64Factor >= 0)
1169 {
1170 RTUInt128MulU64ByU64(&Result, *pu64RAX, u64Factor);
1171 if (Result.s.Hi != 0 || Result.s.Lo >= UINT64_C(0x8000000000000000))
1172 *pfEFlags |= X86_EFL_CF | X86_EFL_OF;
1173 }
1174 else
1175 {
1176 RTUInt128MulU64ByU64(&Result, *pu64RAX, UINT64_C(0) - u64Factor);
1177 if (Result.s.Hi != 0 || Result.s.Lo > UINT64_C(0x8000000000000000))
1178 *pfEFlags |= X86_EFL_CF | X86_EFL_OF;
1179 RTUInt128AssignNeg(&Result);
1180 }
1181 }
1182 else
1183 {
1184 if ((int64_t)u64Factor >= 0)
1185 {
1186 RTUInt128MulU64ByU64(&Result, UINT64_C(0) - *pu64RAX, u64Factor);
1187 if (Result.s.Hi != 0 || Result.s.Lo > UINT64_C(0x8000000000000000))
1188 *pfEFlags |= X86_EFL_CF | X86_EFL_OF;
1189 RTUInt128AssignNeg(&Result);
1190 }
1191 else
1192 {
1193 RTUInt128MulU64ByU64(&Result, UINT64_C(0) - *pu64RAX, UINT64_C(0) - u64Factor);
1194 if (Result.s.Hi != 0 || Result.s.Lo >= UINT64_C(0x8000000000000000))
1195 *pfEFlags |= X86_EFL_CF | X86_EFL_OF;
1196 }
1197 }
1198 *pu64RAX = Result.s.Lo;
1199 if (Result.s.Lo & RT_BIT_64(63))
1200 *pfEFlags |= X86_EFL_SF;
1201 *pfEFlags |= g_afParity[Result.s.Lo & 0xff]; /* (Skylake behaviour) */
1202 *pu64RDX = Result.s.Hi;
1203
1204 return 0;
1205}
1206
1207
1208IEM_DECL_IMPL_DEF(void, iemAImpl_imul_two_u64,(uint64_t *puDst, uint64_t uSrc, uint32_t *pfEFlags))
1209{
1210/** @todo Testcase: IMUL 2 and 3 operands. */
1211 uint64_t u64Ign;
1212 iemAImpl_imul_u64(puDst, &u64Ign, uSrc, pfEFlags);
1213}
1214
1215
1216
1217IEM_DECL_IMPL_DEF(int, iemAImpl_div_u64,(uint64_t *pu64RAX, uint64_t *pu64RDX, uint64_t u64Divisor, uint32_t *pfEFlags))
1218{
1219 /* Note! Skylake leaves all flags alone. */
1220 RT_NOREF_PV(pfEFlags);
1221
1222 if ( u64Divisor != 0
1223 && *pu64RDX < u64Divisor)
1224 {
1225 RTUINT128U Dividend;
1226 Dividend.s.Lo = *pu64RAX;
1227 Dividend.s.Hi = *pu64RDX;
1228
1229 RTUINT128U Divisor;
1230 Divisor.s.Lo = u64Divisor;
1231 Divisor.s.Hi = 0;
1232
1233 RTUINT128U Remainder;
1234 RTUINT128U Quotient;
1235# ifdef __GNUC__ /* GCC maybe really annoying in function. */
1236 Quotient.s.Lo = 0;
1237 Quotient.s.Hi = 0;
1238# endif
1239 RTUInt128DivRem(&Quotient, &Remainder, &Dividend, &Divisor);
1240 Assert(Quotient.s.Hi == 0);
1241 Assert(Remainder.s.Hi == 0);
1242
1243 *pu64RAX = Quotient.s.Lo;
1244 *pu64RDX = Remainder.s.Lo;
1245 /** @todo research the undefined DIV flags. */
1246 return 0;
1247
1248 }
1249 /* #DE */
1250 return VERR_IEM_ASPECT_NOT_IMPLEMENTED;
1251}
1252
1253
1254IEM_DECL_IMPL_DEF(int, iemAImpl_idiv_u64,(uint64_t *pu64RAX, uint64_t *pu64RDX, uint64_t u64Divisor, uint32_t *pfEFlags))
1255{
1256 /* Note! Skylake leaves all flags alone. */
1257 RT_NOREF_PV(pfEFlags);
1258
1259 if (u64Divisor != 0)
1260 {
1261 /*
1262 * Convert to unsigned division.
1263 */
1264 RTUINT128U Dividend;
1265 Dividend.s.Lo = *pu64RAX;
1266 Dividend.s.Hi = *pu64RDX;
1267 if ((int64_t)*pu64RDX < 0)
1268 RTUInt128AssignNeg(&Dividend);
1269
1270 RTUINT128U Divisor;
1271 Divisor.s.Hi = 0;
1272 if ((int64_t)u64Divisor >= 0)
1273 Divisor.s.Lo = u64Divisor;
1274 else
1275 Divisor.s.Lo = UINT64_C(0) - u64Divisor;
1276
1277 RTUINT128U Remainder;
1278 RTUINT128U Quotient;
1279# ifdef __GNUC__ /* GCC maybe really annoying in function. */
1280 Quotient.s.Lo = 0;
1281 Quotient.s.Hi = 0;
1282# endif
1283 RTUInt128DivRem(&Quotient, &Remainder, &Dividend, &Divisor);
1284
1285 /*
1286 * Setup the result, checking for overflows.
1287 */
1288 if ((int64_t)u64Divisor >= 0)
1289 {
1290 if ((int64_t)*pu64RDX >= 0)
1291 {
1292 /* Positive divisor, positive dividend => result positive. */
1293 if (Quotient.s.Hi == 0 && Quotient.s.Lo <= (uint64_t)INT64_MAX)
1294 {
1295 *pu64RAX = Quotient.s.Lo;
1296 *pu64RDX = Remainder.s.Lo;
1297 return 0;
1298 }
1299 }
1300 else
1301 {
1302 /* Positive divisor, positive dividend => result negative. */
1303 if (Quotient.s.Hi == 0 && Quotient.s.Lo <= UINT64_C(0x8000000000000000))
1304 {
1305 *pu64RAX = UINT64_C(0) - Quotient.s.Lo;
1306 *pu64RDX = UINT64_C(0) - Remainder.s.Lo;
1307 return 0;
1308 }
1309 }
1310 }
1311 else
1312 {
1313 if ((int64_t)*pu64RDX >= 0)
1314 {
1315 /* Negative divisor, positive dividend => negative quotient, positive remainder. */
1316 if (Quotient.s.Hi == 0 && Quotient.s.Lo <= UINT64_C(0x8000000000000000))
1317 {
1318 *pu64RAX = UINT64_C(0) - Quotient.s.Lo;
1319 *pu64RDX = Remainder.s.Lo;
1320 return 0;
1321 }
1322 }
1323 else
1324 {
1325 /* Negative divisor, negative dividend => positive quotient, negative remainder. */
1326 if (Quotient.s.Hi == 0 && Quotient.s.Lo <= (uint64_t)INT64_MAX)
1327 {
1328 *pu64RAX = Quotient.s.Lo;
1329 *pu64RDX = UINT64_C(0) - Remainder.s.Lo;
1330 return 0;
1331 }
1332 }
1333 }
1334 }
1335 /* #DE */
1336 return VERR_IEM_ASPECT_NOT_IMPLEMENTED;
1337}
1338
1339
1340#endif /* RT_ARCH_X86 */
1341
1342
1343IEM_DECL_IMPL_DEF(void, iemAImpl_arpl,(uint16_t *pu16Dst, uint16_t u16Src, uint32_t *pfEFlags))
1344{
1345 if ((*pu16Dst & X86_SEL_RPL) < (u16Src & X86_SEL_RPL))
1346 {
1347 *pu16Dst &= X86_SEL_MASK_OFF_RPL;
1348 *pu16Dst |= u16Src & X86_SEL_RPL;
1349
1350 *pfEFlags |= X86_EFL_ZF;
1351 }
1352 else
1353 *pfEFlags &= ~X86_EFL_ZF;
1354}
1355
1356
1357
1358IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_fallback,(PRTUINT128U pu128Dst, PRTUINT128U pu128RaxRdx,
1359 PRTUINT128U pu128RbxRcx, uint32_t *pEFlags))
1360{
1361 RTUINT128U u128Tmp = *pu128Dst;
1362 if ( u128Tmp.s.Lo == pu128RaxRdx->s.Lo
1363 && u128Tmp.s.Hi == pu128RaxRdx->s.Hi)
1364 {
1365 *pu128Dst = *pu128RbxRcx;
1366 *pEFlags |= X86_EFL_ZF;
1367 }
1368 else
1369 {
1370 *pu128RaxRdx = u128Tmp;
1371 *pEFlags &= ~X86_EFL_ZF;
1372 }
1373}
1374
1375
1376IEM_DECL_IMPL_DEF(void, iemAImpl_movsldup,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc))
1377{
1378 RT_NOREF(pFpuState);
1379 puDst->au32[0] = puSrc->au32[0];
1380 puDst->au32[1] = puSrc->au32[0];
1381 puDst->au32[2] = puSrc->au32[2];
1382 puDst->au32[3] = puSrc->au32[2];
1383}
1384
1385#ifdef IEM_WITH_VEX
1386
1387IEM_DECL_IMPL_DEF(void, iemAImpl_vmovsldup_256_rr,(PX86XSAVEAREA pXState, uint8_t iYRegDst, uint8_t iYRegSrc))
1388{
1389 pXState->x87.aXMM[iYRegDst].au32[0] = pXState->x87.aXMM[iYRegSrc].au32[0];
1390 pXState->x87.aXMM[iYRegDst].au32[1] = pXState->x87.aXMM[iYRegSrc].au32[0];
1391 pXState->x87.aXMM[iYRegDst].au32[2] = pXState->x87.aXMM[iYRegSrc].au32[2];
1392 pXState->x87.aXMM[iYRegDst].au32[3] = pXState->x87.aXMM[iYRegSrc].au32[2];
1393 pXState->u.YmmHi.aYmmHi[iYRegDst].au32[0] = pXState->u.YmmHi.aYmmHi[iYRegSrc].au32[0];
1394 pXState->u.YmmHi.aYmmHi[iYRegDst].au32[1] = pXState->u.YmmHi.aYmmHi[iYRegSrc].au32[0];
1395 pXState->u.YmmHi.aYmmHi[iYRegDst].au32[2] = pXState->u.YmmHi.aYmmHi[iYRegSrc].au32[2];
1396 pXState->u.YmmHi.aYmmHi[iYRegDst].au32[3] = pXState->u.YmmHi.aYmmHi[iYRegSrc].au32[2];
1397}
1398
1399
1400IEM_DECL_IMPL_DEF(void, iemAImpl_vmovsldup_256_rm,(PX86XSAVEAREA pXState, uint8_t iYRegDst, PCRTUINT256U pSrc))
1401{
1402 pXState->x87.aXMM[iYRegDst].au32[0] = pSrc->au32[0];
1403 pXState->x87.aXMM[iYRegDst].au32[1] = pSrc->au32[0];
1404 pXState->x87.aXMM[iYRegDst].au32[2] = pSrc->au32[2];
1405 pXState->x87.aXMM[iYRegDst].au32[3] = pSrc->au32[2];
1406 pXState->u.YmmHi.aYmmHi[iYRegDst].au32[0] = pSrc->au32[4];
1407 pXState->u.YmmHi.aYmmHi[iYRegDst].au32[1] = pSrc->au32[4];
1408 pXState->u.YmmHi.aYmmHi[iYRegDst].au32[2] = pSrc->au32[6];
1409 pXState->u.YmmHi.aYmmHi[iYRegDst].au32[3] = pSrc->au32[6];
1410}
1411
1412#endif /* IEM_WITH_VEX */
1413
1414
1415IEM_DECL_IMPL_DEF(void, iemAImpl_movshdup,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc))
1416{
1417 RT_NOREF(pFpuState);
1418 puDst->au32[0] = puSrc->au32[1];
1419 puDst->au32[1] = puSrc->au32[1];
1420 puDst->au32[2] = puSrc->au32[3];
1421 puDst->au32[3] = puSrc->au32[3];
1422}
1423
1424
1425IEM_DECL_IMPL_DEF(void, iemAImpl_movddup,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, uint64_t uSrc))
1426{
1427 RT_NOREF(pFpuState);
1428 puDst->au64[0] = uSrc;
1429 puDst->au64[1] = uSrc;
1430}
1431
1432#ifdef IEM_WITH_VEX
1433
1434IEM_DECL_IMPL_DEF(void, iemAImpl_vmovddup_256_rr,(PX86XSAVEAREA pXState, uint8_t iYRegDst, uint8_t iYRegSrc))
1435{
1436 pXState->x87.aXMM[iYRegDst].au64[0] = pXState->x87.aXMM[iYRegSrc].au64[0];
1437 pXState->x87.aXMM[iYRegDst].au64[1] = pXState->x87.aXMM[iYRegSrc].au64[0];
1438 pXState->u.YmmHi.aYmmHi[iYRegDst].au64[0] = pXState->u.YmmHi.aYmmHi[iYRegSrc].au64[0];
1439 pXState->u.YmmHi.aYmmHi[iYRegDst].au64[1] = pXState->u.YmmHi.aYmmHi[iYRegSrc].au64[0];
1440}
1441
1442IEM_DECL_IMPL_DEF(void, iemAImpl_vmovddup_256_rm,(PX86XSAVEAREA pXState, uint8_t iYRegDst, PCRTUINT256U pSrc))
1443{
1444 pXState->x87.aXMM[iYRegDst].au64[0] = pSrc->au64[0];
1445 pXState->x87.aXMM[iYRegDst].au64[1] = pSrc->au64[0];
1446 pXState->u.YmmHi.aYmmHi[iYRegDst].au64[0] = pSrc->au64[2];
1447 pXState->u.YmmHi.aYmmHi[iYRegDst].au64[1] = pSrc->au64[2];
1448}
1449
1450#endif /* IEM_WITH_VEX */
1451
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