IEMAllAImplC.cpp@ 48172

Last change on this file since 48172 was 48172, checked in by vboxsync, 11 years ago
IEM: Implemented 64-bit rol, ror, rcl, rcr, shl, shr, sar, shld, shrd and xadd for 32-bit hosts.
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File size: 35.3 KB

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1	/* $Id: IEMAllAImplC.cpp 48172 2013-08-30 00:54:04Z vboxsync $ */
2	/** @file
3	* IEM - Instruction Implementation in Assembly, portable C variant.
4	*/
5
6	/*
7	* Copyright (C) 2011-2013 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/*******************************************************************************
19	* Header Files *
20	*******************************************************************************/
21	#include "IEMInternal.h"
22	#include <VBox/vmm/vm.h>
23	#include <iprt/x86.h>
24
25
26	/*******************************************************************************
27	* Global Variables *
28	*******************************************************************************/
29	/**
30	* Parity calculation table.
31	*
32	* The generator code:
33	* @code
34	* #include <stdio.h>
35	*
36	* int main()
37	* {
38	* unsigned b;
39	* for (b = 0; b < 256; b++)
40	* {
41	* int cOnes = ( b & 1)
42	* + ((b >> 1) & 1)
43	* + ((b >> 2) & 1)
44	* + ((b >> 3) & 1)
45	* + ((b >> 4) & 1)
46	* + ((b >> 5) & 1)
47	* + ((b >> 6) & 1)
48	* + ((b >> 7) & 1);
49	* printf(" /" "* %#04x = %u%u%u%u%u%u%u%ub *" "/ %s,\n",
50	* b,
51	* (b >> 7) & 1,
52	* (b >> 6) & 1,
53	* (b >> 5) & 1,
54	* (b >> 4) & 1,
55	* (b >> 3) & 1,
56	* (b >> 2) & 1,
57	* (b >> 1) & 1,
58	* b & 1,
59	* cOnes & 1 ? "0" : "X86_EFL_PF");
60	* }
61	* return 0;
62	* }
63	* @endcode
64	*/
65	static uint8_t const g_afParity[256] =
66	{
67	/* 0000 = 00000000b */ X86_EFL_PF,
68	/* 0x01 = 00000001b */ 0,
69	/* 0x02 = 00000010b */ 0,
70	/* 0x03 = 00000011b */ X86_EFL_PF,
71	/* 0x04 = 00000100b */ 0,
72	/* 0x05 = 00000101b */ X86_EFL_PF,
73	/* 0x06 = 00000110b */ X86_EFL_PF,
74	/* 0x07 = 00000111b */ 0,
75	/* 0x08 = 00001000b */ 0,
76	/* 0x09 = 00001001b */ X86_EFL_PF,
77	/* 0x0a = 00001010b */ X86_EFL_PF,
78	/* 0x0b = 00001011b */ 0,
79	/* 0x0c = 00001100b */ X86_EFL_PF,
80	/* 0x0d = 00001101b */ 0,
81	/* 0x0e = 00001110b */ 0,
82	/* 0x0f = 00001111b */ X86_EFL_PF,
83	/* 0x10 = 00010000b */ 0,
84	/* 0x11 = 00010001b */ X86_EFL_PF,
85	/* 0x12 = 00010010b */ X86_EFL_PF,
86	/* 0x13 = 00010011b */ 0,
87	/* 0x14 = 00010100b */ X86_EFL_PF,
88	/* 0x15 = 00010101b */ 0,
89	/* 0x16 = 00010110b */ 0,
90	/* 0x17 = 00010111b */ X86_EFL_PF,
91	/* 0x18 = 00011000b */ X86_EFL_PF,
92	/* 0x19 = 00011001b */ 0,
93	/* 0x1a = 00011010b */ 0,
94	/* 0x1b = 00011011b */ X86_EFL_PF,
95	/* 0x1c = 00011100b */ 0,
96	/* 0x1d = 00011101b */ X86_EFL_PF,
97	/* 0x1e = 00011110b */ X86_EFL_PF,
98	/* 0x1f = 00011111b */ 0,
99	/* 0x20 = 00100000b */ 0,
100	/* 0x21 = 00100001b */ X86_EFL_PF,
101	/* 0x22 = 00100010b */ X86_EFL_PF,
102	/* 0x23 = 00100011b */ 0,
103	/* 0x24 = 00100100b */ X86_EFL_PF,
104	/* 0x25 = 00100101b */ 0,
105	/* 0x26 = 00100110b */ 0,
106	/* 0x27 = 00100111b */ X86_EFL_PF,
107	/* 0x28 = 00101000b */ X86_EFL_PF,
108	/* 0x29 = 00101001b */ 0,
109	/* 0x2a = 00101010b */ 0,
110	/* 0x2b = 00101011b */ X86_EFL_PF,
111	/* 0x2c = 00101100b */ 0,
112	/* 0x2d = 00101101b */ X86_EFL_PF,
113	/* 0x2e = 00101110b */ X86_EFL_PF,
114	/* 0x2f = 00101111b */ 0,
115	/* 0x30 = 00110000b */ X86_EFL_PF,
116	/* 0x31 = 00110001b */ 0,
117	/* 0x32 = 00110010b */ 0,
118	/* 0x33 = 00110011b */ X86_EFL_PF,
119	/* 0x34 = 00110100b */ 0,
120	/* 0x35 = 00110101b */ X86_EFL_PF,
121	/* 0x36 = 00110110b */ X86_EFL_PF,
122	/* 0x37 = 00110111b */ 0,
123	/* 0x38 = 00111000b */ 0,
124	/* 0x39 = 00111001b */ X86_EFL_PF,
125	/* 0x3a = 00111010b */ X86_EFL_PF,
126	/* 0x3b = 00111011b */ 0,
127	/* 0x3c = 00111100b */ X86_EFL_PF,
128	/* 0x3d = 00111101b */ 0,
129	/* 0x3e = 00111110b */ 0,
130	/* 0x3f = 00111111b */ X86_EFL_PF,
131	/* 0x40 = 01000000b */ 0,
132	/* 0x41 = 01000001b */ X86_EFL_PF,
133	/* 0x42 = 01000010b */ X86_EFL_PF,
134	/* 0x43 = 01000011b */ 0,
135	/* 0x44 = 01000100b */ X86_EFL_PF,
136	/* 0x45 = 01000101b */ 0,
137	/* 0x46 = 01000110b */ 0,
138	/* 0x47 = 01000111b */ X86_EFL_PF,
139	/* 0x48 = 01001000b */ X86_EFL_PF,
140	/* 0x49 = 01001001b */ 0,
141	/* 0x4a = 01001010b */ 0,
142	/* 0x4b = 01001011b */ X86_EFL_PF,
143	/* 0x4c = 01001100b */ 0,
144	/* 0x4d = 01001101b */ X86_EFL_PF,
145	/* 0x4e = 01001110b */ X86_EFL_PF,
146	/* 0x4f = 01001111b */ 0,
147	/* 0x50 = 01010000b */ X86_EFL_PF,
148	/* 0x51 = 01010001b */ 0,
149	/* 0x52 = 01010010b */ 0,
150	/* 0x53 = 01010011b */ X86_EFL_PF,
151	/* 0x54 = 01010100b */ 0,
152	/* 0x55 = 01010101b */ X86_EFL_PF,
153	/* 0x56 = 01010110b */ X86_EFL_PF,
154	/* 0x57 = 01010111b */ 0,
155	/* 0x58 = 01011000b */ 0,
156	/* 0x59 = 01011001b */ X86_EFL_PF,
157	/* 0x5a = 01011010b */ X86_EFL_PF,
158	/* 0x5b = 01011011b */ 0,
159	/* 0x5c = 01011100b */ X86_EFL_PF,
160	/* 0x5d = 01011101b */ 0,
161	/* 0x5e = 01011110b */ 0,
162	/* 0x5f = 01011111b */ X86_EFL_PF,
163	/* 0x60 = 01100000b */ X86_EFL_PF,
164	/* 0x61 = 01100001b */ 0,
165	/* 0x62 = 01100010b */ 0,
166	/* 0x63 = 01100011b */ X86_EFL_PF,
167	/* 0x64 = 01100100b */ 0,
168	/* 0x65 = 01100101b */ X86_EFL_PF,
169	/* 0x66 = 01100110b */ X86_EFL_PF,
170	/* 0x67 = 01100111b */ 0,
171	/* 0x68 = 01101000b */ 0,
172	/* 0x69 = 01101001b */ X86_EFL_PF,
173	/* 0x6a = 01101010b */ X86_EFL_PF,
174	/* 0x6b = 01101011b */ 0,
175	/* 0x6c = 01101100b */ X86_EFL_PF,
176	/* 0x6d = 01101101b */ 0,
177	/* 0x6e = 01101110b */ 0,
178	/* 0x6f = 01101111b */ X86_EFL_PF,
179	/* 0x70 = 01110000b */ 0,
180	/* 0x71 = 01110001b */ X86_EFL_PF,
181	/* 0x72 = 01110010b */ X86_EFL_PF,
182	/* 0x73 = 01110011b */ 0,
183	/* 0x74 = 01110100b */ X86_EFL_PF,
184	/* 0x75 = 01110101b */ 0,
185	/* 0x76 = 01110110b */ 0,
186	/* 0x77 = 01110111b */ X86_EFL_PF,
187	/* 0x78 = 01111000b */ X86_EFL_PF,
188	/* 0x79 = 01111001b */ 0,
189	/* 0x7a = 01111010b */ 0,
190	/* 0x7b = 01111011b */ X86_EFL_PF,
191	/* 0x7c = 01111100b */ 0,
192	/* 0x7d = 01111101b */ X86_EFL_PF,
193	/* 0x7e = 01111110b */ X86_EFL_PF,
194	/* 0x7f = 01111111b */ 0,
195	/* 0x80 = 10000000b */ 0,
196	/* 0x81 = 10000001b */ X86_EFL_PF,
197	/* 0x82 = 10000010b */ X86_EFL_PF,
198	/* 0x83 = 10000011b */ 0,
199	/* 0x84 = 10000100b */ X86_EFL_PF,
200	/* 0x85 = 10000101b */ 0,
201	/* 0x86 = 10000110b */ 0,
202	/* 0x87 = 10000111b */ X86_EFL_PF,
203	/* 0x88 = 10001000b */ X86_EFL_PF,
204	/* 0x89 = 10001001b */ 0,
205	/* 0x8a = 10001010b */ 0,
206	/* 0x8b = 10001011b */ X86_EFL_PF,
207	/* 0x8c = 10001100b */ 0,
208	/* 0x8d = 10001101b */ X86_EFL_PF,
209	/* 0x8e = 10001110b */ X86_EFL_PF,
210	/* 0x8f = 10001111b */ 0,
211	/* 0x90 = 10010000b */ X86_EFL_PF,
212	/* 0x91 = 10010001b */ 0,
213	/* 0x92 = 10010010b */ 0,
214	/* 0x93 = 10010011b */ X86_EFL_PF,
215	/* 0x94 = 10010100b */ 0,
216	/* 0x95 = 10010101b */ X86_EFL_PF,
217	/* 0x96 = 10010110b */ X86_EFL_PF,
218	/* 0x97 = 10010111b */ 0,
219	/* 0x98 = 10011000b */ 0,
220	/* 0x99 = 10011001b */ X86_EFL_PF,
221	/* 0x9a = 10011010b */ X86_EFL_PF,
222	/* 0x9b = 10011011b */ 0,
223	/* 0x9c = 10011100b */ X86_EFL_PF,
224	/* 0x9d = 10011101b */ 0,
225	/* 0x9e = 10011110b */ 0,
226	/* 0x9f = 10011111b */ X86_EFL_PF,
227	/* 0xa0 = 10100000b */ X86_EFL_PF,
228	/* 0xa1 = 10100001b */ 0,
229	/* 0xa2 = 10100010b */ 0,
230	/* 0xa3 = 10100011b */ X86_EFL_PF,
231	/* 0xa4 = 10100100b */ 0,
232	/* 0xa5 = 10100101b */ X86_EFL_PF,
233	/* 0xa6 = 10100110b */ X86_EFL_PF,
234	/* 0xa7 = 10100111b */ 0,
235	/* 0xa8 = 10101000b */ 0,
236	/* 0xa9 = 10101001b */ X86_EFL_PF,
237	/* 0xaa = 10101010b */ X86_EFL_PF,
238	/* 0xab = 10101011b */ 0,
239	/* 0xac = 10101100b */ X86_EFL_PF,
240	/* 0xad = 10101101b */ 0,
241	/* 0xae = 10101110b */ 0,
242	/* 0xaf = 10101111b */ X86_EFL_PF,
243	/* 0xb0 = 10110000b */ 0,
244	/* 0xb1 = 10110001b */ X86_EFL_PF,
245	/* 0xb2 = 10110010b */ X86_EFL_PF,
246	/* 0xb3 = 10110011b */ 0,
247	/* 0xb4 = 10110100b */ X86_EFL_PF,
248	/* 0xb5 = 10110101b */ 0,
249	/* 0xb6 = 10110110b */ 0,
250	/* 0xb7 = 10110111b */ X86_EFL_PF,
251	/* 0xb8 = 10111000b */ X86_EFL_PF,
252	/* 0xb9 = 10111001b */ 0,
253	/* 0xba = 10111010b */ 0,
254	/* 0xbb = 10111011b */ X86_EFL_PF,
255	/* 0xbc = 10111100b */ 0,
256	/* 0xbd = 10111101b */ X86_EFL_PF,
257	/* 0xbe = 10111110b */ X86_EFL_PF,
258	/* 0xbf = 10111111b */ 0,
259	/* 0xc0 = 11000000b */ X86_EFL_PF,
260	/* 0xc1 = 11000001b */ 0,
261	/* 0xc2 = 11000010b */ 0,
262	/* 0xc3 = 11000011b */ X86_EFL_PF,
263	/* 0xc4 = 11000100b */ 0,
264	/* 0xc5 = 11000101b */ X86_EFL_PF,
265	/* 0xc6 = 11000110b */ X86_EFL_PF,
266	/* 0xc7 = 11000111b */ 0,
267	/* 0xc8 = 11001000b */ 0,
268	/* 0xc9 = 11001001b */ X86_EFL_PF,
269	/* 0xca = 11001010b */ X86_EFL_PF,
270	/* 0xcb = 11001011b */ 0,
271	/* 0xcc = 11001100b */ X86_EFL_PF,
272	/* 0xcd = 11001101b */ 0,
273	/* 0xce = 11001110b */ 0,
274	/* 0xcf = 11001111b */ X86_EFL_PF,
275	/* 0xd0 = 11010000b */ 0,
276	/* 0xd1 = 11010001b */ X86_EFL_PF,
277	/* 0xd2 = 11010010b */ X86_EFL_PF,
278	/* 0xd3 = 11010011b */ 0,
279	/* 0xd4 = 11010100b */ X86_EFL_PF,
280	/* 0xd5 = 11010101b */ 0,
281	/* 0xd6 = 11010110b */ 0,
282	/* 0xd7 = 11010111b */ X86_EFL_PF,
283	/* 0xd8 = 11011000b */ X86_EFL_PF,
284	/* 0xd9 = 11011001b */ 0,
285	/* 0xda = 11011010b */ 0,
286	/* 0xdb = 11011011b */ X86_EFL_PF,
287	/* 0xdc = 11011100b */ 0,
288	/* 0xdd = 11011101b */ X86_EFL_PF,
289	/* 0xde = 11011110b */ X86_EFL_PF,
290	/* 0xdf = 11011111b */ 0,
291	/* 0xe0 = 11100000b */ 0,
292	/* 0xe1 = 11100001b */ X86_EFL_PF,
293	/* 0xe2 = 11100010b */ X86_EFL_PF,
294	/* 0xe3 = 11100011b */ 0,
295	/* 0xe4 = 11100100b */ X86_EFL_PF,
296	/* 0xe5 = 11100101b */ 0,
297	/* 0xe6 = 11100110b */ 0,
298	/* 0xe7 = 11100111b */ X86_EFL_PF,
299	/* 0xe8 = 11101000b */ X86_EFL_PF,
300	/* 0xe9 = 11101001b */ 0,
301	/* 0xea = 11101010b */ 0,
302	/* 0xeb = 11101011b */ X86_EFL_PF,
303	/* 0xec = 11101100b */ 0,
304	/* 0xed = 11101101b */ X86_EFL_PF,
305	/* 0xee = 11101110b */ X86_EFL_PF,
306	/* 0xef = 11101111b */ 0,
307	/* 0xf0 = 11110000b */ X86_EFL_PF,
308	/* 0xf1 = 11110001b */ 0,
309	/* 0xf2 = 11110010b */ 0,
310	/* 0xf3 = 11110011b */ X86_EFL_PF,
311	/* 0xf4 = 11110100b */ 0,
312	/* 0xf5 = 11110101b */ X86_EFL_PF,
313	/* 0xf6 = 11110110b */ X86_EFL_PF,
314	/* 0xf7 = 11110111b */ 0,
315	/* 0xf8 = 11111000b */ 0,
316	/* 0xf9 = 11111001b */ X86_EFL_PF,
317	/* 0xfa = 11111010b */ X86_EFL_PF,
318	/* 0xfb = 11111011b */ 0,
319	/* 0xfc = 11111100b */ X86_EFL_PF,
320	/* 0xfd = 11111101b */ 0,
321	/* 0xfe = 11111110b */ 0,
322	/* 0xff = 11111111b */ X86_EFL_PF,
323	};
324
325
326	/**
327	* Calculates the signed flag value given a result and it's bit width.
328	*
329	* The signed flag (SF) is a duplication of the most significant bit in the
330	* result.
331	*
332	* @returns X86_EFL_SF or 0.
333	* @param a_uResult Unsigned result value.
334	* @param a_cBitsWidth The width of the result (8, 16, 32, 64).
335	*/
336	#define X86_EFL_CALC_SF(a_uResult, a_cBitsWidth) \
337	( (uint32_t)((a_uResult) >> ((a_cBitsWidth) - X86_EFL_SF_BIT)) & X86_EFL_SF )
338
339	/**
340	* Calculates the zero flag value given a result.
341	*
342	* The zero flag (ZF) indicates whether the result is zero or not.
343	*
344	* @returns X86_EFL_ZF or 0.
345	* @param a_uResult Unsigned result value.
346	*/
347	#define X86_EFL_CALC_ZF(a_uResult) \
348	( (uint32_t)((a_uResult) == 0) << X86_EFL_ZF_BIT )
349
350	/**
351	* Updates the status bits (CF, PF, AF, ZF, SF, and OF) after a logical op.
352	*
353	* CF and OF are defined to be 0 by logical operations. AF on the other hand is
354	* undefined. We do not set AF, as that seems to make the most sense (which
355	* probably makes it the most wrong in real life).
356	*
357	* @returns Status bits.
358	* @param a_pfEFlags Pointer to the 32-bit EFLAGS value to update.
359	* @param a_uResult Unsigned result value.
360	* @param a_cBitsWidth The width of the result (8, 16, 32, 64).
361	* @param a_fExtra Additional bits to set.
362	*/
363	#define IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(a_pfEFlags, a_uResult, a_cBitsWidth, a_fExtra) \
364	do { \
365	uint32_t fEflTmp = *(a_pfEFlags); \
366	fEflTmp &= ~X86_EFL_STATUS_BITS; \
367	fEflTmp \|= g_afParity[(a_uResult) & 0xff]; \
368	fEflTmp \|= X86_EFL_CALC_ZF(a_uResult); \
369	fEflTmp \|= X86_EFL_CALC_SF(a_uResult, a_cBitsWidth); \
370	fEflTmp \|= (a_fExtra); \
371	*(a_pfEFlags) = fEflTmp; \
372	} while (0)
373
374
375	#ifdef RT_ARCH_X86
376	/*
377	* There are a few 64-bit on 32-bit things we'd rather do in C. Actually, doing
378	* it all in C is probably safer atm., optimize what's necessary later, maybe.
379	*/
380
381
382	/* Binary ops */
383
384	IEM_DECL_IMPL_DEF(void, iemAImpl_add_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
385	{
386	uint64_t uDst = *puDst;
387	uint64_t uResult = uDst + uSrc;
388	*puDst = uResult;
389
390	/* Calc EFLAGS. */
391	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
392	fEfl \|= (uResult < uDst) << X86_EFL_CF_BIT;
393	fEfl \|= g_afParity[uResult & 0xff];
394	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
395	fEfl \|= X86_EFL_CALC_ZF(uResult);
396	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
397	fEfl \|= (((uDst ^ uSrc ^ RT_BIT_64(63)) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
398	*pfEFlags = fEfl;
399	}
400
401
402	IEM_DECL_IMPL_DEF(void, iemAImpl_adc_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
403	{
404	if (!(*pfEFlags & X86_EFL_CF))
405	iemAImpl_add_u64(puDst, uSrc, pfEFlags);
406	else
407	{
408	uint64_t uDst = *puDst;
409	uint64_t uResult = uDst + uSrc + 1;
410	*puDst = uResult;
411
412	/* Calc EFLAGS. */
413	/** @todo verify AF and OF calculations. */
414	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
415	fEfl \|= (uResult <= uDst) << X86_EFL_CF_BIT;
416	fEfl \|= g_afParity[uResult & 0xff];
417	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
418	fEfl \|= X86_EFL_CALC_ZF(uResult);
419	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
420	fEfl \|= (((uDst ^ uSrc ^ RT_BIT_64(63)) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
421	*pfEFlags = fEfl;
422	}
423	}
424
425
426	IEM_DECL_IMPL_DEF(void, iemAImpl_sub_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
427	{
428	uint64_t uDst = *puDst;
429	uint64_t uResult = uDst - uSrc;
430	*puDst = uResult;
431
432	/* Calc EFLAGS. */
433	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
434	fEfl \|= (uDst < uSrc) << X86_EFL_CF_BIT;
435	fEfl \|= g_afParity[uResult & 0xff];
436	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
437	fEfl \|= X86_EFL_CALC_ZF(uResult);
438	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
439	fEfl \|= (((uDst ^ uSrc) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
440	*pfEFlags = fEfl;
441	}
442
443
444	IEM_DECL_IMPL_DEF(void, iemAImpl_sbb_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
445	{
446	if (!(*pfEFlags & X86_EFL_CF))
447	iemAImpl_sub_u64(puDst, uSrc, pfEFlags);
448	else
449	{
450	uint64_t uDst = *puDst;
451	uint64_t uResult = uDst - uSrc - 1;
452	*puDst = uResult;
453
454	/* Calc EFLAGS. */
455	/** @todo verify AF and OF calculations. */
456	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
457	fEfl \|= (uDst <= uSrc) << X86_EFL_CF_BIT;
458	fEfl \|= g_afParity[uResult & 0xff];
459	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
460	fEfl \|= X86_EFL_CALC_ZF(uResult);
461	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
462	fEfl \|= (((uDst ^ uSrc) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
463	*pfEFlags = fEfl;
464	}
465	}
466
467
468	IEM_DECL_IMPL_DEF(void, iemAImpl_or_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
469	{
470	uint64_t uResult = *puDst \| uSrc;
471	*puDst = uResult;
472	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
473	}
474
475
476	IEM_DECL_IMPL_DEF(void, iemAImpl_xor_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
477	{
478	uint64_t uResult = *puDst ^ uSrc;
479	*puDst = uResult;
480	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
481	}
482
483
484	IEM_DECL_IMPL_DEF(void, iemAImpl_and_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
485	{
486	uint64_t uResult = *puDst & uSrc;
487	*puDst = uResult;
488	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
489	}
490
491
492	IEM_DECL_IMPL_DEF(void, iemAImpl_cmp_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
493	{
494	uint64_t uDstTmp = *puDst;
495	iemAImpl_sub_u64(&uDstTmp, uSrc, pfEFlags);
496	}
497
498
499	IEM_DECL_IMPL_DEF(void, iemAImpl_test_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
500	{
501	uint64_t uResult = *puDst & uSrc;
502	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
503	}
504
505
506	/** 64-bit locked binary operand operation. */
507	# define DO_LOCKED_BIN_OP_U64(a_Mnemonic) \
508	do { \
509	uint64_t uOld = ASMAtomicReadU64(puDst); \
510	uint64_t uTmp; \
511	uint32_t fEflTmp; \
512	do \
513	{ \
514	uTmp = uOld; \
515	fEflTmp = *pfEFlags; \
516	iemAImpl_ ## a_Mnemonic ## _u64(&uTmp, uSrc, &fEflTmp); \
517	} while (ASMAtomicCmpXchgExU64(puDst, uTmp, uOld, &uOld)); \
518	*pfEFlags = fEflTmp; \
519	} while (0)
520
521
522	IEM_DECL_IMPL_DEF(void, iemAImpl_add_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
523	{
524	DO_LOCKED_BIN_OP_U64(adc);
525	}
526
527
528	IEM_DECL_IMPL_DEF(void, iemAImpl_adc_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
529	{
530	DO_LOCKED_BIN_OP_U64(adc);
531	}
532
533
534	IEM_DECL_IMPL_DEF(void, iemAImpl_sub_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
535	{
536	DO_LOCKED_BIN_OP_U64(sub);
537	}
538
539
540	IEM_DECL_IMPL_DEF(void, iemAImpl_sbb_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
541	{
542	DO_LOCKED_BIN_OP_U64(sbb);
543	}
544
545
546	IEM_DECL_IMPL_DEF(void, iemAImpl_or_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
547	{
548	DO_LOCKED_BIN_OP_U64(or);
549	}
550
551
552	IEM_DECL_IMPL_DEF(void, iemAImpl_xor_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
553	{
554	DO_LOCKED_BIN_OP_U64(xor);
555	}
556
557
558	IEM_DECL_IMPL_DEF(void, iemAImpl_and_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
559	{
560	DO_LOCKED_BIN_OP_U64(and);
561	}
562
563
564	/* Bit operations (same signature as above). */
565
566	IEM_DECL_IMPL_DEF(void, iemAImpl_bt_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
567	{
568	/* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
569	logical operation (AND/OR/whatever). */
570	Assert(uSrc < 64);
571	uint64_t uDst = *puDst;
572	if (uDst & RT_BIT_64(uSrc))
573	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
574	else
575	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
576	}
577
578	IEM_DECL_IMPL_DEF(void, iemAImpl_btc_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
579	{
580	/* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
581	logical operation (AND/OR/whatever). */
582	Assert(uSrc < 64);
583	uint64_t fMask = RT_BIT_64(uSrc);
584	uint64_t uDst = *puDst;
585	if (uDst & fMask)
586	{
587	uDst &= ~fMask;
588	*puDst = uDst;
589	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
590	}
591	else
592	{
593	uDst \|= fMask;
594	*puDst = uDst;
595	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
596	}
597	}
598
599	IEM_DECL_IMPL_DEF(void, iemAImpl_btr_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
600	{
601	/* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
602	logical operation (AND/OR/whatever). */
603	Assert(uSrc < 64);
604	uint64_t fMask = RT_BIT_64(uSrc);
605	uint64_t uDst = *puDst;
606	if (uDst & fMask)
607	{
608	uDst &= ~fMask;
609	*puDst = uDst;
610	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
611	}
612	else
613	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
614	}
615
616	IEM_DECL_IMPL_DEF(void, iemAImpl_bts_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
617	{
618	/* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
619	logical operation (AND/OR/whatever). */
620	Assert(uSrc < 64);
621	uint64_t fMask = RT_BIT_64(uSrc);
622	uint64_t uDst = *puDst;
623	if (uDst & fMask)
624	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
625	else
626	{
627	uDst \|= fMask;
628	*puDst = uDst;
629	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
630	}
631	}
632
633
634	IEM_DECL_IMPL_DEF(void, iemAImpl_btc_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
635	{
636	DO_LOCKED_BIN_OP_U64(btc);
637	}
638
639	IEM_DECL_IMPL_DEF(void, iemAImpl_btr_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
640	{
641	DO_LOCKED_BIN_OP_U64(btr);
642	}
643
644	IEM_DECL_IMPL_DEF(void, iemAImpl_bts_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
645	{
646	DO_LOCKED_BIN_OP_U64(bts);
647	}
648
649
650	/* bit scan */
651
652	IEM_DECL_IMPL_DEF(void, iemAImpl_bsf_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
653	{
654	/* Note! "undefined" flags: OF, SF, AF, PF, CF. */
655	/** @todo check what real CPUs does. */
656	if (uSrc)
657	{
658	uint8_t iBit;
659	uint32_t u32Src;
660	if (uSrc & UINT32_MAX)
661	{
662	iBit = 0;
663	u32Src = uSrc;
664	}
665	else
666	{
667	iBit = 32;
668	u32Src = uSrc >> 32;
669	}
670	if (!(u32Src & UINT16_MAX))
671	{
672	iBit += 16;
673	u32Src >>= 16;
674	}
675	if (!(u32Src & UINT8_MAX))
676	{
677	iBit += 8;
678	u32Src >>= 8;
679	}
680	if (!(u32Src & 0xf))
681	{
682	iBit += 4;
683	u32Src >>= 4;
684	}
685	if (!(u32Src & 0x3))
686	{
687	iBit += 2;
688	u32Src >>= 2;
689	}
690	if (!(u32Src & 1))
691	{
692	iBit += 1;
693	Assert(u32Src & 2);
694	}
695
696	*puDst = iBit;
697	*pfEFlags &= ~X86_EFL_ZF;
698	}
699	else
700	*pfEFlags \|= X86_EFL_ZF;
701	}
702
703	IEM_DECL_IMPL_DEF(void, iemAImpl_bsr_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
704	{
705	/* Note! "undefined" flags: OF, SF, AF, PF, CF. */
706	/** @todo check what real CPUs does. */
707	if (uSrc)
708	{
709	uint8_t iBit;
710	uint32_t u32Src;
711	if (uSrc & UINT64_C(0xffffffff00000000))
712	{
713	iBit = 64;
714	u32Src = uSrc >> 32;
715	}
716	else
717	{
718	iBit = 32;
719	u32Src = uSrc;
720	}
721	if (!(u32Src & UINT32_C(0xffff0000)))
722	{
723	iBit -= 16;
724	u32Src <<= 16;
725	}
726	if (!(u32Src & UINT32_C(0xff000000)))
727	{
728	iBit -= 8;
729	u32Src <<= 8;
730	}
731	if (!(u32Src & UINT32_C(0xf0000000)))
732	{
733	iBit -= 4;
734	u32Src <<= 4;
735	}
736	if (!(u32Src & UINT32_C(0xc0000000)))
737	{
738	iBit -= 2;
739	u32Src <<= 2;
740	}
741	if (!(u32Src & UINT32_C(0x10000000)))
742	{
743	iBit -= 1;
744	u32Src <<= 1;
745	Assert(u32Src & RT_BIT_64(63));
746	}
747
748	*puDst = iBit;
749	*pfEFlags &= ~X86_EFL_ZF;
750	}
751	else
752	*pfEFlags \|= X86_EFL_ZF;
753	}
754
755
756	/* Unary operands. */
757
758	IEM_DECL_IMPL_DEF(void, iemAImpl_inc_u64,(uint64_t puDst, uint32_t pfEFlags))
759	{
760	uint64_t uDst = *puDst;
761	uint64_t uResult = uDst + 1;
762	*puDst = uResult;
763
764	/*
765	* Calc EFLAGS.
766	* CF is NOT modified for hysterical raisins (allegedly for carrying and
767	* borrowing in arithmetic loops on intel 8008).
768	*/
769	uint32_t fEfl = *pfEFlags & ~(X86_EFL_STATUS_BITS & ~X86_EFL_CF);
770	fEfl \|= g_afParity[uResult & 0xff];
771	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uDst) & X86_EFL_AF;
772	fEfl \|= X86_EFL_CALC_ZF(uResult);
773	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
774	fEfl \|= (((uDst ^ RT_BIT_64(63)) & uResult) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
775	*pfEFlags = fEfl;
776	}
777
778
779	IEM_DECL_IMPL_DEF(void, iemAImpl_dec_u64,(uint64_t puDst, uint32_t pfEFlags))
780	{
781	uint64_t uDst = *puDst;
782	uint64_t uResult = uDst - 1;
783	*puDst = uResult;
784
785	/*
786	* Calc EFLAGS.
787	* CF is NOT modified for hysterical raisins (allegedly for carrying and
788	* borrowing in arithmetic loops on intel 8008).
789	*/
790	uint32_t fEfl = *pfEFlags & ~(X86_EFL_STATUS_BITS & ~X86_EFL_CF);
791	fEfl \|= g_afParity[uResult & 0xff];
792	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uDst) & X86_EFL_AF;
793	fEfl \|= X86_EFL_CALC_ZF(uResult);
794	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
795	fEfl \|= ((uDst & (uResult ^ RT_BIT_64(63))) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
796	*pfEFlags = fEfl;
797	}
798
799
800	IEM_DECL_IMPL_DEF(void, iemAImpl_not_u64,(uint64_t puDst, uint32_t pfEFlags))
801	{
802	uint64_t uDst = *puDst;
803	uint64_t uResult = ~uDst;
804	*puDst = uResult;
805	/* EFLAGS are not modified. */
806	}
807
808
809	IEM_DECL_IMPL_DEF(void, iemAImpl_neg_u64,(uint64_t puDst, uint32_t pfEFlags))
810	{
811	uint64_t uDst = 0;
812	uint64_t uSrc = *puDst;
813	uint64_t uResult = uDst - uSrc;
814	*puDst = uResult;
815
816	/* Calc EFLAGS. */
817	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
818	fEfl \|= (uSrc != 0) << X86_EFL_CF_BIT;
819	fEfl \|= g_afParity[uResult & 0xff];
820	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uDst) & X86_EFL_AF;
821	fEfl \|= X86_EFL_CALC_ZF(uResult);
822	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
823	fEfl \|= ((uSrc & uResult) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
824	*pfEFlags = fEfl;
825	}
826
827
828	/** 64-bit locked unary operand operation. */
829	# define DO_LOCKED_UNARY_OP_U64(a_Mnemonic) \
830	do { \
831	uint64_t uOld = ASMAtomicReadU64(puDst); \
832	uint64_t uTmp; \
833	uint32_t fEflTmp; \
834	do \
835	{ \
836	uTmp = uOld; \
837	fEflTmp = *pfEFlags; \
838	iemAImpl_ ## a_Mnemonic ## _u64(&uTmp, &fEflTmp); \
839	} while (ASMAtomicCmpXchgExU64(puDst, uTmp, uOld, &uOld)); \
840	*pfEFlags = fEflTmp; \
841	} while (0)
842
843	IEM_DECL_IMPL_DEF(void, iemAImpl_inc_u64_locked,(uint64_t puDst, uint32_t pfEFlags))
844	{
845	DO_LOCKED_UNARY_OP_U64(inc);
846	}
847
848
849	IEM_DECL_IMPL_DEF(void, iemAImpl_dec_u64_locked,(uint64_t puDst, uint32_t pfEFlags))
850	{
851	DO_LOCKED_UNARY_OP_U64(dec);
852	}
853
854
855	IEM_DECL_IMPL_DEF(void, iemAImpl_not_u64_locked,(uint64_t puDst, uint32_t pfEFlags))
856	{
857	DO_LOCKED_UNARY_OP_U64(not);
858	}
859
860
861	IEM_DECL_IMPL_DEF(void, iemAImpl_neg_u64_locked,(uint64_t puDst, uint32_t pfEFlags))
862	{
863	DO_LOCKED_UNARY_OP_U64(neg);
864	}
865
866
867	/* Shift and rotate. */
868
869	IEM_DECL_IMPL_DEF(void, iemAImpl_rol_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
870	{
871	cShift &= 63;
872	if (cShift)
873	{
874	uint64_t uDst = *puDst;
875	uint64_t uResult;
876	uResult = uDst << cShift;
877	uResult \|= uDst >> (64 - cShift);
878	*puDst = uResult;
879
880	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
881	it the same way as for 1 bit shifts. */
882	AssertCompile(X86_EFL_CF_BIT == 0);
883	uint32_t fEfl = *pfEFlags & ~(X86_EFL_CF \| X86_EFL_OF);
884	uint32_t fCarry = (uResult & 1);
885	fEfl \|= fCarry;
886	fEfl \|= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
887	*pfEFlags = fEfl;
888	}
889	}
890
891
892	IEM_DECL_IMPL_DEF(void, iemAImpl_ror_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
893	{
894	cShift &= 63;
895	if (cShift)
896	{
897	uint64_t uDst = *puDst;
898	uint64_t uResult;
899	uResult = uDst >> cShift;
900	uResult \|= uDst << (64 - cShift);
901	*puDst = uResult;
902
903	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
904	it the same way as for 1 bit shifts (OF = OF XOR New-CF). */
905	AssertCompile(X86_EFL_CF_BIT == 0);
906	uint32_t fEfl = *pfEFlags & ~(X86_EFL_CF \| X86_EFL_OF);
907	uint32_t fCarry = (uResult >> 63) & X86_EFL_CF;
908	fEfl \|= fCarry;
909	fEfl \|= (((uResult >> 62) ^ fCarry) << X86_EFL_OF_BIT) & X86_EFL_OF;
910	*pfEFlags = fEfl;
911	}
912	}
913
914
915	IEM_DECL_IMPL_DEF(void, iemAImpl_rcl_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
916	{
917	cShift &= 63;
918	if (cShift)
919	{
920	uint32_t fEfl = *pfEFlags;
921	uint64_t uDst = *puDst;
922	uint64_t uResult;
923	uResult = uDst << cShift;
924	AssertCompile(X86_EFL_CF_BIT == 0);
925	if (cShift > 1)
926	uResult \|= uDst >> (65 - cShift);
927	uResult \|= (uint64_t)(fEfl & X86_EFL_CF) << (cShift - 1);
928	*puDst = uResult;
929
930	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
931	it the same way as for 1 bit shifts. */
932	uint32_t fCarry = (uDst >> (64 - cShift)) & X86_EFL_CF;
933	fEfl &= ~(X86_EFL_CF \| X86_EFL_OF);
934	fEfl \|= fCarry;
935	fEfl \|= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
936	*pfEFlags = fEfl;
937	}
938	}
939
940
941	IEM_DECL_IMPL_DEF(void, iemAImpl_rcr_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
942	{
943	cShift &= 63;
944	if (cShift)
945	{
946	uint32_t fEfl = *pfEFlags;
947	uint64_t uDst = *puDst;
948	uint64_t uResult;
949	uResult = uDst >> cShift;
950	AssertCompile(X86_EFL_CF_BIT == 0);
951	if (cShift > 1)
952	uResult \|= uDst << (65 - cShift);
953	uResult \|= (uint64_t)(fEfl & X86_EFL_CF) << (64 - cShift);
954	*puDst = uResult;
955
956	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
957	it the same way as for 1 bit shifts. */
958	uint32_t fCarry = (uDst >> (cShift - 1)) & X86_EFL_CF;
959	fEfl &= ~(X86_EFL_CF \| X86_EFL_OF);
960	fEfl \|= fCarry;
961	fEfl \|= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
962	*pfEFlags = fEfl;
963	}
964	}
965
966
967	IEM_DECL_IMPL_DEF(void, iemAImpl_shl_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
968	{
969	cShift &= 63;
970	if (cShift)
971	{
972	uint64_t uDst = *puDst;
973	uint64_t uResult = uDst << cShift;
974	*puDst = uResult;
975
976	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
977	it the same way as for 1 bit shifts. The AF bit is undefined, we
978	always set it to zero atm. */
979	AssertCompile(X86_EFL_CF_BIT == 0);
980	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
981	uint32_t fCarry = (uDst >> (64 - cShift)) & X86_EFL_CF;
982	fEfl \|= fCarry;
983	fEfl \|= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
984	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
985	fEfl \|= X86_EFL_CALC_ZF(uResult);
986	fEfl \|= g_afParity[uResult & 0xff];
987	*pfEFlags = fEfl;
988	}
989	}
990
991
992	IEM_DECL_IMPL_DEF(void, iemAImpl_shr_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
993	{
994	cShift &= 63;
995	if (cShift)
996	{
997	uint64_t uDst = *puDst;
998	uint64_t uResult = uDst >> cShift;
999	*puDst = uResult;
1000
1001	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1002	it the same way as for 1 bit shifts. The AF bit is undefined, we
1003	always set it to zero atm. */
1004	AssertCompile(X86_EFL_CF_BIT == 0);
1005	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1006	fEfl \|= (uDst >> (cShift - 1)) & X86_EFL_CF;
1007	fEfl \|= (uDst >> 63) << X86_EFL_OF_BIT;
1008	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
1009	fEfl \|= X86_EFL_CALC_ZF(uResult);
1010	fEfl \|= g_afParity[uResult & 0xff];
1011	*pfEFlags = fEfl;
1012	}
1013	}
1014
1015
1016	IEM_DECL_IMPL_DEF(void, iemAImpl_sar_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
1017	{
1018	cShift &= 63;
1019	if (cShift)
1020	{
1021	uint64_t uDst = *puDst;
1022	uint64_t uResult = (int64_t)uDst >> cShift;
1023	*puDst = uResult;
1024
1025	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1026	it the same way as for 1 bit shifts (0). The AF bit is undefined,
1027	we always set it to zero atm. */
1028	AssertCompile(X86_EFL_CF_BIT == 0);
1029	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1030	fEfl \|= (uDst >> (cShift - 1)) & X86_EFL_CF;
1031	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
1032	fEfl \|= X86_EFL_CALC_ZF(uResult);
1033	fEfl \|= g_afParity[uResult & 0xff];
1034	*pfEFlags = fEfl;
1035	}
1036	}
1037
1038
1039	IEM_DECL_IMPL_DEF(void, iemAImpl_shld_u64,(uint64_t puDst, uint64_t uSrc, uint8_t cShift, uint32_t pfEFlags))
1040	{
1041	cShift &= 63;
1042	if (cShift)
1043	{
1044	uint64_t uDst = *puDst;
1045	uint64_t uResult;
1046	uResult = uDst << cShift;
1047	uResult \|= uSrc >> (64 - cShift);
1048	*puDst = uResult;
1049
1050	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1051	it the same way as for 1 bit shifts. The AF bit is undefined,
1052	we always set it to zero atm. */
1053	AssertCompile(X86_EFL_CF_BIT == 0);
1054	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1055	fEfl \|= (uDst >> (64 - cShift)) & X86_EFL_CF;
1056	fEfl \|= (uint32_t)((uDst >> 63) ^ (uint32_t)(uResult >> 63)) << X86_EFL_OF_BIT;
1057	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
1058	fEfl \|= X86_EFL_CALC_ZF(uResult);
1059	fEfl \|= g_afParity[uResult & 0xff];
1060	*pfEFlags = fEfl;
1061	}
1062	}
1063
1064
1065	IEM_DECL_IMPL_DEF(void, iemAImpl_shrd_u64,(uint64_t puDst, uint64_t uSrc, uint8_t cShift, uint32_t pfEFlags))
1066	{
1067	cShift &= 63;
1068	if (cShift)
1069	{
1070	uint64_t uDst = *puDst;
1071	uint64_t uResult;
1072	uResult = uDst >> cShift;
1073	uResult \|= uSrc << (64 - cShift);
1074	*puDst = uResult;
1075
1076	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1077	it the same way as for 1 bit shifts. The AF bit is undefined,
1078	we always set it to zero atm. */
1079	AssertCompile(X86_EFL_CF_BIT == 0);
1080	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1081	fEfl \|= (uDst >> (cShift - 1)) & X86_EFL_CF;
1082	fEfl \|= (uint32_t)((uDst >> 63) ^ (uint32_t)(uResult >> 63)) << X86_EFL_OF_BIT;
1083	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
1084	fEfl \|= X86_EFL_CALC_ZF(uResult);
1085	fEfl \|= g_afParity[uResult & 0xff];
1086	*pfEFlags = fEfl;
1087	}
1088	}
1089
1090
1091	/* multiplication and division */
1092
1093	IEM_DECL_IMPL_DEF(int, iemAImpl_mul_u64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64Factor, uint32_t *pfEFlags))
1094	{
1095	AssertFailed();
1096	return -1;
1097	}
1098
1099
1100	IEM_DECL_IMPL_DEF(int, iemAImpl_imul_u64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64Factor, uint32_t *pfEFlags))
1101	{
1102	AssertFailed();
1103	return -1;
1104	}
1105
1106
1107	IEM_DECL_IMPL_DEF(void, iemAImpl_imul_two_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
1108	{
1109	AssertFailed();
1110	}
1111
1112
1113
1114	IEM_DECL_IMPL_DEF(int, iemAImpl_div_u64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64Divisor, uint32_t *pfEFlags))
1115	{
1116	AssertFailed();
1117	return -1;
1118	}
1119
1120
1121	IEM_DECL_IMPL_DEF(int, iemAImpl_idiv_u64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64Divisor, uint32_t *pfEFlags))
1122	{
1123	AssertFailed();
1124	return -1;
1125	}
1126
1127
1128	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t puMem, uint64_t puReg))
1129	{
1130	/* XCHG implies LOCK. */
1131	uint64_t uOldMem = *puMem;
1132	while (!ASMAtomicCmpXchgExU64(puMem, *puReg, uOldMem, &uOldMem))
1133	ASMNopPause();
1134	*puReg = uOldMem;
1135	}
1136
1137
1138	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t puDst, uint64_t puReg, uint32_t *pfEFlags))
1139	{
1140	uint64_t uDst = *puDst;
1141	uint64_t uResult = uDst;
1142	iemAImpl_add_u64(&uResult, *puReg, pfEFlags);
1143	*puDst = uResult;
1144	*puReg = uDst;
1145	}
1146
1147
1148	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t puDst, uint64_t puReg, uint32_t *pfEFlags))
1149	{
1150	uint64_t uOld = ASMAtomicReadU64(puDst);
1151	uint64_t uTmpDst;
1152	uint32_t fEflTmp;
1153	do
1154	{
1155	uTmpDst = uOld;
1156	fEflTmp = *pfEFlags;
1157	iemAImpl_add_u64(&uTmpDst, *puReg, pfEFlags);
1158	} while (ASMAtomicCmpXchgExU64(puDst, uTmpDst, uOld, &uOld));
1159	*puReg = uOld;
1160	*pfEFlags = fEflTmp;
1161	}
1162
1163
1164	#endif /* RT_ARCH_X86 */
1165
1166
1167	IEM_DECL_IMPL_DEF(void, iemAImpl_arpl,(uint16_t pu16Dst, uint16_t u16Src, uint32_t pfEFlags))
1168	{
1169	if ((*pu16Dst & X86_SEL_RPL) < (u16Src & X86_SEL_RPL))
1170	{
1171	*pu16Dst &= X86_SEL_MASK_OFF_RPL;
1172	*pu16Dst \|= u16Src & X86_SEL_RPL;
1173
1174	*pfEFlags \|= X86_EFL_ZF;
1175	}
1176	else
1177	*pfEFlags &= ~X86_EFL_ZF;
1178	}
1179

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source: vbox/trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp@ 48172

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