IEMAllAImplC.cpp@ 62402

Last change on this file since 62402 was 62402, checked in by vboxsync, 8 years ago
iemAImpl_imul_u64: Use RTUint128AssignNeg.
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File size: 40.7 KB

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1	/* $Id: IEMAllAImplC.cpp 62402 2016-07-21 13:52:37Z vboxsync $ */
2	/** @file
3	* IEM - Instruction Implementation in Assembly, portable C variant.
4	*/
5
6	/*
7	* Copyright (C) 2011-2016 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#include "IEMInternal.h"
23	#include <VBox/vmm/vm.h>
24	#include <iprt/x86.h>
25	#include <iprt/uint128.h>
26
27
28	/*********************************************************************************************************************************
29	* Global Variables *
30	*********************************************************************************************************************************/
31	/**
32	* Parity calculation table.
33	*
34	* The generator code:
35	* @code
36	* #include <stdio.h>
37	*
38	* int main()
39	* {
40	* unsigned b;
41	* for (b = 0; b < 256; b++)
42	* {
43	* int cOnes = ( b & 1)
44	* + ((b >> 1) & 1)
45	* + ((b >> 2) & 1)
46	* + ((b >> 3) & 1)
47	* + ((b >> 4) & 1)
48	* + ((b >> 5) & 1)
49	* + ((b >> 6) & 1)
50	* + ((b >> 7) & 1);
51	* printf(" /" "* %#04x = %u%u%u%u%u%u%u%ub *" "/ %s,\n",
52	* b,
53	* (b >> 7) & 1,
54	* (b >> 6) & 1,
55	* (b >> 5) & 1,
56	* (b >> 4) & 1,
57	* (b >> 3) & 1,
58	* (b >> 2) & 1,
59	* (b >> 1) & 1,
60	* b & 1,
61	* cOnes & 1 ? "0" : "X86_EFL_PF");
62	* }
63	* return 0;
64	* }
65	* @endcode
66	*/
67	static uint8_t const g_afParity[256] =
68	{
69	/* 0000 = 00000000b */ X86_EFL_PF,
70	/* 0x01 = 00000001b */ 0,
71	/* 0x02 = 00000010b */ 0,
72	/* 0x03 = 00000011b */ X86_EFL_PF,
73	/* 0x04 = 00000100b */ 0,
74	/* 0x05 = 00000101b */ X86_EFL_PF,
75	/* 0x06 = 00000110b */ X86_EFL_PF,
76	/* 0x07 = 00000111b */ 0,
77	/* 0x08 = 00001000b */ 0,
78	/* 0x09 = 00001001b */ X86_EFL_PF,
79	/* 0x0a = 00001010b */ X86_EFL_PF,
80	/* 0x0b = 00001011b */ 0,
81	/* 0x0c = 00001100b */ X86_EFL_PF,
82	/* 0x0d = 00001101b */ 0,
83	/* 0x0e = 00001110b */ 0,
84	/* 0x0f = 00001111b */ X86_EFL_PF,
85	/* 0x10 = 00010000b */ 0,
86	/* 0x11 = 00010001b */ X86_EFL_PF,
87	/* 0x12 = 00010010b */ X86_EFL_PF,
88	/* 0x13 = 00010011b */ 0,
89	/* 0x14 = 00010100b */ X86_EFL_PF,
90	/* 0x15 = 00010101b */ 0,
91	/* 0x16 = 00010110b */ 0,
92	/* 0x17 = 00010111b */ X86_EFL_PF,
93	/* 0x18 = 00011000b */ X86_EFL_PF,
94	/* 0x19 = 00011001b */ 0,
95	/* 0x1a = 00011010b */ 0,
96	/* 0x1b = 00011011b */ X86_EFL_PF,
97	/* 0x1c = 00011100b */ 0,
98	/* 0x1d = 00011101b */ X86_EFL_PF,
99	/* 0x1e = 00011110b */ X86_EFL_PF,
100	/* 0x1f = 00011111b */ 0,
101	/* 0x20 = 00100000b */ 0,
102	/* 0x21 = 00100001b */ X86_EFL_PF,
103	/* 0x22 = 00100010b */ X86_EFL_PF,
104	/* 0x23 = 00100011b */ 0,
105	/* 0x24 = 00100100b */ X86_EFL_PF,
106	/* 0x25 = 00100101b */ 0,
107	/* 0x26 = 00100110b */ 0,
108	/* 0x27 = 00100111b */ X86_EFL_PF,
109	/* 0x28 = 00101000b */ X86_EFL_PF,
110	/* 0x29 = 00101001b */ 0,
111	/* 0x2a = 00101010b */ 0,
112	/* 0x2b = 00101011b */ X86_EFL_PF,
113	/* 0x2c = 00101100b */ 0,
114	/* 0x2d = 00101101b */ X86_EFL_PF,
115	/* 0x2e = 00101110b */ X86_EFL_PF,
116	/* 0x2f = 00101111b */ 0,
117	/* 0x30 = 00110000b */ X86_EFL_PF,
118	/* 0x31 = 00110001b */ 0,
119	/* 0x32 = 00110010b */ 0,
120	/* 0x33 = 00110011b */ X86_EFL_PF,
121	/* 0x34 = 00110100b */ 0,
122	/* 0x35 = 00110101b */ X86_EFL_PF,
123	/* 0x36 = 00110110b */ X86_EFL_PF,
124	/* 0x37 = 00110111b */ 0,
125	/* 0x38 = 00111000b */ 0,
126	/* 0x39 = 00111001b */ X86_EFL_PF,
127	/* 0x3a = 00111010b */ X86_EFL_PF,
128	/* 0x3b = 00111011b */ 0,
129	/* 0x3c = 00111100b */ X86_EFL_PF,
130	/* 0x3d = 00111101b */ 0,
131	/* 0x3e = 00111110b */ 0,
132	/* 0x3f = 00111111b */ X86_EFL_PF,
133	/* 0x40 = 01000000b */ 0,
134	/* 0x41 = 01000001b */ X86_EFL_PF,
135	/* 0x42 = 01000010b */ X86_EFL_PF,
136	/* 0x43 = 01000011b */ 0,
137	/* 0x44 = 01000100b */ X86_EFL_PF,
138	/* 0x45 = 01000101b */ 0,
139	/* 0x46 = 01000110b */ 0,
140	/* 0x47 = 01000111b */ X86_EFL_PF,
141	/* 0x48 = 01001000b */ X86_EFL_PF,
142	/* 0x49 = 01001001b */ 0,
143	/* 0x4a = 01001010b */ 0,
144	/* 0x4b = 01001011b */ X86_EFL_PF,
145	/* 0x4c = 01001100b */ 0,
146	/* 0x4d = 01001101b */ X86_EFL_PF,
147	/* 0x4e = 01001110b */ X86_EFL_PF,
148	/* 0x4f = 01001111b */ 0,
149	/* 0x50 = 01010000b */ X86_EFL_PF,
150	/* 0x51 = 01010001b */ 0,
151	/* 0x52 = 01010010b */ 0,
152	/* 0x53 = 01010011b */ X86_EFL_PF,
153	/* 0x54 = 01010100b */ 0,
154	/* 0x55 = 01010101b */ X86_EFL_PF,
155	/* 0x56 = 01010110b */ X86_EFL_PF,
156	/* 0x57 = 01010111b */ 0,
157	/* 0x58 = 01011000b */ 0,
158	/* 0x59 = 01011001b */ X86_EFL_PF,
159	/* 0x5a = 01011010b */ X86_EFL_PF,
160	/* 0x5b = 01011011b */ 0,
161	/* 0x5c = 01011100b */ X86_EFL_PF,
162	/* 0x5d = 01011101b */ 0,
163	/* 0x5e = 01011110b */ 0,
164	/* 0x5f = 01011111b */ X86_EFL_PF,
165	/* 0x60 = 01100000b */ X86_EFL_PF,
166	/* 0x61 = 01100001b */ 0,
167	/* 0x62 = 01100010b */ 0,
168	/* 0x63 = 01100011b */ X86_EFL_PF,
169	/* 0x64 = 01100100b */ 0,
170	/* 0x65 = 01100101b */ X86_EFL_PF,
171	/* 0x66 = 01100110b */ X86_EFL_PF,
172	/* 0x67 = 01100111b */ 0,
173	/* 0x68 = 01101000b */ 0,
174	/* 0x69 = 01101001b */ X86_EFL_PF,
175	/* 0x6a = 01101010b */ X86_EFL_PF,
176	/* 0x6b = 01101011b */ 0,
177	/* 0x6c = 01101100b */ X86_EFL_PF,
178	/* 0x6d = 01101101b */ 0,
179	/* 0x6e = 01101110b */ 0,
180	/* 0x6f = 01101111b */ X86_EFL_PF,
181	/* 0x70 = 01110000b */ 0,
182	/* 0x71 = 01110001b */ X86_EFL_PF,
183	/* 0x72 = 01110010b */ X86_EFL_PF,
184	/* 0x73 = 01110011b */ 0,
185	/* 0x74 = 01110100b */ X86_EFL_PF,
186	/* 0x75 = 01110101b */ 0,
187	/* 0x76 = 01110110b */ 0,
188	/* 0x77 = 01110111b */ X86_EFL_PF,
189	/* 0x78 = 01111000b */ X86_EFL_PF,
190	/* 0x79 = 01111001b */ 0,
191	/* 0x7a = 01111010b */ 0,
192	/* 0x7b = 01111011b */ X86_EFL_PF,
193	/* 0x7c = 01111100b */ 0,
194	/* 0x7d = 01111101b */ X86_EFL_PF,
195	/* 0x7e = 01111110b */ X86_EFL_PF,
196	/* 0x7f = 01111111b */ 0,
197	/* 0x80 = 10000000b */ 0,
198	/* 0x81 = 10000001b */ X86_EFL_PF,
199	/* 0x82 = 10000010b */ X86_EFL_PF,
200	/* 0x83 = 10000011b */ 0,
201	/* 0x84 = 10000100b */ X86_EFL_PF,
202	/* 0x85 = 10000101b */ 0,
203	/* 0x86 = 10000110b */ 0,
204	/* 0x87 = 10000111b */ X86_EFL_PF,
205	/* 0x88 = 10001000b */ X86_EFL_PF,
206	/* 0x89 = 10001001b */ 0,
207	/* 0x8a = 10001010b */ 0,
208	/* 0x8b = 10001011b */ X86_EFL_PF,
209	/* 0x8c = 10001100b */ 0,
210	/* 0x8d = 10001101b */ X86_EFL_PF,
211	/* 0x8e = 10001110b */ X86_EFL_PF,
212	/* 0x8f = 10001111b */ 0,
213	/* 0x90 = 10010000b */ X86_EFL_PF,
214	/* 0x91 = 10010001b */ 0,
215	/* 0x92 = 10010010b */ 0,
216	/* 0x93 = 10010011b */ X86_EFL_PF,
217	/* 0x94 = 10010100b */ 0,
218	/* 0x95 = 10010101b */ X86_EFL_PF,
219	/* 0x96 = 10010110b */ X86_EFL_PF,
220	/* 0x97 = 10010111b */ 0,
221	/* 0x98 = 10011000b */ 0,
222	/* 0x99 = 10011001b */ X86_EFL_PF,
223	/* 0x9a = 10011010b */ X86_EFL_PF,
224	/* 0x9b = 10011011b */ 0,
225	/* 0x9c = 10011100b */ X86_EFL_PF,
226	/* 0x9d = 10011101b */ 0,
227	/* 0x9e = 10011110b */ 0,
228	/* 0x9f = 10011111b */ X86_EFL_PF,
229	/* 0xa0 = 10100000b */ X86_EFL_PF,
230	/* 0xa1 = 10100001b */ 0,
231	/* 0xa2 = 10100010b */ 0,
232	/* 0xa3 = 10100011b */ X86_EFL_PF,
233	/* 0xa4 = 10100100b */ 0,
234	/* 0xa5 = 10100101b */ X86_EFL_PF,
235	/* 0xa6 = 10100110b */ X86_EFL_PF,
236	/* 0xa7 = 10100111b */ 0,
237	/* 0xa8 = 10101000b */ 0,
238	/* 0xa9 = 10101001b */ X86_EFL_PF,
239	/* 0xaa = 10101010b */ X86_EFL_PF,
240	/* 0xab = 10101011b */ 0,
241	/* 0xac = 10101100b */ X86_EFL_PF,
242	/* 0xad = 10101101b */ 0,
243	/* 0xae = 10101110b */ 0,
244	/* 0xaf = 10101111b */ X86_EFL_PF,
245	/* 0xb0 = 10110000b */ 0,
246	/* 0xb1 = 10110001b */ X86_EFL_PF,
247	/* 0xb2 = 10110010b */ X86_EFL_PF,
248	/* 0xb3 = 10110011b */ 0,
249	/* 0xb4 = 10110100b */ X86_EFL_PF,
250	/* 0xb5 = 10110101b */ 0,
251	/* 0xb6 = 10110110b */ 0,
252	/* 0xb7 = 10110111b */ X86_EFL_PF,
253	/* 0xb8 = 10111000b */ X86_EFL_PF,
254	/* 0xb9 = 10111001b */ 0,
255	/* 0xba = 10111010b */ 0,
256	/* 0xbb = 10111011b */ X86_EFL_PF,
257	/* 0xbc = 10111100b */ 0,
258	/* 0xbd = 10111101b */ X86_EFL_PF,
259	/* 0xbe = 10111110b */ X86_EFL_PF,
260	/* 0xbf = 10111111b */ 0,
261	/* 0xc0 = 11000000b */ X86_EFL_PF,
262	/* 0xc1 = 11000001b */ 0,
263	/* 0xc2 = 11000010b */ 0,
264	/* 0xc3 = 11000011b */ X86_EFL_PF,
265	/* 0xc4 = 11000100b */ 0,
266	/* 0xc5 = 11000101b */ X86_EFL_PF,
267	/* 0xc6 = 11000110b */ X86_EFL_PF,
268	/* 0xc7 = 11000111b */ 0,
269	/* 0xc8 = 11001000b */ 0,
270	/* 0xc9 = 11001001b */ X86_EFL_PF,
271	/* 0xca = 11001010b */ X86_EFL_PF,
272	/* 0xcb = 11001011b */ 0,
273	/* 0xcc = 11001100b */ X86_EFL_PF,
274	/* 0xcd = 11001101b */ 0,
275	/* 0xce = 11001110b */ 0,
276	/* 0xcf = 11001111b */ X86_EFL_PF,
277	/* 0xd0 = 11010000b */ 0,
278	/* 0xd1 = 11010001b */ X86_EFL_PF,
279	/* 0xd2 = 11010010b */ X86_EFL_PF,
280	/* 0xd3 = 11010011b */ 0,
281	/* 0xd4 = 11010100b */ X86_EFL_PF,
282	/* 0xd5 = 11010101b */ 0,
283	/* 0xd6 = 11010110b */ 0,
284	/* 0xd7 = 11010111b */ X86_EFL_PF,
285	/* 0xd8 = 11011000b */ X86_EFL_PF,
286	/* 0xd9 = 11011001b */ 0,
287	/* 0xda = 11011010b */ 0,
288	/* 0xdb = 11011011b */ X86_EFL_PF,
289	/* 0xdc = 11011100b */ 0,
290	/* 0xdd = 11011101b */ X86_EFL_PF,
291	/* 0xde = 11011110b */ X86_EFL_PF,
292	/* 0xdf = 11011111b */ 0,
293	/* 0xe0 = 11100000b */ 0,
294	/* 0xe1 = 11100001b */ X86_EFL_PF,
295	/* 0xe2 = 11100010b */ X86_EFL_PF,
296	/* 0xe3 = 11100011b */ 0,
297	/* 0xe4 = 11100100b */ X86_EFL_PF,
298	/* 0xe5 = 11100101b */ 0,
299	/* 0xe6 = 11100110b */ 0,
300	/* 0xe7 = 11100111b */ X86_EFL_PF,
301	/* 0xe8 = 11101000b */ X86_EFL_PF,
302	/* 0xe9 = 11101001b */ 0,
303	/* 0xea = 11101010b */ 0,
304	/* 0xeb = 11101011b */ X86_EFL_PF,
305	/* 0xec = 11101100b */ 0,
306	/* 0xed = 11101101b */ X86_EFL_PF,
307	/* 0xee = 11101110b */ X86_EFL_PF,
308	/* 0xef = 11101111b */ 0,
309	/* 0xf0 = 11110000b */ X86_EFL_PF,
310	/* 0xf1 = 11110001b */ 0,
311	/* 0xf2 = 11110010b */ 0,
312	/* 0xf3 = 11110011b */ X86_EFL_PF,
313	/* 0xf4 = 11110100b */ 0,
314	/* 0xf5 = 11110101b */ X86_EFL_PF,
315	/* 0xf6 = 11110110b */ X86_EFL_PF,
316	/* 0xf7 = 11110111b */ 0,
317	/* 0xf8 = 11111000b */ 0,
318	/* 0xf9 = 11111001b */ X86_EFL_PF,
319	/* 0xfa = 11111010b */ X86_EFL_PF,
320	/* 0xfb = 11111011b */ 0,
321	/* 0xfc = 11111100b */ X86_EFL_PF,
322	/* 0xfd = 11111101b */ 0,
323	/* 0xfe = 11111110b */ 0,
324	/* 0xff = 11111111b */ X86_EFL_PF,
325	};
326
327
328	/**
329	* Calculates the signed flag value given a result and it's bit width.
330	*
331	* The signed flag (SF) is a duplication of the most significant bit in the
332	* result.
333	*
334	* @returns X86_EFL_SF or 0.
335	* @param a_uResult Unsigned result value.
336	* @param a_cBitsWidth The width of the result (8, 16, 32, 64).
337	*/
338	#define X86_EFL_CALC_SF(a_uResult, a_cBitsWidth) \
339	( (uint32_t)((a_uResult) >> ((a_cBitsWidth) - X86_EFL_SF_BIT)) & X86_EFL_SF )
340
341	/**
342	* Calculates the zero flag value given a result.
343	*
344	* The zero flag (ZF) indicates whether the result is zero or not.
345	*
346	* @returns X86_EFL_ZF or 0.
347	* @param a_uResult Unsigned result value.
348	*/
349	#define X86_EFL_CALC_ZF(a_uResult) \
350	( (uint32_t)((a_uResult) == 0) << X86_EFL_ZF_BIT )
351
352	/**
353	* Updates the status bits (CF, PF, AF, ZF, SF, and OF) after a logical op.
354	*
355	* CF and OF are defined to be 0 by logical operations. AF on the other hand is
356	* undefined. We do not set AF, as that seems to make the most sense (which
357	* probably makes it the most wrong in real life).
358	*
359	* @returns Status bits.
360	* @param a_pfEFlags Pointer to the 32-bit EFLAGS value to update.
361	* @param a_uResult Unsigned result value.
362	* @param a_cBitsWidth The width of the result (8, 16, 32, 64).
363	* @param a_fExtra Additional bits to set.
364	*/
365	#define IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(a_pfEFlags, a_uResult, a_cBitsWidth, a_fExtra) \
366	do { \
367	uint32_t fEflTmp = *(a_pfEFlags); \
368	fEflTmp &= ~X86_EFL_STATUS_BITS; \
369	fEflTmp \|= g_afParity[(a_uResult) & 0xff]; \
370	fEflTmp \|= X86_EFL_CALC_ZF(a_uResult); \
371	fEflTmp \|= X86_EFL_CALC_SF(a_uResult, a_cBitsWidth); \
372	fEflTmp \|= (a_fExtra); \
373	*(a_pfEFlags) = fEflTmp; \
374	} while (0)
375
376
377	#ifdef RT_ARCH_X86
378	/*
379	* There are a few 64-bit on 32-bit things we'd rather do in C. Actually, doing
380	* it all in C is probably safer atm., optimize what's necessary later, maybe.
381	*/
382
383
384	/* Binary ops */
385
386	IEM_DECL_IMPL_DEF(void, iemAImpl_add_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
387	{
388	uint64_t uDst = *puDst;
389	uint64_t uResult = uDst + uSrc;
390	*puDst = uResult;
391
392	/* Calc EFLAGS. */
393	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
394	fEfl \|= (uResult < uDst) << X86_EFL_CF_BIT;
395	fEfl \|= g_afParity[uResult & 0xff];
396	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
397	fEfl \|= X86_EFL_CALC_ZF(uResult);
398	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
399	fEfl \|= (((uDst ^ uSrc ^ RT_BIT_64(63)) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
400	*pfEFlags = fEfl;
401	}
402
403
404	IEM_DECL_IMPL_DEF(void, iemAImpl_adc_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
405	{
406	if (!(*pfEFlags & X86_EFL_CF))
407	iemAImpl_add_u64(puDst, uSrc, pfEFlags);
408	else
409	{
410	uint64_t uDst = *puDst;
411	uint64_t uResult = uDst + uSrc + 1;
412	*puDst = uResult;
413
414	/* Calc EFLAGS. */
415	/** @todo verify AF and OF calculations. */
416	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
417	fEfl \|= (uResult <= uDst) << X86_EFL_CF_BIT;
418	fEfl \|= g_afParity[uResult & 0xff];
419	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
420	fEfl \|= X86_EFL_CALC_ZF(uResult);
421	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
422	fEfl \|= (((uDst ^ uSrc ^ RT_BIT_64(63)) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
423	*pfEFlags = fEfl;
424	}
425	}
426
427
428	IEM_DECL_IMPL_DEF(void, iemAImpl_sub_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
429	{
430	uint64_t uDst = *puDst;
431	uint64_t uResult = uDst - uSrc;
432	*puDst = uResult;
433
434	/* Calc EFLAGS. */
435	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
436	fEfl \|= (uDst < uSrc) << X86_EFL_CF_BIT;
437	fEfl \|= g_afParity[uResult & 0xff];
438	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
439	fEfl \|= X86_EFL_CALC_ZF(uResult);
440	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
441	fEfl \|= (((uDst ^ uSrc) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
442	*pfEFlags = fEfl;
443	}
444
445
446	IEM_DECL_IMPL_DEF(void, iemAImpl_sbb_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
447	{
448	if (!(*pfEFlags & X86_EFL_CF))
449	iemAImpl_sub_u64(puDst, uSrc, pfEFlags);
450	else
451	{
452	uint64_t uDst = *puDst;
453	uint64_t uResult = uDst - uSrc - 1;
454	*puDst = uResult;
455
456	/* Calc EFLAGS. */
457	/** @todo verify AF and OF calculations. */
458	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
459	fEfl \|= (uDst <= uSrc) << X86_EFL_CF_BIT;
460	fEfl \|= g_afParity[uResult & 0xff];
461	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
462	fEfl \|= X86_EFL_CALC_ZF(uResult);
463	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
464	fEfl \|= (((uDst ^ uSrc) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
465	*pfEFlags = fEfl;
466	}
467	}
468
469
470	IEM_DECL_IMPL_DEF(void, iemAImpl_or_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
471	{
472	uint64_t uResult = *puDst \| uSrc;
473	*puDst = uResult;
474	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
475	}
476
477
478	IEM_DECL_IMPL_DEF(void, iemAImpl_xor_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
479	{
480	uint64_t uResult = *puDst ^ uSrc;
481	*puDst = uResult;
482	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
483	}
484
485
486	IEM_DECL_IMPL_DEF(void, iemAImpl_and_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
487	{
488	uint64_t uResult = *puDst & uSrc;
489	*puDst = uResult;
490	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
491	}
492
493
494	IEM_DECL_IMPL_DEF(void, iemAImpl_cmp_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
495	{
496	uint64_t uDstTmp = *puDst;
497	iemAImpl_sub_u64(&uDstTmp, uSrc, pfEFlags);
498	}
499
500
501	IEM_DECL_IMPL_DEF(void, iemAImpl_test_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
502	{
503	uint64_t uResult = *puDst & uSrc;
504	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
505	}
506
507
508	/** 64-bit locked binary operand operation. */
509	# define DO_LOCKED_BIN_OP_U64(a_Mnemonic) \
510	do { \
511	uint64_t uOld = ASMAtomicReadU64(puDst); \
512	uint64_t uTmp; \
513	uint32_t fEflTmp; \
514	do \
515	{ \
516	uTmp = uOld; \
517	fEflTmp = *pfEFlags; \
518	iemAImpl_ ## a_Mnemonic ## _u64(&uTmp, uSrc, &fEflTmp); \
519	} while (!ASMAtomicCmpXchgExU64(puDst, uTmp, uOld, &uOld)); \
520	*pfEFlags = fEflTmp; \
521	} while (0)
522
523
524	IEM_DECL_IMPL_DEF(void, iemAImpl_add_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
525	{
526	DO_LOCKED_BIN_OP_U64(adc);
527	}
528
529
530	IEM_DECL_IMPL_DEF(void, iemAImpl_adc_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
531	{
532	DO_LOCKED_BIN_OP_U64(adc);
533	}
534
535
536	IEM_DECL_IMPL_DEF(void, iemAImpl_sub_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
537	{
538	DO_LOCKED_BIN_OP_U64(sub);
539	}
540
541
542	IEM_DECL_IMPL_DEF(void, iemAImpl_sbb_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
543	{
544	DO_LOCKED_BIN_OP_U64(sbb);
545	}
546
547
548	IEM_DECL_IMPL_DEF(void, iemAImpl_or_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
549	{
550	DO_LOCKED_BIN_OP_U64(or);
551	}
552
553
554	IEM_DECL_IMPL_DEF(void, iemAImpl_xor_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
555	{
556	DO_LOCKED_BIN_OP_U64(xor);
557	}
558
559
560	IEM_DECL_IMPL_DEF(void, iemAImpl_and_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
561	{
562	DO_LOCKED_BIN_OP_U64(and);
563	}
564
565
566	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t puDst, uint64_t puReg, uint32_t *pfEFlags))
567	{
568	uint64_t uDst = *puDst;
569	uint64_t uResult = uDst;
570	iemAImpl_add_u64(&uResult, *puReg, pfEFlags);
571	*puDst = uResult;
572	*puReg = uDst;
573	}
574
575
576	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t puDst, uint64_t puReg, uint32_t *pfEFlags))
577	{
578	uint64_t uOld = ASMAtomicReadU64(puDst);
579	uint64_t uTmpDst;
580	uint32_t fEflTmp;
581	do
582	{
583	uTmpDst = uOld;
584	fEflTmp = *pfEFlags;
585	iemAImpl_add_u64(&uTmpDst, *puReg, pfEFlags);
586	} while (!ASMAtomicCmpXchgExU64(puDst, uTmpDst, uOld, &uOld));
587	*puReg = uOld;
588	*pfEFlags = fEflTmp;
589	}
590
591
592	/* Bit operations (same signature as above). */
593
594	IEM_DECL_IMPL_DEF(void, iemAImpl_bt_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
595	{
596	/* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
597	logical operation (AND/OR/whatever). */
598	Assert(uSrc < 64);
599	uint64_t uDst = *puDst;
600	if (uDst & RT_BIT_64(uSrc))
601	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
602	else
603	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
604	}
605
606	IEM_DECL_IMPL_DEF(void, iemAImpl_btc_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
607	{
608	/* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
609	logical operation (AND/OR/whatever). */
610	Assert(uSrc < 64);
611	uint64_t fMask = RT_BIT_64(uSrc);
612	uint64_t uDst = *puDst;
613	if (uDst & fMask)
614	{
615	uDst &= ~fMask;
616	*puDst = uDst;
617	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
618	}
619	else
620	{
621	uDst \|= fMask;
622	*puDst = uDst;
623	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
624	}
625	}
626
627	IEM_DECL_IMPL_DEF(void, iemAImpl_btr_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
628	{
629	/* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
630	logical operation (AND/OR/whatever). */
631	Assert(uSrc < 64);
632	uint64_t fMask = RT_BIT_64(uSrc);
633	uint64_t uDst = *puDst;
634	if (uDst & fMask)
635	{
636	uDst &= ~fMask;
637	*puDst = uDst;
638	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
639	}
640	else
641	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
642	}
643
644	IEM_DECL_IMPL_DEF(void, iemAImpl_bts_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
645	{
646	/* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
647	logical operation (AND/OR/whatever). */
648	Assert(uSrc < 64);
649	uint64_t fMask = RT_BIT_64(uSrc);
650	uint64_t uDst = *puDst;
651	if (uDst & fMask)
652	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
653	else
654	{
655	uDst \|= fMask;
656	*puDst = uDst;
657	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
658	}
659	}
660
661
662	IEM_DECL_IMPL_DEF(void, iemAImpl_btc_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
663	{
664	DO_LOCKED_BIN_OP_U64(btc);
665	}
666
667	IEM_DECL_IMPL_DEF(void, iemAImpl_btr_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
668	{
669	DO_LOCKED_BIN_OP_U64(btr);
670	}
671
672	IEM_DECL_IMPL_DEF(void, iemAImpl_bts_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
673	{
674	DO_LOCKED_BIN_OP_U64(bts);
675	}
676
677
678	/* bit scan */
679
680	IEM_DECL_IMPL_DEF(void, iemAImpl_bsf_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
681	{
682	/* Note! "undefined" flags: OF, SF, AF, PF, CF. */
683	/** @todo check what real CPUs does. */
684	if (uSrc)
685	{
686	uint8_t iBit;
687	uint32_t u32Src;
688	if (uSrc & UINT32_MAX)
689	{
690	iBit = 0;
691	u32Src = uSrc;
692	}
693	else
694	{
695	iBit = 32;
696	u32Src = uSrc >> 32;
697	}
698	if (!(u32Src & UINT16_MAX))
699	{
700	iBit += 16;
701	u32Src >>= 16;
702	}
703	if (!(u32Src & UINT8_MAX))
704	{
705	iBit += 8;
706	u32Src >>= 8;
707	}
708	if (!(u32Src & 0xf))
709	{
710	iBit += 4;
711	u32Src >>= 4;
712	}
713	if (!(u32Src & 0x3))
714	{
715	iBit += 2;
716	u32Src >>= 2;
717	}
718	if (!(u32Src & 1))
719	{
720	iBit += 1;
721	Assert(u32Src & 2);
722	}
723
724	*puDst = iBit;
725	*pfEFlags &= ~X86_EFL_ZF;
726	}
727	else
728	*pfEFlags \|= X86_EFL_ZF;
729	}
730
731	IEM_DECL_IMPL_DEF(void, iemAImpl_bsr_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
732	{
733	/* Note! "undefined" flags: OF, SF, AF, PF, CF. */
734	/** @todo check what real CPUs does. */
735	if (uSrc)
736	{
737	uint8_t iBit;
738	uint32_t u32Src;
739	if (uSrc & UINT64_C(0xffffffff00000000))
740	{
741	iBit = 64;
742	u32Src = uSrc >> 32;
743	}
744	else
745	{
746	iBit = 32;
747	u32Src = uSrc;
748	}
749	if (!(u32Src & UINT32_C(0xffff0000)))
750	{
751	iBit -= 16;
752	u32Src <<= 16;
753	}
754	if (!(u32Src & UINT32_C(0xff000000)))
755	{
756	iBit -= 8;
757	u32Src <<= 8;
758	}
759	if (!(u32Src & UINT32_C(0xf0000000)))
760	{
761	iBit -= 4;
762	u32Src <<= 4;
763	}
764	if (!(u32Src & UINT32_C(0xc0000000)))
765	{
766	iBit -= 2;
767	u32Src <<= 2;
768	}
769	if (!(u32Src & UINT32_C(0x10000000)))
770	{
771	iBit -= 1;
772	u32Src <<= 1;
773	Assert(u32Src & RT_BIT_64(63));
774	}
775
776	*puDst = iBit;
777	*pfEFlags &= ~X86_EFL_ZF;
778	}
779	else
780	*pfEFlags \|= X86_EFL_ZF;
781	}
782
783
784	/* Unary operands. */
785
786	IEM_DECL_IMPL_DEF(void, iemAImpl_inc_u64,(uint64_t puDst, uint32_t pfEFlags))
787	{
788	uint64_t uDst = *puDst;
789	uint64_t uResult = uDst + 1;
790	*puDst = uResult;
791
792	/*
793	* Calc EFLAGS.
794	* CF is NOT modified for hysterical raisins (allegedly for carrying and
795	* borrowing in arithmetic loops on intel 8008).
796	*/
797	uint32_t fEfl = *pfEFlags & ~(X86_EFL_STATUS_BITS & ~X86_EFL_CF);
798	fEfl \|= g_afParity[uResult & 0xff];
799	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uDst) & X86_EFL_AF;
800	fEfl \|= X86_EFL_CALC_ZF(uResult);
801	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
802	fEfl \|= (((uDst ^ RT_BIT_64(63)) & uResult) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
803	*pfEFlags = fEfl;
804	}
805
806
807	IEM_DECL_IMPL_DEF(void, iemAImpl_dec_u64,(uint64_t puDst, uint32_t pfEFlags))
808	{
809	uint64_t uDst = *puDst;
810	uint64_t uResult = uDst - 1;
811	*puDst = uResult;
812
813	/*
814	* Calc EFLAGS.
815	* CF is NOT modified for hysterical raisins (allegedly for carrying and
816	* borrowing in arithmetic loops on intel 8008).
817	*/
818	uint32_t fEfl = *pfEFlags & ~(X86_EFL_STATUS_BITS & ~X86_EFL_CF);
819	fEfl \|= g_afParity[uResult & 0xff];
820	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uDst) & X86_EFL_AF;
821	fEfl \|= X86_EFL_CALC_ZF(uResult);
822	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
823	fEfl \|= ((uDst & (uResult ^ RT_BIT_64(63))) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
824	*pfEFlags = fEfl;
825	}
826
827
828	IEM_DECL_IMPL_DEF(void, iemAImpl_not_u64,(uint64_t puDst, uint32_t pfEFlags))
829	{
830	uint64_t uDst = *puDst;
831	uint64_t uResult = ~uDst;
832	*puDst = uResult;
833	/* EFLAGS are not modified. */
834	}
835
836
837	IEM_DECL_IMPL_DEF(void, iemAImpl_neg_u64,(uint64_t puDst, uint32_t pfEFlags))
838	{
839	uint64_t uDst = 0;
840	uint64_t uSrc = *puDst;
841	uint64_t uResult = uDst - uSrc;
842	*puDst = uResult;
843
844	/* Calc EFLAGS. */
845	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
846	fEfl \|= (uSrc != 0) << X86_EFL_CF_BIT;
847	fEfl \|= g_afParity[uResult & 0xff];
848	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uDst) & X86_EFL_AF;
849	fEfl \|= X86_EFL_CALC_ZF(uResult);
850	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
851	fEfl \|= ((uSrc & uResult) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
852	*pfEFlags = fEfl;
853	}
854
855
856	/** 64-bit locked unary operand operation. */
857	# define DO_LOCKED_UNARY_OP_U64(a_Mnemonic) \
858	do { \
859	uint64_t uOld = ASMAtomicReadU64(puDst); \
860	uint64_t uTmp; \
861	uint32_t fEflTmp; \
862	do \
863	{ \
864	uTmp = uOld; \
865	fEflTmp = *pfEFlags; \
866	iemAImpl_ ## a_Mnemonic ## _u64(&uTmp, &fEflTmp); \
867	} while (!ASMAtomicCmpXchgExU64(puDst, uTmp, uOld, &uOld)); \
868	*pfEFlags = fEflTmp; \
869	} while (0)
870
871	IEM_DECL_IMPL_DEF(void, iemAImpl_inc_u64_locked,(uint64_t puDst, uint32_t pfEFlags))
872	{
873	DO_LOCKED_UNARY_OP_U64(inc);
874	}
875
876
877	IEM_DECL_IMPL_DEF(void, iemAImpl_dec_u64_locked,(uint64_t puDst, uint32_t pfEFlags))
878	{
879	DO_LOCKED_UNARY_OP_U64(dec);
880	}
881
882
883	IEM_DECL_IMPL_DEF(void, iemAImpl_not_u64_locked,(uint64_t puDst, uint32_t pfEFlags))
884	{
885	DO_LOCKED_UNARY_OP_U64(not);
886	}
887
888
889	IEM_DECL_IMPL_DEF(void, iemAImpl_neg_u64_locked,(uint64_t puDst, uint32_t pfEFlags))
890	{
891	DO_LOCKED_UNARY_OP_U64(neg);
892	}
893
894
895	/* Shift and rotate. */
896
897	IEM_DECL_IMPL_DEF(void, iemAImpl_rol_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
898	{
899	cShift &= 63;
900	if (cShift)
901	{
902	uint64_t uDst = *puDst;
903	uint64_t uResult;
904	uResult = uDst << cShift;
905	uResult \|= uDst >> (64 - cShift);
906	*puDst = uResult;
907
908	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
909	it the same way as for 1 bit shifts. */
910	AssertCompile(X86_EFL_CF_BIT == 0);
911	uint32_t fEfl = *pfEFlags & ~(X86_EFL_CF \| X86_EFL_OF);
912	uint32_t fCarry = (uResult & 1);
913	fEfl \|= fCarry;
914	fEfl \|= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
915	*pfEFlags = fEfl;
916	}
917	}
918
919
920	IEM_DECL_IMPL_DEF(void, iemAImpl_ror_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
921	{
922	cShift &= 63;
923	if (cShift)
924	{
925	uint64_t uDst = *puDst;
926	uint64_t uResult;
927	uResult = uDst >> cShift;
928	uResult \|= uDst << (64 - cShift);
929	*puDst = uResult;
930
931	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
932	it the same way as for 1 bit shifts (OF = OF XOR New-CF). */
933	AssertCompile(X86_EFL_CF_BIT == 0);
934	uint32_t fEfl = *pfEFlags & ~(X86_EFL_CF \| X86_EFL_OF);
935	uint32_t fCarry = (uResult >> 63) & X86_EFL_CF;
936	fEfl \|= fCarry;
937	fEfl \|= (((uResult >> 62) ^ fCarry) << X86_EFL_OF_BIT) & X86_EFL_OF;
938	*pfEFlags = fEfl;
939	}
940	}
941
942
943	IEM_DECL_IMPL_DEF(void, iemAImpl_rcl_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
944	{
945	cShift &= 63;
946	if (cShift)
947	{
948	uint32_t fEfl = *pfEFlags;
949	uint64_t uDst = *puDst;
950	uint64_t uResult;
951	uResult = uDst << cShift;
952	AssertCompile(X86_EFL_CF_BIT == 0);
953	if (cShift > 1)
954	uResult \|= uDst >> (65 - cShift);
955	uResult \|= (uint64_t)(fEfl & X86_EFL_CF) << (cShift - 1);
956	*puDst = uResult;
957
958	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
959	it the same way as for 1 bit shifts. */
960	uint32_t fCarry = (uDst >> (64 - cShift)) & X86_EFL_CF;
961	fEfl &= ~(X86_EFL_CF \| X86_EFL_OF);
962	fEfl \|= fCarry;
963	fEfl \|= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
964	*pfEFlags = fEfl;
965	}
966	}
967
968
969	IEM_DECL_IMPL_DEF(void, iemAImpl_rcr_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
970	{
971	cShift &= 63;
972	if (cShift)
973	{
974	uint32_t fEfl = *pfEFlags;
975	uint64_t uDst = *puDst;
976	uint64_t uResult;
977	uResult = uDst >> cShift;
978	AssertCompile(X86_EFL_CF_BIT == 0);
979	if (cShift > 1)
980	uResult \|= uDst << (65 - cShift);
981	uResult \|= (uint64_t)(fEfl & X86_EFL_CF) << (64 - cShift);
982	*puDst = uResult;
983
984	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
985	it the same way as for 1 bit shifts. */
986	uint32_t fCarry = (uDst >> (cShift - 1)) & X86_EFL_CF;
987	fEfl &= ~(X86_EFL_CF \| X86_EFL_OF);
988	fEfl \|= fCarry;
989	fEfl \|= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
990	*pfEFlags = fEfl;
991	}
992	}
993
994
995	IEM_DECL_IMPL_DEF(void, iemAImpl_shl_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
996	{
997	cShift &= 63;
998	if (cShift)
999	{
1000	uint64_t uDst = *puDst;
1001	uint64_t uResult = uDst << cShift;
1002	*puDst = uResult;
1003
1004	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1005	it the same way as for 1 bit shifts. The AF bit is undefined, we
1006	always set it to zero atm. */
1007	AssertCompile(X86_EFL_CF_BIT == 0);
1008	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1009	uint32_t fCarry = (uDst >> (64 - cShift)) & X86_EFL_CF;
1010	fEfl \|= fCarry;
1011	fEfl \|= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
1012	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
1013	fEfl \|= X86_EFL_CALC_ZF(uResult);
1014	fEfl \|= g_afParity[uResult & 0xff];
1015	*pfEFlags = fEfl;
1016	}
1017	}
1018
1019
1020	IEM_DECL_IMPL_DEF(void, iemAImpl_shr_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
1021	{
1022	cShift &= 63;
1023	if (cShift)
1024	{
1025	uint64_t uDst = *puDst;
1026	uint64_t uResult = uDst >> cShift;
1027	*puDst = uResult;
1028
1029	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1030	it the same way as for 1 bit shifts. The AF bit is undefined, we
1031	always set it to zero atm. */
1032	AssertCompile(X86_EFL_CF_BIT == 0);
1033	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1034	fEfl \|= (uDst >> (cShift - 1)) & X86_EFL_CF;
1035	fEfl \|= (uDst >> 63) << X86_EFL_OF_BIT;
1036	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
1037	fEfl \|= X86_EFL_CALC_ZF(uResult);
1038	fEfl \|= g_afParity[uResult & 0xff];
1039	*pfEFlags = fEfl;
1040	}
1041	}
1042
1043
1044	IEM_DECL_IMPL_DEF(void, iemAImpl_sar_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
1045	{
1046	cShift &= 63;
1047	if (cShift)
1048	{
1049	uint64_t uDst = *puDst;
1050	uint64_t uResult = (int64_t)uDst >> cShift;
1051	*puDst = uResult;
1052
1053	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1054	it the same way as for 1 bit shifts (0). The AF bit is undefined,
1055	we always set it to zero atm. */
1056	AssertCompile(X86_EFL_CF_BIT == 0);
1057	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1058	fEfl \|= (uDst >> (cShift - 1)) & X86_EFL_CF;
1059	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
1060	fEfl \|= X86_EFL_CALC_ZF(uResult);
1061	fEfl \|= g_afParity[uResult & 0xff];
1062	*pfEFlags = fEfl;
1063	}
1064	}
1065
1066
1067	IEM_DECL_IMPL_DEF(void, iemAImpl_shld_u64,(uint64_t puDst, uint64_t uSrc, uint8_t cShift, uint32_t pfEFlags))
1068	{
1069	cShift &= 63;
1070	if (cShift)
1071	{
1072	uint64_t uDst = *puDst;
1073	uint64_t uResult;
1074	uResult = uDst << cShift;
1075	uResult \|= uSrc >> (64 - cShift);
1076	*puDst = uResult;
1077
1078	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1079	it the same way as for 1 bit shifts. The AF bit is undefined,
1080	we always set it to zero atm. */
1081	AssertCompile(X86_EFL_CF_BIT == 0);
1082	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1083	fEfl \|= (uDst >> (64 - cShift)) & X86_EFL_CF;
1084	fEfl \|= (uint32_t)((uDst >> 63) ^ (uint32_t)(uResult >> 63)) << X86_EFL_OF_BIT;
1085	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
1086	fEfl \|= X86_EFL_CALC_ZF(uResult);
1087	fEfl \|= g_afParity[uResult & 0xff];
1088	*pfEFlags = fEfl;
1089	}
1090	}
1091
1092
1093	IEM_DECL_IMPL_DEF(void, iemAImpl_shrd_u64,(uint64_t puDst, uint64_t uSrc, uint8_t cShift, uint32_t pfEFlags))
1094	{
1095	cShift &= 63;
1096	if (cShift)
1097	{
1098	uint64_t uDst = *puDst;
1099	uint64_t uResult;
1100	uResult = uDst >> cShift;
1101	uResult \|= uSrc << (64 - cShift);
1102	*puDst = uResult;
1103
1104	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1105	it the same way as for 1 bit shifts. The AF bit is undefined,
1106	we always set it to zero atm. */
1107	AssertCompile(X86_EFL_CF_BIT == 0);
1108	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1109	fEfl \|= (uDst >> (cShift - 1)) & X86_EFL_CF;
1110	fEfl \|= (uint32_t)((uDst >> 63) ^ (uint32_t)(uResult >> 63)) << X86_EFL_OF_BIT;
1111	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
1112	fEfl \|= X86_EFL_CALC_ZF(uResult);
1113	fEfl \|= g_afParity[uResult & 0xff];
1114	*pfEFlags = fEfl;
1115	}
1116	}
1117
1118
1119	/* misc */
1120
1121	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t puMem, uint64_t puReg))
1122	{
1123	/* XCHG implies LOCK. */
1124	uint64_t uOldMem = *puMem;
1125	while (!ASMAtomicCmpXchgExU64(puMem, *puReg, uOldMem, &uOldMem))
1126	ASMNopPause();
1127	*puReg = uOldMem;
1128	}
1129
1130
1131	#endif /* RT_ARCH_X86 */
1132	#ifdef RT_ARCH_X86
1133
1134	/* multiplication and division */
1135
1136
1137	IEM_DECL_IMPL_DEF(int, iemAImpl_mul_u64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64Factor, uint32_t *pfEFlags))
1138	{
1139	RTUINT128U Result;
1140	RTUInt128MulU64ByU64(&Result, *pu64RAX, u64Factor);
1141	*pu64RAX = Result.s.Lo;
1142	*pu64RDX = Result.s.Hi;
1143	/** @todo research the undefined MUL flags. */
1144	return 0;
1145	}
1146
1147
1148	IEM_DECL_IMPL_DEF(int, iemAImpl_imul_u64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64Factor, uint32_t *pfEFlags))
1149	{
1150	/** @todo Testcase: IMUL 1 operand */
1151	RTUINT128U Result;
1152	*pfEFlags &= ~(X86_EFL_SF \| X86_EFL_CF \| X86_EFL_OF);
1153	if ((int64_t)*pu64RAX >= 0)
1154	{
1155	if ((int64_t)u64Factor >= 0)
1156	{
1157	RTUInt128MulU64ByU64(&Result, *pu64RAX, u64Factor);
1158	if (Result.s.Hi != 0 \|\| Result.s.Lo >= UINT64_C(0x8000000000000000))
1159	*pfEFlags \|= X86_EFL_CF \| X86_EFL_OF;
1160	}
1161	else
1162	{
1163	RTUInt128MulU64ByU64(&Result, *pu64RAX, UINT64_C(0) - u64Factor);
1164	if (Result.s.Hi != 0 \|\| Result.s.Lo > UINT64_C(0x8000000000000000))
1165	*pfEFlags \|= X86_EFL_CF \| X86_EFL_OF;
1166	RTUInt128AssignNeg(&Result);
1167	}
1168	}
1169	else
1170	{
1171	if ((int64_t)u64Factor >= 0)
1172	{
1173	RTUInt128MulU64ByU64(&Result, UINT64_C(0) - *pu64RAX, u64Factor);
1174	if (Result.s.Hi != 0 \|\| Result.s.Lo > UINT64_C(0x8000000000000000))
1175	*pfEFlags \|= X86_EFL_CF \| X86_EFL_OF;
1176	RTUInt128AssignNeg(&Result);
1177	}
1178	else
1179	{
1180	RTUInt128MulU64ByU64(&Result, UINT64_C(0) - *pu64RAX, UINT64_C(0) - u64Factor);
1181	if (Result.s.Hi != 0 \|\| Result.s.Lo >= UINT64_C(0x8000000000000000))
1182	*pfEFlags \|= X86_EFL_CF \| X86_EFL_OF;
1183	}
1184	}
1185	*pu64RAX = Result.s.Lo;
1186	*pu64RDX = Result.s.Hi;
1187	if (*pu64RAX & RT_BIT_64(63))
1188	*pfEFlags \|= X86_EFL_SF;
1189
1190	/** @todo research the undefined IMUL flags. */
1191	return 0;
1192	}
1193
1194
1195	IEM_DECL_IMPL_DEF(void, iemAImpl_imul_two_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
1196	{
1197	/** @todo Testcase: IMUL 2 and 3 operands. */
1198	uint64_t u64Ign;
1199	iemAImpl_imul_u64(puDst, &u64Ign, uSrc, pfEFlags);
1200	}
1201
1202
1203
1204	IEM_DECL_IMPL_DEF(int, iemAImpl_div_u64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64Divisor, uint32_t *pfEFlags))
1205	{
1206	if ( u64Divisor != 0
1207	&& *pu64RDX < u64Divisor)
1208	{
1209	RTUINT128U Dividend;
1210	Dividend.s.Lo = *pu64RAX;
1211	Dividend.s.Hi = *pu64RDX;
1212
1213	RTUINT128U Divisor;
1214	Divisor.s.Lo = u64Divisor;
1215	Divisor.s.Hi = 0;
1216
1217	RTUINT128U Remainder;
1218	RTUINT128U Quotient;
1219	# ifdef __GNUC__ /* GCC maybe really annoying in function. */
1220	Quotient.s.Lo = 0;
1221	Quotient.s.Hi = 0;
1222	# endif
1223	RTUInt128DivRem(&Quotient, &Remainder, &Dividend, &Divisor);
1224	Assert(Quotient.s.Hi == 0);
1225	Assert(Remainder.s.Hi == 0);
1226
1227	*pu64RAX = Quotient.s.Lo;
1228	*pu64RDX = Remainder.s.Lo;
1229	/** @todo research the undefined DIV flags. */
1230	return 0;
1231
1232	}
1233	/* #DE */
1234	return VERR_IEM_ASPECT_NOT_IMPLEMENTED;
1235	}
1236
1237
1238	IEM_DECL_IMPL_DEF(int, iemAImpl_idiv_u64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64Divisor, uint32_t *pfEFlags))
1239	{
1240	if (u64Divisor != 0)
1241	{
1242	/*
1243	* Convert to unsigned division.
1244	*/
1245	RTUINT128U Dividend;
1246	Dividend.s.Hi = 0;
1247	if ((int64_t)*pu64RDX >= 0)
1248	{
1249	Dividend.s.Lo = *pu64RAX;
1250	Dividend.s.Hi = *pu64RDX;
1251	}
1252	else
1253	{
1254	Dividend.s.Lo = UINT64_C(0) - *pu64RAX;
1255	Dividend.s.Hi = UINT64_C(0) - *pu64RDX;
1256	}
1257
1258	RTUINT128U Divisor;
1259	Divisor.s.Hi = 0;
1260	if ((int64_t)u64Divisor >= 0)
1261	Divisor.s.Lo = u64Divisor;
1262	else
1263	Divisor.s.Lo = UINT64_C(0) - u64Divisor;
1264
1265	RTUINT128U Remainder;
1266	RTUINT128U Quotient;
1267	# ifdef __GNUC__ /* GCC maybe really annoying in function. */
1268	Quotient.s.Lo = 0;
1269	Quotient.s.Hi = 0;
1270	# endif
1271	RTUInt128DivRem(&Quotient, &Remainder, &Dividend, &Divisor);
1272
1273	/*
1274	* Setup the result, checking for overflows.
1275	*/
1276	if ((int64_t)u64Divisor >= 0)
1277	{
1278	if ((int64_t)*pu64RDX >= 0)
1279	{
1280	/* Positive divisor, positive dividend => result positive. */
1281	if (Quotient.s.Hi == 0 && Quotient.s.Lo <= (uint64_t)INT64_MAX)
1282	{
1283	*pu64RAX = Quotient.s.Lo;
1284	*pu64RDX = Remainder.s.Lo;
1285	return 0;
1286	}
1287	}
1288	else
1289	{
1290	/* Positive divisor, positive dividend => result negative. */
1291	if (Quotient.s.Hi == 0 && Quotient.s.Lo <= UINT64_C(0x8000000000000000))
1292	{
1293	*pu64RAX = UINT64_C(0) - Quotient.s.Lo;
1294	*pu64RDX = UINT64_C(0) - Remainder.s.Lo;
1295	return 0;
1296	}
1297	}
1298	}
1299	else
1300	{
1301	if ((int64_t)*pu64RDX >= 0)
1302	{
1303	/* Negative divisor, positive dividend => negative quotient, positive remainder. */
1304	if (Quotient.s.Hi == 0 && Quotient.s.Lo <= UINT64_C(0x8000000000000000))
1305	{
1306	*pu64RAX = UINT64_C(0) - Quotient.s.Lo;
1307	*pu64RDX = Remainder.s.Lo;
1308	return 0;
1309	}
1310	}
1311	else
1312	{
1313	/* Negative divisor, negative dividend => positive quotient, negative remainder. */
1314	if (Quotient.s.Hi == 0 && Quotient.s.Lo <= (uint64_t)INT64_MAX)
1315	{
1316	*pu64RAX = Quotient.s.Lo;
1317	*pu64RDX = UINT64_C(0) - Remainder.s.Lo;
1318	return 0;
1319	}
1320	}
1321	}
1322	}
1323	/* #DE */
1324	return VERR_IEM_ASPECT_NOT_IMPLEMENTED;
1325	}
1326
1327
1328	#endif /* RT_ARCH_X86 */
1329
1330
1331	IEM_DECL_IMPL_DEF(void, iemAImpl_arpl,(uint16_t pu16Dst, uint16_t u16Src, uint32_t pfEFlags))
1332	{
1333	if ((*pu16Dst & X86_SEL_RPL) < (u16Src & X86_SEL_RPL))
1334	{
1335	*pu16Dst &= X86_SEL_MASK_OFF_RPL;
1336	*pu16Dst \|= u16Src & X86_SEL_RPL;
1337
1338	*pfEFlags \|= X86_EFL_ZF;
1339	}
1340	else
1341	*pfEFlags &= ~X86_EFL_ZF;
1342	}
1343

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source: vbox/trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp@ 62402

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