IEMAllInstCommonBodyMacros.h@ 101505

Last change on this file since 101505 was 101387, checked in by vboxsync, 15 months ago
VMM/IEM: Added a new class of threaded function variants, the 16f/32f/64f variants that will clear RF (and vbox internal friends) and check for TF (and vbox internal friends). The variants w/o the 'f' after the bitcount will skip this test+branch. The motivation of this was to deal with this issue that the threaded recompiler level rather than try optimize away the test+branch++ code when generating native code, make the IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32 a very simple place to start emitting native code (compared to IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32_WITH_FLAGS). bugref:10371
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 7.1 KB

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1	/* $Id: IEMAllInstCommonBodyMacros.h 101387 2023-10-07 23:34:54Z vboxsync $ */
2	/** @file
3	* IEM - Instruction Decoding and Emulation, Common Body Macros.
4	*
5	* This is placed in its own file without anything else in it, so that it can
6	* be digested by SimplerParser in IEMAllInstPython.py prior processing
7	* any of the other IEMAllInstruction*.cpp.h files. For instance
8	* IEMAllInstCommon.cpp.h wouldn't do as it defines several invalid
9	* instructions and such that could confuse the parser result.
10	*/
11
12	/*
13	* Copyright (C) 2011-2023 Oracle and/or its affiliates.
14	*
15	* This file is part of VirtualBox base platform packages, as
16	* available from https://www.virtualbox.org.
17	*
18	* This program is free software; you can redistribute it and/or
19	* modify it under the terms of the GNU General Public License
20	* as published by the Free Software Foundation, in version 3 of the
21	* License.
22	*
23	* This program is distributed in the hope that it will be useful, but
24	* WITHOUT ANY WARRANTY; without even the implied warranty of
25	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
26	* General Public License for more details.
27	*
28	* You should have received a copy of the GNU General Public License
29	* along with this program; if not, see <https://www.gnu.org/licenses>.
30	*
31	* SPDX-License-Identifier: GPL-3.0-only
32	*/
33
34
35	/**
36	* Body for word/dword/qword instructions like ADD, AND, OR, ++ with a register
37	* as the destination.
38	*
39	* @note Used both in OneByte and TwoByte0f.
40	*/
41	#define IEMOP_BODY_BINARY_rv_rm(a_fnNormalU16, a_fnNormalU32, a_fnNormalU64, a_fModifiesDstReg, a_f16BitMcFlag) \
42	uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); \
43	\
44	/* \
45	* If rm is denoting a register, no more instruction bytes. \
46	*/ \
47	if (IEM_IS_MODRM_REG_MODE(bRm)) \
48	{ \
49	switch (pVCpu->iem.s.enmEffOpSize) \
50	{ \
51	case IEMMODE_16BIT: \
52	IEM_MC_BEGIN(3, 0, a_f16BitMcFlag, 0); \
53	IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
54	IEM_MC_ARG(uint16_t *, pu16Dst, 0); \
55	IEM_MC_ARG(uint16_t, u16Src, 1); \
56	IEM_MC_ARG(uint32_t *, pEFlags, 2); \
57	\
58	IEM_MC_FETCH_GREG_U16(u16Src, IEM_GET_MODRM_RM(pVCpu, bRm)); \
59	IEM_MC_REF_GREG_U16(pu16Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); \
60	IEM_MC_REF_EFLAGS(pEFlags); \
61	IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \
62	\
63	IEM_MC_ADVANCE_RIP_AND_FINISH(); \
64	IEM_MC_END(); \
65	break; \
66	\
67	case IEMMODE_32BIT: \
68	IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
69	IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
70	IEM_MC_ARG(uint32_t *, pu32Dst, 0); \
71	IEM_MC_ARG(uint32_t, u32Src, 1); \
72	IEM_MC_ARG(uint32_t *, pEFlags, 2); \
73	\
74	IEM_MC_FETCH_GREG_U32(u32Src, IEM_GET_MODRM_RM(pVCpu, bRm)); \
75	IEM_MC_REF_GREG_U32(pu32Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); \
76	IEM_MC_REF_EFLAGS(pEFlags); \
77	IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \
78	\
79	if (a_fModifiesDstReg) \
80	IEM_MC_CLEAR_HIGH_GREG_U64_BY_REF(pu32Dst); \
81	IEM_MC_ADVANCE_RIP_AND_FINISH(); \
82	IEM_MC_END(); \
83	break; \
84	\
85	case IEMMODE_64BIT: \
86	IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
87	IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
88	IEM_MC_ARG(uint64_t *, pu64Dst, 0); \
89	IEM_MC_ARG(uint64_t, u64Src, 1); \
90	IEM_MC_ARG(uint32_t *, pEFlags, 2); \
91	\
92	IEM_MC_FETCH_GREG_U64(u64Src, IEM_GET_MODRM_RM(pVCpu, bRm)); \
93	IEM_MC_REF_GREG_U64(pu64Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); \
94	IEM_MC_REF_EFLAGS(pEFlags); \
95	IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \
96	\
97	IEM_MC_ADVANCE_RIP_AND_FINISH(); \
98	IEM_MC_END(); \
99	break; \
100	\
101	IEM_NOT_REACHED_DEFAULT_CASE_RET(); \
102	} \
103	} \
104	else \
105	{ \
106	/* \
107	* We're accessing memory. \
108	*/ \
109	switch (pVCpu->iem.s.enmEffOpSize) \
110	{ \
111	case IEMMODE_16BIT: \
112	IEM_MC_BEGIN(3, 1, a_f16BitMcFlag, 0); \
113	IEM_MC_ARG(uint16_t *, pu16Dst, 0); \
114	IEM_MC_ARG(uint16_t, u16Src, 1); \
115	IEM_MC_ARG(uint32_t *, pEFlags, 2); \
116	IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
117	\
118	IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
119	IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
120	IEM_MC_FETCH_MEM_U16(u16Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \
121	IEM_MC_REF_GREG_U16(pu16Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); \
122	IEM_MC_REF_EFLAGS(pEFlags); \
123	IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \
124	\
125	IEM_MC_ADVANCE_RIP_AND_FINISH(); \
126	IEM_MC_END(); \
127	break; \
128	\
129	case IEMMODE_32BIT: \
130	IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_386, 0); \
131	IEM_MC_ARG(uint32_t *, pu32Dst, 0); \
132	IEM_MC_ARG(uint32_t, u32Src, 1); \
133	IEM_MC_ARG(uint32_t *, pEFlags, 2); \
134	IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
135	\
136	IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
137	IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
138	IEM_MC_FETCH_MEM_U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \
139	IEM_MC_REF_GREG_U32(pu32Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); \
140	IEM_MC_REF_EFLAGS(pEFlags); \
141	IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \
142	\
143	if (a_fModifiesDstReg) \
144	IEM_MC_CLEAR_HIGH_GREG_U64_BY_REF(pu32Dst); \
145	IEM_MC_ADVANCE_RIP_AND_FINISH(); \
146	IEM_MC_END(); \
147	break; \
148	\
149	case IEMMODE_64BIT: \
150	IEM_MC_BEGIN(3, 1, IEM_MC_F_64BIT, 0); \
151	IEM_MC_ARG(uint64_t *, pu64Dst, 0); \
152	IEM_MC_ARG(uint64_t, u64Src, 1); \
153	IEM_MC_ARG(uint32_t *, pEFlags, 2); \
154	IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
155	\
156	IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
157	IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
158	IEM_MC_FETCH_MEM_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \
159	IEM_MC_REF_GREG_U64(pu64Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); \
160	IEM_MC_REF_EFLAGS(pEFlags); \
161	IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \
162	\
163	IEM_MC_ADVANCE_RIP_AND_FINISH(); \
164	IEM_MC_END(); \
165	break; \
166	\
167	IEM_NOT_REACHED_DEFAULT_CASE_RET(); \
168	} \
169	} \
170	(void)0
171

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source: vbox/trunk/src/VBox/VMM/VMMAll/IEMAllInstCommonBodyMacros.h@ 101505

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