IEMAllN8veLiveness.cpp@ 103884

Last change on this file since 103884 was 103828, checked in by vboxsync, 9 months ago
VMM/IEM: Implemented simple (whole sale) status flag up update skipping for arithmetic operations with native emitter. bugref:10375
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1	/* $Id: IEMAllN8veLiveness.cpp 103828 2024-03-13 14:01:20Z vboxsync $ */
2	/** @file
3	* IEM - Native Recompiler, Liveness Analysis.
4	*/
5
6	/*
7	* Copyright (C) 2011-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_IEM
33	#define IEM_WITH_OPAQUE_DECODER_STATE
34	#include <VBox/vmm/iem.h>
35	#include "IEMInternal.h"
36	#include <VBox/vmm/vmcc.h>
37	#include <VBox/log.h>
38
39	#include "IEMN8veRecompiler.h"
40	#include "IEMThreadedFunctions.h"
41	#include "IEMNativeFunctions.h"
42
43
44	/*********************************************************************************************************************************
45	* Defined Constants And Macros *
46	*********************************************************************************************************************************/
47	#define NOP() ((void)0)
48
49
50	/*
51	* BEGIN & END as well as internal workers.
52	*/
53	#ifndef IEMLIVENESS_EXTENDED_LAYOUT
54	# define IEM_MC_BEGIN(a_cArgs, a_cLocals, a_fMcFlags, a_fCImplFlags) \
55	{ \
56	/* Define local variables that we use to accumulate the liveness state changes in. */ \
57	IEMLIVENESSBIT LiveStateBit0 = { 0 }; \
58	IEMLIVENESSBIT LiveStateBit1 = { 0 }; \
59	IEMLIVENESSBIT LiveMask = { 0 }; \
60	bool fDoneXpctOrCall = false
61	#else
62	# define IEM_MC_BEGIN(a_cArgs, a_cLocals, a_fMcFlags, a_fCImplFlags) \
63	{ \
64	/* Define local variables that we use to accumulate the liveness state changes in. */ \
65	IEMLIVENESSENTRY LiveState = { { 0, 0, 0, 0 } }; \
66	IEMLIVENESSBIT LiveMask = { 0 }; \
67	bool fDoneXpctOrCall = false
68	#endif
69
70	#ifndef IEMLIVENESS_EXTENDED_LAYOUT
71	AssertCompile(IEMLIVENESS_STATE_INPUT == IEMLIVENESS_STATE_MASK);
72	AssertCompile(IEMLIVENESSBIT0_XCPT_OR_CALL == 0 && IEMLIVENESSBIT1_XCPT_OR_CALL != 0);
73	# define IEM_LIVENESS_MARK_XCPT_OR_CALL() do { \
74	if (!fDoneXpctOrCall) \
75	{ \
76	LiveStateBit0.bm64 \|= pIncoming->Bit0.bm64 & pIncoming->Bit1.bm64 & ~LiveMask.bm64; \
77	LiveStateBit1.bm64 \|= IEMLIVENESSBIT1_XCPT_OR_CALL; \
78	\
79	LiveMask.bm64 \|= IEMLIVENESSBIT_MASK; /* could also use UINT64_MAX here, but makes little no(?) difference */ \
80	fDoneXpctOrCall = true; /* when compiling with gcc and cl.exe on x86 - may on arm, though. */ \
81	} \
82	} while (0)
83	#else
84	# define IEM_LIVENESS_MARK_XCPT_OR_CALL() do { \
85	if (!fDoneXpctOrCall) \
86	{ \
87	LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 \|= pIncoming->aBits[IEMLIVENESS_BIT_READ].bm64 & ~LiveMask.bm64; \
88	LiveState.aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64 \|= IEMLIVENESSBIT_MASK; \
89	LiveMask.bm64 \|= IEMLIVENESSBIT_MASK; \
90	fDoneXpctOrCall = true; \
91	} \
92	} while (0)
93	#endif
94
95
96	#ifndef IEMLIVENESS_EXTENDED_LAYOUT
97	AssertCompile(IEMLIVENESS_STATE_CLOBBERED == 0);
98	# define IEM_LIVENESS_ALL_EFLAGS_CLOBBER() do { \
99	LiveMask.bm64 \|= IEMLIVENESSBIT_ALL_EFL_MASK; \
100	} while (0)
101	AssertCompile(IEMLIVENESS_STATE_INPUT == IEMLIVENESS_STATE_MASK);
102	# define IEM_LIVENESS_ALL_EFLAGS_INPUT() do { \
103	LiveStateBit0.bm64 \|= IEMLIVENESSBIT_ALL_EFL_MASK; \
104	LiveStateBit1.bm64 \|= IEMLIVENESSBIT_ALL_EFL_MASK; \
105	LiveMask.bm64 \|= IEMLIVENESSBIT_ALL_EFL_MASK; \
106	} while (0)
107	# define IEM_LIVENESS_ALL_EFLAGS_MODIFY() IEM_LIVENESS_ALL_EFLAGS_INPUT()
108	#else
109	# define IEM_LIVENESS_ALL_EFLAGS_CLOBBER() do { \
110	LiveState.aBits[IEMLIVENESS_BIT_WRITE].bm64 \|= IEMLIVENESSBIT_ALL_EFL_MASK; \
111	LiveMask.bm64 \|= IEMLIVENESSBIT_ALL_EFL_MASK; \
112	} while (0)
113	# define IEM_LIVENESS_ALL_EFLAGS_INPUT() do { \
114	LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 \|= IEMLIVENESSBIT_ALL_EFL_MASK; \
115	LiveMask.bm64 \|= IEMLIVENESSBIT_ALL_EFL_MASK; \
116	} while (0)
117	# define IEM_LIVENESS_ALL_EFLAGS_MODIFY() do { \
118	LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 \|= IEMLIVENESSBIT_ALL_EFL_MASK; \
119	LiveState.aBits[IEMLIVENESS_BIT_WRITE].bm64 \|= IEMLIVENESSBIT_ALL_EFL_MASK; \
120	LiveMask.bm64 \|= IEMLIVENESSBIT_ALL_EFL_MASK; \
121	} while (0)
122	#endif
123
124
125	#ifndef IEMLIVENESS_EXTENDED_LAYOUT
126	# define IEM_LIVENESS_ONE_EFLAG_CLOBBER(a_Name) do { \
127	LiveMask.a_Name \|= 1; \
128	} while (0)
129	# define IEM_LIVENESS_ONE_EFLAG_INPUT(a_Name) do { \
130	LiveStateBit0.a_Name \|= 1; \
131	LiveStateBit1.a_Name \|= 1; \
132	LiveMask.a_Name \|= 1; \
133	} while (0)
134	# define IEM_LIVENESS_ONE_EFLAG_MODIFY(a_Name) IEM_LIVENESS_ONE_EFLAG_INPUT(a_Name)
135	#else
136	# define IEM_LIVENESS_ONE_EFLAG_CLOBBER(a_Name) do { \
137	LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_Name \|= 1; \
138	LiveMask.a_Name \|= 1; \
139	} while (0)
140	# define IEM_LIVENESS_ONE_EFLAG_INPUT(a_Name) do { \
141	LiveState.aBits[IEMLIVENESS_BIT_READ].a_Name \|= 1; \
142	LiveMask.a_Name \|= 1; \
143	} while (0)
144	# define IEM_LIVENESS_ONE_EFLAG_MODIFY(a_Name) do { \
145	LiveState.aBits[IEMLIVENESS_BIT_READ].a_Name \|= 1; \
146	LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_Name \|= 1; \
147	LiveMask.a_Name \|= 1; \
148	} while (0)
149	#endif
150
151
152	/* Generic bitmap (bmGpr, bmSegBase, ++) setters. */
153	#ifndef IEMLIVENESS_EXTENDED_LAYOUT
154	# define IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(a_bmMember, a_iElement) do { \
155	LiveMask.a_bmMember \|= RT_BIT_64(a_iElement); \
156	} while (0)
157	# define IEM_LIVENESS_BITMAP_MEMBER_INPUT(a_bmMember, a_iElement) do { \
158	LiveStateBit0.a_bmMember \|= RT_BIT_64(a_iElement); \
159	LiveStateBit1.a_bmMember \|= RT_BIT_64(a_iElement); \
160	LiveMask.a_bmMember \|= RT_BIT_64(a_iElement); \
161	} while (0)
162	# define IEM_LIVENESS_BITMAP_MEMBER_MODIFY(a_bmMember, a_iElement) IEM_LIVENESS_BITMAP_MEMBER_INPUT(a_bmMember, a_iElement)
163	#else
164	# define IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(a_bmMember, a_iElement) do { \
165	LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_bmMember \|= RT_BIT_64(a_iElement); \
166	LiveMask.a_bmMember \|= RT_BIT_64(a_iElement); \
167	} while (0)
168	# define IEM_LIVENESS_BITMAP_MEMBER_INPUT(a_bmMember, a_iElement) do { \
169	LiveState.aBits[IEMLIVENESS_BIT_READ].a_bmMember \|= RT_BIT_64(a_iElement); \
170	LiveMask.a_bmMember \|= RT_BIT_64(a_iElement); \
171	} while (0)
172	# define IEM_LIVENESS_BITMAP_MEMBER_MODIFY(a_bmMember, a_iElement) do { \
173	LiveState.aBits[IEMLIVENESS_BIT_READ].a_bmMember \|= RT_BIT_64(a_iElement); \
174	LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_bmMember \|= RT_BIT_64(a_iElement); \
175	LiveMask.a_bmMember \|= RT_BIT_64(a_iElement); \
176	} while (0)
177	#endif
178
179
180	#define IEM_LIVENESS_CR0_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fCr0, 0)
181	#define IEM_LIVENESS_CR4_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fCr4, 0)
182	#define IEM_LIVENESS_XCR0_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fXcr0, 0)
183
184
185	#define IEM_LIVENESS_FCW_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fFcw, 0)
186	#define IEM_LIVENESS_FCW_CLOBBER() IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(fFcw, 0)
187	#define IEM_LIVENESS_FCW_MODIFY() IEM_LIVENESS_BITMAP_MEMBER_MODIFY( fFcw, 0)
188
189
190	#define IEM_LIVENESS_FSW_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fFsw, 0)
191	#define IEM_LIVENESS_FSW_CLOBBER() IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(fFsw, 0)
192	#define IEM_LIVENESS_FSW_MODIFY() IEM_LIVENESS_BITMAP_MEMBER_MODIFY( fFsw, 0)
193
194
195	#define IEM_LIVENESS_MXCSR_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fMxCsr, 0)
196	#define IEM_LIVENESS_MXCSR_CLOBBER() IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(fMxCsr, 0)
197	#define IEM_LIVENESS_MXCSR_MODIFY() IEM_LIVENESS_BITMAP_MEMBER_MODIFY( fMxCsr, 0)
198
199
200	#define IEM_LIVENESS_GPR_CLOBBER(a_idxGpr) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmGprs, a_idxGpr)
201	#define IEM_LIVENESS_GPR_INPUT(a_idxGpr) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmGprs, a_idxGpr)
202	#define IEM_LIVENESS_GPR_MODIFY(a_idxGpr) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmGprs, a_idxGpr)
203
204
205	#define IEM_LIVENESS_SEG_BASE_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegBase, a_iSeg)
206	#define IEM_LIVENESS_SEG_BASE_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegBase, a_iSeg)
207	#define IEM_LIVENESS_SEG_BASE_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmSegBase, a_iSeg)
208
209
210	#define IEM_LIVENESS_SEG_ATTRIB_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegAttrib, a_iSeg)
211	#define IEM_LIVENESS_SEG_ATTRIB_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegAttrib, a_iSeg)
212	#define IEM_LIVENESS_SEG_ATTRIB_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODFIY( bmSegAttrib, a_iSeg)
213
214
215	#define IEM_LIVENESS_SEG_LIMIT_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegLimit, a_iSeg)
216	#define IEM_LIVENESS_SEG_LIMIT_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegLimit, a_iSeg)
217	#define IEM_LIVENESS_SEG_LIMIT_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmSegLimit, a_iSeg)
218
219
220	#define IEM_LIVENESS_SEG_SEL_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegSel, a_iSeg)
221	#define IEM_LIVENESS_SEG_SEL_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegSel, a_iSeg)
222	#define IEM_LIVENESS_SEG_SEL_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmSegSel, a_iSeg)
223
224
225	#define IEM_LIVENESS_MEM(a_iSeg) do { \
226	IEM_LIVENESS_MARK_XCPT_OR_CALL(); \
227	IEM_LIVENESS_SEG_ATTRIB_INPUT(a_iSeg); \
228	IEM_LIVENESS_SEG_BASE_INPUT(a_iSeg); \
229	IEM_LIVENESS_SEG_LIMIT_INPUT(a_iSeg); \
230	} while (0)
231
232	#define IEM_LIVENESS_MEM_FLAT() IEM_LIVENESS_MARK_XCPT_OR_CALL()
233
234	#define IEM_LIVENESS_STACK() do { \
235	IEM_LIVENESS_MEM(X86_SREG_SS); \
236	IEM_LIVENESS_GPR_MODIFY(X86_GREG_xSP); \
237	} while (0)
238
239	#define IEM_LIVENESS_STACK_FLAT() do { \
240	IEM_LIVENESS_MEM_FLAT(); \
241	IEM_LIVENESS_GPR_MODIFY(X86_GREG_xSP); \
242	} while (0)
243
244
245	#define IEM_LIVENESS_PC_NO_FLAGS() NOP()
246	#define IEM_LIVENESS_PC_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther)
247	#define IEM_LIVENESS_PC16_JMP_NO_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
248	#define IEM_LIVENESS_PC32_JMP_NO_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
249	#define IEM_LIVENESS_PC64_JMP_NO_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL()
250	#define IEM_LIVENESS_PC16_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
251	#define IEM_LIVENESS_PC32_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
252	#define IEM_LIVENESS_PC64_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther)
253
254	#ifndef IEMLIVENESS_EXTENDED_LAYOUT
255	# define IEM_MC_END() \
256	/* Combine the incoming state with what we've accumulated in this block. */ \
257	/* We can help the compiler by skipping OR'ing when having applied XPCT_OR_CALL, */ \
258	/* since that already imports all the incoming state. Saves a lot with cl.exe. */ \
259	if (!fDoneXpctOrCall) \
260	{ \
261	pOutgoing->Bit0.bm64 = LiveStateBit0.bm64 \| (~LiveMask.bm64 & pIncoming->Bit0.bm64); \
262	pOutgoing->Bit1.bm64 = LiveStateBit1.bm64 \| (~LiveMask.bm64 & pIncoming->Bit1.bm64); \
263	} \
264	else \
265	{ \
266	pOutgoing->Bit0.bm64 = LiveStateBit0.bm64; \
267	pOutgoing->Bit1.bm64 = LiveStateBit1.bm64; \
268	} \
269	}
270	#else
271	# define IEM_MC_END() \
272	/* Combine the incoming state with what we've accumulated in this block. */ \
273	/* We can help the compiler by skipping OR'ing when having applied XPCT_OR_CALL, */ \
274	/* since that already imports all the incoming state. Saves a lot with cl.exe. */ \
275	if (!fDoneXpctOrCall) \
276	{ \
277	pOutgoing->aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64 = LiveState.aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64 \
278	\| (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64); \
279	pOutgoing->aBits[IEMLIVENESS_BIT_READ].bm64 = LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 \
280	\| (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_READ].bm64); \
281	pOutgoing->aBits[IEMLIVENESS_BIT_WRITE].bm64 = LiveState.aBits[IEMLIVENESS_BIT_WRITE].bm64 \
282	\| (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_WRITE].bm64); \
283	pOutgoing->aBits[IEMLIVENESS_BIT_OTHER].bm64 = LiveState.aBits[IEMLIVENESS_BIT_OTHER].bm64 \
284	\| (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_OTHER].bm64); \
285	} \
286	else \
287	*pOutgoing = LiveState; \
288	}
289	#endif
290
291	/*
292	* The native MC variants.
293	*/
294	#define IEM_MC_FREE_LOCAL(a_Name) NOP()
295	#define IEM_MC_FREE_ARG(a_Name) NOP()
296
297
298	/*
299	* The THREADED MC variants.
300	*/
301
302	/* We don't track RIP (PC) liveness. */
303	#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_NO_FLAGS()
304	#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_NO_FLAGS()
305	#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_NO_FLAGS()
306	#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_WITH_FLAGS()
307	#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_WITH_FLAGS()
308	#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_WITH_FLAGS()
309
310	#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16(a_i8, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
311	#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
312	#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
313	#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i8, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
314	#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
315	#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
316	#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
317	#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
318	#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
319	#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
320	#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
321	#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
322	#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
323	#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
324	#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
325	#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
326	#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
327	#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
328	#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16(a_u16NewIP) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
329	#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32(a_u16NewIP) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
330	#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64(a_u16NewIP) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
331	#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_u16NewIP) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
332	#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u16NewIP) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
333	#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u16NewIP) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
334	#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32(a_u32NewEIP) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
335	#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
336	#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u32NewEIP) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
337	#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
338	#define IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
339	#define IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
340
341	/* Effective address stuff is rather complicated... */
342	#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_16(a_GCPtrEff, a_bRm, a_u16Disp) do { \
343	if (((a_bRm) & (X86_MODRM_MOD_MASK \| X86_MODRM_RM_MASK)) != 6) \
344	{ \
345	switch ((a_bRm) & X86_MODRM_RM_MASK) \
346	{ \
347	case 0: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xSI); break; \
348	case 1: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDI); break; \
349	case 2: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBP); IEM_LIVENESS_GPR_INPUT(X86_GREG_xSI); break; \
350	case 3: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBP); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDI); break; \
351	case 4: IEM_LIVENESS_GPR_INPUT(X86_GREG_xSI); break; \
352	case 5: IEM_LIVENESS_GPR_INPUT(X86_GREG_xDI); break; \
353	case 6: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBP); break; \
354	case 7: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBX); break; \
355	} \
356	} \
357	} while (0)
358
359	#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_32(a_GCPtrEff, a_bRm, a_uSibAndRspOffset, a_u32Disp) do { \
360	if (((a_bRm) & (X86_MODRM_MOD_MASK \| X86_MODRM_RM_MASK)) != 5) \
361	{ \
362	uint8_t const idxReg = (a_bRm) & X86_MODRM_RM_MASK; \
363	if (idxReg != 4 /SIB/) \
364	IEM_LIVENESS_GPR_INPUT(idxReg); \
365	else \
366	{ \
367	uint8_t const idxIndex = ((a_uSibAndRspOffset) >> X86_SIB_INDEX_SHIFT) & X86_SIB_INDEX_SMASK; \
368	if (idxIndex != 4 /no index/) \
369	IEM_LIVENESS_GPR_INPUT(idxIndex); \
370	\
371	uint8_t const idxBase = (a_uSibAndRspOffset) & X86_SIB_BASE_MASK; \
372	if (idxBase != 5 \|\| ((a_bRm) & X86_MODRM_MOD_MASK) != 0) \
373	IEM_LIVENESS_GPR_INPUT(idxBase); \
374	} \
375	} \
376	} while (0)
377
378	#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_64(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) do { \
379	if (((a_bRmEx) & (X86_MODRM_MOD_MASK \| X86_MODRM_RM_MASK)) == 5) \
380	{ /* RIP */ } \
381	else \
382	{ \
383	uint8_t const idxReg = (a_bRmEx) & (X86_MODRM_RM_MASK \| 0x8); /* bRmEx[bit 3] = REX.B */ \
384	if ((idxReg & X86_MODRM_RM_MASK) != 4 /* not SIB */) \
385	IEM_LIVENESS_GPR_INPUT(idxReg); \
386	else /* SIB: */\
387	{ \
388	uint8_t const idxIndex = (((a_uSibAndRspOffset) >> X86_SIB_INDEX_SHIFT) & X86_SIB_INDEX_SMASK) \
389	\| (((a_bRmEx) & 0x10) >> 1); /* bRmEx[bit 4] = REX.X */ \
390	if (idxIndex != 4 /no index/) \
391	IEM_LIVENESS_GPR_INPUT(idxIndex); \
392	\
393	uint8_t const idxBase = ((a_uSibAndRspOffset) & X86_SIB_BASE_MASK) \| ((a_bRmEx) & 0x8); /* bRmEx[bit 3] = REX.B */ \
394	if ((idxBase & 7) != 5 /* and !13*/ \|\| ((a_bRmEx) & X86_MODRM_MOD_MASK) != 0) \
395	IEM_LIVENESS_GPR_INPUT(idxBase); \
396	} \
397	} \
398	} while (0)
399	#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_64_FSGS(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) \
400	IEM_MC_CALC_RM_EFF_ADDR_THREADED_64(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm)
401	#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_64_ADDR32(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) \
402	IEM_MC_CALC_RM_EFF_ADDR_THREADED_64(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm)
403
404	/* At present we don't know what any CIMPL may require as input, so we do XPCT/CALL. */
405	#define IEM_MC_CALL_CIMPL_1_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0) \
406	IEM_LIVENESS_MARK_XCPT_OR_CALL()
407	#define IEM_MC_CALL_CIMPL_2_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1) \
408	IEM_LIVENESS_MARK_XCPT_OR_CALL()
409	#define IEM_MC_CALL_CIMPL_3_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2) \
410	IEM_LIVENESS_MARK_XCPT_OR_CALL()
411	#define IEM_MC_CALL_CIMPL_4_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3) \
412	IEM_LIVENESS_MARK_XCPT_OR_CALL()
413	#define IEM_MC_CALL_CIMPL_5_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3, a4) \
414	IEM_LIVENESS_MARK_XCPT_OR_CALL()
415
416	#define IEM_MC_DEFER_TO_CIMPL_0_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl) \
417	IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
418	#define IEM_MC_DEFER_TO_CIMPL_1_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0) \
419	IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
420	#define IEM_MC_DEFER_TO_CIMPL_2_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1) \
421	IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
422	#define IEM_MC_DEFER_TO_CIMPL_3_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2) \
423	IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
424	#define IEM_MC_DEFER_TO_CIMPL_4_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3) \
425	IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
426	#define IEM_MC_DEFER_TO_CIMPL_5_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3, a4) \
427	IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
428
429	/* Any 8-bit register fetch, store or modification only works on part of the register
430	and must therefore be considered INPUTs. */
431	#define IEM_MC_FETCH_GREG_U8_THREADED(a_u8Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
432	#define IEM_MC_FETCH_GREG_U8_ZX_U16_THREADED(a_u16Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
433	#define IEM_MC_FETCH_GREG_U8_ZX_U32_THREADED(a_u32Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
434	#define IEM_MC_FETCH_GREG_U8_ZX_U64_THREADED(a_u64Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
435	#define IEM_MC_FETCH_GREG_U8_SX_U16_THREADED(a_u16Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
436	#define IEM_MC_FETCH_GREG_U8_SX_U32_THREADED(a_u32Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
437	#define IEM_MC_FETCH_GREG_U8_SX_U64_THREADED(a_u64Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
438	#define IEM_MC_STORE_GREG_U8_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
439	#define IEM_MC_STORE_GREG_U8_CONST_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
440	#define IEM_MC_REF_GREG_U8_THREADED(a_pu8Dst, a_iGRegEx) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
441	#define IEM_MC_REF_GREG_U8_CONST_THREADED(a_pu8Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
442	#define IEM_MC_ADD_GREG_U8_TO_LOCAL_THREADED(a_u8Value, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
443	#define IEM_MC_AND_GREG_U8_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
444	#define IEM_MC_OR_GREG_U8_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
445
446
447	/*
448	* The other MCs.
449	*/
450
451	#define IEM_MC_NO_NATIVE_RECOMPILE() NOP()
452
453	#define IEM_MC_RAISE_DIVIDE_ERROR() IEM_LIVENESS_MARK_XCPT_OR_CALL()
454	#define IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT()
455	#define IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE() \ IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT()
456	#define IEM_MC_MAYBE_RAISE_FPU_XCPT() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_FSW_INPUT()
457	#define IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT() \
458	IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT(); IEM_LIVENESS_CR4_INPUT(); IEM_LIVENESS_XCR0_INPUT()
459	#define IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT() \
460	IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT(); IEM_LIVENESS_CR4_INPUT()
461	#define IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT() \
462	IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT(); IEM_LIVENESS_FSW_INPUT()
463	#define IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO() IEM_LIVENESS_MARK_XCPT_OR_CALL()
464	#define IEM_MC_RAISE_GP0_IF_EFF_ADDR_UNALIGNED(a_EffAddr, a_cbAlign) IEM_LIVENESS_MARK_XCPT_OR_CALL()
465	#define IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR4_INPUT()
466	#define IEM_MC_MAYBE_RAISE_NON_CANONICAL_ADDR_GP0(a_u64Addr) IEM_LIVENESS_MARK_XCPT_OR_CALL()
467	#define IEM_MC_MAYBE_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR4_INPUT() /** @todo revisit when implemented. */
468	#define IEM_MC_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR4_INPUT()
469
470	#define IEM_MC_LOCAL(a_Type, a_Name) NOP()
471	#define IEM_MC_LOCAL_ASSIGN(a_Type, a_Name, a_Value) NOP()
472	#define IEM_MC_LOCAL_CONST(a_Type, a_Name, a_Value) NOP()
473	#define IEM_MC_NOREF(a_Name) NOP()
474	#define IEM_MC_ARG(a_Type, a_Name, a_iArg) NOP()
475	#define IEM_MC_ARG_CONST(a_Type, a_Name, a_Value, a_iArg) NOP()
476	#define IEM_MC_ARG_LOCAL_REF(a_Type, a_Name, a_Local, a_iArg) NOP()
477
478	#undef IEM_MC_COMMIT_EFLAGS /* unused here */
479	#define IEM_MC_COMMIT_EFLAGS_EX(a_EFlags, a_fEflInput, a_fEflOutput) do { \
480	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_CF, fEflCf); \
481	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_PF, fEflPf); \
482	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_AF, fEflAf); \
483	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_ZF, fEflZf); \
484	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_SF, fEflSf); \
485	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_OF, fEflOf); \
486	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, ~X86_EFL_STATUS_BITS, fEflOther); \
487	Assert(!( ((a_fEflInput) \| (a_fEflOutput)) \
488	& ~(uint32_t)(X86_EFL_STATUS_BITS \| X86_EFL_DF \| X86_EFL_VM \| X86_EFL_VIF \| X86_EFL_IOPL))); \
489	} while (0)
490	#undef IEM_MC_COMMIT_EFLAGS_OPT /* unused here */
491	#define IEM_MC_COMMIT_EFLAGS_OPT_EX(a_EFlags, a_fEflInput, a_fEflOutput) \
492	IEM_MC_COMMIT_EFLAGS_EX(a_EFlags, a_fEflInput, a_fEflOutput)
493
494	#define IEM_MC_ASSIGN_TO_SMALLER(a_VarDst, a_VarSrcEol) NOP()
495
496	#define IEM_MC_FETCH_GREG_U16(a_u16Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
497	#define IEM_MC_FETCH_GREG_U16_ZX_U32(a_u32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
498	#define IEM_MC_FETCH_GREG_U16_ZX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
499	#define IEM_MC_FETCH_GREG_U16_SX_U32(a_u32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
500	#define IEM_MC_FETCH_GREG_U16_SX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
501	#define IEM_MC_FETCH_GREG_U32(a_u32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
502	#define IEM_MC_FETCH_GREG_U32_ZX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
503	#define IEM_MC_FETCH_GREG_U32_SX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
504	#define IEM_MC_FETCH_GREG_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
505	#define IEM_MC_FETCH_GREG_U64_ZX_U64 IEM_MC_FETCH_GREG_U64
506	#define IEM_MC_FETCH_GREG_PAIR_U32(a_u64Dst, a_iGRegLo, a_iGRegHi) \
507	do { IEM_LIVENESS_GPR_INPUT(a_iGRegLo); IEM_LIVENESS_GPR_INPUT(a_iGRegHi); } while(0)
508	#define IEM_MC_FETCH_GREG_PAIR_U64(a_u128Dst, a_iGRegLo, a_iGRegHi) \
509	do { IEM_LIVENESS_GPR_INPUT(a_iGRegLo); IEM_LIVENESS_GPR_INPUT(a_iGRegHi); } while(0)
510	#define IEM_MC_FETCH_SREG_U16(a_u16Dst, a_iSReg) IEM_LIVENESS_SEG_SEL_INPUT(a_iSReg)
511	#define IEM_MC_FETCH_SREG_ZX_U32(a_u32Dst, a_iSReg) IEM_LIVENESS_SEG_SEL_INPUT(a_iSReg)
512	#define IEM_MC_FETCH_SREG_ZX_U64(a_u64Dst, a_iSReg) IEM_LIVENESS_SEG_SEL_INPUT(a_iSReg)
513	#define IEM_MC_FETCH_SREG_BASE_U64(a_u64Dst, a_iSReg) IEM_LIVENESS_SEG_BASE_INPUT(a_iSReg)
514	#define IEM_MC_FETCH_SREG_BASE_U32(a_u32Dst, a_iSReg) IEM_LIVENESS_SEG_BASE_INPUT(a_iSReg)
515	#undef IEM_MC_FETCH_EFLAGS /* unused here */
516	#define IEM_MC_FETCH_EFLAGS_EX(a_EFlags, a_fEflInput, a_fEflOutput) do { \
517	/* IEM_MC_COMMIT_EFLAGS_EX doesn't cover input-only situations. This OTOH, leads \
518	to duplication in many cases, but the compiler's optimizers should help with that. */ \
519	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_CF, fEflCf); \
520	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_PF, fEflPf); \
521	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_AF, fEflAf); \
522	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_ZF, fEflZf); \
523	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_SF, fEflSf); \
524	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_OF, fEflOf); \
525	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, ~X86_EFL_STATUS_BITS, fEflOther); \
526	Assert(!( ((a_fEflInput) \| (a_fEflOutput)) \
527	& ~(uint32_t)(X86_EFL_STATUS_BITS \| X86_EFL_DF \| X86_EFL_VM \| X86_EFL_VIF \| X86_EFL_IOPL))); \
528	} while (0)
529	#define IEM_MC_FETCH_EFLAGS_U8(a_EFlags) do { \
530	IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Cf); \
531	IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Pf); \
532	IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Af); \
533	IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Zf); \
534	IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Sf); \
535	} while (0)
536
537	#define IEM_MC_FETCH_FSW(a_u16Fsw) IEM_LIVENESS_FSW_INPUT()
538	#define IEM_MC_FETCH_FCW(a_u16Fcw) IEM_LIVENESS_FCW_INPUT()
539
540	#define IEM_MC_STORE_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
541	#define IEM_MC_STORE_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
542	#define IEM_MC_STORE_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
543	#define IEM_MC_STORE_GREG_I64(a_iGReg, a_i64Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
544	#define IEM_MC_STORE_GREG_U16_CONST(a_iGReg, a_u16Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
545	#define IEM_MC_STORE_GREG_U32_CONST(a_iGReg, a_u32Const) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
546	#define IEM_MC_STORE_GREG_U64_CONST(a_iGReg, a_u32Const) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
547	#define IEM_MC_STORE_GREG_PAIR_U32(a_iGRegLo, a_iGRegHi, a_u64Value) \
548	do { IEM_LIVENESS_GPR_CLOBBER(a_iGRegLo); IEM_LIVENESS_GPR_CLOBBER(a_iGRegHi); } while(0)
549	#define IEM_MC_STORE_GREG_PAIR_U64(a_iGRegLo, a_iGRegHi, a_u128Value) \
550	do { IEM_LIVENESS_GPR_CLOBBER(a_iGRegLo); IEM_LIVENESS_GPR_CLOBBER(a_iGRegHi); } while(0)
551	#define IEM_MC_CLEAR_HIGH_GREG_U64(a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg) /** @todo This isn't always the case... */
552
553	#define IEM_MC_STORE_SREG_BASE_U64(a_iSReg, a_u64Value) IEM_LIVENESS_SEG_BASE_CLOBBER(a_iSReg)
554	#define IEM_MC_STORE_SREG_BASE_U32(a_iSReg, a_u32Value) IEM_LIVENESS_SEG_BASE_CLOBBER(a_iSReg)
555	#define IEM_MC_STORE_FPUREG_R80_SRC_REF(a_iSt, a_pr80Src) NOP()
556
557
558	#define IEM_MC_REF_GREG_U16(a_pu16Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
559	#define IEM_MC_REF_GREG_U16_CONST(a_pu16Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
560	#define IEM_MC_REF_GREG_U32(a_pu32Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
561	#define IEM_MC_REF_GREG_U32_CONST(a_pu32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
562	#define IEM_MC_REF_GREG_I32(a_pi32Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
563	#define IEM_MC_REF_GREG_I32_CONST(a_pi32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
564	#define IEM_MC_REF_GREG_U64(a_pu64Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
565	#define IEM_MC_REF_GREG_U64_CONST(a_pu64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
566	#define IEM_MC_REF_GREG_I64(a_pi64Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
567	#define IEM_MC_REF_GREG_I64_CONST(a_pi64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
568	#define IEM_MC_REF_EFLAGS(a_pEFlags) IEM_LIVENESS_ALL_EFLAGS_MODIFY()
569	#undef IEM_MC_REF_EFLAGS /* unused */
570	#define IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, a_fEfl, a_Member) \
571	if ((a_fEflInput) & (a_fEfl)) { \
572	if ((a_fEflOutput) & (a_fEfl)) IEM_LIVENESS_ONE_EFLAG_MODIFY(a_Member); \
573	else IEM_LIVENESS_ONE_EFLAG_INPUT(a_Member); \
574	} else if ((a_fEflOutput) & (a_fEfl)) IEM_LIVENESS_ONE_EFLAG_CLOBBER(a_Member)
575	#define IEM_MC_REF_EFLAGS_EX(a_pEFlags, a_fEflInput, a_fEflOutput) do { \
576	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_CF, fEflCf); \
577	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_PF, fEflPf); \
578	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_AF, fEflAf); \
579	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_ZF, fEflZf); \
580	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_SF, fEflSf); \
581	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_OF, fEflOf); \
582	IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, ~X86_EFL_STATUS_BITS, fEflOther); \
583	Assert(!( ((a_fEflInput) \| (a_fEflOutput)) \
584	& ~(uint32_t)(X86_EFL_STATUS_BITS \| X86_EFL_DF \| X86_EFL_VM \| X86_EFL_VIF \| X86_EFL_IOPL))); \
585	} while (0)
586	#define IEM_MC_ASSERT_EFLAGS(a_fEflInput, a_fEflOutput) NOP()
587	#define IEM_MC_REF_MXCSR(a_pfMxcsr) IEM_LIVENESS_MXCSR_MODIFY()
588
589
590	#define IEM_MC_ADD_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
591	#define IEM_MC_ADD_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
592	#define IEM_MC_ADD_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
593
594	#define IEM_MC_SUB_GREG_U16(a_iGReg, a_u8Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
595	#define IEM_MC_SUB_GREG_U32(a_iGReg, a_u8Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
596	#define IEM_MC_SUB_GREG_U64(a_iGReg, a_u8Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
597	#define IEM_MC_SUB_LOCAL_U16(a_u16Value, a_u16Const) NOP()
598
599	#define IEM_MC_ADD_GREG_U16_TO_LOCAL(a_u16Value, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
600	#define IEM_MC_ADD_GREG_U32_TO_LOCAL(a_u32Value, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
601	#define IEM_MC_ADD_GREG_U64_TO_LOCAL(a_u64Value, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
602	#define IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(a_EffAddr, a_i16) NOP()
603	#define IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(a_EffAddr, a_i32) NOP()
604	#define IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR(a_EffAddr, a_i64) NOP()
605
606	#define IEM_MC_AND_LOCAL_U8(a_u8Local, a_u8Mask) NOP()
607	#define IEM_MC_AND_LOCAL_U16(a_u16Local, a_u16Mask) NOP()
608	#define IEM_MC_AND_LOCAL_U32(a_u32Local, a_u32Mask) NOP()
609	#define IEM_MC_AND_LOCAL_U64(a_u64Local, a_u64Mask) NOP()
610
611	#define IEM_MC_AND_ARG_U16(a_u16Arg, a_u16Mask) NOP()
612	#define IEM_MC_AND_ARG_U32(a_u32Arg, a_u32Mask) NOP()
613	#define IEM_MC_AND_ARG_U64(a_u64Arg, a_u64Mask) NOP()
614
615	#define IEM_MC_OR_LOCAL_U8(a_u8Local, a_u8Mask) NOP()
616	#define IEM_MC_OR_LOCAL_U16(a_u16Local, a_u16Mask) NOP()
617	#define IEM_MC_OR_LOCAL_U32(a_u32Local, a_u32Mask) NOP()
618
619	#define IEM_MC_SAR_LOCAL_S16(a_i16Local, a_cShift) NOP()
620	#define IEM_MC_SAR_LOCAL_S32(a_i32Local, a_cShift) NOP()
621	#define IEM_MC_SAR_LOCAL_S64(a_i64Local, a_cShift) NOP()
622
623	#define IEM_MC_SHR_LOCAL_U8(a_u8Local, a_cShift) NOP()
624
625	#define IEM_MC_SHL_LOCAL_S16(a_i16Local, a_cShift) NOP()
626	#define IEM_MC_SHL_LOCAL_S32(a_i32Local, a_cShift) NOP()
627	#define IEM_MC_SHL_LOCAL_S64(a_i64Local, a_cShift) NOP()
628
629	#define IEM_MC_AND_2LOCS_U32(a_u32Local, a_u32Mask) NOP()
630
631	#define IEM_MC_OR_2LOCS_U32(a_u32Local, a_u32Mask) NOP()
632
633	#define IEM_MC_AND_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
634	#define IEM_MC_AND_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
635	#define IEM_MC_AND_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
636
637	#define IEM_MC_OR_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
638	#define IEM_MC_OR_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
639	#define IEM_MC_OR_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
640
641	#define IEM_MC_BSWAP_LOCAL_U16(a_u16Local) NOP()
642	#define IEM_MC_BSWAP_LOCAL_U32(a_u32Local) NOP()
643	#define IEM_MC_BSWAP_LOCAL_U64(a_u64Local) NOP()
644
645	#define IEM_MC_SET_EFL_BIT(a_fBit) do { \
646	if ((a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \
647	else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); \
648	else { AssertFailed(); IEM_LIVENESS_ALL_EFLAG_INPUT(); } \
649	} while (0)
650	#define IEM_MC_CLEAR_EFL_BIT(a_fBit) do { \
651	if ((a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \
652	else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); \
653	else { AssertFailed(); IEM_LIVENESS_ALL_EFLAG_INPUT(); } \
654	} while (0)
655	#define IEM_MC_FLIP_EFL_BIT(a_fBit) do { \
656	if ((a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_MODIFY(fEflCf); \
657	else { AssertFailed(); IEM_LIVENESS_ALL_EFLAG_MODIFY(); } \
658	} while (0)
659
660	#define IEM_MC_CLEAR_FSW_EX() IEM_LIVENESS_FCW_MODIFY()
661	#define IEM_MC_FPU_TO_MMX_MODE() IEM_LIVENESS_FCW_MODIFY()
662	#define IEM_MC_FPU_FROM_MMX_MODE() IEM_LIVENESS_FCW_MODIFY()
663
664	#define IEM_MC_FETCH_MREG_U64(a_u64Value, a_iMReg) NOP()
665	#define IEM_MC_FETCH_MREG_U32(a_u32Value, a_iMReg) NOP()
666	#define IEM_MC_STORE_MREG_U64(a_iMReg, a_u64Value) NOP()
667	#define IEM_MC_STORE_MREG_U32_ZX_U64(a_iMReg, a_u32Value) NOP()
668	#define IEM_MC_REF_MREG_U64(a_pu64Dst, a_iMReg) NOP()
669	#define IEM_MC_REF_MREG_U64_CONST(a_pu64Dst, a_iMReg) NOP()
670	#define IEM_MC_REF_MREG_U32_CONST(a_pu32Dst, a_iMReg) NOP()
671	#define IEM_MC_MODIFIED_MREG(a_iMReg) NOP()
672	#define IEM_MC_MODIFIED_MREG_BY_REF(a_pu64Dst) NOP()
673
674	#define IEM_MC_CLEAR_XREG_U32_MASK(a_iXReg, a_bMask) NOP()
675	#define IEM_MC_FETCH_XREG_U128(a_u128Value, a_iXReg) NOP()
676	#define IEM_MC_FETCH_XREG_XMM(a_XmmValue, a_iXReg) NOP()
677	#define IEM_MC_FETCH_XREG_U64(a_u64Value, a_iXReg, a_iQWord) NOP()
678	#define IEM_MC_FETCH_XREG_U32(a_u32Value, a_iXReg, a_iDWord) NOP()
679	#define IEM_MC_FETCH_XREG_U16(a_u16Value, a_iXReg, a_iWord) NOP()
680	#define IEM_MC_FETCH_XREG_U8( a_u8Value, a_iXReg, a_iByte) NOP()
681	#define IEM_MC_FETCH_XREG_PAIR_U128(a_Dst, a_iXReg1, a_iXReg2) NOP()
682	#define IEM_MC_FETCH_XREG_PAIR_XMM(a_Dst, a_iXReg1, a_iXReg2) NOP()
683	#define IEM_MC_FETCH_XREG_PAIR_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iXReg2) \
684	do { IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
685	#define IEM_MC_FETCH_XREG_PAIR_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iXReg2) \
686	do { IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
687	#define IEM_MC_STORE_XREG_U128(a_iXReg, a_u128Value) NOP()
688	#define IEM_MC_STORE_XREG_XMM(a_iXReg, a_XmmValue) NOP()
689	#define IEM_MC_STORE_XREG_XMM_U32(a_iXReg, a_iDword, a_XmmValue) NOP()
690	#define IEM_MC_STORE_XREG_XMM_U64(a_iXReg, a_iQword, a_XmmValue) NOP()
691	#define IEM_MC_STORE_XREG_U64(a_iXReg, a_iQword, a_u64Value) NOP()
692	#define IEM_MC_STORE_XREG_U32(a_iXReg, a_iDword, a_u32Value) NOP()
693	#define IEM_MC_STORE_XREG_U16(a_iXReg, a_iWord, a_u16Value) NOP()
694	#define IEM_MC_STORE_XREG_U8(a_iXReg, a_iByte, a_u8Value) NOP()
695	#define IEM_MC_STORE_XREG_U64_ZX_U128(a_iXReg, a_u64Value) NOP()
696	#define IEM_MC_STORE_XREG_U32_U128(a_iXReg, a_iDwDst, a_u128Value, a_iDwSrc) NOP()
697	#define IEM_MC_STORE_XREG_R32(a_iXReg, a_r32Value) NOP()
698	#define IEM_MC_STORE_XREG_R64(a_iXReg, a_r64Value) NOP()
699	#define IEM_MC_STORE_XREG_U32_ZX_U128(a_iXReg, a_u32Value) NOP()
700
701	#define IEM_MC_BROADCAST_XREG_U8_ZX_VLMAX(a_iXRegDst, a_u8Src) NOP()
702	#define IEM_MC_BROADCAST_XREG_U16_ZX_VLMAX(a_iXRegDst, a_u16Src) NOP()
703	#define IEM_MC_BROADCAST_XREG_U32_ZX_VLMAX(a_iXRegDst, a_u32Src) NOP()
704	#define IEM_MC_BROADCAST_XREG_U64_ZX_VLMAX(a_iXRegDst, a_u64Src) NOP()
705
706	#define IEM_MC_REF_XREG_U128(a_pu128Dst, a_iXReg) NOP()
707	#define IEM_MC_REF_XREG_U128_CONST(a_pu128Dst, a_iXReg) NOP()
708	#define IEM_MC_REF_XREG_XMM_CONST(a_pXmmDst, a_iXReg) NOP()
709	#define IEM_MC_REF_XREG_U32_CONST(a_pu32Dst, a_iXReg) NOP()
710	#define IEM_MC_REF_XREG_U64_CONST(a_pu64Dst, a_iXReg) NOP()
711	#define IEM_MC_REF_XREG_R32_CONST(a_pr32Dst, a_iXReg) NOP()
712	#define IEM_MC_REF_XREG_R64_CONST(a_pr64Dst, a_iXReg) NOP()
713	#define IEM_MC_COPY_XREG_U128(a_iXRegDst, a_iXRegSrc) NOP()
714
715	#define IEM_MC_FETCH_YREG_U32(a_u32Dst, a_iYRegSrc) NOP()
716	#define IEM_MC_FETCH_YREG_U64(a_u64Dst, a_iYRegSrc, a_iQWord) NOP()
717	#define IEM_MC_FETCH_YREG_U128(a_u128Dst, a_iYRegSrc) NOP()
718	#define IEM_MC_FETCH_YREG_U256(a_u256Dst, a_iYRegSrc) NOP()
719
720	#define IEM_MC_STORE_YREG_U128(a_iYRegDst, a_iDQword, a_u128Value) NOP()
721
722	#define IEM_MC_INT_CLEAR_ZMM_256_UP(a_iXRegDst) NOP()
723	#define IEM_MC_STORE_YREG_U32_ZX_VLMAX(a_iYRegDst, a_u32Src) NOP()
724	#define IEM_MC_STORE_YREG_U64_ZX_VLMAX(a_iYRegDst, a_u64Src) NOP()
725	#define IEM_MC_STORE_YREG_U128_ZX_VLMAX(a_iYRegDst, a_u128Src) NOP()
726	#define IEM_MC_STORE_YREG_U256_ZX_VLMAX(a_iYRegDst, a_u256Src) NOP()
727
728	#define IEM_MC_BROADCAST_YREG_U8_ZX_VLMAX(a_iYRegDst, a_u8Src) NOP()
729	#define IEM_MC_BROADCAST_YREG_U16_ZX_VLMAX(a_iYRegDst, a_u16Src) NOP()
730	#define IEM_MC_BROADCAST_YREG_U32_ZX_VLMAX(a_iYRegDst, a_u32Src) NOP()
731	#define IEM_MC_BROADCAST_YREG_U64_ZX_VLMAX(a_iYRegDst, a_u64Src) NOP()
732	#define IEM_MC_BROADCAST_YREG_U128_ZX_VLMAX(a_iYRegDst, a_u128Src) NOP()
733
734	#define IEM_MC_REF_YREG_U128(a_pu128Dst, a_iYReg) NOP()
735	#define IEM_MC_REF_YREG_U128_CONST(a_pu128Dst, a_iYReg) NOP()
736	#define IEM_MC_REF_YREG_U64_CONST(a_pu64Dst, a_iYReg) NOP()
737	#define IEM_MC_CLEAR_YREG_128_UP(a_iYReg) NOP()
738
739	#define IEM_MC_COPY_YREG_U256_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) NOP()
740	#define IEM_MC_COPY_YREG_U128_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) NOP()
741	#define IEM_MC_COPY_YREG_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) NOP()
742
743	#define IEM_MC_MERGE_YREG_U32_U96_ZX_VLMAX(a_iYRegDst, a_iYRegSrc32, a_iYRegSrcHx) NOP()
744	#define IEM_MC_MERGE_YREG_U64_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) NOP()
745	#define IEM_MC_MERGE_YREG_U64LO_U64LO_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) NOP()
746	#define IEM_MC_MERGE_YREG_U64HI_U64HI_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) NOP()
747	#define IEM_MC_MERGE_YREG_U64LO_U64LOCAL_ZX_VLMAX(a_iYRegDst, a_iYRegSrcHx, a_u64Local) NOP()
748	#define IEM_MC_MERGE_YREG_U64LOCAL_U64HI_ZX_VLMAX(a_iYRegDst, a_u64Local, a_iYRegSrcHx) NOP()
749
750	#define IEM_MC_FETCH_MEM_U8(a_u8Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
751	#define IEM_MC_FETCH_MEM16_U8(a_u8Dst, a_iSeg, a_GCPtrMem16) IEM_LIVENESS_MEM(a_iSeg)
752	#define IEM_MC_FETCH_MEM32_U8(a_u8Dst, a_iSeg, a_GCPtrMem32) IEM_LIVENESS_MEM(a_iSeg)
753
754	#define IEM_MC_FETCH_MEM_FLAT_U8(a_u8Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
755	#define IEM_MC_FETCH_MEM16_FLAT_U8(a_u8Dst, a_GCPtrMem16) IEM_LIVENESS_MEM_FLAT()
756	#define IEM_MC_FETCH_MEM32_FLAT_U8(a_u8Dst, a_GCPtrMem32) IEM_LIVENESS_MEM_FLAT()
757
758	#define IEM_MC_FETCH_MEM_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
759	#define IEM_MC_FETCH_MEM_U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
760	#define IEM_MC_FETCH_MEM_I16(a_i16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
761
762	#define IEM_MC_FETCH_MEM_FLAT_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
763	#define IEM_MC_FETCH_MEM_FLAT_U16_DISP(a_u16Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
764	#define IEM_MC_FETCH_MEM_FLAT_I16(a_i16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
765
766	#define IEM_MC_FETCH_MEM_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
767	#define IEM_MC_FETCH_MEM_U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
768	#define IEM_MC_FETCH_MEM_I32(a_i32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
769
770	#define IEM_MC_FETCH_MEM_FLAT_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
771	#define IEM_MC_FETCH_MEM_FLAT_U32_DISP(a_u32Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
772	#define IEM_MC_FETCH_MEM_FLAT_I32(a_i32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
773
774	#define IEM_MC_FETCH_MEM_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
775	#define IEM_MC_FETCH_MEM_U64_DISP(a_u64Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
776	#define IEM_MC_FETCH_MEM_U64_ALIGN_U128(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
777	#define IEM_MC_FETCH_MEM_I64(a_i64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
778
779	#define IEM_MC_FETCH_MEM_FLAT_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
780	#define IEM_MC_FETCH_MEM_FLAT_U64_DISP(a_u64Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
781	#define IEM_MC_FETCH_MEM_FLAT_U64_ALIGN_U128(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
782	#define IEM_MC_FETCH_MEM_FLAT_I64(a_i64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
783
784	#define IEM_MC_FETCH_MEM_R32(a_r32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
785	#define IEM_MC_FETCH_MEM_R64(a_r64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
786	#define IEM_MC_FETCH_MEM_R80(a_r80Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
787	#define IEM_MC_FETCH_MEM_D80(a_d80Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
788
789	#define IEM_MC_FETCH_MEM_FLAT_R32(a_r32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
790	#define IEM_MC_FETCH_MEM_FLAT_R64(a_r64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
791	#define IEM_MC_FETCH_MEM_FLAT_R80(a_r80Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
792	#define IEM_MC_FETCH_MEM_FLAT_D80(a_d80Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
793
794	#define IEM_MC_FETCH_MEM_U128(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
795	#define IEM_MC_FETCH_MEM_U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
796	#define IEM_MC_FETCH_MEM_U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
797
798	#define IEM_MC_FETCH_MEM_XMM(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
799	#define IEM_MC_FETCH_MEM_XMM_NO_AC(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
800	#define IEM_MC_FETCH_MEM_XMM_ALIGN_SSE(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
801	#define IEM_MC_FETCH_MEM_XMM_U32(a_XmmDst, a_iDWord, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
802	#define IEM_MC_FETCH_MEM_XMM_U64(a_XmmDst, a_iQWord, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
803
804	#define IEM_MC_FETCH_MEM_FLAT_U128(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
805	#define IEM_MC_FETCH_MEM_FLAT_U128_NO_AC(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
806	#define IEM_MC_FETCH_MEM_FLAT_U128_ALIGN_SSE(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
807
808	#define IEM_MC_FETCH_MEM_FLAT_XMM(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
809	#define IEM_MC_FETCH_MEM_FLAT_XMM_NO_AC(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
810	#define IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
811	#define IEM_MC_FETCH_MEM_FLAT_XMM_U32(a_XmmDst, a_iDWord, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
812	#define IEM_MC_FETCH_MEM_FLAT_XMM_U64(a_XmmDst, a_iQWord, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
813
814	#define IEM_MC_FETCH_MEM_U128_AND_XREG_U128(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
815	#define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128(a_Dst, a_iXReg1, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
816
817	#define IEM_MC_FETCH_MEM_XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
818	#define IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
819	#define IEM_MC_FETCH_MEM_XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
820	#define IEM_MC_FETCH_MEM_FLAT_XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
821	#define IEM_MC_FETCH_MEM_XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
822	#define IEM_MC_FETCH_MEM_FLAT_XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
823
824	#define IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \
825	do { IEM_LIVENESS_MEM(a_iSeg2); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
826	#define IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \
827	do { IEM_LIVENESS_MEM(a_iSeg2); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
828
829	#define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_GCPtrMem2) \
830	do { IEM_LIVENESS_MEM_FLAT(); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
831	#define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_GCPtrMem2) \
832	do { IEM_LIVENESS_MEM_FLAT(); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
833
834
835	#define IEM_MC_FETCH_MEM_U256(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
836	#define IEM_MC_FETCH_MEM_U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
837	#define IEM_MC_FETCH_MEM_U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
838
839	#define IEM_MC_FETCH_MEM_YMM(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
840	#define IEM_MC_FETCH_MEM_YMM_NO_AC(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
841	#define IEM_MC_FETCH_MEM_YMM_ALIGN_AVX(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
842
843	#define IEM_MC_FETCH_MEM_FLAT_U256(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
844	#define IEM_MC_FETCH_MEM_FLAT_U256_NO_AC(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
845	#define IEM_MC_FETCH_MEM_FLAT_U256_ALIGN_AVX(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
846
847	#define IEM_MC_FETCH_MEM_FLAT_YMM(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
848	#define IEM_MC_FETCH_MEM_FLAT_YMM_NO_AC(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
849	#define IEM_MC_FETCH_MEM_FLAT_YMM_ALIGN_AVX(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
850
851	#define IEM_MC_FETCH_MEM_U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
852	#define IEM_MC_FETCH_MEM_U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
853	#define IEM_MC_FETCH_MEM_U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
854	#define IEM_MC_FETCH_MEM_U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
855	#define IEM_MC_FETCH_MEM_U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
856	#define IEM_MC_FETCH_MEM_U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
857
858	#define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
859	#define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
860	#define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
861	#define IEM_MC_FETCH_MEM_FLAT_U16_ZX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
862	#define IEM_MC_FETCH_MEM_FLAT_U16_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
863	#define IEM_MC_FETCH_MEM_FLAT_U32_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
864
865	#define IEM_MC_FETCH_MEM_U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
866	#define IEM_MC_FETCH_MEM_U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
867	#define IEM_MC_FETCH_MEM_U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
868	#define IEM_MC_FETCH_MEM_U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
869	#define IEM_MC_FETCH_MEM_U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
870	#define IEM_MC_FETCH_MEM_U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
871
872	#define IEM_MC_FETCH_MEM_FLAT_U8_SX_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
873	#define IEM_MC_FETCH_MEM_FLAT_U8_SX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
874	#define IEM_MC_FETCH_MEM_FLAT_U8_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
875	#define IEM_MC_FETCH_MEM_FLAT_U16_SX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
876	#define IEM_MC_FETCH_MEM_FLAT_U16_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
877	#define IEM_MC_FETCH_MEM_FLAT_U32_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
878
879	#define IEM_MC_STORE_MEM_U8(a_iSeg, a_GCPtrMem, a_u8Value) IEM_LIVENESS_MEM(a_iSeg)
880	#define IEM_MC_STORE_MEM_U16(a_iSeg, a_GCPtrMem, a_u16Value) IEM_LIVENESS_MEM(a_iSeg)
881	#define IEM_MC_STORE_MEM_U32(a_iSeg, a_GCPtrMem, a_u32Value) IEM_LIVENESS_MEM(a_iSeg)
882	#define IEM_MC_STORE_MEM_U64(a_iSeg, a_GCPtrMem, a_u64Value) IEM_LIVENESS_MEM(a_iSeg)
883
884	#define IEM_MC_STORE_MEM_FLAT_U8(a_GCPtrMem, a_u8Value) IEM_LIVENESS_MEM_FLAT()
885	#define IEM_MC_STORE_MEM_FLAT_U16(a_GCPtrMem, a_u16Value) IEM_LIVENESS_MEM_FLAT()
886	#define IEM_MC_STORE_MEM_FLAT_U32(a_GCPtrMem, a_u32Value) IEM_LIVENESS_MEM_FLAT()
887	#define IEM_MC_STORE_MEM_FLAT_U64(a_GCPtrMem, a_u64Value) IEM_LIVENESS_MEM_FLAT()
888
889	#define IEM_MC_STORE_MEM_U8_CONST(a_iSeg, a_GCPtrMem, a_u8C) IEM_LIVENESS_MEM(a_iSeg)
890	#define IEM_MC_STORE_MEM_U16_CONST(a_iSeg, a_GCPtrMem, a_u16C) IEM_LIVENESS_MEM(a_iSeg)
891	#define IEM_MC_STORE_MEM_U32_CONST(a_iSeg, a_GCPtrMem, a_u32C) IEM_LIVENESS_MEM(a_iSeg)
892	#define IEM_MC_STORE_MEM_U64_CONST(a_iSeg, a_GCPtrMem, a_u64C) IEM_LIVENESS_MEM(a_iSeg)
893
894	#define IEM_MC_STORE_MEM_FLAT_U8_CONST(a_GCPtrMem, a_u8C) IEM_LIVENESS_MEM_FLAT()
895	#define IEM_MC_STORE_MEM_FLAT_U16_CONST(a_GCPtrMem, a_u16C) IEM_LIVENESS_MEM_FLAT()
896	#define IEM_MC_STORE_MEM_FLAT_U32_CONST(a_GCPtrMem, a_u32C) IEM_LIVENESS_MEM_FLAT()
897	#define IEM_MC_STORE_MEM_FLAT_U64_CONST(a_GCPtrMem, a_u64C) IEM_LIVENESS_MEM_FLAT()
898
899	#define IEM_MC_STORE_MEM_I8_CONST_BY_REF( a_pi8Dst, a_i8C) NOP()
900	#define IEM_MC_STORE_MEM_I16_CONST_BY_REF(a_pi16Dst, a_i16C) NOP()
901	#define IEM_MC_STORE_MEM_I32_CONST_BY_REF(a_pi32Dst, a_i32C) NOP()
902	#define IEM_MC_STORE_MEM_I64_CONST_BY_REF(a_pi64Dst, a_i64C) NOP()
903	#define IEM_MC_STORE_MEM_NEG_QNAN_R32_BY_REF(a_pr32Dst) NOP()
904	#define IEM_MC_STORE_MEM_NEG_QNAN_R64_BY_REF(a_pr64Dst) NOP()
905	#define IEM_MC_STORE_MEM_NEG_QNAN_R80_BY_REF(a_pr80Dst) NOP()
906	#define IEM_MC_STORE_MEM_INDEF_D80_BY_REF(a_pd80Dst) NOP()
907
908	#define IEM_MC_STORE_MEM_U128(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM(a_iSeg)
909	#define IEM_MC_STORE_MEM_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM(a_iSeg)
910
911	#define IEM_MC_STORE_MEM_FLAT_U128(a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_FLAT()
912	#define IEM_MC_STORE_MEM_FLAT_U128_ALIGN_SSE(a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_FLAT()
913
914	#define IEM_MC_STORE_MEM_U256(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM(a_iSeg)
915	#define IEM_MC_STORE_MEM_U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM(a_iSeg)
916
917	#define IEM_MC_STORE_MEM_FLAT_U256(a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_FLAT()
918	#define IEM_MC_STORE_MEM_FLAT_U256_ALIGN_AVX(a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_FLAT()
919
920	#define IEM_MC_PUSH_U16(a_u16Value) IEM_LIVENESS_STACK()
921	#define IEM_MC_PUSH_U32(a_u32Value) IEM_LIVENESS_STACK()
922	#define IEM_MC_PUSH_U32_SREG(a_uSegVal) IEM_LIVENESS_STACK()
923	#define IEM_MC_PUSH_U64(a_u64Value) IEM_LIVENESS_STACK()
924
925	#define IEM_MC_POP_GREG_U16(a_iGReg) do { IEM_LIVENESS_STACK(); IEM_LIVENESS_GPR_MODIFY(a_iGReg); } while (0)
926	#define IEM_MC_POP_GREG_U32(a_iGReg) do { IEM_LIVENESS_STACK(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
927	#define IEM_MC_POP_GREG_U64(a_iGReg) do { IEM_LIVENESS_STACK(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
928
929	/* 32-bit flat stack push and pop: */
930	#define IEM_MC_FLAT32_PUSH_U16(a_u16Value) IEM_LIVENESS_STACK_FLAT()
931	#define IEM_MC_FLAT32_PUSH_U32(a_u32Value) IEM_LIVENESS_STACK_FLAT()
932	#define IEM_MC_FLAT32_PUSH_U32_SREG(a_uSegVal) IEM_LIVENESS_STACK_FLAT()
933
934	#define IEM_MC_FLAT32_POP_GREG_U16(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_MODIFY(a_iGReg); } while (0)
935	#define IEM_MC_FLAT32_POP_GREG_U32(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
936
937	/* 64-bit flat stack push and pop: */
938	#define IEM_MC_FLAT64_PUSH_U16(a_u16Value) IEM_LIVENESS_STACK_FLAT()
939	#define IEM_MC_FLAT64_PUSH_U64(a_u64Value) IEM_LIVENESS_STACK_FLAT()
940
941	#define IEM_MC_FLAT64_POP_GREG_U16(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_MODIFY(a_iGReg); } while (0)
942	#define IEM_MC_FLAT64_POP_GREG_U64(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
943
944
945	#define IEM_MC_MEM_MAP_U8_ATOMIC(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
946	#define IEM_MC_MEM_MAP_U8_RW(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
947	#define IEM_MC_MEM_MAP_U8_WO(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
948	#define IEM_MC_MEM_MAP_U8_RO(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
949	#define IEM_MC_MEM_FLAT_MAP_U8_ATOMIC(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
950	#define IEM_MC_MEM_FLAT_MAP_U8_RW(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
951	#define IEM_MC_MEM_FLAT_MAP_U8_WO(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
952	#define IEM_MC_MEM_FLAT_MAP_U8_RO(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
953	#define IEM_MC_MEM_MAP_U16_ATOMIC(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
954	#define IEM_MC_MEM_MAP_U16_RW(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
955	#define IEM_MC_MEM_MAP_U16_WO(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
956	#define IEM_MC_MEM_MAP_U16_RO(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
957	#define IEM_MC_MEM_FLAT_MAP_U16_ATOMIC(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
958	#define IEM_MC_MEM_FLAT_MAP_U16_RW(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
959	#define IEM_MC_MEM_FLAT_MAP_U16_WO(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
960	#define IEM_MC_MEM_FLAT_MAP_U16_RO(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
961	#define IEM_MC_MEM_MAP_I16_WO(a_pi16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
962	#define IEM_MC_MEM_FLAT_MAP_I16_WO(a_pi16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
963	#define IEM_MC_MEM_MAP_U32_ATOMIC(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
964	#define IEM_MC_MEM_MAP_U32_RW(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
965	#define IEM_MC_MEM_MAP_U32_WO(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
966	#define IEM_MC_MEM_MAP_U32_RO(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
967	#define IEM_MC_MEM_FLAT_MAP_U32_ATOMIC(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
968	#define IEM_MC_MEM_FLAT_MAP_U32_RW(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
969	#define IEM_MC_MEM_FLAT_MAP_U32_WO(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
970	#define IEM_MC_MEM_FLAT_MAP_U32_RO(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
971	#define IEM_MC_MEM_MAP_I32_WO(a_pi32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
972	#define IEM_MC_MEM_FLAT_MAP_I32_WO(a_pi32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
973	#define IEM_MC_MEM_MAP_R32_WO(a_pr32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
974	#define IEM_MC_MEM_FLAT_MAP_R32_WO(a_pr32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
975	#define IEM_MC_MEM_MAP_U64_ATOMIC(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
976	#define IEM_MC_MEM_MAP_U64_RW(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
977	#define IEM_MC_MEM_MAP_U64_WO(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
978	#define IEM_MC_MEM_MAP_U64_RO(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
979	#define IEM_MC_MEM_FLAT_MAP_U64_ATOMIC(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
980	#define IEM_MC_MEM_FLAT_MAP_U64_RW(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
981	#define IEM_MC_MEM_FLAT_MAP_U64_WO(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
982	#define IEM_MC_MEM_FLAT_MAP_U64_RO(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
983	#define IEM_MC_MEM_MAP_I64_WO(a_pi64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
984	#define IEM_MC_MEM_FLAT_MAP_I64_WO(a_pi64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
985	#define IEM_MC_MEM_MAP_R64_WO(a_pr64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
986	#define IEM_MC_MEM_FLAT_MAP_R64_WO(a_pr64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
987	#define IEM_MC_MEM_MAP_U128_ATOMIC(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
988	#define IEM_MC_MEM_MAP_U128_RW(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
989	#define IEM_MC_MEM_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
990	#define IEM_MC_MEM_MAP_U128_RO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
991	#define IEM_MC_MEM_FLAT_MAP_U128_ATOMIC(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
992	#define IEM_MC_MEM_FLAT_MAP_U128_RW(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
993	#define IEM_MC_MEM_FLAT_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
994	#define IEM_MC_MEM_FLAT_MAP_U128_RO(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
995	#define IEM_MC_MEM_MAP_R80_WO(a_pr80Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
996	#define IEM_MC_MEM_FLAT_MAP_R80_WO(a_pr80Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
997	#define IEM_MC_MEM_MAP_D80_WO(a_pd80Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
998	#define IEM_MC_MEM_FLAT_MAP_D80_WO(a_pd80Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
999
1000
1001	#define IEM_MC_MEM_COMMIT_AND_UNMAP_RW(a_bMapInfo) NOP()
1002	#define IEM_MC_MEM_COMMIT_AND_UNMAP_ATOMIC(a_bMapInfo) NOP()
1003	#define IEM_MC_MEM_COMMIT_AND_UNMAP_WO(a_bMapInfo) NOP()
1004	#define IEM_MC_MEM_COMMIT_AND_UNMAP_RO(a_bMapInfo) NOP()
1005	#define IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(a_bMapInfo, a_u16FSW) NOP()
1006	#define IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(a_bMapInfo) NOP()
1007
1008	#define IEM_MC_NATIVE_IF(a_fSupportedHosts) {
1009	#define IEM_MC_NATIVE_ELSE() } {
1010	#define IEM_MC_NATIVE_ENDIF() } ((void)0)
1011
1012	#define IEM_MC_NATIVE_EMIT_0(a_fnEmitter)
1013	#define IEM_MC_NATIVE_EMIT_1(a_fnEmitter, a0) NOP()
1014	#define IEM_MC_NATIVE_EMIT_2(a_fnEmitter, a0, a1) NOP()
1015	#define IEM_MC_NATIVE_EMIT_3(a_fnEmitter, a0, a1, a2) NOP()
1016	#define IEM_MC_NATIVE_EMIT_4(a_fnEmitter, a0, a1, a2, a3) NOP()
1017	#define IEM_MC_NATIVE_EMIT_5(a_fnEmitter, a0, a1, a2, a3, a4) NOP()
1018	#define IEM_MC_NATIVE_EMIT_6(a_fnEmitter, a0, a1, a2, a3, a4, a5) NOP()
1019	#define IEM_MC_NATIVE_EMIT_7(a_fnEmitter, a0, a1, a2, a3, a4, a5, a6) NOP()
1020	#define IEM_MC_NATIVE_EMIT_8(a_fnEmitter, a0, a1, a2, a3, a4, a5, a6, a7) NOP()
1021
1022	#define IEM_MC_CALL_VOID_AIMPL_0(a_pfn) NOP()
1023	#define IEM_MC_CALL_VOID_AIMPL_1(a_pfn, a0) NOP()
1024	#define IEM_MC_CALL_VOID_AIMPL_2(a_pfn, a0, a1) NOP()
1025	#define IEM_MC_CALL_VOID_AIMPL_3(a_pfn, a0, a1, a2) NOP()
1026	#define IEM_MC_CALL_VOID_AIMPL_4(a_pfn, a0, a1, a2, a3) NOP()
1027	#define IEM_MC_CALL_AIMPL_3(a_rc, a_pfn, a0, a1, a2) NOP()
1028	#define IEM_MC_CALL_AIMPL_4(a_rc, a_pfn, a0, a1, a2, a3) NOP()
1029
1030	#define IEM_MC_CALL_FPU_AIMPL_1(a_pfnAImpl, a0) NOP()
1031	#define IEM_MC_CALL_FPU_AIMPL_2(a_pfnAImpl, a0, a1) NOP()
1032	#define IEM_MC_CALL_FPU_AIMPL_3(a_pfnAImpl, a0, a1, a2) NOP()
1033
1034	#define IEM_MC_SET_FPU_RESULT(a_FpuData, a_FSW, a_pr80Value) NOP()
1035
1036	#define IEM_MC_PUSH_FPU_RESULT(a_FpuData, a_uFpuOpcode) NOP()
1037	#define IEM_MC_PUSH_FPU_RESULT_MEM_OP(a_FpuData, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1038	#define IEM_MC_PUSH_FPU_RESULT_TWO(a_FpuDataTwo, a_uFpuOpcode) NOP()
1039
1040	#define IEM_MC_STORE_FPU_RESULT(a_FpuData, a_iStReg, a_uFpuOpcode) NOP()
1041	#define IEM_MC_STORE_FPU_RESULT_THEN_POP(a_FpuData, a_iStReg, a_uFpuOpcode) NOP()
1042	#define IEM_MC_STORE_FPU_RESULT_MEM_OP(a_FpuData, a_iStReg, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1043	#define IEM_MC_STORE_FPU_RESULT_WITH_MEM_OP_THEN_POP(a_FpuData, a_iStReg, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1044
1045	#define IEM_MC_UPDATE_FPU_OPCODE_IP(a_uFpuOpcode) NOP()
1046	#define IEM_MC_FPU_STACK_FREE(a_iStReg) NOP()
1047	#define IEM_MC_FPU_STACK_INC_TOP() NOP()
1048	#define IEM_MC_FPU_STACK_DEC_TOP() NOP()
1049
1050	#define IEM_MC_UPDATE_FSW(a_u16FSW, a_uFpuOpcode) NOP()
1051	#define IEM_MC_UPDATE_FSW_CONST(a_u16FSW, a_uFpuOpcode) NOP()
1052	#define IEM_MC_UPDATE_FSW_WITH_MEM_OP(a_u16FSW, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1053	#define IEM_MC_UPDATE_FSW_THEN_POP(a_u16FSW, a_uFpuOpcode) NOP()
1054	#define IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(a_u16FSW, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1055	#define IEM_MC_UPDATE_FSW_THEN_POP_POP(a_u16FSW, a_uFpuOpcode) NOP()
1056
1057	#define IEM_MC_FPU_STACK_UNDERFLOW(a_iStDst, a_uFpuOpcode) NOP()
1058	#define IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP(a_iStDst, a_uFpuOpcode) NOP()
1059	#define IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(a_iStDst, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1060	#define IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(a_iStDst, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1061	#define IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP_POP(a_uFpuOpcode) NOP()
1062	#define IEM_MC_FPU_STACK_PUSH_UNDERFLOW(a_uFpuOpcode) NOP()
1063	#define IEM_MC_FPU_STACK_PUSH_UNDERFLOW_TWO(a_uFpuOpcode) NOP()
1064
1065	#define IEM_MC_FPU_STACK_PUSH_OVERFLOW(a_uFpuOpcode) NOP()
1066	#define IEM_MC_FPU_STACK_PUSH_OVERFLOW_MEM_OP(a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1067
1068	#define IEM_MC_PREPARE_FPU_USAGE() NOP()
1069	#define IEM_MC_ACTUALIZE_FPU_STATE_FOR_READ() NOP()
1070	#define IEM_MC_ACTUALIZE_FPU_STATE_FOR_CHANGE() NOP()
1071
1072	#define IEM_MC_STORE_SSE_RESULT(a_SseData, a_iXmmReg) IEM_LIVENESS_MXCSR_MODIFY() //; IEM_LIVENESS_XREG_CLOBBER(a_iXmmReg)
1073	#define IEM_MC_SSE_UPDATE_MXCSR(a_fMxcsr) IEM_LIVENESS_MXCSR_MODIFY()
1074
1075	#define IEM_MC_PREPARE_SSE_USAGE() NOP()
1076	#define IEM_MC_ACTUALIZE_SSE_STATE_FOR_READ() NOP()
1077	#define IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE() NOP()
1078
1079	#define IEM_MC_PREPARE_AVX_USAGE() NOP()
1080	#define IEM_MC_ACTUALIZE_AVX_STATE_FOR_READ() NOP()
1081	#define IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE() NOP()
1082
1083	#define IEM_MC_CALL_MMX_AIMPL_2(a_pfnAImpl, a0, a1) NOP()
1084	#define IEM_MC_CALL_MMX_AIMPL_3(a_pfnAImpl, a0, a1, a2) NOP()
1085	#define IEM_MC_CALL_SSE_AIMPL_2(a_pfnAImpl, a0, a1) NOP()
1086	#define IEM_MC_CALL_SSE_AIMPL_3(a_pfnAImpl, a0, a1, a2) NOP()
1087	#define IEM_MC_IMPLICIT_AVX_AIMPL_ARGS() NOP()
1088	#define IEM_MC_CALL_AVX_AIMPL_2(a_pfnAImpl, a1, a2) NOP()
1089	#define IEM_MC_CALL_AVX_AIMPL_3(a_pfnAImpl, a1, a2, a3) NOP()
1090
1091	#define IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit) \
1092	do { if ( (a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \
1093	else if ((a_fBit) == X86_EFL_PF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflPf); \
1094	else if ((a_fBit) == X86_EFL_AF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflAf); \
1095	else if ((a_fBit) == X86_EFL_ZF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflZf); \
1096	else if ((a_fBit) == X86_EFL_SF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflSf); \
1097	else if ((a_fBit) == X86_EFL_OF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOf); \
1098	else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); /* loadsb and friends */ \
1099	else { AssertMsgFailed(("#s (%#x)\n", #a_fBit, (a_fBit))); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
1100	} while (0)
1101
1102	#define IEM_MC_IF_EFL_BIT_SET(a_fBit) IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1103	#define IEM_MC_IF_EFL_BIT_NOT_SET(a_fBit) IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1104	#define IEM_MC_IF_EFL_ANY_BITS_SET(a_fBits) \
1105	do { if ((a_fBits) == (X86_EFL_CF \| X86_EFL_ZF)) \
1106	{ IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflZf); } \
1107	else { AssertMsgFailed(("#s (%#x)\n", #a_fBits, (a_fBits))); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
1108	} while (0); {
1109	#define IEM_MC_IF_EFL_NO_BITS_SET(a_fBits) \
1110	do { if ((a_fBits) == (X86_EFL_CF \| X86_EFL_ZF)) \
1111	{ IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflZf); } \
1112	else { AssertMsgFailed(("#s (%#x)\n", #a_fBits, (a_fBits))); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
1113	} while (0); {
1114	#define IEM_MC_IF_EFL_BITS_NE(a_fBit1, a_fBit2) \
1115	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1116	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1117	#define IEM_MC_IF_EFL_BITS_EQ(a_fBit1, a_fBit2) \
1118	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1119	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1120	#define IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(a_fBit, a_fBit1, a_fBit2) \
1121	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); \
1122	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1123	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1124	#define IEM_MC_IF_EFL_BIT_NOT_SET_AND_BITS_EQ(a_fBit, a_fBit1, a_fBit2) \
1125	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); \
1126	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1127	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1128	#define IEM_MC_IF_CX_IS_NZ() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1129	#define IEM_MC_IF_ECX_IS_NZ() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1130	#define IEM_MC_IF_RCX_IS_NZ() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1131	#define IEM_MC_IF_CX_IS_NOT_ONE() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1132	#define IEM_MC_IF_ECX_IS_NOT_ONE() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1133	#define IEM_MC_IF_RCX_IS_NOT_ONE() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1134	#define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \
1135	IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1136	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1137	#define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \
1138	IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1139	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1140	#define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \
1141	IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1142	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1143	#define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \
1144	IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1145	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1146	#define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \
1147	IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1148	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1149	#define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \
1150	IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1151	IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1152	#define IEM_MC_IF_LOCAL_IS_Z(a_Local) {
1153	#define IEM_MC_IF_GREG_BIT_SET(a_iGReg, a_iBitNo) IEM_LIVENESS_GPR_INPUT(a_iGReg); {
1154
1155	#define IEM_MC_REF_FPUREG(a_pr80Dst, a_iSt) NOP()
1156	#define IEM_MC_IF_FPUREG_IS_EMPTY(a_iSt) {
1157	#define IEM_MC_IF_FPUREG_NOT_EMPTY(a_iSt) {
1158	#define IEM_MC_IF_FPUREG_NOT_EMPTY_REF_R80(a_pr80Dst, a_iSt) {
1159	#define IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(a_pr80Dst0, a_iSt0, a_pr80Dst1, a_iSt1) {
1160	#define IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(a_pr80Dst0, a_iSt0, a_iSt1) {
1161	#define IEM_MC_IF_FCW_IM() {
1162	#define IEM_MC_IF_MXCSR_XCPT_PENDING() {
1163
1164	#define IEM_MC_ELSE() } /else/ {
1165	#define IEM_MC_ENDIF() } do {} while (0)
1166
1167	#define IEM_MC_HINT_FLUSH_GUEST_SHADOW(g_fGstShwFlush) NOP()
1168
1169
1170	/*********************************************************************************************************************************
1171	* The threaded functions. *
1172	*********************************************************************************************************************************/
1173	#include "IEMNativeLiveness.cpp.h"
1174

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source: vbox/trunk/src/VBox/VMM/VMMAll/IEMAllN8veLiveness.cpp@ 103884

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