VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/IEMAllN8veLiveness.cpp@ 103393

Last change on this file since 103393 was 103393, checked in by vboxsync, 11 months ago

VMM/IEM,STAM: Some more liveness experiments. Adjusted the STAMR3RegisterPctOfSum[V] interface for more flexibility. bugref:10372
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1/* $Id: IEMAllN8veLiveness.cpp 103393 2024-02-16 00:04:24Z vboxsync $ */
2/** @file
3 * IEM - Native Recompiler, Liveness Analysis.
4 */
5
6/*
7 * Copyright (C) 2011-2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_IEM
33#define IEM_WITH_OPAQUE_DECODER_STATE
34#include <VBox/vmm/iem.h>
35#include "IEMInternal.h"
36#include <VBox/vmm/vmcc.h>
37#include <VBox/log.h>
38
39#include "IEMN8veRecompiler.h"
40#include "IEMThreadedFunctions.h"
41#include "IEMNativeFunctions.h"
42
43
44/*********************************************************************************************************************************
45* Defined Constants And Macros *
46*********************************************************************************************************************************/
47#define NOP() ((void)0)
48
49
50/*
51 * BEGIN & END as well as internal workers.
52 */
53#ifndef IEMLIVENESS_EXTENDED_LAYOUT
54# define IEM_MC_BEGIN(a_cArgs, a_cLocals, a_fMcFlags, a_fCImplFlags) \
55 { \
56 /* Define local variables that we use to accumulate the liveness state changes in. */ \
57 IEMLIVENESSBIT LiveStateBit0 = { 0 }; \
58 IEMLIVENESSBIT LiveStateBit1 = { 0 }; \
59 IEMLIVENESSBIT LiveMask = { 0 }; \
60 bool fDoneXpctOrCall = false
61#else
62# define IEM_MC_BEGIN(a_cArgs, a_cLocals, a_fMcFlags, a_fCImplFlags) \
63 { \
64 /* Define local variables that we use to accumulate the liveness state changes in. */ \
65 IEMLIVENESSENTRY LiveState = { { 0, 0, 0, 0 } }; \
66 IEMLIVENESSBIT LiveMask = { 0 }; \
67 bool fDoneXpctOrCall = false
68#endif
69
70#ifndef IEMLIVENESS_EXTENDED_LAYOUT
71AssertCompile(IEMLIVENESS_STATE_INPUT == IEMLIVENESS_STATE_MASK);
72AssertCompile(IEMLIVENESSBIT0_XCPT_OR_CALL == 0 && IEMLIVENESSBIT1_XCPT_OR_CALL != 0);
73# define IEM_LIVENESS_MARK_XCPT_OR_CALL() do { \
74 if (!fDoneXpctOrCall) \
75 { \
76 LiveStateBit0.bm64 |= pIncoming->Bit0.bm64 & pIncoming->Bit1.bm64 & ~LiveMask.bm64; \
77 LiveStateBit1.bm64 |= IEMLIVENESSBIT1_XCPT_OR_CALL; \
78 \
79 LiveMask.bm64 |= IEMLIVENESSBIT_MASK; /* could also use UINT64_MAX here, but makes little no(?) difference */ \
80 fDoneXpctOrCall = true; /* when compiling with gcc and cl.exe on x86 - may on arm, though. */ \
81 } \
82 } while (0)
83#else
84# define IEM_LIVENESS_MARK_XCPT_OR_CALL() do { \
85 if (!fDoneXpctOrCall) \
86 { \
87 LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 |= pIncoming->aBits[IEMLIVENESS_BIT_READ].bm64 & ~LiveMask.bm64; \
88 LiveState.aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64 |= IEMLIVENESSBIT_MASK; \
89 LiveMask.bm64 |= IEMLIVENESSBIT_MASK; \
90 fDoneXpctOrCall = true; \
91 } \
92 } while (0)
93#endif
94
95
96#ifndef IEMLIVENESS_EXTENDED_LAYOUT
97AssertCompile(IEMLIVENESS_STATE_CLOBBERED == 0);
98# define IEM_LIVENESS_ALL_EFLAGS_CLOBBER() do { \
99 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
100 } while (0)
101AssertCompile(IEMLIVENESS_STATE_INPUT == IEMLIVENESS_STATE_MASK);
102# define IEM_LIVENESS_ALL_EFLAGS_INPUT() do { \
103 LiveStateBit0.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
104 LiveStateBit1.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
105 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
106 } while (0)
107# define IEM_LIVENESS_ALL_EFLAGS_MODIFY() IEM_LIVENESS_ALL_EFLAGS_INPUT()
108#else
109# define IEM_LIVENESS_ALL_EFLAGS_CLOBBER() do { \
110 LiveState.aBits[IEMLIVENESS_BIT_WRITE].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
111 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
112 } while (0)
113# define IEM_LIVENESS_ALL_EFLAGS_INPUT() do { \
114 LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
115 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
116 } while (0)
117# define IEM_LIVENESS_ALL_EFLAGS_MODIFY() do { \
118 LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
119 LiveState.aBits[IEMLIVENESS_BIT_WRITE].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
120 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
121 } while (0)
122#endif
123
124
125#ifndef IEMLIVENESS_EXTENDED_LAYOUT
126# define IEM_LIVENESS_ONE_EFLAG_CLOBBER(a_Name) do { \
127 LiveMask.a_Name |= 1; \
128 } while (0)
129# define IEM_LIVENESS_ONE_EFLAG_INPUT(a_Name) do { \
130 LiveStateBit0.a_Name |= 1; \
131 LiveStateBit1.a_Name |= 1; \
132 LiveMask.a_Name |= 1; \
133 } while (0)
134# define IEM_LIVENESS_ONE_EFLAG_MODIFY(a_Name) IEM_LIVENESS_ONE_EFLAG_INPUT(a_Name)
135#else
136# define IEM_LIVENESS_ONE_EFLAG_CLOBBER(a_Name) do { \
137 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_Name |= 1; \
138 LiveMask.a_Name |= 1; \
139 } while (0)
140# define IEM_LIVENESS_ONE_EFLAG_INPUT(a_Name) do { \
141 LiveState.aBits[IEMLIVENESS_BIT_READ].a_Name |= 1; \
142 LiveMask.a_Name |= 1; \
143 } while (0)
144# define IEM_LIVENESS_ONE_EFLAG_MODIFY(a_Name) do { \
145 LiveState.aBits[IEMLIVENESS_BIT_READ].a_Name |= 1; \
146 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_Name |= 1; \
147 LiveMask.a_Name |= 1; \
148 } while (0)
149#endif
150
151
152/* Generic bitmap (bmGpr, bmSegBase, ++) setters. */
153#ifndef IEMLIVENESS_EXTENDED_LAYOUT
154# define IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(a_bmMember, a_iElement) do { \
155 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \
156 } while (0)
157# define IEM_LIVENESS_BITMAP_MEMBER_INPUT(a_bmMember, a_iElement) do { \
158 LiveStateBit0.a_bmMember |= RT_BIT_64(a_iElement); \
159 LiveStateBit1.a_bmMember |= RT_BIT_64(a_iElement); \
160 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \
161 } while (0)
162# define IEM_LIVENESS_BITMAP_MEMBER_MODIFY(a_bmMember, a_iElement) IEM_LIVENESS_BITMAP_MEMBER_INPUT(a_bmMember, a_iElement)
163#else
164# define IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(a_bmMember, a_iElement) do { \
165 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_bmMember |= RT_BIT_64(a_iElement); \
166 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \
167 } while (0)
168# define IEM_LIVENESS_BITMAP_MEMBER_INPUT(a_bmMember, a_iElement) do { \
169 LiveState.aBits[IEMLIVENESS_BIT_READ].a_bmMember |= RT_BIT_64(a_iElement); \
170 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \
171 } while (0)
172# define IEM_LIVENESS_BITMAP_MEMBER_MODIFY(a_bmMember, a_iElement) do { \
173 LiveState.aBits[IEMLIVENESS_BIT_READ].a_bmMember |= RT_BIT_64(a_iElement); \
174 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_bmMember |= RT_BIT_64(a_iElement); \
175 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \
176 } while (0)
177#endif
178
179
180#define IEM_LIVENESS_GPR_CLOBBER(a_idxGpr) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmGprs, a_idxGpr)
181#define IEM_LIVENESS_GPR_INPUT(a_idxGpr) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmGprs, a_idxGpr)
182#define IEM_LIVENESS_GPR_MODIFY(a_idxGpr) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmGprs, a_idxGpr)
183
184
185#define IEM_LIVENESS_SEG_BASE_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegBase, a_iSeg)
186#define IEM_LIVENESS_SEG_BASE_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegBase, a_iSeg)
187#define IEM_LIVENESS_SEG_BASE_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmSegBase, a_iSeg)
188
189
190#define IEM_LIVENESS_SEG_ATTRIB_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegAttrib, a_iSeg)
191#define IEM_LIVENESS_SEG_ATTRIB_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegAttrib, a_iSeg)
192#define IEM_LIVENESS_SEG_ATTRIB_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODFIY( bmSegAttrib, a_iSeg)
193
194
195#define IEM_LIVENESS_SEG_LIMIT_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegLimit, a_iSeg)
196#define IEM_LIVENESS_SEG_LIMIT_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegLimit, a_iSeg)
197#define IEM_LIVENESS_SEG_LIMIT_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmSegLimit, a_iSeg)
198
199
200#define IEM_LIVENESS_SEG_SEL_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegSel, a_iSeg)
201#define IEM_LIVENESS_SEG_SEL_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegSel, a_iSeg)
202#define IEM_LIVENESS_SEG_SEL_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmSegSel, a_iSeg)
203
204
205#define IEM_LIVENESS_MEM(a_iSeg) do { \
206 IEM_LIVENESS_MARK_XCPT_OR_CALL(); \
207 IEM_LIVENESS_SEG_ATTRIB_INPUT(a_iSeg); \
208 IEM_LIVENESS_SEG_BASE_INPUT(a_iSeg); \
209 IEM_LIVENESS_SEG_LIMIT_INPUT(a_iSeg); \
210 } while (0)
211
212#define IEM_LIVENESS_MEM_FLAT() IEM_LIVENESS_MARK_XCPT_OR_CALL()
213
214#define IEM_LIVENESS_STACK() do { \
215 IEM_LIVENESS_MEM(X86_SREG_SS); \
216 IEM_LIVENESS_GPR_MODIFY(X86_GREG_xSP); \
217 } while (0)
218
219#define IEM_LIVENESS_STACK_FLAT() do { \
220 IEM_LIVENESS_MEM_FLAT(); \
221 IEM_LIVENESS_GPR_MODIFY(X86_GREG_xSP); \
222 } while (0)
223
224
225#define IEM_LIVENESS_PC_NO_FLAGS() NOP()
226#define IEM_LIVENESS_PC_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther)
227#define IEM_LIVENESS_PC16_JMP_NO_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
228#define IEM_LIVENESS_PC32_JMP_NO_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
229#define IEM_LIVENESS_PC64_JMP_NO_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL()
230#define IEM_LIVENESS_PC16_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
231#define IEM_LIVENESS_PC32_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
232#define IEM_LIVENESS_PC64_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther)
233
234#ifndef IEMLIVENESS_EXTENDED_LAYOUT
235# define IEM_MC_END() \
236 /* Combine the incoming state with what we've accumulated in this block. */ \
237 /* We can help the compiler by skipping OR'ing when having applied XPCT_OR_CALL, */ \
238 /* since that already imports all the incoming state. Saves a lot with cl.exe. */ \
239 if (!fDoneXpctOrCall) \
240 { \
241 pOutgoing->Bit0.bm64 = LiveStateBit0.bm64 | (~LiveMask.bm64 & pIncoming->Bit0.bm64); \
242 pOutgoing->Bit1.bm64 = LiveStateBit1.bm64 | (~LiveMask.bm64 & pIncoming->Bit1.bm64); \
243 } \
244 else \
245 { \
246 pOutgoing->Bit0.bm64 = LiveStateBit0.bm64; \
247 pOutgoing->Bit1.bm64 = LiveStateBit1.bm64; \
248 } \
249 }
250#else
251# define IEM_MC_END() \
252 /* Combine the incoming state with what we've accumulated in this block. */ \
253 /* We can help the compiler by skipping OR'ing when having applied XPCT_OR_CALL, */ \
254 /* since that already imports all the incoming state. Saves a lot with cl.exe. */ \
255 if (!fDoneXpctOrCall) \
256 { \
257 pOutgoing->aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64 = LiveState.aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64 \
258 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64); \
259 pOutgoing->aBits[IEMLIVENESS_BIT_READ].bm64 = LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 \
260 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_READ].bm64); \
261 pOutgoing->aBits[IEMLIVENESS_BIT_WRITE].bm64 = LiveState.aBits[IEMLIVENESS_BIT_WRITE].bm64 \
262 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_WRITE].bm64); \
263 pOutgoing->aBits[IEMLIVENESS_BIT_OTHER].bm64 = LiveState.aBits[IEMLIVENESS_BIT_OTHER].bm64 \
264 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_OTHER].bm64); \
265 } \
266 else \
267 *pOutgoing = LiveState; \
268 }
269#endif
270
271/*
272 * The native MC variants.
273 */
274#define IEM_MC_FREE_LOCAL(a_Name) NOP()
275#define IEM_MC_FREE_ARG(a_Name) NOP()
276
277
278/*
279 * The THREADED MC variants.
280 */
281
282/* We don't track RIP (PC) liveness. */
283#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_NO_FLAGS()
284#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_NO_FLAGS()
285#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_NO_FLAGS()
286#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_WITH_FLAGS()
287#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_WITH_FLAGS()
288#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_WITH_FLAGS()
289
290#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16(a_i8, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
291#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
292#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
293#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i8, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
294#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
295#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
296#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
297#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
298#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
299#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
300#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
301#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
302#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
303#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
304#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
305#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
306#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
307#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
308#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16(a_u16NewIP) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
309#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32(a_u16NewIP) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
310#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64(a_u16NewIP) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
311#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_u16NewIP) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
312#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u16NewIP) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
313#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u16NewIP) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
314#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32(a_u32NewEIP) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
315#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
316#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u32NewEIP) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
317#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
318#define IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
319#define IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
320
321/* Effective address stuff is rather complicated... */
322#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_16(a_GCPtrEff, a_bRm, a_u16Disp) do { \
323 if (((a_bRm) & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) != 6) \
324 { \
325 switch ((a_bRm) & X86_MODRM_RM_MASK) \
326 { \
327 case 0: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xSI); break; \
328 case 1: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDI); break; \
329 case 2: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBP); IEM_LIVENESS_GPR_INPUT(X86_GREG_xSI); break; \
330 case 3: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBP); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDI); break; \
331 case 4: IEM_LIVENESS_GPR_INPUT(X86_GREG_xSI); break; \
332 case 5: IEM_LIVENESS_GPR_INPUT(X86_GREG_xDI); break; \
333 case 6: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBP); break; \
334 case 7: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBX); break; \
335 } \
336 } \
337 } while (0)
338
339#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_32(a_GCPtrEff, a_bRm, a_uSibAndRspOffset, a_u32Disp) do { \
340 if (((a_bRm) & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) != 5) \
341 { \
342 uint8_t const idxReg = (a_bRm) & X86_MODRM_RM_MASK; \
343 if (idxReg != 4 /*SIB*/) \
344 IEM_LIVENESS_GPR_INPUT(idxReg); \
345 else \
346 { \
347 uint8_t const idxIndex = ((a_uSibAndRspOffset) >> X86_SIB_INDEX_SHIFT) & X86_SIB_INDEX_SMASK; \
348 if (idxIndex != 4 /*no index*/) \
349 IEM_LIVENESS_GPR_INPUT(idxIndex); \
350 \
351 uint8_t const idxBase = (a_uSibAndRspOffset) & X86_SIB_BASE_MASK; \
352 if (idxBase != 5 || ((a_bRm) & X86_MODRM_MOD_MASK) != 0) \
353 IEM_LIVENESS_GPR_INPUT(idxBase); \
354 } \
355 } \
356 } while (0)
357
358#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_64(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) do { \
359 if (((a_bRmEx) & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) == 5) \
360 { /* RIP */ } \
361 else \
362 { \
363 uint8_t const idxReg = (a_bRmEx) & (X86_MODRM_RM_MASK | 0x8); /* bRmEx[bit 3] = REX.B */ \
364 if ((idxReg & X86_MODRM_RM_MASK) != 4 /* not SIB */) \
365 IEM_LIVENESS_GPR_INPUT(idxReg); \
366 else /* SIB: */\
367 { \
368 uint8_t const idxIndex = (((a_uSibAndRspOffset) >> X86_SIB_INDEX_SHIFT) & X86_SIB_INDEX_SMASK) \
369 | (((a_bRmEx) & 0x10) >> 1); /* bRmEx[bit 4] = REX.X */ \
370 if (idxIndex != 4 /*no index*/) \
371 IEM_LIVENESS_GPR_INPUT(idxIndex); \
372 \
373 uint8_t const idxBase = ((a_uSibAndRspOffset) & X86_SIB_BASE_MASK) | ((a_bRmEx) & 0x8); /* bRmEx[bit 3] = REX.B */ \
374 if ((idxBase & 7) != 5 /* and !13*/ || ((a_bRmEx) & X86_MODRM_MOD_MASK) != 0) \
375 IEM_LIVENESS_GPR_INPUT(idxBase); \
376 } \
377 } \
378 } while (0)
379#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_64_FSGS(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) \
380 IEM_MC_CALC_RM_EFF_ADDR_THREADED_64(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm)
381#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_64_ADDR32(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) \
382 IEM_MC_CALC_RM_EFF_ADDR_THREADED_64(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm)
383
384/* At present we don't know what any CIMPL may require as input, so we do XPCT/CALL. */
385#define IEM_MC_CALL_CIMPL_1_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0) \
386 IEM_LIVENESS_MARK_XCPT_OR_CALL()
387#define IEM_MC_CALL_CIMPL_2_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1) \
388 IEM_LIVENESS_MARK_XCPT_OR_CALL()
389#define IEM_MC_CALL_CIMPL_3_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2) \
390 IEM_LIVENESS_MARK_XCPT_OR_CALL()
391#define IEM_MC_CALL_CIMPL_4_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3) \
392 IEM_LIVENESS_MARK_XCPT_OR_CALL()
393#define IEM_MC_CALL_CIMPL_5_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3, a4) \
394 IEM_LIVENESS_MARK_XCPT_OR_CALL()
395
396#define IEM_MC_DEFER_TO_CIMPL_0_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl) \
397 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
398#define IEM_MC_DEFER_TO_CIMPL_1_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0) \
399 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
400#define IEM_MC_DEFER_TO_CIMPL_2_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1) \
401 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
402#define IEM_MC_DEFER_TO_CIMPL_3_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2) \
403 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
404#define IEM_MC_DEFER_TO_CIMPL_4_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3) \
405 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
406#define IEM_MC_DEFER_TO_CIMPL_5_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3, a4) \
407 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
408
409/* Any 8-bit register fetch, store or modification only works on part of the register
410 and must therefore be considered INPUTs. */
411#define IEM_MC_FETCH_GREG_U8_THREADED(a_u8Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
412#define IEM_MC_FETCH_GREG_U8_ZX_U16_THREADED(a_u16Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
413#define IEM_MC_FETCH_GREG_U8_ZX_U32_THREADED(a_u32Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
414#define IEM_MC_FETCH_GREG_U8_ZX_U64_THREADED(a_u64Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
415#define IEM_MC_FETCH_GREG_U8_SX_U16_THREADED(a_u16Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
416#define IEM_MC_FETCH_GREG_U8_SX_U32_THREADED(a_u32Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
417#define IEM_MC_FETCH_GREG_U8_SX_U64_THREADED(a_u64Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
418#define IEM_MC_STORE_GREG_U8_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
419#define IEM_MC_STORE_GREG_U8_CONST_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
420#define IEM_MC_REF_GREG_U8_THREADED(a_pu8Dst, a_iGRegEx) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
421#define IEM_MC_ADD_GREG_U8_TO_LOCAL_THREADED(a_u8Value, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
422#define IEM_MC_AND_GREG_U8_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
423#define IEM_MC_OR_GREG_U8_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
424
425
426/*
427 * The other MCs.
428 */
429
430#define IEM_MC_NO_NATIVE_RECOMPILE() NOP()
431
432#define IEM_MC_RAISE_DIVIDE_ERROR() NOP()
433#define IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE() IEM_LIVENESS_MARK_XCPT_OR_CALL()
434#define IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE() IEM_LIVENESS_MARK_XCPT_OR_CALL()
435#define IEM_MC_MAYBE_RAISE_FPU_XCPT() IEM_LIVENESS_MARK_XCPT_OR_CALL()
436#define IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT() IEM_LIVENESS_MARK_XCPT_OR_CALL()
437#define IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT() IEM_LIVENESS_MARK_XCPT_OR_CALL()
438#define IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT() IEM_LIVENESS_MARK_XCPT_OR_CALL()
439#define IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO() IEM_LIVENESS_MARK_XCPT_OR_CALL()
440#define IEM_MC_RAISE_GP0_IF_EFF_ADDR_UNALIGNED(a_EffAddr, a_cbAlign) IEM_LIVENESS_MARK_XCPT_OR_CALL()
441#define IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT() IEM_LIVENESS_MARK_XCPT_OR_CALL()
442#define IEM_MC_MAYBE_RAISE_NON_CANONICAL_ADDR_GP0(a_u64Addr) IEM_LIVENESS_MARK_XCPT_OR_CALL()
443#define IEM_MC_MAYBE_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT() IEM_LIVENESS_MARK_XCPT_OR_CALL()
444#define IEM_MC_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT() IEM_LIVENESS_MARK_XCPT_OR_CALL()
445
446#define IEM_MC_LOCAL(a_Type, a_Name) NOP()
447#define IEM_MC_LOCAL_ASSIGN(a_Type, a_Name, a_Value) NOP()
448#define IEM_MC_LOCAL_CONST(a_Type, a_Name, a_Value) NOP()
449#define IEM_MC_NOREF(a_Name) NOP()
450#define IEM_MC_ARG(a_Type, a_Name, a_iArg) NOP()
451#define IEM_MC_ARG_CONST(a_Type, a_Name, a_Value, a_iArg) NOP()
452#define IEM_MC_ARG_LOCAL_REF(a_Type, a_Name, a_Local, a_iArg) NOP()
453
454#undef IEM_MC_COMMIT_EFLAGS /* unused here */
455#define IEM_MC_COMMIT_EFLAGS_EX(a_EFlags, a_fEflInput, a_fEflOutput) do { \
456 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_CF, fEflCf); \
457 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_PF, fEflPf); \
458 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_AF, fEflAf); \
459 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_ZF, fEflZf); \
460 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_SF, fEflSf); \
461 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_OF, fEflOf); \
462 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, ~X86_EFL_STATUS_BITS, fEflOther); \
463 Assert(!( ((a_fEflInput) | (a_fEflOutput)) \
464 & ~(uint32_t)(X86_EFL_STATUS_BITS | X86_EFL_DF | X86_EFL_VM | X86_EFL_VIF | X86_EFL_IOPL))); \
465 } while (0)
466
467#define IEM_MC_ASSIGN_TO_SMALLER(a_VarDst, a_VarSrcEol) NOP()
468
469#define IEM_MC_FETCH_GREG_U16(a_u16Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
470#define IEM_MC_FETCH_GREG_U16_ZX_U32(a_u32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
471#define IEM_MC_FETCH_GREG_U16_ZX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
472#define IEM_MC_FETCH_GREG_U16_SX_U32(a_u32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
473#define IEM_MC_FETCH_GREG_U16_SX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
474#define IEM_MC_FETCH_GREG_U32(a_u32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
475#define IEM_MC_FETCH_GREG_U32_ZX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
476#define IEM_MC_FETCH_GREG_U32_SX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
477#define IEM_MC_FETCH_GREG_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
478#define IEM_MC_FETCH_GREG_U64_ZX_U64 IEM_MC_FETCH_GREG_U64
479#define IEM_MC_FETCH_GREG_PAIR_U32(a_u64Dst, a_iGRegLo, a_iGRegHi) \
480 do { IEM_LIVENESS_GPR_INPUT(a_iGRegLo); IEM_LIVENESS_GPR_INPUT(a_iGRegHi); } while(0)
481#define IEM_MC_FETCH_GREG_PAIR_U64(a_u128Dst, a_iGRegLo, a_iGRegHi) \
482 do { IEM_LIVENESS_GPR_INPUT(a_iGRegLo); IEM_LIVENESS_GPR_INPUT(a_iGRegHi); } while(0)
483#define IEM_MC_FETCH_SREG_U16(a_u16Dst, a_iSReg) IEM_LIVENESS_SEG_SEL_INPUT(a_iSReg)
484#define IEM_MC_FETCH_SREG_ZX_U32(a_u32Dst, a_iSReg) IEM_LIVENESS_SEG_SEL_INPUT(a_iSReg)
485#define IEM_MC_FETCH_SREG_ZX_U64(a_u64Dst, a_iSReg) IEM_LIVENESS_SEG_SEL_INPUT(a_iSReg)
486#define IEM_MC_FETCH_SREG_BASE_U64(a_u64Dst, a_iSReg) IEM_LIVENESS_SEG_BASE_INPUT(a_iSReg)
487#define IEM_MC_FETCH_SREG_BASE_U32(a_u32Dst, a_iSReg) IEM_LIVENESS_SEG_BASE_INPUT(a_iSReg)
488#undef IEM_MC_FETCH_EFLAGS /* unused here */
489#define IEM_MC_FETCH_EFLAGS_EX(a_EFlags, a_fEflInput, a_fEflOutput) do { \
490 /* IEM_MC_COMMIT_EFLAGS_EX doesn't cover input-only situations. This OTOH, leads \
491 to duplication in many cases, but the compiler's optimizers should help with that. */ \
492 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_CF, fEflCf); \
493 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_PF, fEflPf); \
494 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_AF, fEflAf); \
495 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_ZF, fEflZf); \
496 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_SF, fEflSf); \
497 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_OF, fEflOf); \
498 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, ~X86_EFL_STATUS_BITS, fEflOther); \
499 Assert(!( ((a_fEflInput) | (a_fEflOutput)) \
500 & ~(uint32_t)(X86_EFL_STATUS_BITS | X86_EFL_DF | X86_EFL_VM | X86_EFL_VIF | X86_EFL_IOPL))); \
501 } while (0)
502#define IEM_MC_FETCH_EFLAGS_U8(a_EFlags) do { \
503 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Cf); \
504 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Pf); \
505 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Af); \
506 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Zf); \
507 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Sf); \
508 } while (0)
509
510#define IEM_MC_FETCH_FSW(a_u16Fsw) NOP()
511#define IEM_MC_FETCH_FCW(a_u16Fcw) NOP()
512
513#define IEM_MC_STORE_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
514#define IEM_MC_STORE_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
515#define IEM_MC_STORE_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
516#define IEM_MC_STORE_GREG_I64(a_iGReg, a_i64Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
517#define IEM_MC_STORE_GREG_U16_CONST(a_iGReg, a_u16Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
518#define IEM_MC_STORE_GREG_U32_CONST(a_iGReg, a_u32Const) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
519#define IEM_MC_STORE_GREG_U64_CONST(a_iGReg, a_u32Const) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
520#define IEM_MC_STORE_GREG_PAIR_U32(a_iGRegLo, a_iGRegHi, a_u64Value) \
521 do { IEM_LIVENESS_GPR_CLOBBER(a_iGRegLo); IEM_LIVENESS_GPR_CLOBBER(a_iGRegHi); } while(0)
522#define IEM_MC_STORE_GREG_PAIR_U64(a_iGRegLo, a_iGRegHi, a_u128Value) \
523 do { IEM_LIVENESS_GPR_CLOBBER(a_iGRegLo); IEM_LIVENESS_GPR_CLOBBER(a_iGRegHi); } while(0)
524#define IEM_MC_CLEAR_HIGH_GREG_U64(a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg) /** @todo This isn't always the case... */
525
526#define IEM_MC_STORE_SREG_BASE_U64(a_iSReg, a_u64Value) IEM_LIVENESS_SEG_BASE_CLOBBER(a_iSReg)
527#define IEM_MC_STORE_SREG_BASE_U32(a_iSReg, a_u32Value) IEM_LIVENESS_SEG_BASE_CLOBBER(a_iSReg)
528#define IEM_MC_STORE_FPUREG_R80_SRC_REF(a_iSt, a_pr80Src) NOP()
529
530
531#define IEM_MC_REF_GREG_U16(a_pu16Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
532#define IEM_MC_REF_GREG_U16_CONST(a_pu16Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
533#define IEM_MC_REF_GREG_U32(a_pu32Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
534#define IEM_MC_REF_GREG_U32_CONST(a_pu32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
535#define IEM_MC_REF_GREG_I32(a_pi32Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
536#define IEM_MC_REF_GREG_I32_CONST(a_pi32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
537#define IEM_MC_REF_GREG_U64(a_pu64Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
538#define IEM_MC_REF_GREG_U64_CONST(a_pu64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
539#define IEM_MC_REF_GREG_I64(a_pi64Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
540#define IEM_MC_REF_GREG_I64_CONST(a_pi64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
541#define IEM_MC_REF_EFLAGS(a_pEFlags) IEM_LIVENESS_ALL_EFLAGS_MODIFY()
542#undef IEM_MC_REF_EFLAGS /* unused */
543#define IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, a_fEfl, a_Member) \
544 if ((a_fEflInput) & (a_fEfl)) { \
545 if ((a_fEflOutput) & (a_fEfl)) IEM_LIVENESS_ONE_EFLAG_MODIFY(a_Member); \
546 else IEM_LIVENESS_ONE_EFLAG_INPUT(a_Member); \
547 } else if ((a_fEflOutput) & (a_fEfl)) IEM_LIVENESS_ONE_EFLAG_CLOBBER(a_Member)
548#define IEM_MC_REF_EFLAGS_EX(a_pEFlags, a_fEflInput, a_fEflOutput) do { \
549 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_CF, fEflCf); \
550 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_PF, fEflPf); \
551 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_AF, fEflAf); \
552 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_ZF, fEflZf); \
553 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_SF, fEflSf); \
554 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_OF, fEflOf); \
555 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, ~X86_EFL_STATUS_BITS, fEflOther); \
556 Assert(!( ((a_fEflInput) | (a_fEflOutput)) \
557 & ~(uint32_t)(X86_EFL_STATUS_BITS | X86_EFL_DF | X86_EFL_VM | X86_EFL_VIF | X86_EFL_IOPL))); \
558 } while (0)
559#define IEM_MC_ASSERT_EFLAGS(a_fEflInput, a_fEflOutput) NOP()
560#define IEM_MC_REF_MXCSR(a_pfMxcsr) NOP()
561
562
563#define IEM_MC_ADD_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
564#define IEM_MC_ADD_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
565#define IEM_MC_ADD_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
566
567#define IEM_MC_SUB_GREG_U16(a_iGReg, a_u8Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
568#define IEM_MC_SUB_GREG_U32(a_iGReg, a_u8Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
569#define IEM_MC_SUB_GREG_U64(a_iGReg, a_u8Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
570#define IEM_MC_SUB_LOCAL_U16(a_u16Value, a_u16Const) NOP()
571
572#define IEM_MC_ADD_GREG_U16_TO_LOCAL(a_u16Value, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
573#define IEM_MC_ADD_GREG_U32_TO_LOCAL(a_u32Value, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
574#define IEM_MC_ADD_GREG_U64_TO_LOCAL(a_u64Value, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
575#define IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(a_EffAddr, a_i16) NOP()
576#define IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(a_EffAddr, a_i32) NOP()
577#define IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR(a_EffAddr, a_i64) NOP()
578
579#define IEM_MC_AND_LOCAL_U8(a_u8Local, a_u8Mask) NOP()
580#define IEM_MC_AND_LOCAL_U16(a_u16Local, a_u16Mask) NOP()
581#define IEM_MC_AND_LOCAL_U32(a_u32Local, a_u32Mask) NOP()
582#define IEM_MC_AND_LOCAL_U64(a_u64Local, a_u64Mask) NOP()
583
584#define IEM_MC_AND_ARG_U16(a_u16Arg, a_u16Mask) NOP()
585#define IEM_MC_AND_ARG_U32(a_u32Arg, a_u32Mask) NOP()
586#define IEM_MC_AND_ARG_U64(a_u64Arg, a_u64Mask) NOP()
587
588#define IEM_MC_OR_LOCAL_U8(a_u8Local, a_u8Mask) NOP()
589#define IEM_MC_OR_LOCAL_U16(a_u16Local, a_u16Mask) NOP()
590#define IEM_MC_OR_LOCAL_U32(a_u32Local, a_u32Mask) NOP()
591
592#define IEM_MC_SAR_LOCAL_S16(a_i16Local, a_cShift) NOP()
593#define IEM_MC_SAR_LOCAL_S32(a_i32Local, a_cShift) NOP()
594#define IEM_MC_SAR_LOCAL_S64(a_i64Local, a_cShift) NOP()
595
596#define IEM_MC_SHR_LOCAL_U8(a_u8Local, a_cShift) NOP()
597
598#define IEM_MC_SHL_LOCAL_S16(a_i16Local, a_cShift) NOP()
599#define IEM_MC_SHL_LOCAL_S32(a_i32Local, a_cShift) NOP()
600#define IEM_MC_SHL_LOCAL_S64(a_i64Local, a_cShift) NOP()
601
602#define IEM_MC_AND_2LOCS_U32(a_u32Local, a_u32Mask) NOP()
603
604#define IEM_MC_OR_2LOCS_U32(a_u32Local, a_u32Mask) NOP()
605
606#define IEM_MC_AND_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
607#define IEM_MC_AND_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
608#define IEM_MC_AND_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
609
610#define IEM_MC_OR_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
611#define IEM_MC_OR_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
612#define IEM_MC_OR_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
613
614#define IEM_MC_BSWAP_LOCAL_U16(a_u16Local) NOP()
615#define IEM_MC_BSWAP_LOCAL_U32(a_u32Local) NOP()
616#define IEM_MC_BSWAP_LOCAL_U64(a_u64Local) NOP()
617
618#define IEM_MC_SET_EFL_BIT(a_fBit) do { \
619 if ((a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \
620 else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); \
621 else { AssertFailed(); IEM_LIVENESS_ALL_EFLAG_INPUT(); } \
622 } while (0)
623#define IEM_MC_CLEAR_EFL_BIT(a_fBit) do { \
624 if ((a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \
625 else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); \
626 else { AssertFailed(); IEM_LIVENESS_ALL_EFLAG_INPUT(); } \
627 } while (0)
628#define IEM_MC_FLIP_EFL_BIT(a_fBit) do { \
629 if ((a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_MODIFY(fEflCf); \
630 else { AssertFailed(); IEM_LIVENESS_ALL_EFLAG_MODIFY(); } \
631 } while (0)
632
633#define IEM_MC_CLEAR_FSW_EX() NOP()
634#define IEM_MC_FPU_TO_MMX_MODE() NOP()
635#define IEM_MC_FPU_FROM_MMX_MODE() NOP()
636
637#define IEM_MC_FETCH_MREG_U64(a_u64Value, a_iMReg) NOP()
638#define IEM_MC_FETCH_MREG_U32(a_u32Value, a_iMReg) NOP()
639#define IEM_MC_STORE_MREG_U64(a_iMReg, a_u64Value) NOP()
640#define IEM_MC_STORE_MREG_U32_ZX_U64(a_iMReg, a_u32Value) NOP()
641#define IEM_MC_REF_MREG_U64(a_pu64Dst, a_iMReg) NOP()
642#define IEM_MC_REF_MREG_U64_CONST(a_pu64Dst, a_iMReg) NOP()
643#define IEM_MC_REF_MREG_U32_CONST(a_pu32Dst, a_iMReg) NOP()
644#define IEM_MC_MODIFIED_MREG(a_iMReg) NOP()
645#define IEM_MC_MODIFIED_MREG_BY_REF(a_pu64Dst) NOP()
646
647#define IEM_MC_CLEAR_XREG_U32_MASK(a_iXReg, a_bMask) NOP()
648#define IEM_MC_FETCH_XREG_U128(a_u128Value, a_iXReg) NOP()
649#define IEM_MC_FETCH_XREG_XMM(a_XmmValue, a_iXReg) NOP()
650#define IEM_MC_FETCH_XREG_U64(a_u64Value, a_iXReg, a_iQWord) NOP()
651#define IEM_MC_FETCH_XREG_U32(a_u32Value, a_iXReg, a_iDWord) NOP()
652#define IEM_MC_FETCH_XREG_U16(a_u16Value, a_iXReg, a_iWord) NOP()
653#define IEM_MC_FETCH_XREG_U8( a_u8Value, a_iXReg, a_iByte) NOP()
654#define IEM_MC_FETCH_XREG_PAIR_U128(a_Dst, a_iXReg1, a_iXReg2) NOP()
655#define IEM_MC_FETCH_XREG_PAIR_XMM(a_Dst, a_iXReg1, a_iXReg2) NOP()
656#define IEM_MC_FETCH_XREG_PAIR_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iXReg2) \
657 do { IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
658#define IEM_MC_FETCH_XREG_PAIR_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iXReg2) \
659 do { IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
660#define IEM_MC_STORE_XREG_U128(a_iXReg, a_u128Value) NOP()
661#define IEM_MC_STORE_XREG_XMM(a_iXReg, a_XmmValue) NOP()
662#define IEM_MC_STORE_XREG_XMM_U32(a_iXReg, a_iDword, a_XmmValue) NOP()
663#define IEM_MC_STORE_XREG_XMM_U64(a_iXReg, a_iQword, a_XmmValue) NOP()
664#define IEM_MC_STORE_XREG_U64(a_iXReg, a_iQword, a_u64Value) NOP()
665#define IEM_MC_STORE_XREG_U32(a_iXReg, a_iDword, a_u32Value) NOP()
666#define IEM_MC_STORE_XREG_U16(a_iXReg, a_iWord, a_u16Value) NOP()
667#define IEM_MC_STORE_XREG_U8(a_iXReg, a_iByte, a_u8Value) NOP()
668#define IEM_MC_STORE_XREG_U64_ZX_U128(a_iXReg, a_u64Value) NOP()
669#define IEM_MC_STORE_XREG_U32_U128(a_iXReg, a_iDwDst, a_u128Value, a_iDwSrc) NOP()
670#define IEM_MC_STORE_XREG_R32(a_iXReg, a_r32Value) NOP()
671#define IEM_MC_STORE_XREG_R64(a_iXReg, a_r64Value) NOP()
672#define IEM_MC_STORE_XREG_U32_ZX_U128(a_iXReg, a_u32Value) NOP()
673#define IEM_MC_STORE_XREG_HI_U64(a_iXReg, a_u64Value) NOP()
674
675#define IEM_MC_BROADCAST_XREG_U8_ZX_VLMAX(a_iXRegDst, a_u8Src) NOP()
676#define IEM_MC_BROADCAST_XREG_U16_ZX_VLMAX(a_iXRegDst, a_u16Src) NOP()
677#define IEM_MC_BROADCAST_XREG_U32_ZX_VLMAX(a_iXRegDst, a_u32Src) NOP()
678#define IEM_MC_BROADCAST_XREG_U64_ZX_VLMAX(a_iXRegDst, a_u64Src) NOP()
679
680#define IEM_MC_REF_XREG_U128(a_pu128Dst, a_iXReg) NOP()
681#define IEM_MC_REF_XREG_U128_CONST(a_pu128Dst, a_iXReg) NOP()
682#define IEM_MC_REF_XREG_XMM_CONST(a_pXmmDst, a_iXReg) NOP()
683#define IEM_MC_REF_XREG_U32_CONST(a_pu32Dst, a_iXReg) NOP()
684#define IEM_MC_REF_XREG_U64_CONST(a_pu64Dst, a_iXReg) NOP()
685#define IEM_MC_REF_XREG_R32_CONST(a_pr32Dst, a_iXReg) NOP()
686#define IEM_MC_REF_XREG_R64_CONST(a_pr64Dst, a_iXReg) NOP()
687#define IEM_MC_COPY_XREG_U128(a_iXRegDst, a_iXRegSrc) NOP()
688
689#define IEM_MC_FETCH_YREG_U32(a_u32Dst, a_iYRegSrc) NOP()
690#define IEM_MC_FETCH_YREG_U64(a_u64Dst, a_iYRegSrc) NOP()
691#define IEM_MC_FETCH_YREG_2ND_U64(a_u64Dst, a_iYRegSrc) NOP()
692#define IEM_MC_FETCH_YREG_U128(a_u128Dst, a_iYRegSrc) NOP()
693#define IEM_MC_FETCH_YREG_U256(a_u256Dst, a_iYRegSrc) NOP()
694
695#define IEM_MC_STORE_YREG_U128(a_iYRegDst, a_iDQword, a_u128Value) NOP()
696
697#define IEM_MC_INT_CLEAR_ZMM_256_UP(a_iXRegDst) NOP()
698#define IEM_MC_STORE_YREG_U32_ZX_VLMAX(a_iYRegDst, a_u32Src) NOP()
699#define IEM_MC_STORE_YREG_U64_ZX_VLMAX(a_iYRegDst, a_u64Src) NOP()
700#define IEM_MC_STORE_YREG_U128_ZX_VLMAX(a_iYRegDst, a_u128Src) NOP()
701#define IEM_MC_STORE_YREG_U256_ZX_VLMAX(a_iYRegDst, a_u256Src) NOP()
702
703#define IEM_MC_BROADCAST_YREG_U8_ZX_VLMAX(a_iYRegDst, a_u8Src) NOP()
704#define IEM_MC_BROADCAST_YREG_U16_ZX_VLMAX(a_iYRegDst, a_u16Src) NOP()
705#define IEM_MC_BROADCAST_YREG_U32_ZX_VLMAX(a_iYRegDst, a_u32Src) NOP()
706#define IEM_MC_BROADCAST_YREG_U64_ZX_VLMAX(a_iYRegDst, a_u64Src) NOP()
707#define IEM_MC_BROADCAST_YREG_U128_ZX_VLMAX(a_iYRegDst, a_u128Src) NOP()
708
709#define IEM_MC_REF_YREG_U128(a_pu128Dst, a_iYReg) NOP()
710#define IEM_MC_REF_YREG_U128_CONST(a_pu128Dst, a_iYReg) NOP()
711#define IEM_MC_REF_YREG_U64_CONST(a_pu64Dst, a_iYReg) NOP()
712#define IEM_MC_CLEAR_YREG_128_UP(a_iYReg) NOP()
713
714#define IEM_MC_COPY_YREG_U256_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) NOP()
715#define IEM_MC_COPY_YREG_U128_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) NOP()
716#define IEM_MC_COPY_YREG_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) NOP()
717
718#define IEM_MC_MERGE_YREG_U32_U96_ZX_VLMAX(a_iYRegDst, a_iYRegSrc32, a_iYRegSrcHx) NOP()
719#define IEM_MC_MERGE_YREG_U64_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) NOP()
720#define IEM_MC_MERGE_YREG_U64LO_U64LO_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) NOP()
721#define IEM_MC_MERGE_YREG_U64HI_U64HI_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) NOP()
722#define IEM_MC_MERGE_YREG_U64LO_U64LOCAL_ZX_VLMAX(a_iYRegDst, a_iYRegSrcHx, a_u64Local) NOP()
723#define IEM_MC_MERGE_YREG_U64LOCAL_U64HI_ZX_VLMAX(a_iYRegDst, a_u64Local, a_iYRegSrcHx) NOP()
724
725#define IEM_MC_FETCH_MEM_U8(a_u8Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
726#define IEM_MC_FETCH_MEM16_U8(a_u8Dst, a_iSeg, a_GCPtrMem16) IEM_LIVENESS_MEM(a_iSeg)
727#define IEM_MC_FETCH_MEM32_U8(a_u8Dst, a_iSeg, a_GCPtrMem32) IEM_LIVENESS_MEM(a_iSeg)
728
729#define IEM_MC_FETCH_MEM_FLAT_U8(a_u8Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
730#define IEM_MC_FETCH_MEM16_FLAT_U8(a_u8Dst, a_GCPtrMem16) IEM_LIVENESS_MEM_FLAT()
731#define IEM_MC_FETCH_MEM32_FLAT_U8(a_u8Dst, a_GCPtrMem32) IEM_LIVENESS_MEM_FLAT()
732
733#define IEM_MC_FETCH_MEM_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
734#define IEM_MC_FETCH_MEM_U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
735#define IEM_MC_FETCH_MEM_I16(a_i16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
736
737#define IEM_MC_FETCH_MEM_FLAT_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
738#define IEM_MC_FETCH_MEM_FLAT_U16_DISP(a_u16Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
739#define IEM_MC_FETCH_MEM_FLAT_I16(a_i16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
740
741#define IEM_MC_FETCH_MEM_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
742#define IEM_MC_FETCH_MEM_U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
743#define IEM_MC_FETCH_MEM_I32(a_i32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
744
745#define IEM_MC_FETCH_MEM_FLAT_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
746#define IEM_MC_FETCH_MEM_FLAT_U32_DISP(a_u32Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
747#define IEM_MC_FETCH_MEM_FLAT_I32(a_i32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
748
749#define IEM_MC_FETCH_MEM_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
750#define IEM_MC_FETCH_MEM_U64_DISP(a_u64Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
751#define IEM_MC_FETCH_MEM_U64_ALIGN_U128(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
752#define IEM_MC_FETCH_MEM_I64(a_i64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
753
754#define IEM_MC_FETCH_MEM_FLAT_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
755#define IEM_MC_FETCH_MEM_FLAT_U64_DISP(a_u64Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
756#define IEM_MC_FETCH_MEM_FLAT_U64_ALIGN_U128(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
757#define IEM_MC_FETCH_MEM_FLAT_I64(a_i64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
758
759#define IEM_MC_FETCH_MEM_R32(a_r32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
760#define IEM_MC_FETCH_MEM_R64(a_r64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
761#define IEM_MC_FETCH_MEM_R80(a_r80Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
762#define IEM_MC_FETCH_MEM_D80(a_d80Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
763
764#define IEM_MC_FETCH_MEM_FLAT_R32(a_r32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
765#define IEM_MC_FETCH_MEM_FLAT_R64(a_r64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
766#define IEM_MC_FETCH_MEM_FLAT_R80(a_r80Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
767#define IEM_MC_FETCH_MEM_FLAT_D80(a_d80Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
768
769#define IEM_MC_FETCH_MEM_U128(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
770#define IEM_MC_FETCH_MEM_U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
771#define IEM_MC_FETCH_MEM_U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
772
773#define IEM_MC_FETCH_MEM_XMM(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
774#define IEM_MC_FETCH_MEM_XMM_NO_AC(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
775#define IEM_MC_FETCH_MEM_XMM_ALIGN_SSE(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
776#define IEM_MC_FETCH_MEM_XMM_U32(a_XmmDst, a_iDWord, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
777#define IEM_MC_FETCH_MEM_XMM_U64(a_XmmDst, a_iQWord, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
778
779#define IEM_MC_FETCH_MEM_FLAT_U128(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
780#define IEM_MC_FETCH_MEM_FLAT_U128_NO_AC(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
781#define IEM_MC_FETCH_MEM_FLAT_U128_ALIGN_SSE(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
782
783#define IEM_MC_FETCH_MEM_FLAT_XMM(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
784#define IEM_MC_FETCH_MEM_FLAT_XMM_NO_AC(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
785#define IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
786#define IEM_MC_FETCH_MEM_FLAT_XMM_U32(a_XmmDst, a_iDWord, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
787#define IEM_MC_FETCH_MEM_FLAT_XMM_U64(a_XmmDst, a_iQWord, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
788
789#define IEM_MC_FETCH_MEM_U128_AND_XREG_U128(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
790#define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128(a_Dst, a_iXReg1, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
791
792#define IEM_MC_FETCH_MEM_XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
793#define IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
794#define IEM_MC_FETCH_MEM_XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
795#define IEM_MC_FETCH_MEM_FLAT_XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
796#define IEM_MC_FETCH_MEM_XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
797#define IEM_MC_FETCH_MEM_FLAT_XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
798
799#define IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \
800 do { IEM_LIVENESS_MEM(a_iSeg2); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
801#define IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \
802 do { IEM_LIVENESS_MEM(a_iSeg2); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
803
804#define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_GCPtrMem2) \
805 do { IEM_LIVENESS_MEM_FLAT(); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
806#define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_GCPtrMem2) \
807 do { IEM_LIVENESS_MEM_FLAT(); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
808
809
810#define IEM_MC_FETCH_MEM_U256(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
811#define IEM_MC_FETCH_MEM_U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
812#define IEM_MC_FETCH_MEM_U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
813
814#define IEM_MC_FETCH_MEM_YMM(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
815#define IEM_MC_FETCH_MEM_YMM_NO_AC(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
816#define IEM_MC_FETCH_MEM_YMM_ALIGN_AVX(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
817
818#define IEM_MC_FETCH_MEM_FLAT_U256(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
819#define IEM_MC_FETCH_MEM_FLAT_U256_NO_AC(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
820#define IEM_MC_FETCH_MEM_FLAT_U256_ALIGN_AVX(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
821
822#define IEM_MC_FETCH_MEM_FLAT_YMM(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
823#define IEM_MC_FETCH_MEM_FLAT_YMM_NO_AC(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
824#define IEM_MC_FETCH_MEM_FLAT_YMM_ALIGN_AVX(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
825
826#define IEM_MC_FETCH_MEM_U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
827#define IEM_MC_FETCH_MEM_U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
828#define IEM_MC_FETCH_MEM_U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
829#define IEM_MC_FETCH_MEM_U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
830#define IEM_MC_FETCH_MEM_U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
831#define IEM_MC_FETCH_MEM_U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
832
833#define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
834#define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
835#define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
836#define IEM_MC_FETCH_MEM_FLAT_U16_ZX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
837#define IEM_MC_FETCH_MEM_FLAT_U16_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
838#define IEM_MC_FETCH_MEM_FLAT_U32_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
839
840#define IEM_MC_FETCH_MEM_U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
841#define IEM_MC_FETCH_MEM_U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
842#define IEM_MC_FETCH_MEM_U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
843#define IEM_MC_FETCH_MEM_U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
844#define IEM_MC_FETCH_MEM_U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
845#define IEM_MC_FETCH_MEM_U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
846
847#define IEM_MC_FETCH_MEM_FLAT_U8_SX_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
848#define IEM_MC_FETCH_MEM_FLAT_U8_SX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
849#define IEM_MC_FETCH_MEM_FLAT_U8_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
850#define IEM_MC_FETCH_MEM_FLAT_U16_SX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
851#define IEM_MC_FETCH_MEM_FLAT_U16_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
852#define IEM_MC_FETCH_MEM_FLAT_U32_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
853
854#define IEM_MC_STORE_MEM_U8(a_iSeg, a_GCPtrMem, a_u8Value) IEM_LIVENESS_MEM(a_iSeg)
855#define IEM_MC_STORE_MEM_U16(a_iSeg, a_GCPtrMem, a_u16Value) IEM_LIVENESS_MEM(a_iSeg)
856#define IEM_MC_STORE_MEM_U32(a_iSeg, a_GCPtrMem, a_u32Value) IEM_LIVENESS_MEM(a_iSeg)
857#define IEM_MC_STORE_MEM_U64(a_iSeg, a_GCPtrMem, a_u64Value) IEM_LIVENESS_MEM(a_iSeg)
858
859#define IEM_MC_STORE_MEM_FLAT_U8(a_GCPtrMem, a_u8Value) IEM_LIVENESS_MEM_FLAT()
860#define IEM_MC_STORE_MEM_FLAT_U16(a_GCPtrMem, a_u16Value) IEM_LIVENESS_MEM_FLAT()
861#define IEM_MC_STORE_MEM_FLAT_U32(a_GCPtrMem, a_u32Value) IEM_LIVENESS_MEM_FLAT()
862#define IEM_MC_STORE_MEM_FLAT_U64(a_GCPtrMem, a_u64Value) IEM_LIVENESS_MEM_FLAT()
863
864#define IEM_MC_STORE_MEM_U8_CONST(a_iSeg, a_GCPtrMem, a_u8C) IEM_LIVENESS_MEM(a_iSeg)
865#define IEM_MC_STORE_MEM_U16_CONST(a_iSeg, a_GCPtrMem, a_u16C) IEM_LIVENESS_MEM(a_iSeg)
866#define IEM_MC_STORE_MEM_U32_CONST(a_iSeg, a_GCPtrMem, a_u32C) IEM_LIVENESS_MEM(a_iSeg)
867#define IEM_MC_STORE_MEM_U64_CONST(a_iSeg, a_GCPtrMem, a_u64C) IEM_LIVENESS_MEM(a_iSeg)
868
869#define IEM_MC_STORE_MEM_FLAT_U8_CONST(a_GCPtrMem, a_u8C) IEM_LIVENESS_MEM_FLAT()
870#define IEM_MC_STORE_MEM_FLAT_U16_CONST(a_GCPtrMem, a_u16C) IEM_LIVENESS_MEM_FLAT()
871#define IEM_MC_STORE_MEM_FLAT_U32_CONST(a_GCPtrMem, a_u32C) IEM_LIVENESS_MEM_FLAT()
872#define IEM_MC_STORE_MEM_FLAT_U64_CONST(a_GCPtrMem, a_u64C) IEM_LIVENESS_MEM_FLAT()
873
874#define IEM_MC_STORE_MEM_I8_CONST_BY_REF( a_pi8Dst, a_i8C) NOP()
875#define IEM_MC_STORE_MEM_I16_CONST_BY_REF(a_pi16Dst, a_i16C) NOP()
876#define IEM_MC_STORE_MEM_I32_CONST_BY_REF(a_pi32Dst, a_i32C) NOP()
877#define IEM_MC_STORE_MEM_I64_CONST_BY_REF(a_pi64Dst, a_i64C) NOP()
878#define IEM_MC_STORE_MEM_NEG_QNAN_R32_BY_REF(a_pr32Dst) NOP()
879#define IEM_MC_STORE_MEM_NEG_QNAN_R64_BY_REF(a_pr64Dst) NOP()
880#define IEM_MC_STORE_MEM_NEG_QNAN_R80_BY_REF(a_pr80Dst) NOP()
881#define IEM_MC_STORE_MEM_INDEF_D80_BY_REF(a_pd80Dst) NOP()
882
883#define IEM_MC_STORE_MEM_U128(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM(a_iSeg)
884#define IEM_MC_STORE_MEM_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM(a_iSeg)
885
886#define IEM_MC_STORE_MEM_FLAT_U128(a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_FLAT()
887#define IEM_MC_STORE_MEM_FLAT_U128_ALIGN_SSE(a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_FLAT()
888
889#define IEM_MC_STORE_MEM_U256(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM(a_iSeg)
890#define IEM_MC_STORE_MEM_U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM(a_iSeg)
891
892#define IEM_MC_STORE_MEM_FLAT_U256(a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_FLAT()
893#define IEM_MC_STORE_MEM_FLAT_U256_ALIGN_AVX(a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_FLAT()
894
895#define IEM_MC_PUSH_U16(a_u16Value) IEM_LIVENESS_STACK()
896#define IEM_MC_PUSH_U32(a_u32Value) IEM_LIVENESS_STACK()
897#define IEM_MC_PUSH_U32_SREG(a_uSegVal) IEM_LIVENESS_STACK()
898#define IEM_MC_PUSH_U64(a_u64Value) IEM_LIVENESS_STACK()
899
900#define IEM_MC_POP_GREG_U16(a_iGReg) do { IEM_LIVENESS_STACK(); IEM_LIVENESS_GPR_MODIFY(a_iGReg); } while (0)
901#define IEM_MC_POP_GREG_U32(a_iGReg) do { IEM_LIVENESS_STACK(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
902#define IEM_MC_POP_GREG_U64(a_iGReg) do { IEM_LIVENESS_STACK(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
903
904/* 32-bit flat stack push and pop: */
905#define IEM_MC_FLAT32_PUSH_U16(a_u16Value) IEM_LIVENESS_STACK_FLAT()
906#define IEM_MC_FLAT32_PUSH_U32(a_u32Value) IEM_LIVENESS_STACK_FLAT()
907#define IEM_MC_FLAT32_PUSH_U32_SREG(a_uSegVal) IEM_LIVENESS_STACK_FLAT()
908
909#define IEM_MC_FLAT32_POP_GREG_U16(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_MODIFY(a_iGReg); } while (0)
910#define IEM_MC_FLAT32_POP_GREG_U32(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
911
912/* 64-bit flat stack push and pop: */
913#define IEM_MC_FLAT64_PUSH_U16(a_u16Value) IEM_LIVENESS_STACK_FLAT()
914#define IEM_MC_FLAT64_PUSH_U64(a_u64Value) IEM_LIVENESS_STACK_FLAT()
915
916#define IEM_MC_FLAT64_POP_GREG_U16(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_MODIFY(a_iGReg); } while (0)
917#define IEM_MC_FLAT64_POP_GREG_U64(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
918
919
920#define IEM_MC_MEM_MAP_U8_ATOMIC(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
921#define IEM_MC_MEM_MAP_U8_RW(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
922#define IEM_MC_MEM_MAP_U8_WO(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
923#define IEM_MC_MEM_MAP_U8_RO(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
924#define IEM_MC_MEM_FLAT_MAP_U8_ATOMIC(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
925#define IEM_MC_MEM_FLAT_MAP_U8_RW(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
926#define IEM_MC_MEM_FLAT_MAP_U8_WO(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
927#define IEM_MC_MEM_FLAT_MAP_U8_RO(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
928#define IEM_MC_MEM_MAP_U16_ATOMIC(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
929#define IEM_MC_MEM_MAP_U16_RW(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
930#define IEM_MC_MEM_MAP_U16_WO(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
931#define IEM_MC_MEM_MAP_U16_RO(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
932#define IEM_MC_MEM_FLAT_MAP_U16_ATOMIC(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
933#define IEM_MC_MEM_FLAT_MAP_U16_RW(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
934#define IEM_MC_MEM_FLAT_MAP_U16_WO(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
935#define IEM_MC_MEM_FLAT_MAP_U16_RO(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
936#define IEM_MC_MEM_MAP_I16_WO(a_pi16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
937#define IEM_MC_MEM_FLAT_MAP_I16_WO(a_pi16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
938#define IEM_MC_MEM_MAP_U32_ATOMIC(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
939#define IEM_MC_MEM_MAP_U32_RW(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
940#define IEM_MC_MEM_MAP_U32_WO(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
941#define IEM_MC_MEM_MAP_U32_RO(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
942#define IEM_MC_MEM_FLAT_MAP_U32_ATOMIC(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
943#define IEM_MC_MEM_FLAT_MAP_U32_RW(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
944#define IEM_MC_MEM_FLAT_MAP_U32_WO(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
945#define IEM_MC_MEM_FLAT_MAP_U32_RO(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
946#define IEM_MC_MEM_MAP_I32_WO(a_pi32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
947#define IEM_MC_MEM_FLAT_MAP_I32_WO(a_pi32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
948#define IEM_MC_MEM_MAP_R32_WO(a_pr32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
949#define IEM_MC_MEM_FLAT_MAP_R32_WO(a_pr32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
950#define IEM_MC_MEM_MAP_U64_ATOMIC(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
951#define IEM_MC_MEM_MAP_U64_RW(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
952#define IEM_MC_MEM_MAP_U64_WO(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
953#define IEM_MC_MEM_MAP_U64_RO(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
954#define IEM_MC_MEM_FLAT_MAP_U64_ATOMIC(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
955#define IEM_MC_MEM_FLAT_MAP_U64_RW(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
956#define IEM_MC_MEM_FLAT_MAP_U64_WO(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
957#define IEM_MC_MEM_FLAT_MAP_U64_RO(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
958#define IEM_MC_MEM_MAP_I64_WO(a_pi64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
959#define IEM_MC_MEM_FLAT_MAP_I64_WO(a_pi64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
960#define IEM_MC_MEM_MAP_R64_WO(a_pr64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
961#define IEM_MC_MEM_FLAT_MAP_R64_WO(a_pr64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
962#define IEM_MC_MEM_MAP_U128_ATOMIC(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
963#define IEM_MC_MEM_MAP_U128_RW(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
964#define IEM_MC_MEM_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
965#define IEM_MC_MEM_MAP_U128_RO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
966#define IEM_MC_MEM_FLAT_MAP_U128_ATOMIC(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
967#define IEM_MC_MEM_FLAT_MAP_U128_RW(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
968#define IEM_MC_MEM_FLAT_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
969#define IEM_MC_MEM_FLAT_MAP_U128_RO(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
970#define IEM_MC_MEM_MAP_R80_WO(a_pr80Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
971#define IEM_MC_MEM_FLAT_MAP_R80_WO(a_pr80Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
972#define IEM_MC_MEM_MAP_D80_WO(a_pd80Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
973#define IEM_MC_MEM_FLAT_MAP_D80_WO(a_pd80Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
974
975
976#define IEM_MC_MEM_COMMIT_AND_UNMAP_RW(a_bMapInfo) NOP()
977#define IEM_MC_MEM_COMMIT_AND_UNMAP_ATOMIC(a_bMapInfo) NOP()
978#define IEM_MC_MEM_COMMIT_AND_UNMAP_WO(a_bMapInfo) NOP()
979#define IEM_MC_MEM_COMMIT_AND_UNMAP_RO(a_bMapInfo) NOP()
980#define IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(a_bMapInfo, a_u16FSW) NOP()
981#define IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(a_bMapInfo) NOP()
982
983
984#define IEM_MC_CALL_VOID_AIMPL_0(a_pfn) NOP()
985#define IEM_MC_CALL_VOID_AIMPL_1(a_pfn, a0) NOP()
986#define IEM_MC_CALL_VOID_AIMPL_2(a_pfn, a0, a1) NOP()
987#define IEM_MC_CALL_VOID_AIMPL_3(a_pfn, a0, a1, a2) NOP()
988#define IEM_MC_CALL_VOID_AIMPL_4(a_pfn, a0, a1, a2, a3) NOP()
989#define IEM_MC_CALL_AIMPL_3(a_rc, a_pfn, a0, a1, a2) NOP()
990#define IEM_MC_CALL_AIMPL_4(a_rc, a_pfn, a0, a1, a2, a3) NOP()
991
992#define IEM_MC_CALL_FPU_AIMPL_1(a_pfnAImpl, a0) NOP()
993#define IEM_MC_CALL_FPU_AIMPL_2(a_pfnAImpl, a0, a1) NOP()
994#define IEM_MC_CALL_FPU_AIMPL_3(a_pfnAImpl, a0, a1, a2) NOP()
995
996#define IEM_MC_SET_FPU_RESULT(a_FpuData, a_FSW, a_pr80Value) NOP()
997
998#define IEM_MC_PUSH_FPU_RESULT(a_FpuData, a_uFpuOpcode) NOP()
999#define IEM_MC_PUSH_FPU_RESULT_MEM_OP(a_FpuData, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1000#define IEM_MC_PUSH_FPU_RESULT_TWO(a_FpuDataTwo, a_uFpuOpcode) NOP()
1001
1002#define IEM_MC_STORE_FPU_RESULT(a_FpuData, a_iStReg, a_uFpuOpcode) NOP()
1003#define IEM_MC_STORE_FPU_RESULT_THEN_POP(a_FpuData, a_iStReg, a_uFpuOpcode) NOP()
1004#define IEM_MC_STORE_FPU_RESULT_MEM_OP(a_FpuData, a_iStReg, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1005#define IEM_MC_STORE_FPU_RESULT_WITH_MEM_OP_THEN_POP(a_FpuData, a_iStReg, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1006
1007#define IEM_MC_UPDATE_FPU_OPCODE_IP(a_uFpuOpcode) NOP()
1008#define IEM_MC_FPU_STACK_FREE(a_iStReg) NOP()
1009#define IEM_MC_FPU_STACK_INC_TOP() NOP()
1010#define IEM_MC_FPU_STACK_DEC_TOP() NOP()
1011
1012#define IEM_MC_UPDATE_FSW(a_u16FSW, a_uFpuOpcode) NOP()
1013#define IEM_MC_UPDATE_FSW_CONST(a_u16FSW, a_uFpuOpcode) NOP()
1014#define IEM_MC_UPDATE_FSW_WITH_MEM_OP(a_u16FSW, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1015#define IEM_MC_UPDATE_FSW_THEN_POP(a_u16FSW, a_uFpuOpcode) NOP()
1016#define IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(a_u16FSW, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1017#define IEM_MC_UPDATE_FSW_THEN_POP_POP(a_u16FSW, a_uFpuOpcode) NOP()
1018
1019#define IEM_MC_FPU_STACK_UNDERFLOW(a_iStDst, a_uFpuOpcode) NOP()
1020#define IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP(a_iStDst, a_uFpuOpcode) NOP()
1021#define IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(a_iStDst, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1022#define IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(a_iStDst, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1023#define IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP_POP(a_uFpuOpcode) NOP()
1024#define IEM_MC_FPU_STACK_PUSH_UNDERFLOW(a_uFpuOpcode) NOP()
1025#define IEM_MC_FPU_STACK_PUSH_UNDERFLOW_TWO(a_uFpuOpcode) NOP()
1026
1027#define IEM_MC_FPU_STACK_PUSH_OVERFLOW(a_uFpuOpcode) NOP()
1028#define IEM_MC_FPU_STACK_PUSH_OVERFLOW_MEM_OP(a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1029
1030#define IEM_MC_PREPARE_FPU_USAGE() NOP()
1031#define IEM_MC_ACTUALIZE_FPU_STATE_FOR_READ() NOP()
1032#define IEM_MC_ACTUALIZE_FPU_STATE_FOR_CHANGE() NOP()
1033
1034#define IEM_MC_STORE_SSE_RESULT(a_SseData, a_iXmmReg) NOP()
1035#define IEM_MC_SSE_UPDATE_MXCSR(a_fMxcsr) NOP()
1036
1037#define IEM_MC_PREPARE_SSE_USAGE() NOP()
1038#define IEM_MC_ACTUALIZE_SSE_STATE_FOR_READ() NOP()
1039#define IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE() NOP()
1040
1041#define IEM_MC_PREPARE_AVX_USAGE() NOP()
1042#define IEM_MC_ACTUALIZE_AVX_STATE_FOR_READ() NOP()
1043#define IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE() NOP()
1044
1045#define IEM_MC_CALL_MMX_AIMPL_2(a_pfnAImpl, a0, a1) NOP()
1046#define IEM_MC_CALL_MMX_AIMPL_3(a_pfnAImpl, a0, a1, a2) NOP()
1047#define IEM_MC_CALL_SSE_AIMPL_2(a_pfnAImpl, a0, a1) NOP()
1048#define IEM_MC_CALL_SSE_AIMPL_3(a_pfnAImpl, a0, a1, a2) NOP()
1049#define IEM_MC_IMPLICIT_AVX_AIMPL_ARGS() NOP()
1050#define IEM_MC_CALL_AVX_AIMPL_2(a_pfnAImpl, a1, a2) NOP()
1051#define IEM_MC_CALL_AVX_AIMPL_3(a_pfnAImpl, a1, a2, a3) NOP()
1052
1053#define IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit) \
1054 do { if ( (a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \
1055 else if ((a_fBit) == X86_EFL_PF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflPf); \
1056 else if ((a_fBit) == X86_EFL_AF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflAf); \
1057 else if ((a_fBit) == X86_EFL_ZF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflZf); \
1058 else if ((a_fBit) == X86_EFL_SF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflSf); \
1059 else if ((a_fBit) == X86_EFL_OF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOf); \
1060 else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); /* loadsb and friends */ \
1061 else { AssertMsgFailed(("#s (%#x)\n", #a_fBit, (a_fBit))); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
1062 } while (0)
1063
1064#define IEM_MC_IF_EFL_BIT_SET(a_fBit) IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1065#define IEM_MC_IF_EFL_BIT_NOT_SET(a_fBit) IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1066#define IEM_MC_IF_EFL_ANY_BITS_SET(a_fBits) \
1067 do { if ((a_fBits) == (X86_EFL_CF | X86_EFL_ZF)) \
1068 { IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflZf); } \
1069 else { AssertMsgFailed(("#s (%#x)\n", #a_fBits, (a_fBits))); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
1070 } while (0); {
1071#define IEM_MC_IF_EFL_NO_BITS_SET(a_fBits) \
1072 do { if ((a_fBits) == (X86_EFL_CF | X86_EFL_ZF)) \
1073 { IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflZf); } \
1074 else { AssertMsgFailed(("#s (%#x)\n", #a_fBits, (a_fBits))); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
1075 } while (0); {
1076#define IEM_MC_IF_EFL_BITS_NE(a_fBit1, a_fBit2) \
1077 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1078 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1079#define IEM_MC_IF_EFL_BITS_EQ(a_fBit1, a_fBit2) \
1080 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1081 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1082#define IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(a_fBit, a_fBit1, a_fBit2) \
1083 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); \
1084 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1085 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1086#define IEM_MC_IF_EFL_BIT_NOT_SET_AND_BITS_EQ(a_fBit, a_fBit1, a_fBit2) \
1087 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); \
1088 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1089 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1090#define IEM_MC_IF_CX_IS_NZ() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1091#define IEM_MC_IF_ECX_IS_NZ() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1092#define IEM_MC_IF_RCX_IS_NZ() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1093#define IEM_MC_IF_CX_IS_NOT_ONE() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1094#define IEM_MC_IF_ECX_IS_NOT_ONE() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1095#define IEM_MC_IF_RCX_IS_NOT_ONE() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1096#define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \
1097 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1098 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1099#define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \
1100 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1101 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1102#define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \
1103 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1104 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1105#define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \
1106 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1107 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1108#define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \
1109 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1110 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1111#define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \
1112 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1113 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1114#define IEM_MC_IF_LOCAL_IS_Z(a_Local) {
1115#define IEM_MC_IF_GREG_BIT_SET(a_iGReg, a_iBitNo) IEM_LIVENESS_GPR_INPUT(a_iGReg); {
1116
1117#define IEM_MC_REF_FPUREG(a_pr80Dst, a_iSt) NOP()
1118#define IEM_MC_IF_FPUREG_IS_EMPTY(a_iSt) {
1119#define IEM_MC_IF_FPUREG_NOT_EMPTY(a_iSt) {
1120#define IEM_MC_IF_FPUREG_NOT_EMPTY_REF_R80(a_pr80Dst, a_iSt) {
1121#define IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(a_pr80Dst0, a_iSt0, a_pr80Dst1, a_iSt1) {
1122#define IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(a_pr80Dst0, a_iSt0, a_iSt1) {
1123#define IEM_MC_IF_FCW_IM() {
1124#define IEM_MC_IF_MXCSR_XCPT_PENDING() {
1125
1126#define IEM_MC_ELSE() } /*else*/ {
1127#define IEM_MC_ENDIF() } do {} while (0)
1128
1129#define IEM_MC_HINT_FLUSH_GUEST_SHADOW(g_fGstShwFlush) NOP()
1130
1131
1132/*********************************************************************************************************************************
1133* The threaded functions. *
1134*********************************************************************************************************************************/
1135#include "IEMNativeLiveness.cpp.h"
1136
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