VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/IEMAllN8veLiveness.h@ 106078

Last change on this file since 106078 was 106078, checked in by vboxsync, 2 months ago

VMM/IEM: Liveness work for bugref:10720. bugref:10372
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1/* $Id: IEMAllN8veLiveness.h 106078 2024-09-17 19:41:52Z vboxsync $ */
2/** @file
3 * IEM - Native Recompiler, Liveness Analysis, Common Header.
4 */
5
6/*
7 * Copyright (C) 2011-2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_IEM
33#define IEM_WITH_OPAQUE_DECODER_STATE
34#include <VBox/vmm/iem.h>
35#include "IEMInternal.h"
36#include <VBox/vmm/vmcc.h>
37#include <VBox/log.h>
38
39#include "IEMN8veRecompiler.h"
40#include "IEMThreadedFunctions.h"
41#include "IEMNativeFunctions.h"
42
43
44/*********************************************************************************************************************************
45* Defined Constants And Macros *
46*********************************************************************************************************************************/
47#define NOP() ((void)0)
48
49
50/*
51 * BEGIN & END as well as internal workers.
52 */
53#ifndef IEMLIVENESS_EXTENDED_LAYOUT
54# define IEM_MC_BEGIN_EX(a_fMcFlags, a_fCImplFlags, a_cArgs) \
55 { \
56 /* Define local variables that we use to accumulate the liveness state changes in. */ \
57 IEMLIVENESSBIT LiveStateBit0 = { 0 }; \
58 IEMLIVENESSBIT LiveStateBit1 = { 0 }; \
59 IEMLIVENESSBIT LiveMask = { 0 }; \
60 bool fDoneXpctOrCall = false
61#else
62# define IEM_MC_BEGIN_EX(a_fMcFlags, a_fCImplFlags, a_cArgs) \
63 { \
64 /* Define local variables that we use to accumulate the liveness state changes in. */ \
65 IEMLIVENESSENTRY LiveState = { { 0, 0, 0, 0 } }; \
66 IEMLIVENESSBIT LiveMask = { 0 }; \
67 bool fDoneXpctOrCall = false
68#endif
69
70#ifndef IEMLIVENESS_EXTENDED_LAYOUT
71AssertCompile(IEMLIVENESS_STATE_INPUT == IEMLIVENESS_STATE_MASK);
72AssertCompile(IEMLIVENESSBIT0_XCPT_OR_CALL == 0 && IEMLIVENESSBIT1_XCPT_OR_CALL != 0);
73# define IEM_LIVENESS_MARK_CALL_OR_POT_CALL_INTERNAL() do { \
74 if (!fDoneXpctOrCall) \
75 { \
76 LiveStateBit0.bm64 |= pIncoming->Bit0.bm64 & pIncoming->Bit1.bm64 & ~LiveMask.bm64; \
77 LiveStateBit1.bm64 |= IEMLIVENESSBIT1_XCPT_OR_CALL; \
78 \
79 LiveMask.bm64 |= IEMLIVENESSBIT_MASK; /* could also use UINT64_MAX here, but makes little no(?) difference */ \
80 fDoneXpctOrCall = true; /* when compiling with gcc and cl.exe on x86 - may on arm, though. */ \
81 } \
82 } while (0)
83# define IEM_LIVENESS_MARK_POTENTIAL_CALL() IEM_LIVENESS_MARK_CALL_OR_POT_CALL_INTERNAL()
84# define IEM_LIVENESS_MARK_CALL() IEM_LIVENESS_MARK_CALL_OR_POT_CALL_INTERNAL()
85#else
86# define IEM_LIVENESS_MARK_POTENTIAL_CALL() do { \
87 if (!fDoneXpctOrCall) \
88 { \
89 LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 |= pIncoming->aBits[IEMLIVENESS_BIT_READ].bm64 & ~LiveMask.bm64; \
90 LiveMask.bm64 |= IEMLIVENESSBIT_MASK; \
91 fDoneXpctOrCall = true; \
92 } \
93 LiveState.aBits[IEMLIVENESS_BIT_POTENTIAL_CALL].bm64 |= IEMLIVENESSBIT_MASK; \
94 } while (0)
95# define IEM_LIVENESS_MARK_CALL() do { \
96 if (!fDoneXpctOrCall) \
97 { \
98 LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 |= pIncoming->aBits[IEMLIVENESS_BIT_READ].bm64 & ~LiveMask.bm64; \
99 LiveMask.bm64 |= IEMLIVENESSBIT_MASK; \
100 fDoneXpctOrCall = true; \
101 } \
102 LiveState.aBits[IEMLIVENESS_BIT_CALL].bm64 |= IEMLIVENESSBIT_MASK; \
103 } while (0)
104#endif
105
106
107#ifndef IEMLIVENESS_EXTENDED_LAYOUT
108AssertCompile(IEMLIVENESS_STATE_CLOBBERED == 0);
109# define IEM_LIVENESS_ALL_EFLAGS_CLOBBER() do { \
110 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
111 } while (0)
112AssertCompile(IEMLIVENESS_STATE_INPUT == IEMLIVENESS_STATE_MASK);
113# define IEM_LIVENESS_ALL_EFLAGS_INPUT() do { \
114 LiveStateBit0.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
115 LiveStateBit1.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
116 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
117 } while (0)
118# define IEM_LIVENESS_ALL_EFLAGS_MODIFY() IEM_LIVENESS_ALL_EFLAGS_INPUT()
119#else
120# define IEM_LIVENESS_ALL_EFLAGS_CLOBBER() do { \
121 LiveState.aBits[IEMLIVENESS_BIT_WRITE].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
122 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
123 } while (0)
124# define IEM_LIVENESS_ALL_EFLAGS_INPUT() do { \
125 LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
126 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
127 } while (0)
128# define IEM_LIVENESS_ALL_EFLAGS_MODIFY() do { \
129 LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
130 LiveState.aBits[IEMLIVENESS_BIT_WRITE].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
131 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
132 } while (0)
133#endif
134
135
136#ifndef IEMLIVENESS_EXTENDED_LAYOUT
137# define IEM_LIVENESS_ONE_EFLAG_CLOBBER(a_Name) do { \
138 LiveMask.a_Name |= 1; \
139 } while (0)
140# define IEM_LIVENESS_ONE_EFLAG_INPUT(a_Name) do { \
141 LiveStateBit0.a_Name |= 1; \
142 LiveStateBit1.a_Name |= 1; \
143 LiveMask.a_Name |= 1; \
144 } while (0)
145# define IEM_LIVENESS_ONE_EFLAG_MODIFY(a_Name) IEM_LIVENESS_ONE_EFLAG_INPUT(a_Name)
146#else
147# define IEM_LIVENESS_ONE_EFLAG_CLOBBER(a_Name) do { \
148 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_Name |= 1; \
149 LiveMask.a_Name |= 1; \
150 } while (0)
151# define IEM_LIVENESS_ONE_EFLAG_INPUT(a_Name) do { \
152 LiveState.aBits[IEMLIVENESS_BIT_READ].a_Name |= 1; \
153 LiveMask.a_Name |= 1; \
154 } while (0)
155# define IEM_LIVENESS_ONE_EFLAG_MODIFY(a_Name) do { \
156 LiveState.aBits[IEMLIVENESS_BIT_READ].a_Name |= 1; \
157 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_Name |= 1; \
158 LiveMask.a_Name |= 1; \
159 } while (0)
160#endif
161
162
163/* Generic bitmap (bmGpr, bmSegBase, ++) setters. */
164#ifndef IEMLIVENESS_EXTENDED_LAYOUT
165# define IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(a_bmMember, a_iElement) do { \
166 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \
167 } while (0)
168# define IEM_LIVENESS_BITMAP_MEMBER_INPUT(a_bmMember, a_iElement) do { \
169 LiveStateBit0.a_bmMember |= RT_BIT_64(a_iElement); \
170 LiveStateBit1.a_bmMember |= RT_BIT_64(a_iElement); \
171 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \
172 } while (0)
173# define IEM_LIVENESS_BITMAP_MEMBER_MODIFY(a_bmMember, a_iElement) IEM_LIVENESS_BITMAP_MEMBER_INPUT(a_bmMember, a_iElement)
174#else
175# define IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(a_bmMember, a_iElement) do { \
176 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_bmMember |= RT_BIT_64(a_iElement); \
177 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \
178 } while (0)
179# define IEM_LIVENESS_BITMAP_MEMBER_INPUT(a_bmMember, a_iElement) do { \
180 LiveState.aBits[IEMLIVENESS_BIT_READ].a_bmMember |= RT_BIT_64(a_iElement); \
181 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \
182 } while (0)
183# define IEM_LIVENESS_BITMAP_MEMBER_MODIFY(a_bmMember, a_iElement) do { \
184 LiveState.aBits[IEMLIVENESS_BIT_READ].a_bmMember |= RT_BIT_64(a_iElement); \
185 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_bmMember |= RT_BIT_64(a_iElement); \
186 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \
187 } while (0)
188#endif
189
190
191#define IEM_LIVENESS_CR0_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fCr0, 0)
192#define IEM_LIVENESS_CR4_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fCr4, 0)
193#define IEM_LIVENESS_XCR0_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fXcr0, 0)
194
195
196#define IEM_LIVENESS_FCW_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fFcw, 0)
197#define IEM_LIVENESS_FCW_CLOBBER() IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(fFcw, 0)
198#define IEM_LIVENESS_FCW_MODIFY() IEM_LIVENESS_BITMAP_MEMBER_MODIFY( fFcw, 0)
199
200
201#define IEM_LIVENESS_FSW_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fFsw, 0)
202#define IEM_LIVENESS_FSW_CLOBBER() IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(fFsw, 0)
203#define IEM_LIVENESS_FSW_MODIFY() IEM_LIVENESS_BITMAP_MEMBER_MODIFY( fFsw, 0)
204
205
206#define IEM_LIVENESS_MXCSR_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fMxCsr, 0)
207#define IEM_LIVENESS_MXCSR_CLOBBER() IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(fMxCsr, 0)
208#define IEM_LIVENESS_MXCSR_MODIFY() IEM_LIVENESS_BITMAP_MEMBER_MODIFY( fMxCsr, 0)
209
210
211#define IEM_LIVENESS_GPR_CLOBBER(a_idxGpr) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmGprs, a_idxGpr)
212#define IEM_LIVENESS_GPR_INPUT(a_idxGpr) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmGprs, a_idxGpr)
213#define IEM_LIVENESS_GPR_MODIFY(a_idxGpr) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmGprs, a_idxGpr)
214
215
216#define IEM_LIVENESS_SEG_BASE_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegBase, a_iSeg)
217#define IEM_LIVENESS_SEG_BASE_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegBase, a_iSeg)
218#define IEM_LIVENESS_SEG_BASE_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmSegBase, a_iSeg)
219
220
221#define IEM_LIVENESS_SEG_ATTRIB_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegAttrib, a_iSeg)
222#define IEM_LIVENESS_SEG_ATTRIB_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegAttrib, a_iSeg)
223#define IEM_LIVENESS_SEG_ATTRIB_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODFIY( bmSegAttrib, a_iSeg)
224
225
226#define IEM_LIVENESS_SEG_LIMIT_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegLimit, a_iSeg)
227#define IEM_LIVENESS_SEG_LIMIT_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegLimit, a_iSeg)
228#define IEM_LIVENESS_SEG_LIMIT_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmSegLimit, a_iSeg)
229
230
231#define IEM_LIVENESS_SEG_SEL_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegSel, a_iSeg)
232#define IEM_LIVENESS_SEG_SEL_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegSel, a_iSeg)
233#define IEM_LIVENESS_SEG_SEL_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmSegSel, a_iSeg)
234
235
236#define IEM_LIVENESS_MEM(a_iSeg) do { \
237 IEM_LIVENESS_MARK_POTENTIAL_CALL(); \
238 IEM_LIVENESS_SEG_ATTRIB_INPUT(a_iSeg); \
239 IEM_LIVENESS_SEG_BASE_INPUT(a_iSeg); \
240 IEM_LIVENESS_SEG_LIMIT_INPUT(a_iSeg); \
241 } while (0)
242
243#define IEM_LIVENESS_MEM_FLAT() IEM_LIVENESS_MARK_POTENTIAL_CALL()
244
245#define IEM_LIVENESS_STACK() do { \
246 IEM_LIVENESS_MEM(X86_SREG_SS); \
247 IEM_LIVENESS_GPR_MODIFY(X86_GREG_xSP); \
248 } while (0)
249
250#define IEM_LIVENESS_STACK_FLAT() do { \
251 IEM_LIVENESS_MEM_FLAT(); \
252 IEM_LIVENESS_GPR_MODIFY(X86_GREG_xSP); \
253 } while (0)
254
255
256#define IEM_LIVENESS_PC_NO_FLAGS() NOP()
257#define IEM_LIVENESS_PC_WITH_FLAGS() IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther)
258#define IEM_LIVENESS_PC16_JMP_NO_FLAGS() IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
259#define IEM_LIVENESS_PC32_JMP_NO_FLAGS() IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
260#define IEM_LIVENESS_PC32_FLAT_JMP_NO_FLAGS() IEM_LIVENESS_MARK_POTENTIAL_CALL()
261#define IEM_LIVENESS_PC64_JMP_NO_FLAGS() IEM_LIVENESS_MARK_POTENTIAL_CALL()
262#define IEM_LIVENESS_PC64_INTRAPG_JMP_NO_FLAGS() IEM_LIVENESS_MARK_POTENTIAL_CALL() /* Typically ends TB. */
263#define IEM_LIVENESS_PC16_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
264#define IEM_LIVENESS_PC32_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
265#define IEM_LIVENESS_PC32_FLAT_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther)
266#define IEM_LIVENESS_PC64_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther)
267#define IEM_LIVENESS_PC64_INTRAPG_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther)
268
269#ifndef IEMLIVENESS_EXTENDED_LAYOUT
270# define IEM_MC_END() \
271 /* Combine the incoming state with what we've accumulated in this block. */ \
272 /* We can help the compiler by skipping OR'ing when having applied XPCT_OR_CALL, */ \
273 /* since that already imports all the incoming state. Saves a lot with cl.exe. */ \
274 if (!fDoneXpctOrCall) \
275 { \
276 pOutgoing->Bit0.bm64 = LiveStateBit0.bm64 | (~LiveMask.bm64 & pIncoming->Bit0.bm64); \
277 pOutgoing->Bit1.bm64 = LiveStateBit1.bm64 | (~LiveMask.bm64 & pIncoming->Bit1.bm64); \
278 } \
279 else \
280 { \
281 pOutgoing->Bit0.bm64 = LiveStateBit0.bm64; \
282 pOutgoing->Bit1.bm64 = LiveStateBit1.bm64; \
283 } \
284 }
285#else
286# define IEM_MC_END() \
287 /* Combine the incoming state with what we've accumulated in this block. */ \
288 /* We can help the compiler by skipping OR'ing when having applied XPCT_OR_CALL, */ \
289 /* since that already imports all the incoming state. Saves a lot with cl.exe. */ \
290 if (!fDoneXpctOrCall) \
291 { \
292 pOutgoing->aBits[IEMLIVENESS_BIT_POTENTIAL_CALL].bm64 = LiveState.aBits[IEMLIVENESS_BIT_POTENTIAL_CALL].bm64 \
293 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_POTENTIAL_CALL].bm64); \
294 pOutgoing->aBits[IEMLIVENESS_BIT_READ].bm64 = LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 \
295 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_READ].bm64); \
296 pOutgoing->aBits[IEMLIVENESS_BIT_WRITE].bm64 = LiveState.aBits[IEMLIVENESS_BIT_WRITE].bm64 \
297 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_WRITE].bm64); \
298 pOutgoing->aBits[IEMLIVENESS_BIT_CALL].bm64 = LiveState.aBits[IEMLIVENESS_BIT_CALL].bm64 \
299 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_CALL].bm64); \
300 } \
301 else \
302 *pOutgoing = LiveState; \
303 }
304#endif
305
306/*
307 * The native MC variants.
308 */
309#define IEM_MC_FREE_LOCAL(a_Name) NOP()
310#define IEM_MC_FREE_ARG(a_Name) NOP()
311
312
313/*
314 * The THREADED MC variants.
315 */
316
317/* We don't track RIP (PC) liveness. */
318#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_NO_FLAGS()
319#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_NO_FLAGS()
320#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_NO_FLAGS()
321#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_WITH_FLAGS()
322#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_WITH_FLAGS()
323#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_WITH_FLAGS()
324
325#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16(a_i8, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
326#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
327#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32_FLAT(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC32_FLAT_JMP_NO_FLAGS()
328#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
329#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64_INTRAPG(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC64_INTRAPG_JMP_NO_FLAGS()
330#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i8, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
331#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
332#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32_FLAT_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC32_FLAT_JMP_WITH_FLAGS()
333#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
334#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64_INTRAPG_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC64_INTRAPG_JMP_WITH_FLAGS()
335#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
336#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
337#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32_FLAT(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_FLAT_JMP_NO_FLAGS()
338#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
339#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64_INTRAPG(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_INTRAPG_JMP_NO_FLAGS()
340#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
341#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
342#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32_FLAT_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_FLAT_JMP_WITH_FLAGS()
343#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
344#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64_INTRAPG_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_INTRAPG_JMP_WITH_FLAGS()
345#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
346#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
347#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32_FLAT(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_FLAT_JMP_NO_FLAGS()
348#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
349#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_INTRAPG(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_INTRAPG_JMP_NO_FLAGS()
350#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
351#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
352#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32_FLAT_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_FLAT_JMP_WITH_FLAGS()
353#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
354#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_INTRAPG_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_INTRAPG_JMP_WITH_FLAGS()
355#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16(a_u16NewIP) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
356#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32(a_u16NewIP) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
357#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64(a_u16NewIP) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
358#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_u16NewIP) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
359#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u16NewIP) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
360#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u16NewIP) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
361#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32(a_u32NewEIP) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
362#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
363#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u32NewEIP) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
364#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
365#define IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
366#define IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
367
368#define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
369#define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
370#define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
371#define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i16, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
372#define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i16, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
373#define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i16, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
374#define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC16(a_i32, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
375#define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC32(a_i32, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
376#define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC64(a_i32, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
377#define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i32, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
378#define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i32, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
379#define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i32, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
380#define IEM_MC_REL_CALL_S64_AND_FINISH_THREADED_PC32(a_i64, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
381#define IEM_MC_REL_CALL_S64_AND_FINISH_THREADED_PC64(a_i64, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
382#define IEM_MC_REL_CALL_S64_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i64, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
383#define IEM_MC_REL_CALL_S64_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i64, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
384#define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC16(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
385#define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC32(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
386#define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC64(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
387#define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
388#define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
389#define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
390#define IEM_MC_IND_CALL_U32_AND_FINISH_THREADED_PC32(a_u32NewEIP, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
391#define IEM_MC_IND_CALL_U32_AND_FINISH_THREADED_PC64(a_u32NewEIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
392#define IEM_MC_IND_CALL_U32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u32NewEIP, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
393#define IEM_MC_IND_CALL_U32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewEIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
394#define IEM_MC_IND_CALL_U64_AND_FINISH_THREADED_PC64(a_u32NewRIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
395#define IEM_MC_IND_CALL_U64_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewRIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
396
397#define IEM_MC_RETN_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
398#define IEM_MC_RETN_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr, a_enmEffOpSize) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
399#define IEM_MC_RETN_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr, a_enmEffOpSize) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
400#define IEM_MC_RETN_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i16, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
401#define IEM_MC_RETN_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i16, a_cbInstr, a_enmEffOpSize) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
402#define IEM_MC_RETN_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i16, a_cbInstr, a_enmEffOpSize) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
403
404/* Effective address stuff is rather complicated... */
405#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_16(a_GCPtrEff, a_bRm, a_u16Disp) do { \
406 if (((a_bRm) & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) != 6) \
407 { \
408 switch ((a_bRm) & X86_MODRM_RM_MASK) \
409 { \
410 case 0: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xSI); break; \
411 case 1: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDI); break; \
412 case 2: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBP); IEM_LIVENESS_GPR_INPUT(X86_GREG_xSI); break; \
413 case 3: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBP); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDI); break; \
414 case 4: IEM_LIVENESS_GPR_INPUT(X86_GREG_xSI); break; \
415 case 5: IEM_LIVENESS_GPR_INPUT(X86_GREG_xDI); break; \
416 case 6: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBP); break; \
417 case 7: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBX); break; \
418 } \
419 } \
420 } while (0)
421
422#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_32(a_GCPtrEff, a_bRm, a_uSibAndRspOffset, a_u32Disp) do { \
423 if (((a_bRm) & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) != 5) \
424 { \
425 uint8_t const idxReg = (a_bRm) & X86_MODRM_RM_MASK; \
426 if (idxReg != 4 /*SIB*/) \
427 IEM_LIVENESS_GPR_INPUT(idxReg); \
428 else \
429 { \
430 uint8_t const idxIndex = ((a_uSibAndRspOffset) >> X86_SIB_INDEX_SHIFT) & X86_SIB_INDEX_SMASK; \
431 if (idxIndex != 4 /*no index*/) \
432 IEM_LIVENESS_GPR_INPUT(idxIndex); \
433 \
434 uint8_t const idxBase = (a_uSibAndRspOffset) & X86_SIB_BASE_MASK; \
435 if (idxBase != 5 || ((a_bRm) & X86_MODRM_MOD_MASK) != 0) \
436 IEM_LIVENESS_GPR_INPUT(idxBase); \
437 } \
438 } \
439 } while (0)
440
441#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_64(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) do { \
442 if (((a_bRmEx) & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) == 5) \
443 { /* RIP */ } \
444 else \
445 { \
446 uint8_t const idxReg = (a_bRmEx) & (X86_MODRM_RM_MASK | 0x8); /* bRmEx[bit 3] = REX.B */ \
447 if ((idxReg & X86_MODRM_RM_MASK) != 4 /* not SIB */) \
448 IEM_LIVENESS_GPR_INPUT(idxReg); \
449 else /* SIB: */\
450 { \
451 uint8_t const idxIndex = (((a_uSibAndRspOffset) >> X86_SIB_INDEX_SHIFT) & X86_SIB_INDEX_SMASK) \
452 | (((a_bRmEx) & 0x10) >> 1); /* bRmEx[bit 4] = REX.X */ \
453 if (idxIndex != 4 /*no index*/) \
454 IEM_LIVENESS_GPR_INPUT(idxIndex); \
455 \
456 uint8_t const idxBase = ((a_uSibAndRspOffset) & X86_SIB_BASE_MASK) | ((a_bRmEx) & 0x8); /* bRmEx[bit 3] = REX.B */ \
457 if ((idxBase & 7) != 5 /* and !13*/ || ((a_bRmEx) & X86_MODRM_MOD_MASK) != 0) \
458 IEM_LIVENESS_GPR_INPUT(idxBase); \
459 } \
460 } \
461 } while (0)
462#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_64_FSGS(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) \
463 IEM_MC_CALC_RM_EFF_ADDR_THREADED_64(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm)
464#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_64_ADDR32(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) \
465 IEM_MC_CALC_RM_EFF_ADDR_THREADED_64(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm)
466
467/* At present we don't know what any CIMPL may require as input, however they
468 shouldn't ever throw an exception, so it should suffice to mark them as
469 unconditional calls. */
470#define IEM_MC_CALL_CIMPL_1_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0) \
471 IEM_LIVENESS_MARK_CALL()
472#define IEM_MC_CALL_CIMPL_2_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1) \
473 IEM_LIVENESS_MARK_CALL()
474#define IEM_MC_CALL_CIMPL_3_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2) \
475 IEM_LIVENESS_MARK_CALL()
476#define IEM_MC_CALL_CIMPL_4_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3) \
477 IEM_LIVENESS_MARK_CALL()
478#define IEM_MC_CALL_CIMPL_5_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3, a4) \
479 IEM_LIVENESS_MARK_CALL()
480
481#define IEM_MC_DEFER_TO_CIMPL_0_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl) \
482 IEM_LIVENESS_RAW_INIT_WITH_CALL(pOutgoing, pIncoming)
483#define IEM_MC_DEFER_TO_CIMPL_1_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0) \
484 IEM_LIVENESS_RAW_INIT_WITH_CALL(pOutgoing, pIncoming)
485#define IEM_MC_DEFER_TO_CIMPL_2_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1) \
486 IEM_LIVENESS_RAW_INIT_WITH_CALL(pOutgoing, pIncoming)
487#define IEM_MC_DEFER_TO_CIMPL_3_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2) \
488 IEM_LIVENESS_RAW_INIT_WITH_CALL(pOutgoing, pIncoming)
489#define IEM_MC_DEFER_TO_CIMPL_4_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3) \
490 IEM_LIVENESS_RAW_INIT_WITH_CALL(pOutgoing, pIncoming)
491#define IEM_MC_DEFER_TO_CIMPL_5_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3, a4) \
492 IEM_LIVENESS_RAW_INIT_WITH_CALL(pOutgoing, pIncoming)
493
494/* Any 8-bit register fetch, store or modification only works on part of the register
495 and must therefore be considered INPUTs. */
496#define IEM_MC_FETCH_GREG_U8_THREADED(a_u8Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
497#define IEM_MC_FETCH_GREG_U8_ZX_U16_THREADED(a_u16Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
498#define IEM_MC_FETCH_GREG_U8_ZX_U32_THREADED(a_u32Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
499#define IEM_MC_FETCH_GREG_U8_ZX_U64_THREADED(a_u64Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
500#define IEM_MC_FETCH_GREG_U8_SX_U16_THREADED(a_u16Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
501#define IEM_MC_FETCH_GREG_U8_SX_U32_THREADED(a_u32Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
502#define IEM_MC_FETCH_GREG_U8_SX_U64_THREADED(a_u64Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
503#define IEM_MC_STORE_GREG_U8_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
504#define IEM_MC_STORE_GREG_U8_CONST_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
505#define IEM_MC_REF_GREG_U8_THREADED(a_pu8Dst, a_iGRegEx) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
506#define IEM_MC_REF_GREG_U8_CONST_THREADED(a_pu8Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
507#define IEM_MC_ADD_GREG_U8_TO_LOCAL_THREADED(a_u8Value, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
508#define IEM_MC_AND_GREG_U8_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
509#define IEM_MC_OR_GREG_U8_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
510
511
512/*
513 * The other MCs.
514 */
515
516#define IEM_MC_NO_NATIVE_RECOMPILE() NOP()
517
518#define IEM_MC_RAISE_DIVIDE_ERROR() IEM_LIVENESS_MARK_POTENTIAL_CALL()
519#define IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE() IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_CR0_INPUT()
520#define IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE() IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_CR0_INPUT()
521#define IEM_MC_MAYBE_RAISE_FPU_XCPT() IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_FSW_INPUT()
522#define IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT() \
523 IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_CR0_INPUT(); IEM_LIVENESS_CR4_INPUT(); IEM_LIVENESS_XCR0_INPUT()
524#define IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT() \
525 IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_CR0_INPUT(); IEM_LIVENESS_CR4_INPUT()
526#define IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT() \
527 IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_CR0_INPUT(); IEM_LIVENESS_FSW_INPUT()
528#define IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO() IEM_LIVENESS_MARK_POTENTIAL_CALL() /**< @todo not conditional */
529#define IEM_MC_RAISE_GP0_IF_EFF_ADDR_UNALIGNED(a_EffAddr, a_cbAlign) IEM_LIVENESS_MARK_POTENTIAL_CALL()
530#define IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT() IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_CR4_INPUT()
531#define IEM_MC_MAYBE_RAISE_NON_CANONICAL_ADDR_GP0(a_u64Addr) IEM_LIVENESS_MARK_POTENTIAL_CALL()
532
533#define IEM_MC_LOCAL(a_Type, a_Name) NOP()
534#define IEM_MC_LOCAL_ASSIGN(a_Type, a_Name, a_Value) NOP()
535#define IEM_MC_LOCAL_CONST(a_Type, a_Name, a_Value) NOP()
536#define IEM_MC_NOREF(a_Name) NOP()
537#define IEM_MC_ARG(a_Type, a_Name, a_iArg) NOP()
538#define IEM_MC_ARG_CONST(a_Type, a_Name, a_Value, a_iArg) NOP()
539#define IEM_MC_ARG_LOCAL_REF(a_Type, a_Name, a_Local, a_iArg) NOP()
540
541#undef IEM_MC_COMMIT_EFLAGS /* unused here */
542#define IEM_MC_COMMIT_EFLAGS_EX(a_EFlags, a_fEflInput, a_fEflOutput) do { \
543 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_CF, fEflCf); \
544 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_PF, fEflPf); \
545 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_AF, fEflAf); \
546 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_ZF, fEflZf); \
547 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_SF, fEflSf); \
548 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_OF, fEflOf); \
549 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, ~X86_EFL_STATUS_BITS, fEflOther); \
550 Assert(!( ((a_fEflInput) | (a_fEflOutput)) \
551 & ~(uint32_t)(X86_EFL_STATUS_BITS | X86_EFL_DF | X86_EFL_VM | X86_EFL_VIF | X86_EFL_IOPL))); \
552 } while (0)
553#undef IEM_MC_COMMIT_EFLAGS_OPT /* unused here */
554#define IEM_MC_COMMIT_EFLAGS_OPT_EX(a_EFlags, a_fEflInput, a_fEflOutput) \
555 IEM_MC_COMMIT_EFLAGS_EX(a_EFlags, a_fEflInput, a_fEflOutput)
556
557#define IEM_MC_ASSIGN_TO_SMALLER(a_VarDst, a_VarSrcEol) NOP()
558
559#define IEM_MC_FETCH_GREG_I16(a_i16Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
560#define IEM_MC_FETCH_GREG_U16(a_u16Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
561#define IEM_MC_FETCH_GREG_U16_ZX_U32(a_u32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
562#define IEM_MC_FETCH_GREG_U16_ZX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
563#define IEM_MC_FETCH_GREG_U16_SX_U32(a_u32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
564#define IEM_MC_FETCH_GREG_U16_SX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
565#define IEM_MC_FETCH_GREG_I32(a_i32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
566#define IEM_MC_FETCH_GREG_U32(a_u32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
567#define IEM_MC_FETCH_GREG_U32_ZX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
568#define IEM_MC_FETCH_GREG_U32_SX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
569#define IEM_MC_FETCH_GREG_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
570#define IEM_MC_FETCH_GREG_U64_ZX_U64 IEM_MC_FETCH_GREG_U64
571#define IEM_MC_FETCH_GREG_PAIR_U32(a_u64Dst, a_iGRegLo, a_iGRegHi) \
572 do { IEM_LIVENESS_GPR_INPUT(a_iGRegLo); IEM_LIVENESS_GPR_INPUT(a_iGRegHi); } while(0)
573#define IEM_MC_FETCH_GREG_PAIR_U64(a_u128Dst, a_iGRegLo, a_iGRegHi) \
574 do { IEM_LIVENESS_GPR_INPUT(a_iGRegLo); IEM_LIVENESS_GPR_INPUT(a_iGRegHi); } while(0)
575#define IEM_MC_FETCH_SREG_U16(a_u16Dst, a_iSReg) IEM_LIVENESS_SEG_SEL_INPUT(a_iSReg)
576#define IEM_MC_FETCH_SREG_ZX_U32(a_u32Dst, a_iSReg) IEM_LIVENESS_SEG_SEL_INPUT(a_iSReg)
577#define IEM_MC_FETCH_SREG_ZX_U64(a_u64Dst, a_iSReg) IEM_LIVENESS_SEG_SEL_INPUT(a_iSReg)
578#define IEM_MC_FETCH_SREG_BASE_U64(a_u64Dst, a_iSReg) IEM_LIVENESS_SEG_BASE_INPUT(a_iSReg)
579#define IEM_MC_FETCH_SREG_BASE_U32(a_u32Dst, a_iSReg) IEM_LIVENESS_SEG_BASE_INPUT(a_iSReg)
580#undef IEM_MC_FETCH_EFLAGS /* unused here */
581#define IEM_MC_FETCH_EFLAGS_EX(a_EFlags, a_fEflInput, a_fEflOutput) do { \
582 /* IEM_MC_COMMIT_EFLAGS_EX doesn't cover input-only situations. This OTOH, leads \
583 to duplication in many cases, but the compiler's optimizers should help with that. */ \
584 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_CF, fEflCf); \
585 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_PF, fEflPf); \
586 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_AF, fEflAf); \
587 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_ZF, fEflZf); \
588 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_SF, fEflSf); \
589 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_OF, fEflOf); \
590 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, ~X86_EFL_STATUS_BITS, fEflOther); \
591 Assert(!( ((a_fEflInput) | (a_fEflOutput)) \
592 & ~(uint32_t)(X86_EFL_STATUS_BITS | X86_EFL_DF | X86_EFL_VM | X86_EFL_VIF | X86_EFL_IOPL))); \
593 } while (0)
594#define IEM_MC_FETCH_EFLAGS_U8(a_EFlags) do { \
595 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Cf); \
596 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Pf); \
597 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Af); \
598 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Zf); \
599 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Sf); \
600 } while (0)
601
602#define IEM_MC_FETCH_FSW(a_u16Fsw) IEM_LIVENESS_FSW_INPUT()
603#define IEM_MC_FETCH_FCW(a_u16Fcw) IEM_LIVENESS_FCW_INPUT()
604
605#define IEM_MC_STORE_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
606#define IEM_MC_STORE_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
607#define IEM_MC_STORE_GREG_I32(a_iGReg, a_i32Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
608#define IEM_MC_STORE_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
609#define IEM_MC_STORE_GREG_I64(a_iGReg, a_i64Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
610#define IEM_MC_STORE_GREG_U16_CONST(a_iGReg, a_u16Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
611#define IEM_MC_STORE_GREG_U32_CONST(a_iGReg, a_u32Const) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
612#define IEM_MC_STORE_GREG_U64_CONST(a_iGReg, a_u32Const) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
613#define IEM_MC_STORE_GREG_PAIR_U32(a_iGRegLo, a_iGRegHi, a_u64Value) \
614 do { IEM_LIVENESS_GPR_CLOBBER(a_iGRegLo); IEM_LIVENESS_GPR_CLOBBER(a_iGRegHi); } while(0)
615#define IEM_MC_STORE_GREG_PAIR_U64(a_iGRegLo, a_iGRegHi, a_u128Value) \
616 do { IEM_LIVENESS_GPR_CLOBBER(a_iGRegLo); IEM_LIVENESS_GPR_CLOBBER(a_iGRegHi); } while(0)
617#define IEM_MC_CLEAR_HIGH_GREG_U64(a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg) /** @todo This isn't always the case... */
618
619#define IEM_MC_STORE_SREG_BASE_U64(a_iSReg, a_u64Value) IEM_LIVENESS_SEG_BASE_CLOBBER(a_iSReg)
620#define IEM_MC_STORE_SREG_BASE_U32(a_iSReg, a_u32Value) IEM_LIVENESS_SEG_BASE_CLOBBER(a_iSReg)
621#define IEM_MC_STORE_FPUREG_R80_SRC_REF(a_iSt, a_pr80Src) NOP()
622
623
624#define IEM_MC_REF_GREG_U16(a_pu16Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
625#define IEM_MC_REF_GREG_U16_CONST(a_pu16Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
626#define IEM_MC_REF_GREG_U32(a_pu32Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
627#define IEM_MC_REF_GREG_U32_CONST(a_pu32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
628#define IEM_MC_REF_GREG_I32(a_pi32Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
629#define IEM_MC_REF_GREG_I32_CONST(a_pi32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
630#define IEM_MC_REF_GREG_U64(a_pu64Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
631#define IEM_MC_REF_GREG_U64_CONST(a_pu64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
632#define IEM_MC_REF_GREG_I64(a_pi64Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
633#define IEM_MC_REF_GREG_I64_CONST(a_pi64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
634#define IEM_MC_REF_EFLAGS(a_pEFlags) IEM_LIVENESS_ALL_EFLAGS_MODIFY()
635#undef IEM_MC_REF_EFLAGS /* unused */
636#define IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, a_fEfl, a_Member) \
637 if ((a_fEflInput) & (a_fEfl)) { \
638 if ((a_fEflOutput) & (a_fEfl)) IEM_LIVENESS_ONE_EFLAG_MODIFY(a_Member); \
639 else IEM_LIVENESS_ONE_EFLAG_INPUT(a_Member); \
640 } else if ((a_fEflOutput) & (a_fEfl)) IEM_LIVENESS_ONE_EFLAG_CLOBBER(a_Member)
641#define IEM_MC_REF_EFLAGS_EX(a_pEFlags, a_fEflInput, a_fEflOutput) do { \
642 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_CF, fEflCf); \
643 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_PF, fEflPf); \
644 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_AF, fEflAf); \
645 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_ZF, fEflZf); \
646 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_SF, fEflSf); \
647 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_OF, fEflOf); \
648 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, ~X86_EFL_STATUS_BITS, fEflOther); \
649 Assert(!( ((a_fEflInput) | (a_fEflOutput)) \
650 & ~(uint32_t)(X86_EFL_STATUS_BITS | X86_EFL_DF | X86_EFL_VM | X86_EFL_VIF | X86_EFL_IOPL))); \
651 } while (0)
652#define IEM_MC_ASSERT_EFLAGS(a_fEflInput, a_fEflOutput) NOP()
653
654
655#define IEM_MC_ADD_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
656#define IEM_MC_ADD_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
657#define IEM_MC_ADD_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
658
659#define IEM_MC_SUB_GREG_U16(a_iGReg, a_u8Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
660#define IEM_MC_SUB_GREG_U32(a_iGReg, a_u8Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
661#define IEM_MC_SUB_GREG_U64(a_iGReg, a_u8Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
662#define IEM_MC_SUB_LOCAL_U16(a_u16Value, a_u16Const) NOP()
663
664#define IEM_MC_ADD_GREG_U16_TO_LOCAL(a_u16Value, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
665#define IEM_MC_ADD_GREG_U32_TO_LOCAL(a_u32Value, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
666#define IEM_MC_ADD_GREG_U64_TO_LOCAL(a_u64Value, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
667#define IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(a_EffAddr, a_i16) NOP()
668#define IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(a_EffAddr, a_i32) NOP()
669#define IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR(a_EffAddr, a_i64) NOP()
670
671#define IEM_MC_AND_LOCAL_U8(a_u8Local, a_u8Mask) NOP()
672#define IEM_MC_AND_LOCAL_U16(a_u16Local, a_u16Mask) NOP()
673#define IEM_MC_AND_LOCAL_U32(a_u32Local, a_u32Mask) NOP()
674#define IEM_MC_AND_LOCAL_U64(a_u64Local, a_u64Mask) NOP()
675
676#define IEM_MC_AND_ARG_U16(a_u16Arg, a_u16Mask) NOP()
677#define IEM_MC_AND_ARG_U32(a_u32Arg, a_u32Mask) NOP()
678#define IEM_MC_AND_ARG_U64(a_u64Arg, a_u64Mask) NOP()
679
680#define IEM_MC_OR_LOCAL_U8(a_u8Local, a_u8Mask) NOP()
681#define IEM_MC_OR_LOCAL_U16(a_u16Local, a_u16Mask) NOP()
682#define IEM_MC_OR_LOCAL_U32(a_u32Local, a_u32Mask) NOP()
683
684#define IEM_MC_SAR_LOCAL_S16(a_i16Local, a_cShift) NOP()
685#define IEM_MC_SAR_LOCAL_S32(a_i32Local, a_cShift) NOP()
686#define IEM_MC_SAR_LOCAL_S64(a_i64Local, a_cShift) NOP()
687
688#define IEM_MC_SHR_LOCAL_U8(a_u8Local, a_cShift) NOP()
689
690#define IEM_MC_SHL_LOCAL_S16(a_i16Local, a_cShift) NOP()
691#define IEM_MC_SHL_LOCAL_S32(a_i32Local, a_cShift) NOP()
692#define IEM_MC_SHL_LOCAL_S64(a_i64Local, a_cShift) NOP()
693
694#define IEM_MC_AND_2LOCS_U32(a_u32Local, a_u32Mask) NOP()
695
696#define IEM_MC_OR_2LOCS_U32(a_u32Local, a_u32Mask) NOP()
697
698#define IEM_MC_AND_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
699#define IEM_MC_AND_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
700#define IEM_MC_AND_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
701
702#define IEM_MC_OR_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
703#define IEM_MC_OR_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
704#define IEM_MC_OR_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
705
706#define IEM_MC_BSWAP_LOCAL_U16(a_u16Local) NOP()
707#define IEM_MC_BSWAP_LOCAL_U32(a_u32Local) NOP()
708#define IEM_MC_BSWAP_LOCAL_U64(a_u64Local) NOP()
709
710#define IEM_MC_SET_EFL_BIT(a_fBit) do { \
711 if ((a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \
712 else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); \
713 else { AssertFailed(); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
714 } while (0)
715#define IEM_MC_CLEAR_EFL_BIT(a_fBit) do { \
716 if ((a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \
717 else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); \
718 else { AssertFailed(); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
719 } while (0)
720#define IEM_MC_FLIP_EFL_BIT(a_fBit) do { \
721 if ((a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_MODIFY(fEflCf); \
722 else { AssertFailed(); IEM_LIVENESS_ALL_EFLAGS_MODIFY(); } \
723 } while (0)
724
725#define IEM_MC_CLEAR_FSW_EX() IEM_LIVENESS_FCW_MODIFY()
726#define IEM_MC_FPU_TO_MMX_MODE() IEM_LIVENESS_FCW_MODIFY()
727#define IEM_MC_FPU_FROM_MMX_MODE() IEM_LIVENESS_FCW_MODIFY()
728
729#define IEM_MC_FETCH_MREG_U64(a_u64Value, a_iMReg) NOP()
730#define IEM_MC_FETCH_MREG_U32(a_u32Value, a_iMReg, a_iDWord) NOP()
731#define IEM_MC_FETCH_MREG_U16(a_u16Value, a_iMReg, a_iWord) NOP()
732#define IEM_MC_FETCH_MREG_U8(a_u8Value, a_iMReg, a_iByte) NOP()
733#define IEM_MC_STORE_MREG_U64(a_iMReg, a_u64Value) NOP()
734#define IEM_MC_STORE_MREG_U32(a_iMReg, a_iDword, a_u32Value) NOP()
735#define IEM_MC_STORE_MREG_U16(a_iMReg, a_iWord, a_u16Value) NOP()
736#define IEM_MC_STORE_MREG_U8(a_iMReg, a_iByte, a_u8Value) NOP()
737#define IEM_MC_STORE_MREG_U32_ZX_U64(a_iMReg, a_u32Value) NOP()
738#define IEM_MC_REF_MREG_U64(a_pu64Dst, a_iMReg) NOP()
739#define IEM_MC_REF_MREG_U64_CONST(a_pu64Dst, a_iMReg) NOP()
740#define IEM_MC_REF_MREG_U32_CONST(a_pu32Dst, a_iMReg) NOP()
741#define IEM_MC_MODIFIED_MREG(a_iMReg) NOP()
742#define IEM_MC_MODIFIED_MREG_BY_REF(a_pu64Dst) NOP()
743
744#define IEM_MC_CLEAR_XREG_U32_MASK(a_iXReg, a_bMask) NOP()
745#define IEM_MC_FETCH_XREG_U128(a_u128Value, a_iXReg) NOP()
746#define IEM_MC_FETCH_XREG_XMM(a_XmmValue, a_iXReg) NOP()
747#define IEM_MC_FETCH_XREG_U64(a_u64Value, a_iXReg, a_iQWord) NOP()
748#define IEM_MC_FETCH_XREG_R64(a_r64Value, a_iXReg, a_iQWord) NOP()
749#define IEM_MC_FETCH_XREG_U32(a_u32Value, a_iXReg, a_iDWord) NOP()
750#define IEM_MC_FETCH_XREG_R32(a_r32Value, a_iXReg, a_iDWord) NOP()
751#define IEM_MC_FETCH_XREG_U16(a_u16Value, a_iXReg, a_iWord) NOP()
752#define IEM_MC_FETCH_XREG_U8( a_u8Value, a_iXReg, a_iByte) NOP()
753#define IEM_MC_FETCH_XREG_PAIR_U128(a_Dst, a_iXReg1, a_iXReg2) NOP()
754#define IEM_MC_FETCH_XREG_PAIR_XMM(a_Dst, a_iXReg1, a_iXReg2) NOP()
755#define IEM_MC_FETCH_XREG_PAIR_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iXReg2) \
756 do { IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
757#define IEM_MC_FETCH_XREG_PAIR_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iXReg2) \
758 do { IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
759#define IEM_MC_STORE_XREG_U128(a_iXReg, a_u128Value) NOP()
760#define IEM_MC_STORE_XREG_XMM(a_iXReg, a_XmmValue) NOP()
761#define IEM_MC_STORE_XREG_XMM_U32(a_iXReg, a_iDword, a_XmmValue) NOP()
762#define IEM_MC_STORE_XREG_XMM_U64(a_iXReg, a_iQword, a_XmmValue) NOP()
763#define IEM_MC_STORE_XREG_U64(a_iXReg, a_iQword, a_u64Value) NOP()
764#define IEM_MC_STORE_XREG_U32(a_iXReg, a_iDword, a_u32Value) NOP()
765#define IEM_MC_STORE_XREG_U16(a_iXReg, a_iWord, a_u16Value) NOP()
766#define IEM_MC_STORE_XREG_U8(a_iXReg, a_iByte, a_u8Value) NOP()
767#define IEM_MC_STORE_XREG_U64_ZX_U128(a_iXReg, a_u64Value) NOP()
768#define IEM_MC_STORE_XREG_U32_U128(a_iXReg, a_iDwDst, a_u128Value, a_iDwSrc) NOP()
769#define IEM_MC_STORE_XREG_R32(a_iXReg, a_r32Value) NOP()
770#define IEM_MC_STORE_XREG_R64(a_iXReg, a_r64Value) NOP()
771#define IEM_MC_STORE_XREG_U32_ZX_U128(a_iXReg, a_u32Value) NOP()
772
773#define IEM_MC_BROADCAST_XREG_U8_ZX_VLMAX(a_iXRegDst, a_u8Src) NOP()
774#define IEM_MC_BROADCAST_XREG_U16_ZX_VLMAX(a_iXRegDst, a_u16Src) NOP()
775#define IEM_MC_BROADCAST_XREG_U32_ZX_VLMAX(a_iXRegDst, a_u32Src) NOP()
776#define IEM_MC_BROADCAST_XREG_U64_ZX_VLMAX(a_iXRegDst, a_u64Src) NOP()
777
778#define IEM_MC_REF_XREG_U128(a_pu128Dst, a_iXReg) NOP()
779#define IEM_MC_REF_XREG_XMM(a_puXmmDst, a_iXReg) NOP()
780#define IEM_MC_REF_XREG_U128_CONST(a_pu128Dst, a_iXReg) NOP()
781#define IEM_MC_REF_XREG_XMM_CONST(a_pXmmDst, a_iXReg) NOP()
782#define IEM_MC_REF_XREG_U32_CONST(a_pu32Dst, a_iXReg) NOP()
783#define IEM_MC_REF_XREG_U64_CONST(a_pu64Dst, a_iXReg) NOP()
784#define IEM_MC_REF_XREG_R32_CONST(a_pr32Dst, a_iXReg) NOP()
785#define IEM_MC_REF_XREG_R64_CONST(a_pr64Dst, a_iXReg) NOP()
786#define IEM_MC_COPY_XREG_U128(a_iXRegDst, a_iXRegSrc) NOP()
787
788#define IEM_MC_FETCH_YREG_U32(a_u32Dst, a_iYRegSrc) NOP()
789#define IEM_MC_FETCH_YREG_U64(a_u64Dst, a_iYRegSrc, a_iQWord) NOP()
790#define IEM_MC_FETCH_YREG_U128(a_u128Dst, a_iYRegSrc, a_iDQWord) NOP()
791#define IEM_MC_FETCH_YREG_U256(a_u256Dst, a_iYRegSrc) NOP()
792#define IEM_MC_FETCH_YREG_YMM(a_uYmmDst, a_iYRegSrc) NOP()
793
794#define IEM_MC_STORE_YREG_U128(a_iYRegDst, a_iDQword, a_u128Value) NOP()
795
796#define IEM_MC_INT_CLEAR_ZMM_256_UP(a_iXRegDst) NOP()
797#define IEM_MC_STORE_YREG_U32_ZX_VLMAX(a_iYRegDst, a_u32Src) NOP()
798#define IEM_MC_STORE_YREG_U64_ZX_VLMAX(a_iYRegDst, a_u64Src) NOP()
799#define IEM_MC_STORE_YREG_U128_ZX_VLMAX(a_iYRegDst, a_u128Src) NOP()
800#define IEM_MC_STORE_YREG_U256_ZX_VLMAX(a_iYRegDst, a_u256Src) NOP()
801#define IEM_MC_STORE_YREG_YMM_ZX_VLMAX(a_iYRegDst, a_uYmmSrc) NOP()
802
803#define IEM_MC_STORE_YREG_U32_U256(a_iYRegDst, a_iDwDst, a_u256Value, a_iDwSrc) NOP()
804#define IEM_MC_STORE_YREG_U64_U256(a_iYRegDst, a_iQwDst, a_u256Value, a_iQwSrc) NOP()
805#define IEM_MC_STORE_YREG_U64(a_iYRegDst, a_iQword, a_u64Value) NOP()
806
807#define IEM_MC_BROADCAST_YREG_U8_ZX_VLMAX(a_iYRegDst, a_u8Src) NOP()
808#define IEM_MC_BROADCAST_YREG_U16_ZX_VLMAX(a_iYRegDst, a_u16Src) NOP()
809#define IEM_MC_BROADCAST_YREG_U32_ZX_VLMAX(a_iYRegDst, a_u32Src) NOP()
810#define IEM_MC_BROADCAST_YREG_U64_ZX_VLMAX(a_iYRegDst, a_u64Src) NOP()
811#define IEM_MC_BROADCAST_YREG_U128_ZX_VLMAX(a_iYRegDst, a_u128Src) NOP()
812
813#define IEM_MC_REF_YREG_U128(a_pu128Dst, a_iYReg) NOP()
814#define IEM_MC_REF_YREG_U128_CONST(a_pu128Dst, a_iYReg) NOP()
815#define IEM_MC_REF_YREG_U64_CONST(a_pu64Dst, a_iYReg) NOP()
816#define IEM_MC_CLEAR_YREG_128_UP(a_iYReg) NOP()
817
818#define IEM_MC_COPY_YREG_U256_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) NOP()
819#define IEM_MC_COPY_YREG_U128_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) NOP()
820#define IEM_MC_COPY_YREG_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) NOP()
821
822#define IEM_MC_MERGE_YREG_U32_U96_ZX_VLMAX(a_iYRegDst, a_iYRegSrc32, a_iYRegSrcHx) NOP()
823#define IEM_MC_MERGE_YREG_U64_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) NOP()
824#define IEM_MC_MERGE_YREG_U64LO_U64LO_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) NOP()
825#define IEM_MC_MERGE_YREG_U64HI_U64HI_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) NOP()
826#define IEM_MC_MERGE_YREG_U64LO_U64LOCAL_ZX_VLMAX(a_iYRegDst, a_iYRegSrcHx, a_u64Local) NOP()
827#define IEM_MC_MERGE_YREG_U64LOCAL_U64HI_ZX_VLMAX(a_iYRegDst, a_u64Local, a_iYRegSrcHx) NOP()
828
829#define IEM_MC_CLEAR_ZREG_256_UP(a_iYReg) NOP()
830
831#define IEM_MC_FETCH_MEM_U8(a_u8Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
832#define IEM_MC_FETCH_MEM16_U8(a_u8Dst, a_iSeg, a_GCPtrMem16) IEM_LIVENESS_MEM(a_iSeg)
833#define IEM_MC_FETCH_MEM32_U8(a_u8Dst, a_iSeg, a_GCPtrMem32) IEM_LIVENESS_MEM(a_iSeg)
834
835#define IEM_MC_FETCH_MEM_FLAT_U8(a_u8Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
836#define IEM_MC_FETCH_MEM16_FLAT_U8(a_u8Dst, a_GCPtrMem16) IEM_LIVENESS_MEM_FLAT()
837#define IEM_MC_FETCH_MEM32_FLAT_U8(a_u8Dst, a_GCPtrMem32) IEM_LIVENESS_MEM_FLAT()
838
839#define IEM_MC_FETCH_MEM_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
840#define IEM_MC_FETCH_MEM_U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
841#define IEM_MC_FETCH_MEM_I16(a_i16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
842#define IEM_MC_FETCH_MEM_I16_DISP(a_i16Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
843
844#define IEM_MC_FETCH_MEM_FLAT_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
845#define IEM_MC_FETCH_MEM_FLAT_U16_DISP(a_u16Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
846#define IEM_MC_FETCH_MEM_FLAT_I16(a_i16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
847#define IEM_MC_FETCH_MEM_FLAT_I16_DISP(a_i16Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
848
849#define IEM_MC_FETCH_MEM_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
850#define IEM_MC_FETCH_MEM_U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
851#define IEM_MC_FETCH_MEM_I32(a_i32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
852#define IEM_MC_FETCH_MEM_I32_DISP(a_i32Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
853
854#define IEM_MC_FETCH_MEM_FLAT_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
855#define IEM_MC_FETCH_MEM_FLAT_U32_DISP(a_u32Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
856#define IEM_MC_FETCH_MEM_FLAT_I32(a_i32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
857#define IEM_MC_FETCH_MEM_FLAT_I32_DISP(a_i32Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
858
859#define IEM_MC_FETCH_MEM_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
860#define IEM_MC_FETCH_MEM_U64_DISP(a_u64Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
861#define IEM_MC_FETCH_MEM_U64_ALIGN_U128(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
862#define IEM_MC_FETCH_MEM_I64(a_i64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
863
864#define IEM_MC_FETCH_MEM_FLAT_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
865#define IEM_MC_FETCH_MEM_FLAT_U64_DISP(a_u64Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
866#define IEM_MC_FETCH_MEM_FLAT_U64_ALIGN_U128(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
867#define IEM_MC_FETCH_MEM_FLAT_I64(a_i64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
868
869#define IEM_MC_FETCH_MEM_R32(a_r32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
870#define IEM_MC_FETCH_MEM_R64(a_r64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
871#define IEM_MC_FETCH_MEM_R80(a_r80Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
872#define IEM_MC_FETCH_MEM_D80(a_d80Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
873
874#define IEM_MC_FETCH_MEM_FLAT_R32(a_r32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
875#define IEM_MC_FETCH_MEM_FLAT_R64(a_r64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
876#define IEM_MC_FETCH_MEM_FLAT_R80(a_r80Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
877#define IEM_MC_FETCH_MEM_FLAT_D80(a_d80Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
878
879#define IEM_MC_FETCH_MEM_U128(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
880#define IEM_MC_FETCH_MEM_U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
881#define IEM_MC_FETCH_MEM_U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
882
883#define IEM_MC_FETCH_MEM_XMM(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
884#define IEM_MC_FETCH_MEM_XMM_NO_AC(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
885#define IEM_MC_FETCH_MEM_XMM_ALIGN_SSE(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
886
887#define IEM_MC_FETCH_MEM_FLAT_U128(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
888#define IEM_MC_FETCH_MEM_FLAT_U128_NO_AC(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
889#define IEM_MC_FETCH_MEM_FLAT_U128_ALIGN_SSE(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
890
891#define IEM_MC_FETCH_MEM_FLAT_XMM(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
892#define IEM_MC_FETCH_MEM_FLAT_XMM_NO_AC(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
893#define IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
894
895#define IEM_MC_FETCH_MEM_U128_AND_XREG_U128(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
896#define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128(a_Dst, a_iXReg1, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
897
898#define IEM_MC_FETCH_MEM_XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
899#define IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
900#define IEM_MC_FETCH_MEM_XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
901#define IEM_MC_FETCH_MEM_FLAT_XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
902#define IEM_MC_FETCH_MEM_XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
903#define IEM_MC_FETCH_MEM_FLAT_XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
904
905#define IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \
906 do { IEM_LIVENESS_MEM(a_iSeg2); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
907#define IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \
908 do { IEM_LIVENESS_MEM(a_iSeg2); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
909
910#define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_GCPtrMem2) \
911 do { IEM_LIVENESS_MEM_FLAT(); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
912#define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_GCPtrMem2) \
913 do { IEM_LIVENESS_MEM_FLAT(); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
914
915
916#define IEM_MC_FETCH_MEM_U256(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
917#define IEM_MC_FETCH_MEM_U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
918#define IEM_MC_FETCH_MEM_U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
919
920#define IEM_MC_FETCH_MEM_YMM(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
921#define IEM_MC_FETCH_MEM_YMM_NO_AC(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
922#define IEM_MC_FETCH_MEM_YMM_ALIGN_AVX(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
923
924#define IEM_MC_FETCH_MEM_FLAT_U256(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
925#define IEM_MC_FETCH_MEM_FLAT_U256_NO_AC(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
926#define IEM_MC_FETCH_MEM_FLAT_U256_ALIGN_AVX(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
927
928#define IEM_MC_FETCH_MEM_FLAT_YMM(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
929#define IEM_MC_FETCH_MEM_FLAT_YMM_NO_AC(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
930#define IEM_MC_FETCH_MEM_FLAT_YMM_ALIGN_AVX(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
931
932#define IEM_MC_FETCH_MEM_U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
933#define IEM_MC_FETCH_MEM_U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
934#define IEM_MC_FETCH_MEM_U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
935#define IEM_MC_FETCH_MEM_U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
936#define IEM_MC_FETCH_MEM_U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
937#define IEM_MC_FETCH_MEM_U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
938
939#define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
940#define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
941#define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
942#define IEM_MC_FETCH_MEM_FLAT_U16_ZX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
943#define IEM_MC_FETCH_MEM_FLAT_U16_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
944#define IEM_MC_FETCH_MEM_FLAT_U32_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
945
946#define IEM_MC_FETCH_MEM_U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
947#define IEM_MC_FETCH_MEM_U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
948#define IEM_MC_FETCH_MEM_U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
949#define IEM_MC_FETCH_MEM_U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
950#define IEM_MC_FETCH_MEM_U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
951#define IEM_MC_FETCH_MEM_U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
952
953#define IEM_MC_FETCH_MEM_FLAT_U8_SX_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
954#define IEM_MC_FETCH_MEM_FLAT_U8_SX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
955#define IEM_MC_FETCH_MEM_FLAT_U8_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
956#define IEM_MC_FETCH_MEM_FLAT_U16_SX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
957#define IEM_MC_FETCH_MEM_FLAT_U16_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
958#define IEM_MC_FETCH_MEM_FLAT_U32_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
959
960#define IEM_MC_STORE_MEM_U8(a_iSeg, a_GCPtrMem, a_u8Value) IEM_LIVENESS_MEM(a_iSeg)
961#define IEM_MC_STORE_MEM_U16(a_iSeg, a_GCPtrMem, a_u16Value) IEM_LIVENESS_MEM(a_iSeg)
962#define IEM_MC_STORE_MEM_U32(a_iSeg, a_GCPtrMem, a_u32Value) IEM_LIVENESS_MEM(a_iSeg)
963#define IEM_MC_STORE_MEM_U64(a_iSeg, a_GCPtrMem, a_u64Value) IEM_LIVENESS_MEM(a_iSeg)
964
965#define IEM_MC_STORE_MEM_FLAT_U8(a_GCPtrMem, a_u8Value) IEM_LIVENESS_MEM_FLAT()
966#define IEM_MC_STORE_MEM_FLAT_U16(a_GCPtrMem, a_u16Value) IEM_LIVENESS_MEM_FLAT()
967#define IEM_MC_STORE_MEM_FLAT_U32(a_GCPtrMem, a_u32Value) IEM_LIVENESS_MEM_FLAT()
968#define IEM_MC_STORE_MEM_FLAT_U64(a_GCPtrMem, a_u64Value) IEM_LIVENESS_MEM_FLAT()
969
970#define IEM_MC_STORE_MEM_U8_CONST(a_iSeg, a_GCPtrMem, a_u8C) IEM_LIVENESS_MEM(a_iSeg)
971#define IEM_MC_STORE_MEM_U16_CONST(a_iSeg, a_GCPtrMem, a_u16C) IEM_LIVENESS_MEM(a_iSeg)
972#define IEM_MC_STORE_MEM_U32_CONST(a_iSeg, a_GCPtrMem, a_u32C) IEM_LIVENESS_MEM(a_iSeg)
973#define IEM_MC_STORE_MEM_U64_CONST(a_iSeg, a_GCPtrMem, a_u64C) IEM_LIVENESS_MEM(a_iSeg)
974
975#define IEM_MC_STORE_MEM_FLAT_U8_CONST(a_GCPtrMem, a_u8C) IEM_LIVENESS_MEM_FLAT()
976#define IEM_MC_STORE_MEM_FLAT_U16_CONST(a_GCPtrMem, a_u16C) IEM_LIVENESS_MEM_FLAT()
977#define IEM_MC_STORE_MEM_FLAT_U32_CONST(a_GCPtrMem, a_u32C) IEM_LIVENESS_MEM_FLAT()
978#define IEM_MC_STORE_MEM_FLAT_U64_CONST(a_GCPtrMem, a_u64C) IEM_LIVENESS_MEM_FLAT()
979
980#define IEM_MC_STORE_MEM_I8_CONST_BY_REF( a_pi8Dst, a_i8C) NOP()
981#define IEM_MC_STORE_MEM_I16_CONST_BY_REF(a_pi16Dst, a_i16C) NOP()
982#define IEM_MC_STORE_MEM_I32_CONST_BY_REF(a_pi32Dst, a_i32C) NOP()
983#define IEM_MC_STORE_MEM_I64_CONST_BY_REF(a_pi64Dst, a_i64C) NOP()
984#define IEM_MC_STORE_MEM_NEG_QNAN_R32_BY_REF(a_pr32Dst) NOP()
985#define IEM_MC_STORE_MEM_NEG_QNAN_R64_BY_REF(a_pr64Dst) NOP()
986#define IEM_MC_STORE_MEM_NEG_QNAN_R80_BY_REF(a_pr80Dst) NOP()
987#define IEM_MC_STORE_MEM_INDEF_D80_BY_REF(a_pd80Dst) NOP()
988
989#define IEM_MC_STORE_MEM_U128(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM(a_iSeg)
990#define IEM_MC_STORE_MEM_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM(a_iSeg)
991#define IEM_MC_STORE_MEM_U128_NO_AC(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM(a_iSeg)
992
993#define IEM_MC_STORE_MEM_FLAT_U128(a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_FLAT()
994#define IEM_MC_STORE_MEM_FLAT_U128_ALIGN_SSE(a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_FLAT()
995#define IEM_MC_STORE_MEM_FLAT_U128_NO_AC(a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_FLAT()
996
997#define IEM_MC_STORE_MEM_U256(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM(a_iSeg)
998#define IEM_MC_STORE_MEM_U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM(a_iSeg)
999#define IEM_MC_STORE_MEM_U256_NO_AC(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM(a_iSeg)
1000
1001#define IEM_MC_STORE_MEM_FLAT_U256(a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_FLAT()
1002#define IEM_MC_STORE_MEM_FLAT_U256_ALIGN_AVX(a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_FLAT()
1003#define IEM_MC_STORE_MEM_FLAT_U256_NO_AC(a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_FLAT()
1004
1005#define IEM_MC_PUSH_U16(a_u16Value) IEM_LIVENESS_STACK()
1006#define IEM_MC_PUSH_U32(a_u32Value) IEM_LIVENESS_STACK()
1007#define IEM_MC_PUSH_U32_SREG(a_uSegVal) IEM_LIVENESS_STACK()
1008#define IEM_MC_PUSH_U64(a_u64Value) IEM_LIVENESS_STACK()
1009
1010#define IEM_MC_POP_GREG_U16(a_iGReg) do { IEM_LIVENESS_STACK(); IEM_LIVENESS_GPR_MODIFY(a_iGReg); } while (0)
1011#define IEM_MC_POP_GREG_U32(a_iGReg) do { IEM_LIVENESS_STACK(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
1012#define IEM_MC_POP_GREG_U64(a_iGReg) do { IEM_LIVENESS_STACK(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
1013
1014/* 32-bit flat stack push and pop: */
1015#define IEM_MC_FLAT32_PUSH_U16(a_u16Value) IEM_LIVENESS_STACK_FLAT()
1016#define IEM_MC_FLAT32_PUSH_U32(a_u32Value) IEM_LIVENESS_STACK_FLAT()
1017#define IEM_MC_FLAT32_PUSH_U32_SREG(a_uSegVal) IEM_LIVENESS_STACK_FLAT()
1018
1019#define IEM_MC_FLAT32_POP_GREG_U16(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_MODIFY(a_iGReg); } while (0)
1020#define IEM_MC_FLAT32_POP_GREG_U32(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
1021
1022/* 64-bit flat stack push and pop: */
1023#define IEM_MC_FLAT64_PUSH_U16(a_u16Value) IEM_LIVENESS_STACK_FLAT()
1024#define IEM_MC_FLAT64_PUSH_U64(a_u64Value) IEM_LIVENESS_STACK_FLAT()
1025
1026#define IEM_MC_FLAT64_POP_GREG_U16(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_MODIFY(a_iGReg); } while (0)
1027#define IEM_MC_FLAT64_POP_GREG_U64(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
1028
1029
1030#define IEM_MC_MEM_MAP_U8_ATOMIC(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1031#define IEM_MC_MEM_MAP_U8_RW(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1032#define IEM_MC_MEM_MAP_U8_WO(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1033#define IEM_MC_MEM_MAP_U8_RO(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1034#define IEM_MC_MEM_FLAT_MAP_U8_ATOMIC(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1035#define IEM_MC_MEM_FLAT_MAP_U8_RW(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1036#define IEM_MC_MEM_FLAT_MAP_U8_WO(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1037#define IEM_MC_MEM_FLAT_MAP_U8_RO(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1038#define IEM_MC_MEM_MAP_U16_ATOMIC(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1039#define IEM_MC_MEM_MAP_U16_RW(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1040#define IEM_MC_MEM_MAP_U16_WO(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1041#define IEM_MC_MEM_MAP_U16_RO(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1042#define IEM_MC_MEM_FLAT_MAP_U16_ATOMIC(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1043#define IEM_MC_MEM_FLAT_MAP_U16_RW(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1044#define IEM_MC_MEM_FLAT_MAP_U16_WO(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1045#define IEM_MC_MEM_FLAT_MAP_U16_RO(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1046#define IEM_MC_MEM_MAP_I16_WO(a_pi16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1047#define IEM_MC_MEM_FLAT_MAP_I16_WO(a_pi16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1048#define IEM_MC_MEM_MAP_U32_ATOMIC(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1049#define IEM_MC_MEM_MAP_U32_RW(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1050#define IEM_MC_MEM_MAP_U32_WO(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1051#define IEM_MC_MEM_MAP_U32_RO(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1052#define IEM_MC_MEM_FLAT_MAP_U32_ATOMIC(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1053#define IEM_MC_MEM_FLAT_MAP_U32_RW(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1054#define IEM_MC_MEM_FLAT_MAP_U32_WO(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1055#define IEM_MC_MEM_FLAT_MAP_U32_RO(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1056#define IEM_MC_MEM_MAP_I32_WO(a_pi32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1057#define IEM_MC_MEM_FLAT_MAP_I32_WO(a_pi32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1058#define IEM_MC_MEM_MAP_R32_WO(a_pr32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1059#define IEM_MC_MEM_FLAT_MAP_R32_WO(a_pr32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1060#define IEM_MC_MEM_MAP_U64_ATOMIC(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1061#define IEM_MC_MEM_MAP_U64_RW(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1062#define IEM_MC_MEM_MAP_U64_WO(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1063#define IEM_MC_MEM_MAP_U64_RO(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1064#define IEM_MC_MEM_FLAT_MAP_U64_ATOMIC(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1065#define IEM_MC_MEM_FLAT_MAP_U64_RW(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1066#define IEM_MC_MEM_FLAT_MAP_U64_WO(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1067#define IEM_MC_MEM_FLAT_MAP_U64_RO(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1068#define IEM_MC_MEM_MAP_I64_WO(a_pi64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1069#define IEM_MC_MEM_FLAT_MAP_I64_WO(a_pi64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1070#define IEM_MC_MEM_MAP_R64_WO(a_pr64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1071#define IEM_MC_MEM_FLAT_MAP_R64_WO(a_pr64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1072#define IEM_MC_MEM_MAP_U128_ATOMIC(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1073#define IEM_MC_MEM_MAP_U128_RW(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1074#define IEM_MC_MEM_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1075#define IEM_MC_MEM_MAP_U128_RO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1076#define IEM_MC_MEM_FLAT_MAP_U128_ATOMIC(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1077#define IEM_MC_MEM_FLAT_MAP_U128_RW(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1078#define IEM_MC_MEM_FLAT_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1079#define IEM_MC_MEM_FLAT_MAP_U128_RO(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1080#define IEM_MC_MEM_MAP_R80_WO(a_pr80Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1081#define IEM_MC_MEM_FLAT_MAP_R80_WO(a_pr80Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1082#define IEM_MC_MEM_MAP_D80_WO(a_pd80Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1083#define IEM_MC_MEM_FLAT_MAP_D80_WO(a_pd80Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1084
1085
1086#define IEM_MC_MEM_COMMIT_AND_UNMAP_RW(a_bMapInfo) NOP()
1087#define IEM_MC_MEM_COMMIT_AND_UNMAP_ATOMIC(a_bMapInfo) NOP()
1088#define IEM_MC_MEM_COMMIT_AND_UNMAP_WO(a_bMapInfo) NOP()
1089#define IEM_MC_MEM_COMMIT_AND_UNMAP_RO(a_bMapInfo) NOP()
1090#define IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(a_bMapInfo, a_u16FSW) NOP()
1091#define IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(a_bMapInfo) NOP()
1092
1093#define IEM_MC_NATIVE_IF(a_fSupportedHosts) {
1094#define IEM_MC_NATIVE_ELSE() } {
1095#define IEM_MC_NATIVE_ENDIF() } ((void)0)
1096
1097#define IEM_MC_NATIVE_EMIT_0(a_fnEmitter)
1098#define IEM_MC_NATIVE_EMIT_1(a_fnEmitter, a0) NOP()
1099#define IEM_MC_NATIVE_EMIT_2(a_fnEmitter, a0, a1) NOP()
1100#define IEM_MC_NATIVE_EMIT_2_EX(a_fnEmitter, a0, a1) NOP()
1101#define IEM_MC_NATIVE_EMIT_3(a_fnEmitter, a0, a1, a2) NOP()
1102#define IEM_MC_NATIVE_EMIT_4(a_fnEmitter, a0, a1, a2, a3) NOP()
1103#define IEM_MC_NATIVE_EMIT_5(a_fnEmitter, a0, a1, a2, a3, a4) NOP()
1104#define IEM_MC_NATIVE_EMIT_6(a_fnEmitter, a0, a1, a2, a3, a4, a5) NOP()
1105#define IEM_MC_NATIVE_EMIT_7(a_fnEmitter, a0, a1, a2, a3, a4, a5, a6) NOP()
1106#define IEM_MC_NATIVE_EMIT_8(a_fnEmitter, a0, a1, a2, a3, a4, a5, a6, a7) NOP()
1107
1108#define IEM_MC_NATIVE_SET_AMD64_HOST_REG_FOR_LOCAL(a_VarNm, a_idxHostReg) NOP()
1109
1110#define IEM_MC_CALL_VOID_AIMPL_0(a_pfn) NOP()
1111#define IEM_MC_CALL_VOID_AIMPL_1(a_pfn, a0) NOP()
1112#define IEM_MC_CALL_VOID_AIMPL_2(a_pfn, a0, a1) NOP()
1113#define IEM_MC_CALL_VOID_AIMPL_3(a_pfn, a0, a1, a2) NOP()
1114#define IEM_MC_CALL_VOID_AIMPL_4(a_pfn, a0, a1, a2, a3) NOP()
1115#define IEM_MC_CALL_AIMPL_3(a_rcType, a_rc, a_pfn, a0, a1, a2) NOP()
1116#define IEM_MC_CALL_AIMPL_4(a_rcType, a_rc, a_pfn, a0, a1, a2, a3) NOP()
1117
1118#define IEM_MC_CALL_FPU_AIMPL_1(a_pfnAImpl, a0) NOP()
1119#define IEM_MC_CALL_FPU_AIMPL_2(a_pfnAImpl, a0, a1) NOP()
1120#define IEM_MC_CALL_FPU_AIMPL_3(a_pfnAImpl, a0, a1, a2) NOP()
1121
1122#define IEM_MC_SET_FPU_RESULT(a_FpuData, a_FSW, a_pr80Value) NOP()
1123
1124#define IEM_MC_PUSH_FPU_RESULT(a_FpuData, a_uFpuOpcode) NOP()
1125#define IEM_MC_PUSH_FPU_RESULT_MEM_OP(a_FpuData, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1126#define IEM_MC_PUSH_FPU_RESULT_TWO(a_FpuDataTwo, a_uFpuOpcode) NOP()
1127
1128#define IEM_MC_STORE_FPU_RESULT(a_FpuData, a_iStReg, a_uFpuOpcode) NOP()
1129#define IEM_MC_STORE_FPU_RESULT_THEN_POP(a_FpuData, a_iStReg, a_uFpuOpcode) NOP()
1130#define IEM_MC_STORE_FPU_RESULT_MEM_OP(a_FpuData, a_iStReg, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1131#define IEM_MC_STORE_FPU_RESULT_WITH_MEM_OP_THEN_POP(a_FpuData, a_iStReg, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1132
1133#define IEM_MC_UPDATE_FPU_OPCODE_IP(a_uFpuOpcode) NOP()
1134#define IEM_MC_FPU_STACK_FREE(a_iStReg) NOP()
1135#define IEM_MC_FPU_STACK_INC_TOP() NOP()
1136#define IEM_MC_FPU_STACK_DEC_TOP() NOP()
1137
1138#define IEM_MC_UPDATE_FSW(a_u16FSW, a_uFpuOpcode) NOP()
1139#define IEM_MC_UPDATE_FSW_CONST(a_u16FSW, a_uFpuOpcode) NOP()
1140#define IEM_MC_UPDATE_FSW_WITH_MEM_OP(a_u16FSW, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1141#define IEM_MC_UPDATE_FSW_THEN_POP(a_u16FSW, a_uFpuOpcode) NOP()
1142#define IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(a_u16FSW, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1143#define IEM_MC_UPDATE_FSW_THEN_POP_POP(a_u16FSW, a_uFpuOpcode) NOP()
1144
1145#define IEM_MC_FPU_STACK_UNDERFLOW(a_iStDst, a_uFpuOpcode) NOP()
1146#define IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP(a_iStDst, a_uFpuOpcode) NOP()
1147#define IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(a_iStDst, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1148#define IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(a_iStDst, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1149#define IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP_POP(a_uFpuOpcode) NOP()
1150#define IEM_MC_FPU_STACK_PUSH_UNDERFLOW(a_uFpuOpcode) NOP()
1151#define IEM_MC_FPU_STACK_PUSH_UNDERFLOW_TWO(a_uFpuOpcode) NOP()
1152
1153#define IEM_MC_FPU_STACK_PUSH_OVERFLOW(a_uFpuOpcode) NOP()
1154#define IEM_MC_FPU_STACK_PUSH_OVERFLOW_MEM_OP(a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1155
1156#define IEM_MC_PREPARE_FPU_USAGE() IEM_LIVENESS_MXCSR_INPUT() /* fxrstor */
1157#define IEM_MC_ACTUALIZE_FPU_STATE_FOR_READ() IEM_LIVENESS_MXCSR_INPUT()
1158#define IEM_MC_ACTUALIZE_FPU_STATE_FOR_CHANGE() IEM_LIVENESS_MXCSR_INPUT()
1159
1160#define IEM_MC_PREPARE_SSE_USAGE() IEM_LIVENESS_MXCSR_INPUT()
1161#define IEM_MC_ACTUALIZE_SSE_STATE_FOR_READ() IEM_LIVENESS_MXCSR_INPUT()
1162#define IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE() IEM_LIVENESS_MXCSR_INPUT()
1163
1164#define IEM_MC_PREPARE_AVX_USAGE() IEM_LIVENESS_MXCSR_INPUT()
1165#define IEM_MC_ACTUALIZE_AVX_STATE_FOR_READ() IEM_LIVENESS_MXCSR_INPUT()
1166#define IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE() IEM_LIVENESS_MXCSR_INPUT()
1167
1168#define IEM_MC_CALL_MMX_AIMPL_2(a_pfnAImpl, a0, a1) NOP()
1169#define IEM_MC_CALL_MMX_AIMPL_3(a_pfnAImpl, a0, a1, a2) NOP()
1170#define IEM_MC_CALL_SSE_AIMPL_2(a_pfnAImpl, a0, a1) IEM_LIVENESS_MXCSR_MODIFY(); IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_CR4_INPUT()
1171#define IEM_MC_CALL_SSE_AIMPL_3(a_pfnAImpl, a0, a1, a2) IEM_LIVENESS_MXCSR_MODIFY(); IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_CR4_INPUT()
1172#define IEM_MC_CALL_AVX_AIMPL_2(a_pfnAImpl, a0, a1) IEM_LIVENESS_MXCSR_MODIFY(); IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_CR4_INPUT()
1173#define IEM_MC_CALL_AVX_AIMPL_3(a_pfnAImpl, a0, a1, a2) IEM_LIVENESS_MXCSR_MODIFY(); IEM_LIVENESS_MARK_POTENTIAL_CALL(); IEM_LIVENESS_CR4_INPUT()
1174
1175#define IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit) \
1176 do { if ( (a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \
1177 else if ((a_fBit) == X86_EFL_PF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflPf); \
1178 else if ((a_fBit) == X86_EFL_AF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflAf); \
1179 else if ((a_fBit) == X86_EFL_ZF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflZf); \
1180 else if ((a_fBit) == X86_EFL_SF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflSf); \
1181 else if ((a_fBit) == X86_EFL_OF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOf); \
1182 else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); /* loadsb and friends */ \
1183 else { AssertMsgFailed(("#s (%#x)\n", #a_fBit, (a_fBit))); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
1184 } while (0)
1185
1186#define IEM_MC_IF_EFL_BIT_SET(a_fBit) IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1187#define IEM_MC_IF_EFL_BIT_NOT_SET(a_fBit) IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1188#define IEM_MC_IF_EFL_ANY_BITS_SET(a_fBits) \
1189 do { if ((a_fBits) == (X86_EFL_CF | X86_EFL_ZF)) \
1190 { IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflZf); } \
1191 else { AssertMsgFailed(("#s (%#x)\n", #a_fBits, (a_fBits))); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
1192 } while (0); {
1193#define IEM_MC_IF_EFL_NO_BITS_SET(a_fBits) \
1194 do { if ((a_fBits) == (X86_EFL_CF | X86_EFL_ZF)) \
1195 { IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflZf); } \
1196 else { AssertMsgFailed(("#s (%#x)\n", #a_fBits, (a_fBits))); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
1197 } while (0); {
1198#define IEM_MC_IF_EFL_BITS_NE(a_fBit1, a_fBit2) \
1199 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1200 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1201#define IEM_MC_IF_EFL_BITS_EQ(a_fBit1, a_fBit2) \
1202 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1203 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1204#define IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(a_fBit, a_fBit1, a_fBit2) \
1205 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); \
1206 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1207 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1208#define IEM_MC_IF_EFL_BIT_NOT_SET_AND_BITS_EQ(a_fBit, a_fBit1, a_fBit2) \
1209 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); \
1210 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1211 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1212#define IEM_MC_IF_CX_IS_NZ() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1213#define IEM_MC_IF_ECX_IS_NZ() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1214#define IEM_MC_IF_RCX_IS_NZ() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1215#define IEM_MC_IF_CX_IS_NOT_ONE() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1216#define IEM_MC_IF_ECX_IS_NOT_ONE() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1217#define IEM_MC_IF_RCX_IS_NOT_ONE() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1218#define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \
1219 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1220 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1221#define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \
1222 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1223 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1224#define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \
1225 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1226 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1227#define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \
1228 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1229 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1230#define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \
1231 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1232 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1233#define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \
1234 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1235 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1236#define IEM_MC_IF_LOCAL_IS_Z(a_Local) {
1237#define IEM_MC_IF_GREG_BIT_SET(a_iGReg, a_iBitNo) IEM_LIVENESS_GPR_INPUT(a_iGReg); {
1238
1239#define IEM_MC_REF_FPUREG(a_pr80Dst, a_iSt) NOP()
1240#define IEM_MC_IF_FPUREG_IS_EMPTY(a_iSt) {
1241#define IEM_MC_IF_FPUREG_NOT_EMPTY(a_iSt) {
1242#define IEM_MC_IF_FPUREG_NOT_EMPTY_REF_R80(a_pr80Dst, a_iSt) {
1243#define IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(a_pr80Dst0, a_iSt0, a_pr80Dst1, a_iSt1) {
1244#define IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(a_pr80Dst0, a_iSt0, a_iSt1) {
1245#define IEM_MC_IF_FCW_IM() {
1246
1247#define IEM_MC_ELSE() } /*else*/ {
1248#define IEM_MC_ENDIF() } do {} while (0)
1249
1250#define IEM_MC_HINT_FLUSH_GUEST_SHADOW(g_fGstShwFlush) NOP()
1251
1252#define IEM_MC_LIVENESS_GREG_INPUT(a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
1253#define IEM_MC_LIVENESS_GREG_CLOBBER(a_iGReg) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
1254#define IEM_MC_LIVENESS_GREG_MODIFY(a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
1255
1256#define IEM_MC_LIVENESS_MREG_INPUT(a_iMReg) NOP()
1257#define IEM_MC_LIVENESS_MREG_CLOBBER(a_iMReg) NOP()
1258#define IEM_MC_LIVENESS_MREG_MODIFY(a_iMReg) NOP()
1259
1260#define IEM_MC_LIVENESS_XREG_INPUT(a_iXReg) NOP()
1261#define IEM_MC_LIVENESS_XREG_CLOBBER(a_iXReg) NOP()
1262#define IEM_MC_LIVENESS_XREG_MODIFY(a_iXReg) NOP()
1263
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