IOMAll.cpp@ 48749

Last change on this file since 48749 was 45311, checked in by vboxsync, 12 years ago
IOM: Prepared for using read/write locking, still using the old exclusive stuff though. Found and fixed an REM/IOM lock order issue.
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 35.3 KB

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1	/* $Id: IOMAll.cpp 45311 2013-04-03 14:55:30Z vboxsync $ */
2	/** @file
3	* IOM - Input / Output Monitor - Any Context.
4	*/
5
6	/*
7	* Copyright (C) 2006-2013 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/*******************************************************************************
19	* Header Files *
20	*******************************************************************************/
21	#define LOG_GROUP LOG_GROUP_IOM
22	#include <VBox/vmm/iom.h>
23	#include <VBox/vmm/mm.h>
24	#if defined(IEM_VERIFICATION_MODE) && defined(IN_RING3)
25	# include <VBox/vmm/iem.h>
26	#endif
27	#include <VBox/param.h>
28	#include "IOMInternal.h"
29	#include <VBox/vmm/vm.h>
30	#include <VBox/vmm/vmm.h>
31	#include <VBox/vmm/selm.h>
32	#include <VBox/vmm/trpm.h>
33	#include <VBox/vmm/pdmdev.h>
34	#include <VBox/vmm/pgm.h>
35	#include <VBox/vmm/cpum.h>
36	#include <VBox/err.h>
37	#include <VBox/log.h>
38	#include <iprt/assert.h>
39	#include "IOMInline.h"
40
41
42	/**
43	* Check if this VCPU currently owns the IOM lock exclusively.
44	*
45	* @returns bool owner/not owner
46	* @param pVM Pointer to the VM.
47	*/
48	VMMDECL(bool) IOMIsLockWriteOwner(PVM pVM)
49	{
50	#ifdef IOM_WITH_CRIT_SECT_RW
51	return PDMCritSectRwIsInitialized(&pVM->iom.s.CritSect)
52	&& PDMCritSectRwIsWriteOwner(&pVM->iom.s.CritSect);
53	#else
54	return PDMCritSectIsOwner(&pVM->iom.s.CritSect);
55	#endif
56	}
57
58
59	/**
60	* Returns the contents of register or immediate data of instruction's parameter.
61	*
62	* @returns true on success.
63	*
64	* @todo Get rid of this code. Use DISQueryParamVal instead
65	*
66	* @param pCpu Pointer to current disassembler context.
67	* @param pParam Pointer to parameter of instruction to process.
68	* @param pRegFrame Pointer to CPUMCTXCORE guest structure.
69	* @param pu64Data Where to store retrieved data.
70	* @param pcbSize Where to store the size of data (1, 2, 4, 8).
71	*/
72	bool iomGetRegImmData(PDISCPUSTATE pCpu, PCDISOPPARAM pParam, PCPUMCTXCORE pRegFrame, uint64_t pu64Data, unsigned pcbSize)
73	{
74	NOREF(pCpu);
75	if (pParam->fUse & (DISUSE_BASE \| DISUSE_INDEX \| DISUSE_SCALE \| DISUSE_DISPLACEMENT8 \| DISUSE_DISPLACEMENT16 \| DISUSE_DISPLACEMENT32))
76	{
77	*pcbSize = 0;
78	*pu64Data = 0;
79	return false;
80	}
81
82	/* divide and conquer */
83	if (pParam->fUse & (DISUSE_REG_GEN64 \| DISUSE_REG_GEN32 \| DISUSE_REG_GEN16 \| DISUSE_REG_GEN8))
84	{
85	if (pParam->fUse & DISUSE_REG_GEN32)
86	{
87	*pcbSize = 4;
88	DISFetchReg32(pRegFrame, pParam->Base.idxGenReg, (uint32_t *)pu64Data);
89	return true;
90	}
91
92	if (pParam->fUse & DISUSE_REG_GEN16)
93	{
94	*pcbSize = 2;
95	DISFetchReg16(pRegFrame, pParam->Base.idxGenReg, (uint16_t *)pu64Data);
96	return true;
97	}
98
99	if (pParam->fUse & DISUSE_REG_GEN8)
100	{
101	*pcbSize = 1;
102	DISFetchReg8(pRegFrame, pParam->Base.idxGenReg, (uint8_t *)pu64Data);
103	return true;
104	}
105
106	Assert(pParam->fUse & DISUSE_REG_GEN64);
107	*pcbSize = 8;
108	DISFetchReg64(pRegFrame, pParam->Base.idxGenReg, pu64Data);
109	return true;
110	}
111	else
112	{
113	if (pParam->fUse & (DISUSE_IMMEDIATE64 \| DISUSE_IMMEDIATE64_SX8))
114	{
115	*pcbSize = 8;
116	*pu64Data = pParam->uValue;
117	return true;
118	}
119
120	if (pParam->fUse & (DISUSE_IMMEDIATE32 \| DISUSE_IMMEDIATE32_SX8))
121	{
122	*pcbSize = 4;
123	*pu64Data = (uint32_t)pParam->uValue;
124	return true;
125	}
126
127	if (pParam->fUse & (DISUSE_IMMEDIATE16 \| DISUSE_IMMEDIATE16_SX8))
128	{
129	*pcbSize = 2;
130	*pu64Data = (uint16_t)pParam->uValue;
131	return true;
132	}
133
134	if (pParam->fUse & DISUSE_IMMEDIATE8)
135	{
136	*pcbSize = 1;
137	*pu64Data = (uint8_t)pParam->uValue;
138	return true;
139	}
140
141	if (pParam->fUse & DISUSE_REG_SEG)
142	{
143	*pcbSize = 2;
144	DISFetchRegSeg(pRegFrame, (DISSELREG)pParam->Base.idxSegReg, (RTSEL *)pu64Data);
145	return true;
146	} /* Else - error. */
147
148	AssertFailed();
149	*pcbSize = 0;
150	*pu64Data = 0;
151	return false;
152	}
153	}
154
155
156	/**
157	* Saves data to 8/16/32 general purpose or segment register defined by
158	* instruction's parameter.
159	*
160	* @returns true on success.
161	* @param pCpu Pointer to current disassembler context.
162	* @param pParam Pointer to parameter of instruction to process.
163	* @param pRegFrame Pointer to CPUMCTXCORE guest structure.
164	* @param u64Data 8/16/32/64 bit data to store.
165	*/
166	bool iomSaveDataToReg(PDISCPUSTATE pCpu, PCDISOPPARAM pParam, PCPUMCTXCORE pRegFrame, uint64_t u64Data)
167	{
168	NOREF(pCpu);
169	if (pParam->fUse & (DISUSE_BASE \| DISUSE_INDEX \| DISUSE_SCALE \| DISUSE_DISPLACEMENT8 \| DISUSE_DISPLACEMENT16 \| DISUSE_DISPLACEMENT32 \| DISUSE_DISPLACEMENT64 \| DISUSE_IMMEDIATE8 \| DISUSE_IMMEDIATE16 \| DISUSE_IMMEDIATE32 \| DISUSE_IMMEDIATE32_SX8 \| DISUSE_IMMEDIATE16_SX8))
170	{
171	return false;
172	}
173
174	if (pParam->fUse & DISUSE_REG_GEN32)
175	{
176	DISWriteReg32(pRegFrame, pParam->Base.idxGenReg, (uint32_t)u64Data);
177	return true;
178	}
179
180	if (pParam->fUse & DISUSE_REG_GEN64)
181	{
182	DISWriteReg64(pRegFrame, pParam->Base.idxGenReg, u64Data);
183	return true;
184	}
185
186	if (pParam->fUse & DISUSE_REG_GEN16)
187	{
188	DISWriteReg16(pRegFrame, pParam->Base.idxGenReg, (uint16_t)u64Data);
189	return true;
190	}
191
192	if (pParam->fUse & DISUSE_REG_GEN8)
193	{
194	DISWriteReg8(pRegFrame, pParam->Base.idxGenReg, (uint8_t)u64Data);
195	return true;
196	}
197
198	if (pParam->fUse & DISUSE_REG_SEG)
199	{
200	DISWriteRegSeg(pRegFrame, (DISSELREG)pParam->Base.idxSegReg, (RTSEL)u64Data);
201	return true;
202	}
203
204	/* Else - error. */
205	return false;
206	}
207
208
209	//#undef LOG_GROUP
210	//#define LOG_GROUP LOG_GROUP_IOM_IOPORT
211
212	/**
213	* Reads an I/O port register.
214	*
215	* @returns Strict VBox status code. Informational status codes other than the one documented
216	* here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
217	* @retval VINF_SUCCESS Success.
218	* @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
219	* status code must be passed on to EM.
220	* @retval VINF_IOM_R3_IOPORT_READ Defer the read to ring-3. (R0/GC only)
221	*
222	* @param pVM Pointer to the VM.
223	* @param pVCpu Pointer to the virtual CPU structure of the caller.
224	* @param Port The port to read.
225	* @param pu32Value Where to store the value read.
226	* @param cbValue The size of the register to read in bytes. 1, 2 or 4 bytes.
227	*/
228	VMMDECL(VBOXSTRICTRC) IOMIOPortRead(PVM pVM, PVMCPU pVCpu, RTIOPORT Port, uint32_t *pu32Value, size_t cbValue)
229	{
230	/** @todo should initialize *pu32Value here because it can happen that some
231	* handle is buggy and doesn't handle all cases. */
232	/* Take the IOM lock before performing any device I/O. */
233	int rc2 = IOM_LOCK_SHARED(pVM);
234	#ifndef IN_RING3
235	if (rc2 == VERR_SEM_BUSY)
236	return VINF_IOM_R3_IOPORT_READ;
237	#endif
238	AssertRC(rc2);
239	#if defined(IEM_VERIFICATION_MODE) && defined(IN_RING3)
240	IEMNotifyIOPortRead(pVM, Port, cbValue);
241	#endif
242
243	#ifdef VBOX_WITH_STATISTICS
244	/*
245	* Get the statistics record.
246	*/
247	PIOMIOPORTSTATS pStats = pVCpu->iom.s.CTX_SUFF(pStatsLastRead);
248	if (!pStats \|\| pStats->Core.Key != Port)
249	{
250	pStats = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortStatTree, Port);
251	if (pStats)
252	pVCpu->iom.s.CTX_SUFF(pStatsLastRead) = pStats;
253	}
254	#endif
255
256	/*
257	* Get handler for current context.
258	*/
259	CTX_SUFF(PIOMIOPORTRANGE) pRange = pVCpu->iom.s.CTX_SUFF(pRangeLastRead);
260	if ( !pRange
261	\|\| (unsigned)Port - (unsigned)pRange->Port >= (unsigned)pRange->cPorts)
262	{
263	pRange = iomIOPortGetRange(pVM, Port);
264	if (pRange)
265	pVCpu->iom.s.CTX_SUFF(pRangeLastRead) = pRange;
266	}
267	MMHYPER_RC_ASSERT_RCPTR(pVM, pRange);
268	if (pRange)
269	{
270	/*
271	* Found a range, get the data in case we leave the IOM lock.
272	*/
273	PFNIOMIOPORTIN pfnInCallback = pRange->pfnInCallback;
274	#ifndef IN_RING3
275	if (!pfnInCallback)
276	{
277	STAM_STATS({ if (pStats) STAM_COUNTER_INC(&pStats->InRZToR3); });
278	IOM_UNLOCK_SHARED(pVM);
279	return VINF_IOM_R3_IOPORT_READ;
280	}
281	#endif
282	void *pvUser = pRange->pvUser;
283	PPDMDEVINS pDevIns = pRange->pDevIns;
284	IOM_UNLOCK_SHARED(pVM);
285
286	/*
287	* Call the device.
288	*/
289	VBOXSTRICTRC rcStrict = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_IOPORT_READ);
290	if (rcStrict != VINF_SUCCESS)
291	{
292	STAM_STATS({ if (pStats) STAM_COUNTER_INC(&pStats->InRZToR3); });
293	return rcStrict;
294	}
295	#ifdef VBOX_WITH_STATISTICS
296	if (pStats)
297	{
298	STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfIn), a);
299	rcStrict = pfnInCallback(pDevIns, pvUser, Port, pu32Value, (unsigned)cbValue);
300	STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfIn), a);
301	}
302	else
303	#endif
304	rcStrict = pfnInCallback(pDevIns, pvUser, Port, pu32Value, (unsigned)cbValue);
305	PDMCritSectLeave(pDevIns->CTX_SUFF(pCritSectRo));
306
307	#ifdef VBOX_WITH_STATISTICS
308	if (rcStrict == VINF_SUCCESS && pStats)
309	STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(In));
310	# ifndef IN_RING3
311	else if (rcStrict == VINF_IOM_R3_IOPORT_READ && pStats)
312	STAM_COUNTER_INC(&pStats->InRZToR3);
313	# endif
314	#endif
315	if (rcStrict == VERR_IOM_IOPORT_UNUSED)
316	{
317	/* make return value */
318	rcStrict = VINF_SUCCESS;
319	switch (cbValue)
320	{
321	case 1: (uint8_t )pu32Value = 0xff; break;
322	case 2: (uint16_t )pu32Value = 0xffff; break;
323	case 4: (uint32_t )pu32Value = UINT32_C(0xffffffff); break;
324	default:
325	AssertMsgFailed(("Invalid I/O port size %d. Port=%d\n", cbValue, Port));
326	return VERR_IOM_INVALID_IOPORT_SIZE;
327	}
328	}
329	Log3(("IOMIOPortRead: Port=%RTiop pu32=%08RX32 cb=%d rc=%Rrc\n", Port, pu32Value, cbValue, VBOXSTRICTRC_VAL(rcStrict)));
330	return rcStrict;
331	}
332
333	#ifndef IN_RING3
334	/*
335	* Handler in ring-3?
336	*/
337	PIOMIOPORTRANGER3 pRangeR3 = iomIOPortGetRangeR3(pVM, Port);
338	if (pRangeR3)
339	{
340	# ifdef VBOX_WITH_STATISTICS
341	if (pStats)
342	STAM_COUNTER_INC(&pStats->InRZToR3);
343	# endif
344	IOM_UNLOCK_SHARED(pVM);
345	return VINF_IOM_R3_IOPORT_READ;
346	}
347	#endif
348
349	/*
350	* Ok, no handler for this port.
351	*/
352	#ifdef VBOX_WITH_STATISTICS
353	if (pStats)
354	STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(In));
355	#endif
356
357	/* make return value */
358	switch (cbValue)
359	{
360	case 1: (uint8_t )pu32Value = 0xff; break;
361	case 2: (uint16_t )pu32Value = 0xffff; break;
362	case 4: (uint32_t )pu32Value = UINT32_C(0xffffffff); break;
363	default:
364	AssertMsgFailed(("Invalid I/O port size %d. Port=%d\n", cbValue, Port));
365	IOM_UNLOCK_SHARED(pVM);
366	return VERR_IOM_INVALID_IOPORT_SIZE;
367	}
368	Log3(("IOMIOPortRead: Port=%RTiop pu32=%08RX32 cb=%d rc=VINF_SUCCESS\n", Port, pu32Value, cbValue));
369	IOM_UNLOCK_SHARED(pVM);
370	return VINF_SUCCESS;
371	}
372
373
374	/**
375	* Reads the string buffer of an I/O port register.
376	*
377	* @returns Strict VBox status code. Informational status codes other than the one documented
378	* here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
379	* @retval VINF_SUCCESS Success.
380	* @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
381	* status code must be passed on to EM.
382	* @retval VINF_IOM_R3_IOPORT_READ Defer the read to ring-3. (R0/GC only)
383	*
384	* @param pVM Pointer to the VM.
385	* @param pVCpu Pointer to the virtual CPU structure of the caller.
386	* @param Port The port to read.
387	* @param pGCPtrDst Pointer to the destination buffer (GC, incremented appropriately).
388	* @param pcTransfers Pointer to the number of transfer units to read, on return remaining transfer units.
389	* @param cb Size of the transfer unit (1, 2 or 4 bytes).
390	*/
391	VMMDECL(VBOXSTRICTRC) IOMIOPortReadString(PVM pVM, PVMCPU pVCpu, RTIOPORT Port,
392	PRTGCPTR pGCPtrDst, PRTGCUINTREG pcTransfers, unsigned cb)
393	{
394	/* Take the IOM lock before performing any device I/O. */
395	int rc2 = IOM_LOCK_SHARED(pVM);
396	#ifndef IN_RING3
397	if (rc2 == VERR_SEM_BUSY)
398	return VINF_IOM_R3_IOPORT_READ;
399	#endif
400	AssertRC(rc2);
401	#if defined(IEM_VERIFICATION_MODE) && defined(IN_RING3)
402	IEMNotifyIOPortReadString(pVM, Port, pGCPtrDst, pcTransfers, cb);
403	#endif
404
405	#ifdef LOG_ENABLED
406	const RTGCUINTREG cTransfers = *pcTransfers;
407	#endif
408	#ifdef VBOX_WITH_STATISTICS
409	/*
410	* Get the statistics record.
411	*/
412	PIOMIOPORTSTATS pStats = pVCpu->iom.s.CTX_SUFF(pStatsLastRead);
413	if (!pStats \|\| pStats->Core.Key != Port)
414	{
415	pStats = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortStatTree, Port);
416	if (pStats)
417	pVCpu->iom.s.CTX_SUFF(pStatsLastRead) = pStats;
418	}
419	#endif
420
421	/*
422	* Get handler for current context.
423	*/
424	CTX_SUFF(PIOMIOPORTRANGE) pRange = pVCpu->iom.s.CTX_SUFF(pRangeLastRead);
425	if ( !pRange
426	\|\| (unsigned)Port - (unsigned)pRange->Port >= (unsigned)pRange->cPorts)
427	{
428	pRange = iomIOPortGetRange(pVM, Port);
429	if (pRange)
430	pVCpu->iom.s.CTX_SUFF(pRangeLastRead) = pRange;
431	}
432	MMHYPER_RC_ASSERT_RCPTR(pVM, pRange);
433	if (pRange)
434	{
435	/*
436	* Found a range.
437	*/
438	PFNIOMIOPORTINSTRING pfnInStrCallback = pRange->pfnInStrCallback;
439	#ifndef IN_RING3
440	if (!pfnInStrCallback)
441	{
442	STAM_STATS({ if (pStats) STAM_COUNTER_INC(&pStats->InRZToR3); });
443	IOM_UNLOCK_SHARED(pVM);
444	return VINF_IOM_R3_IOPORT_READ;
445	}
446	#endif
447	void *pvUser = pRange->pvUser;
448	PPDMDEVINS pDevIns = pRange->pDevIns;
449	IOM_UNLOCK_SHARED(pVM);
450
451	/*
452	* Call the device.
453	*/
454	VBOXSTRICTRC rcStrict = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_IOPORT_READ);
455	if (rcStrict != VINF_SUCCESS)
456	{
457	STAM_STATS({ if (pStats) STAM_COUNTER_INC(&pStats->InRZToR3); });
458	return rcStrict;
459	}
460	#ifdef VBOX_WITH_STATISTICS
461	if (pStats)
462	{
463	STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfIn), a);
464	rcStrict = pfnInStrCallback(pDevIns, pvUser, Port, pGCPtrDst, pcTransfers, cb);
465	STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfIn), a);
466	}
467	else
468	#endif
469	rcStrict = pfnInStrCallback(pDevIns, pvUser, Port, pGCPtrDst, pcTransfers, cb);
470	PDMCritSectLeave(pDevIns->CTX_SUFF(pCritSectRo));
471
472	#ifdef VBOX_WITH_STATISTICS
473	if (rcStrict == VINF_SUCCESS && pStats)
474	STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(In));
475	# ifndef IN_RING3
476	else if (rcStrict == VINF_IOM_R3_IOPORT_READ && pStats)
477	STAM_COUNTER_INC(&pStats->InRZToR3);
478	# endif
479	#endif
480	Log3(("IOMIOPortReadStr: Port=%RTiop pGCPtrDst=%p pcTransfer=%p:{%#x->%#x} cb=%d rc=%Rrc\n",
481	Port, pGCPtrDst, pcTransfers, cTransfers, *pcTransfers, cb, VBOXSTRICTRC_VAL(rcStrict)));
482	return rcStrict;
483	}
484
485	#ifndef IN_RING3
486	/*
487	* Handler in ring-3?
488	*/
489	PIOMIOPORTRANGER3 pRangeR3 = iomIOPortGetRangeR3(pVM, Port);
490	if (pRangeR3)
491	{
492	# ifdef VBOX_WITH_STATISTICS
493	if (pStats)
494	STAM_COUNTER_INC(&pStats->InRZToR3);
495	# endif
496	IOM_UNLOCK_SHARED(pVM);
497	return VINF_IOM_R3_IOPORT_READ;
498	}
499	#endif
500
501	/*
502	* Ok, no handler for this port.
503	*/
504	#ifdef VBOX_WITH_STATISTICS
505	if (pStats)
506	STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(In));
507	#endif
508
509	Log3(("IOMIOPortReadStr: Port=%RTiop pGCPtrDst=%p pcTransfer=%p:{%#x->%#x} cb=%d rc=VINF_SUCCESS\n",
510	Port, pGCPtrDst, pcTransfers, cTransfers, *pcTransfers, cb));
511	IOM_UNLOCK_SHARED(pVM);
512	return VINF_SUCCESS;
513	}
514
515
516	/**
517	* Writes to an I/O port register.
518	*
519	* @returns Strict VBox status code. Informational status codes other than the one documented
520	* here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
521	* @retval VINF_SUCCESS Success.
522	* @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
523	* status code must be passed on to EM.
524	* @retval VINF_IOM_R3_IOPORT_WRITE Defer the write to ring-3. (R0/GC only)
525	*
526	* @param pVM Pointer to the VM.
527	* @param pVCpu Pointer to the virtual CPU structure of the caller.
528	* @param Port The port to write to.
529	* @param u32Value The value to write.
530	* @param cbValue The size of the register to read in bytes. 1, 2 or 4 bytes.
531	*/
532	VMMDECL(VBOXSTRICTRC) IOMIOPortWrite(PVM pVM, PVMCPU pVCpu, RTIOPORT Port, uint32_t u32Value, size_t cbValue)
533	{
534	/* Take the IOM lock before performing any device I/O. */
535	int rc2 = IOM_LOCK_SHARED(pVM);
536	#ifndef IN_RING3
537	if (rc2 == VERR_SEM_BUSY)
538	return VINF_IOM_R3_IOPORT_WRITE;
539	#endif
540	AssertRC(rc2);
541	#if defined(IEM_VERIFICATION_MODE) && defined(IN_RING3)
542	IEMNotifyIOPortWrite(pVM, Port, u32Value, cbValue);
543	#endif
544
545	/** @todo bird: When I get time, I'll remove the RC/R0 trees and link the RC/R0
546	* entries to the ring-3 node. */
547	#ifdef VBOX_WITH_STATISTICS
548	/*
549	* Find the statistics record.
550	*/
551	PIOMIOPORTSTATS pStats = pVCpu->iom.s.CTX_SUFF(pStatsLastWrite);
552	if (!pStats \|\| pStats->Core.Key != Port)
553	{
554	pStats = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortStatTree, Port);
555	if (pStats)
556	pVCpu->iom.s.CTX_SUFF(pStatsLastWrite) = pStats;
557	}
558	#endif
559
560	/*
561	* Get handler for current context.
562	*/
563	CTX_SUFF(PIOMIOPORTRANGE) pRange = pVCpu->iom.s.CTX_SUFF(pRangeLastWrite);
564	if ( !pRange
565	\|\| (unsigned)Port - (unsigned)pRange->Port >= (unsigned)pRange->cPorts)
566	{
567	pRange = iomIOPortGetRange(pVM, Port);
568	if (pRange)
569	pVCpu->iom.s.CTX_SUFF(pRangeLastWrite) = pRange;
570	}
571	MMHYPER_RC_ASSERT_RCPTR(pVM, pRange);
572	if (pRange)
573	{
574	/*
575	* Found a range.
576	*/
577	PFNIOMIOPORTOUT pfnOutCallback = pRange->pfnOutCallback;
578	#ifndef IN_RING3
579	if (!pfnOutCallback)
580	{
581	STAM_STATS({ if (pStats) STAM_COUNTER_INC(&pStats->OutRZToR3); });
582	IOM_UNLOCK_SHARED(pVM);
583	return VINF_IOM_R3_IOPORT_WRITE;
584	}
585	#endif
586	void *pvUser = pRange->pvUser;
587	PPDMDEVINS pDevIns = pRange->pDevIns;
588	IOM_UNLOCK_SHARED(pVM);
589
590	/*
591	* Call the device.
592	*/
593	VBOXSTRICTRC rcStrict = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_IOPORT_WRITE);
594	if (rcStrict != VINF_SUCCESS)
595	{
596	STAM_STATS({ if (pStats) STAM_COUNTER_INC(&pStats->OutRZToR3); });
597	return rcStrict;
598	}
599	#ifdef VBOX_WITH_STATISTICS
600	if (pStats)
601	{
602	STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfOut), a);
603	rcStrict = pfnOutCallback(pDevIns, pvUser, Port, u32Value, (unsigned)cbValue);
604	STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfOut), a);
605	}
606	else
607	#endif
608	rcStrict = pfnOutCallback(pDevIns, pvUser, Port, u32Value, (unsigned)cbValue);
609	PDMCritSectLeave(pDevIns->CTX_SUFF(pCritSectRo));
610
611	#ifdef VBOX_WITH_STATISTICS
612	if (rcStrict == VINF_SUCCESS && pStats)
613	STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(Out));
614	# ifndef IN_RING3
615	else if (rcStrict == VINF_IOM_R3_IOPORT_WRITE && pStats)
616	STAM_COUNTER_INC(&pStats->OutRZToR3);
617	# endif
618	#endif
619	Log3(("IOMIOPortWrite: Port=%RTiop u32=%08RX32 cb=%d rc=%Rrc\n", Port, u32Value, cbValue, VBOXSTRICTRC_VAL(rcStrict)));
620	return rcStrict;
621	}
622
623	#ifndef IN_RING3
624	/*
625	* Handler in ring-3?
626	*/
627	PIOMIOPORTRANGER3 pRangeR3 = iomIOPortGetRangeR3(pVM, Port);
628	if (pRangeR3)
629	{
630	# ifdef VBOX_WITH_STATISTICS
631	if (pStats)
632	STAM_COUNTER_INC(&pStats->OutRZToR3);
633	# endif
634	IOM_UNLOCK_SHARED(pVM);
635	return VINF_IOM_R3_IOPORT_WRITE;
636	}
637	#endif
638
639	/*
640	* Ok, no handler for that port.
641	*/
642	#ifdef VBOX_WITH_STATISTICS
643	/* statistics. */
644	if (pStats)
645	STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(Out));
646	#endif
647	Log3(("IOMIOPortWrite: Port=%RTiop u32=%08RX32 cb=%d nop\n", Port, u32Value, cbValue));
648	IOM_UNLOCK_SHARED(pVM);
649	return VINF_SUCCESS;
650	}
651
652
653	/**
654	* Writes the string buffer of an I/O port register.
655	*
656	* @returns Strict VBox status code. Informational status codes other than the one documented
657	* here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
658	* @retval VINF_SUCCESS Success.
659	* @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
660	* status code must be passed on to EM.
661	* @retval VINF_IOM_R3_IOPORT_WRITE Defer the write to ring-3. (R0/GC only)
662	*
663	* @param pVM Pointer to the VM.
664	* @param pVCpu Pointer to the virtual CPU structure of the caller.
665	* @param Port The port to write.
666	* @param pGCPtrSrc Pointer to the source buffer (GC, incremented appropriately).
667	* @param pcTransfers Pointer to the number of transfer units to write, on return remaining transfer units.
668	* @param cb Size of the transfer unit (1, 2 or 4 bytes).
669	*/
670	VMMDECL(VBOXSTRICTRC) IOMIOPortWriteString(PVM pVM, PVMCPU pVCpu, RTIOPORT Port,
671	PRTGCPTR pGCPtrSrc, PRTGCUINTREG pcTransfers, unsigned cb)
672	{
673	/* Take the IOM lock before performing any device I/O. */
674	int rc2 = IOM_LOCK_SHARED(pVM);
675	#ifndef IN_RING3
676	if (rc2 == VERR_SEM_BUSY)
677	return VINF_IOM_R3_IOPORT_WRITE;
678	#endif
679	AssertRC(rc2);
680	#if defined(IEM_VERIFICATION_MODE) && defined(IN_RING3)
681	IEMNotifyIOPortWriteString(pVM, Port, pGCPtrSrc, pcTransfers, cb);
682	#endif
683
684	#ifdef LOG_ENABLED
685	const RTGCUINTREG cTransfers = *pcTransfers;
686	#endif
687	#ifdef VBOX_WITH_STATISTICS
688	/*
689	* Get the statistics record.
690	*/
691	PIOMIOPORTSTATS pStats = pVCpu->iom.s.CTX_SUFF(pStatsLastWrite);
692	if (!pStats \|\| pStats->Core.Key != Port)
693	{
694	pStats = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortStatTree, Port);
695	if (pStats)
696	pVCpu->iom.s.CTX_SUFF(pStatsLastWrite) = pStats;
697	}
698	#endif
699
700	/*
701	* Get handler for current context.
702	*/
703	CTX_SUFF(PIOMIOPORTRANGE) pRange = pVCpu->iom.s.CTX_SUFF(pRangeLastWrite);
704	if ( !pRange
705	\|\| (unsigned)Port - (unsigned)pRange->Port >= (unsigned)pRange->cPorts)
706	{
707	pRange = iomIOPortGetRange(pVM, Port);
708	if (pRange)
709	pVCpu->iom.s.CTX_SUFF(pRangeLastWrite) = pRange;
710	}
711	MMHYPER_RC_ASSERT_RCPTR(pVM, pRange);
712	if (pRange)
713	{
714	/*
715	* Found a range.
716	*/
717	PFNIOMIOPORTOUTSTRING pfnOutStrCallback = pRange->pfnOutStrCallback;
718	#ifndef IN_RING3
719	if (!pfnOutStrCallback)
720	{
721	STAM_STATS({ if (pStats) STAM_COUNTER_INC(&pStats->OutRZToR3); });
722	IOM_UNLOCK_SHARED(pVM);
723	return VINF_IOM_R3_IOPORT_WRITE;
724	}
725	#endif
726	void *pvUser = pRange->pvUser;
727	PPDMDEVINS pDevIns = pRange->pDevIns;
728	IOM_UNLOCK_SHARED(pVM);
729
730	/*
731	* Call the device.
732	*/
733	VBOXSTRICTRC rcStrict = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_IOPORT_WRITE);
734	if (rcStrict != VINF_SUCCESS)
735	{
736	STAM_STATS({ if (pStats) STAM_COUNTER_INC(&pStats->OutRZToR3); });
737	return rcStrict;
738	}
739	#ifdef VBOX_WITH_STATISTICS
740	if (pStats)
741	{
742	STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfOut), a);
743	rcStrict = pfnOutStrCallback(pDevIns, pvUser, Port, pGCPtrSrc, pcTransfers, cb);
744	STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfOut), a);
745	}
746	else
747	#endif
748	rcStrict = pfnOutStrCallback(pDevIns, pvUser, Port, pGCPtrSrc, pcTransfers, cb);
749	PDMCritSectLeave(pDevIns->CTX_SUFF(pCritSectRo));
750
751	#ifdef VBOX_WITH_STATISTICS
752	if (rcStrict == VINF_SUCCESS && pStats)
753	STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(Out));
754	# ifndef IN_RING3
755	else if (rcStrict == VINF_IOM_R3_IOPORT_WRITE && pStats)
756	STAM_COUNTER_INC(&pStats->OutRZToR3);
757	# endif
758	#endif
759	Log3(("IOMIOPortWriteStr: Port=%RTiop pGCPtrSrc=%p pcTransfer=%p:{%#x->%#x} cb=%d rcStrict=%Rrc\n",
760	Port, pGCPtrSrc, pcTransfers, cTransfers, *pcTransfers, cb, VBOXSTRICTRC_VAL(rcStrict)));
761	return rcStrict;
762	}
763
764	#ifndef IN_RING3
765	/*
766	* Handler in ring-3?
767	*/
768	PIOMIOPORTRANGER3 pRangeR3 = iomIOPortGetRangeR3(pVM, Port);
769	if (pRangeR3)
770	{
771	# ifdef VBOX_WITH_STATISTICS
772	if (pStats)
773	STAM_COUNTER_INC(&pStats->OutRZToR3);
774	# endif
775	IOM_UNLOCK_SHARED(pVM);
776	return VINF_IOM_R3_IOPORT_WRITE;
777	}
778	#endif
779
780	/*
781	* Ok, no handler for this port.
782	*/
783	#ifdef VBOX_WITH_STATISTICS
784	if (pStats)
785	STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(Out));
786	#endif
787
788	Log3(("IOMIOPortWriteStr: Port=%RTiop pGCPtrSrc=%p pcTransfer=%p:{%#x->%#x} cb=%d rc=VINF_SUCCESS\n",
789	Port, pGCPtrSrc, pcTransfers, cTransfers, *pcTransfers, cb));
790	IOM_UNLOCK_SHARED(pVM);
791	return VINF_SUCCESS;
792	}
793
794
795	/**
796	* Checks that the operation is allowed according to the IOPL
797	* level and I/O bitmap.
798	*
799	* @returns Strict VBox status code. Informational status codes other than the one documented
800	* here are to be treated as internal failure.
801	* @retval VINF_SUCCESS Success.
802	* @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
803	* @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
804	* @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
805	*
806	* @param pVM Pointer to the VM.
807	* @param pCtxCore Pointer to register frame.
808	* @param Port The I/O port number.
809	* @param cb The access size.
810	*/
811	VMMDECL(VBOXSTRICTRC) IOMInterpretCheckPortIOAccess(PVM pVM, PCPUMCTXCORE pCtxCore, RTIOPORT Port, unsigned cb)
812	{
813	PVMCPU pVCpu = VMMGetCpu(pVM);
814
815	/*
816	* If this isn't ring-0, we have to check for I/O privileges.
817	*/
818	uint32_t efl = CPUMRawGetEFlags(pVCpu);
819	uint32_t cpl = CPUMGetGuestCPL(pVCpu);
820
821	if ( ( cpl > 0
822	&& X86_EFL_GET_IOPL(efl) < cpl)
823	\|\| pCtxCore->eflags.Bits.u1VM /* IOPL is ignored in V86 mode; always check TSS bitmap */
824	)
825	{
826	/*
827	* Get TSS location and check if there can be a I/O bitmap.
828	*/
829	RTGCUINTPTR GCPtrTss;
830	RTGCUINTPTR cbTss;
831	bool fCanHaveIOBitmap;
832	int rc2 = SELMGetTSSInfo(pVM, pVCpu, &GCPtrTss, &cbTss, &fCanHaveIOBitmap);
833	if (RT_FAILURE(rc2))
834	{
835	Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d %Rrc -> #GP(0)\n", Port, cb, rc2));
836	return TRPMRaiseXcptErr(pVCpu, pCtxCore, X86_XCPT_GP, 0);
837	}
838
839	if ( !fCanHaveIOBitmap
840	\|\| cbTss <= sizeof(VBOXTSS)) /** @todo r=bird: Should this really include the interrupt redirection bitmap? */
841	{
842	Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d cbTss=%#x fCanHaveIOBitmap=%RTbool -> #GP(0)\n",
843	Port, cb, cbTss, fCanHaveIOBitmap));
844	return TRPMRaiseXcptErr(pVCpu, pCtxCore, X86_XCPT_GP, 0);
845	}
846
847	/*
848	* Fetch the I/O bitmap offset.
849	*/
850	uint16_t offIOPB;
851	VBOXSTRICTRC rcStrict = PGMPhysInterpretedRead(pVCpu, pCtxCore, &offIOPB, GCPtrTss + RT_OFFSETOF(VBOXTSS, offIoBitmap), sizeof(offIOPB));
852	if (rcStrict != VINF_SUCCESS)
853	{
854	Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d GCPtrTss=%RGv %Rrc\n",
855	Port, cb, GCPtrTss, VBOXSTRICTRC_VAL(rcStrict)));
856	return rcStrict;
857	}
858
859	/*
860	* Check the limit and read the two bitmap bytes.
861	*/
862	uint32_t offTss = offIOPB + (Port >> 3);
863	if (offTss + 1 >= cbTss)
864	{
865	Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d offTss=%#x cbTss=%#x -> #GP(0)\n",
866	Port, cb, offTss, cbTss));
867	return TRPMRaiseXcptErr(pVCpu, pCtxCore, X86_XCPT_GP, 0);
868	}
869	uint16_t u16;
870	rcStrict = PGMPhysInterpretedRead(pVCpu, pCtxCore, &u16, GCPtrTss + offTss, sizeof(u16));
871	if (rcStrict != VINF_SUCCESS)
872	{
873	Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d GCPtrTss=%RGv offTss=%#x -> %Rrc\n",
874	Port, cb, GCPtrTss, offTss, VBOXSTRICTRC_VAL(rcStrict)));
875	return rcStrict;
876	}
877
878	/*
879	* All the bits must be clear.
880	*/
881	if ((u16 >> (Port & 7)) & ((1 << cb) - 1))
882	{
883	Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d u16=%#x -> #GP(0)\n",
884	Port, cb, u16, offTss));
885	return TRPMRaiseXcptErr(pVCpu, pCtxCore, X86_XCPT_GP, 0);
886	}
887	LogFlow(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d offTss=%#x cbTss=%#x u16=%#x -> OK\n",
888	Port, cb, u16, offTss, cbTss));
889	}
890	return VINF_SUCCESS;
891	}
892
893
894	/**
895	* IN <AL\|AX\|EAX>, <DX\|imm16>
896	*
897	* @returns Strict VBox status code. Informational status codes other than the one documented
898	* here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
899	* @retval VINF_SUCCESS Success.
900	* @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
901	* status code must be passed on to EM.
902	* @retval VINF_IOM_R3_IOPORT_READ Defer the read to ring-3. (R0/GC only)
903	* @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
904	* @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
905	* @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
906	*
907	* @param pVM The virtual machine (GC pointer of course).
908	* @param pVCpu Pointer to the virtual CPU structure of the caller.
909	* @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
910	* @param pCpu Disassembler CPU state.
911	*/
912	VMMDECL(VBOXSTRICTRC) IOMInterpretIN(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
913	{
914	#ifdef IN_RC
915	STAM_COUNTER_INC(&pVM->iom.s.StatInstIn);
916	#endif
917
918	/*
919	* Get port number from second parameter.
920	* And get the register size from the first parameter.
921	*/
922	uint64_t uPort = 0;
923	unsigned cbSize = 0;
924	bool fRc = iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uPort, &cbSize);
925	AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc);
926
927	cbSize = DISGetParamSize(pCpu, &pCpu->Param1);
928	Assert(cbSize > 0);
929	VBOXSTRICTRC rcStrict = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, uPort, cbSize);
930	if (rcStrict == VINF_SUCCESS)
931	{
932	/*
933	* Attempt to read the port.
934	*/
935	uint32_t u32Data = UINT32_C(0xffffffff);
936	rcStrict = IOMIOPortRead(pVM, pVCpu, uPort, &u32Data, cbSize);
937	if (IOM_SUCCESS(rcStrict))
938	{
939	/*
940	* Store the result in the AL\|AX\|EAX register.
941	*/
942	fRc = iomSaveDataToReg(pCpu, &pCpu->Param1, pRegFrame, u32Data);
943	AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
944	}
945	else
946	AssertMsg(rcStrict == VINF_IOM_R3_IOPORT_READ \|\| RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
947	}
948	else
949	AssertMsg(rcStrict == VINF_EM_RAW_GUEST_TRAP \|\| rcStrict == VINF_TRPM_XCPT_DISPATCHED \|\| rcStrict == VINF_TRPM_XCPT_DISPATCHED \|\| RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
950
951	return rcStrict;
952	}
953
954
955	/**
956	* OUT <DX\|imm16>, <AL\|AX\|EAX>
957	*
958	* @returns Strict VBox status code. Informational status codes other than the one documented
959	* here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
960	* @retval VINF_SUCCESS Success.
961	* @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the
962	* status code must be passed on to EM.
963	* @retval VINF_IOM_R3_IOPORT_WRITE Defer the write to ring-3. (R0/GC only)
964	* @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr)
965	* @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
966	* @retval VINF_EM_RESCHEDULE_REM The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
967	*
968	* @param pVM The virtual machine (GC pointer of course).
969	* @param pVCpu Pointer to the virtual CPU structure of the caller.
970	* @param pRegFrame Pointer to CPUMCTXCORE guest registers structure.
971	* @param pCpu Disassembler CPU state.
972	*/
973	VMMDECL(VBOXSTRICTRC) IOMInterpretOUT(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
974	{
975	#ifdef IN_RC
976	STAM_COUNTER_INC(&pVM->iom.s.StatInstOut);
977	#endif
978
979	/*
980	* Get port number from first parameter.
981	* And get the register size and value from the second parameter.
982	*/
983	uint64_t uPort = 0;
984	unsigned cbSize = 0;
985	bool fRc = iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &uPort, &cbSize);
986	AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc);
987
988	VBOXSTRICTRC rcStrict = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, uPort, cbSize);
989	if (rcStrict == VINF_SUCCESS)
990	{
991	uint64_t u64Data = 0;
992	fRc = iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &u64Data, &cbSize);
993	AssertMsg(fRc, ("Failed to get reg value!\n")); NOREF(fRc);
994
995	/*
996	* Attempt to write to the port.
997	*/
998	rcStrict = IOMIOPortWrite(pVM, pVCpu, uPort, u64Data, cbSize);
999	AssertMsg(rcStrict == VINF_SUCCESS \|\| rcStrict == VINF_IOM_R3_IOPORT_WRITE \|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST) \|\| RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1000	}
1001	else
1002	AssertMsg(rcStrict == VINF_EM_RAW_GUEST_TRAP \|\| rcStrict == VINF_TRPM_XCPT_DISPATCHED \|\| rcStrict == VINF_TRPM_XCPT_DISPATCHED \|\| RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1003	return rcStrict;
1004	}
1005
1006
1007	/**
1008	* Fress an MMIO range after the reference counter has become zero.
1009	*
1010	* @param pVM Pointer to the VM.
1011	* @param pRange The range to free.
1012	*/
1013	void iomMmioFreeRange(PVM pVM, PIOMMMIORANGE pRange)
1014	{
1015	MMHyperFree(pVM, pRange);
1016	}
1017

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source: vbox/trunk/src/VBox/VMM/VMMAll/IOMAll.cpp@ 48749

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