PATMAll.cpp@ 61555

Last change on this file since 61555 was 60879, checked in by vboxsync, 9 years ago
PATMRawLeave: It's okay to end up in ring-3 with a reschduling status code and interrupts disabled, it probably means that IEM as dispatched an exception.
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1	/* $Id: PATMAll.cpp 60879 2016-05-08 11:03:39Z vboxsync $ */
2	/** @file
3	* PATM - The Patch Manager, all contexts.
4	*/
5
6	/*
7	* Copyright (C) 2006-2015 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_PATM
23	#include <VBox/vmm/patm.h>
24	#include <VBox/vmm/cpum.h>
25	#include <VBox/vmm/em.h>
26	#include <VBox/vmm/hm.h>
27	#include <VBox/vmm/selm.h>
28	#include <VBox/vmm/mm.h>
29	#include "PATMInternal.h"
30	#include <VBox/vmm/vm.h>
31	#include <VBox/vmm/vmm.h>
32	#include "PATMA.h"
33
34	#include <VBox/dis.h>
35	#include <VBox/disopcode.h>
36	#include <VBox/err.h>
37	#include <VBox/log.h>
38	#include <iprt/assert.h>
39	#include <iprt/string.h>
40
41
42	/**
43	* @callback_method_impl{FNPGMPHYSHANDLER, PATM all access handler callback.}
44	*
45	* @remarks The @a pvUser argument is the base address of the page being
46	* monitored.
47	*/
48	PGM_ALL_CB2_DECL(VBOXSTRICTRC)
49	patmVirtPageHandler(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, void pvPtr, void pvBuf, size_t cbBuf,
50	PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser)
51	{
52	Assert(enmAccessType == PGMACCESSTYPE_WRITE); NOREF(enmAccessType);
53	NOREF(pvPtr); NOREF(pvBuf); NOREF(cbBuf); NOREF(enmOrigin); NOREF(pvUser);
54
55	Assert(pvUser);
56	Assert(!((uintptr_t)pvUser & PAGE_OFFSET_MASK));
57	Assert(((uintptr_t)pvUser + (GCPtr & PAGE_OFFSET_MASK)) == GCPtr);
58
59	pVM->patm.s.pvFaultMonitor = (RTRCPTR)GCPtr;
60	#ifdef IN_RING3
61	PATMR3HandleMonitoredPage(pVM);
62	return VINF_PGM_HANDLER_DO_DEFAULT;
63	#else
64	/* RC: Go handle this in ring-3. */
65	return VINF_PATM_CHECK_PATCH_PAGE;
66	#endif
67	}
68
69
70	/**
71	* Load virtualized flags.
72	*
73	* This function is called from CPUMRawEnter(). It doesn't have to update the
74	* IF and IOPL eflags bits, the caller will enforce those to set and 0 respectively.
75	*
76	* @param pVM The cross context VM structure.
77	* @param pCtx The cpu context.
78	* @see pg_raw
79	*/
80	VMM_INT_DECL(void) PATMRawEnter(PVM pVM, PCPUMCTX pCtx)
81	{
82	Assert(!HMIsEnabled(pVM));
83
84	/*
85	* Currently we don't bother to check whether PATM is enabled or not.
86	* For all cases where it isn't, IOPL will be safe and IF will be set.
87	*/
88	uint32_t efl = pCtx->eflags.u32;
89	CTXSUFF(pVM->patm.s.pGCState)->uVMFlags = efl & PATM_VIRTUAL_FLAGS_MASK;
90
91	AssertMsg((efl & X86_EFL_IF) \|\| PATMShouldUseRawMode(pVM, (RTRCPTR)pCtx->eip),
92	("X86_EFL_IF is clear and PATM is disabled! (eip=%RRv eflags=%08x fPATM=%d pPATMGC=%RRv-%RRv\n",
93	pCtx->eip, pCtx->eflags.u32, PATMIsEnabled(pVM), pVM->patm.s.pPatchMemGC,
94	pVM->patm.s.pPatchMemGC + pVM->patm.s.cbPatchMem));
95
96	AssertReleaseMsg(CTXSUFF(pVM->patm.s.pGCState)->fPIF \|\| PATMIsPatchGCAddr(pVM, pCtx->eip),
97	("fPIF=%d eip=%RRv\n", pVM->patm.s.CTXSUFF(pGCState)->fPIF, pCtx->eip));
98
99	efl &= ~PATM_VIRTUAL_FLAGS_MASK;
100	efl \|= X86_EFL_IF;
101	pCtx->eflags.u32 = efl;
102
103	#ifdef IN_RING3
104	# ifdef PATM_EMULATE_SYSENTER
105	PCPUMCTX pCtx;
106
107	/* Check if the sysenter handler has changed. */
108	pCtx = CPUMQueryGuestCtxPtr(pVM);
109	if ( pCtx->SysEnter.cs != 0
110	&& pCtx->SysEnter.eip != 0
111	)
112	{
113	if (pVM->patm.s.pfnSysEnterGC != (RTRCPTR)pCtx->SysEnter.eip)
114	{
115	pVM->patm.s.pfnSysEnterPatchGC = 0;
116	pVM->patm.s.pfnSysEnterGC = 0;
117
118	Log2(("PATMRawEnter: installing sysenter patch for %RRv\n", pCtx->SysEnter.eip));
119	pVM->patm.s.pfnSysEnterPatchGC = PATMR3QueryPatchGCPtr(pVM, pCtx->SysEnter.eip);
120	if (pVM->patm.s.pfnSysEnterPatchGC == 0)
121	{
122	rc = PATMR3InstallPatch(pVM, pCtx->SysEnter.eip, PATMFL_SYSENTER \| PATMFL_CODE32);
123	if (rc == VINF_SUCCESS)
124	{
125	pVM->patm.s.pfnSysEnterPatchGC = PATMR3QueryPatchGCPtr(pVM, pCtx->SysEnter.eip);
126	pVM->patm.s.pfnSysEnterGC = (RTRCPTR)pCtx->SysEnter.eip;
127	Assert(pVM->patm.s.pfnSysEnterPatchGC);
128	}
129	}
130	else
131	pVM->patm.s.pfnSysEnterGC = (RTRCPTR)pCtx->SysEnter.eip;
132	}
133	}
134	else
135	{
136	pVM->patm.s.pfnSysEnterPatchGC = 0;
137	pVM->patm.s.pfnSysEnterGC = 0;
138	}
139	# endif /* PATM_EMULATE_SYSENTER */
140	#endif
141	}
142
143
144	/**
145	* Restores virtualized flags.
146	*
147	* This function is called from CPUMRawLeave(). It will update the eflags register.
148	*
149	** @note Only here we are allowed to switch back to guest code (without a special reason such as a trap in patch code)!!
150	*
151	* @param pVM The cross context VM structure.
152	* @param pCtx The cpu context.
153	* @param rawRC Raw mode return code
154	* @see @ref pg_raw
155	*/
156	VMM_INT_DECL(void) PATMRawLeave(PVM pVM, PCPUMCTX pCtx, int rawRC)
157	{
158	Assert(!HMIsEnabled(pVM));
159	bool fPatchCode = PATMIsPatchGCAddr(pVM, pCtx->eip);
160
161	/*
162	* We will only be called if PATMRawEnter was previously called.
163	*/
164	uint32_t efl = pCtx->eflags.u32;
165	efl = (efl & ~PATM_VIRTUAL_FLAGS_MASK) \| (CTXSUFF(pVM->patm.s.pGCState)->uVMFlags & PATM_VIRTUAL_FLAGS_MASK);
166	pCtx->eflags.u32 = efl;
167	CTXSUFF(pVM->patm.s.pGCState)->uVMFlags = X86_EFL_IF;
168
169	#ifdef IN_RING3
170	AssertReleaseMsg((efl & X86_EFL_IF) \|\| fPatchCode \|\| rawRC == VINF_PATM_PENDING_IRQ_AFTER_IRET
171	\|\| rawRC == VINF_EM_RESCHEDULE \|\| rawRC == VINF_EM_RESCHEDULE_REM \|\| RT_FAILURE(rawRC),
172	("Inconsistent state at %RRv rc=%Rrc\n", pCtx->eip, rawRC));
173	AssertReleaseMsg(CTXSUFF(pVM->patm.s.pGCState)->fPIF \|\| fPatchCode \|\| RT_FAILURE(rawRC), ("fPIF=%d eip=%RRv rc=%Rrc\n", CTXSUFF(pVM->patm.s.pGCState)->fPIF, pCtx->eip, rawRC));
174	if ( (efl & X86_EFL_IF)
175	&& fPatchCode)
176	{
177	if ( rawRC < VINF_PATM_LEAVE_RC_FIRST
178	\|\| rawRC > VINF_PATM_LEAVE_RC_LAST)
179	{
180	/*
181	* Golden rules:
182	* - Don't interrupt special patch streams that replace special instructions
183	* - Don't break instruction fusing (sti, pop ss, mov ss)
184	* - Don't go back to an instruction that has been overwritten by a patch jump
185	* - Don't interrupt an idt handler on entry (1st instruction); technically incorrect
186	*
187	*/
188	if (CTXSUFF(pVM->patm.s.pGCState)->fPIF == 1) /* consistent patch instruction state */
189	{
190	PATMTRANSSTATE enmState;
191	RTRCPTR pOrgInstrGC = PATMR3PatchToGCPtr(pVM, pCtx->eip, &enmState);
192
193	AssertRelease(pOrgInstrGC);
194
195	Assert(enmState != PATMTRANS_OVERWRITTEN);
196	if (enmState == PATMTRANS_SAFE)
197	{
198	Assert(!patmFindActivePatchByEntrypoint(pVM, pOrgInstrGC));
199	Log(("Switchback from %RRv to %RRv (Psp=%x)\n", pCtx->eip, pOrgInstrGC, CTXSUFF(pVM->patm.s.pGCState)->Psp));
200	STAM_COUNTER_INC(&pVM->patm.s.StatSwitchBack);
201	pCtx->eip = pOrgInstrGC;
202	fPatchCode = false; /* to reset the stack ptr */
203
204	CTXSUFF(pVM->patm.s.pGCState)->GCPtrInhibitInterrupts = 0; /* reset this pointer; safe otherwise the state would be PATMTRANS_INHIBITIRQ */
205	}
206	else
207	{
208	LogFlow(("Patch address %RRv can't be interrupted (state=%d)!\n", pCtx->eip, enmState));
209	STAM_COUNTER_INC(&pVM->patm.s.StatSwitchBackFail);
210	}
211	}
212	else
213	{
214	LogFlow(("Patch address %RRv can't be interrupted (fPIF=%d)!\n", pCtx->eip, CTXSUFF(pVM->patm.s.pGCState)->fPIF));
215	STAM_COUNTER_INC(&pVM->patm.s.StatSwitchBackFail);
216	}
217	}
218	}
219	#else /* !IN_RING3 */
220	/*
221	* When leaving raw-mode state while IN_RC, it's generally for interpreting
222	* a single original guest instruction.
223	*/
224	AssertMsg(!fPatchCode, ("eip=%RRv\n", pCtx->eip));
225	AssertReleaseMsg((efl & X86_EFL_IF) \|\| fPatchCode \|\| rawRC == VINF_PATM_PENDING_IRQ_AFTER_IRET \|\| RT_FAILURE(rawRC), ("Inconsistent state at %RRv rc=%Rrc\n", pCtx->eip, rawRC));
226	AssertReleaseMsg(CTXSUFF(pVM->patm.s.pGCState)->fPIF \|\| fPatchCode \|\| RT_FAILURE(rawRC), ("fPIF=%d eip=%RRv rc=%Rrc\n", CTXSUFF(pVM->patm.s.pGCState)->fPIF, pCtx->eip, rawRC));
227	#endif /* !IN_RING3 */
228
229	if (!fPatchCode)
230	{
231	if (CTXSUFF(pVM->patm.s.pGCState)->GCPtrInhibitInterrupts == (RTRCPTR)pCtx->eip)
232	{
233	EMSetInhibitInterruptsPC(VMMGetCpu0(pVM), pCtx->eip);
234	}
235	CTXSUFF(pVM->patm.s.pGCState)->GCPtrInhibitInterrupts = 0;
236
237	/* Reset the stack pointer to the top of the stack. */
238	#ifdef DEBUG
239	if (CTXSUFF(pVM->patm.s.pGCState)->Psp != PATM_STACK_SIZE)
240	{
241	LogFlow(("PATMRawLeave: Reset PATM stack (Psp = %x)\n", CTXSUFF(pVM->patm.s.pGCState)->Psp));
242	}
243	#endif
244	CTXSUFF(pVM->patm.s.pGCState)->Psp = PATM_STACK_SIZE;
245	}
246	}
247
248	/**
249	* Get the EFLAGS.
250	* This is a worker for CPUMRawGetEFlags().
251	*
252	* @returns The eflags.
253	* @param pVM The cross context VM structure.
254	* @param pCtx The guest cpu context.
255	*/
256	VMM_INT_DECL(uint32_t) PATMRawGetEFlags(PVM pVM, PCCPUMCTX pCtx)
257	{
258	Assert(!HMIsEnabled(pVM));
259	uint32_t efl = pCtx->eflags.u32;
260	efl &= ~PATM_VIRTUAL_FLAGS_MASK;
261	efl \|= pVM->patm.s.CTXSUFF(pGCState)->uVMFlags & PATM_VIRTUAL_FLAGS_MASK;
262	return efl;
263	}
264
265	/**
266	* Updates the EFLAGS.
267	* This is a worker for CPUMRawSetEFlags().
268	*
269	* @param pVM The cross context VM structure.
270	* @param pCtx The guest cpu context.
271	* @param efl The new EFLAGS value.
272	*/
273	VMM_INT_DECL(void) PATMRawSetEFlags(PVM pVM, PCPUMCTX pCtx, uint32_t efl)
274	{
275	Assert(!HMIsEnabled(pVM));
276	pVM->patm.s.CTXSUFF(pGCState)->uVMFlags = efl & PATM_VIRTUAL_FLAGS_MASK;
277	efl &= ~PATM_VIRTUAL_FLAGS_MASK;
278	efl \|= X86_EFL_IF;
279	pCtx->eflags.u32 = efl;
280	}
281
282	/**
283	* Check if we must use raw mode (patch code being executed)
284	*
285	* @param pVM The cross context VM structure.
286	* @param pAddrGC Guest context address
287	*/
288	VMM_INT_DECL(bool) PATMShouldUseRawMode(PVM pVM, RTRCPTR pAddrGC)
289	{
290	return PATMIsEnabled(pVM)
291	&& ( (RTRCUINTPTR)pAddrGC - (RTRCUINTPTR)pVM->patm.s.pPatchMemGC < pVM->patm.s.cbPatchMem
292	\|\| (RTRCUINTPTR)pAddrGC - (RTRCUINTPTR)pVM->patm.s.pbPatchHelpersRC < pVM->patm.s.cbPatchHelpers);
293	}
294
295	/**
296	* Returns the guest context pointer and size of the GC context structure
297	*
298	* @returns VBox status code.
299	* @param pVM The cross context VM structure.
300	*/
301	VMM_INT_DECL(RCPTRTYPE(PPATMGCSTATE)) PATMGetGCState(PVM pVM)
302	{
303	AssertReturn(!HMIsEnabled(pVM), NIL_RTRCPTR);
304	return pVM->patm.s.pGCStateGC;
305	}
306
307	/**
308	* Checks whether the GC address is part of our patch or helper regions.
309	*
310	* @returns VBox status code.
311	* @param pVM The cross context VM structure.
312	* @param uGCAddr Guest context address.
313	* @internal
314	*/
315	VMMDECL(bool) PATMIsPatchGCAddr(PVM pVM, RTRCUINTPTR uGCAddr)
316	{
317	return PATMIsEnabled(pVM)
318	&& ( uGCAddr - (RTRCUINTPTR)pVM->patm.s.pPatchMemGC < pVM->patm.s.cbPatchMem
319	\|\| uGCAddr - (RTRCUINTPTR)pVM->patm.s.pbPatchHelpersRC < pVM->patm.s.cbPatchHelpers);
320	}
321
322	/**
323	* Checks whether the GC address is part of our patch region.
324	*
325	* @returns VBox status code.
326	* @param pVM The cross context VM structure.
327	* @param uGCAddr Guest context address.
328	* @internal
329	*/
330	VMMDECL(bool) PATMIsPatchGCAddrExclHelpers(PVM pVM, RTRCUINTPTR uGCAddr)
331	{
332	return PATMIsEnabled(pVM)
333	&& uGCAddr - (RTRCUINTPTR)pVM->patm.s.pPatchMemGC < pVM->patm.s.cbPatchMem;
334	}
335
336	/**
337	* Reads patch code.
338	*
339	* @retval VINF_SUCCESS on success.
340	* @retval VERR_PATCH_NOT_FOUND if the request is entirely outside the patch
341	* code.
342	*
343	* @param pVM The cross context VM structure.
344	* @param GCPtrPatchCode The patch address to start reading at.
345	* @param pvDst Where to return the patch code.
346	* @param cbToRead Number of bytes to read.
347	* @param pcbRead Where to return the actual number of bytes we've
348	* read. Optional.
349	*/
350	VMM_INT_DECL(int) PATMReadPatchCode(PVM pVM, RTGCPTR GCPtrPatchCode, void pvDst, size_t cbToRead, size_t pcbRead)
351	{
352	/* Shortcut. */
353	if (!PATMIsEnabled(pVM))
354	return VERR_PATCH_NOT_FOUND;
355	Assert(!HMIsEnabled(pVM));
356
357	/*
358	* Check patch code and patch helper code. We assume the requested bytes
359	* are not in either.
360	*/
361	RTGCPTR offPatchCode = GCPtrPatchCode - (RTGCPTR32)pVM->patm.s.pPatchMemGC;
362	if (offPatchCode >= pVM->patm.s.cbPatchMem)
363	{
364	offPatchCode = GCPtrPatchCode - (RTGCPTR32)pVM->patm.s.pbPatchHelpersRC;
365	if (offPatchCode >= pVM->patm.s.cbPatchHelpers)
366	return VERR_PATCH_NOT_FOUND;
367
368	/*
369	* Patch helper memory.
370	*/
371	uint32_t cbMaxRead = pVM->patm.s.cbPatchHelpers - (uint32_t)offPatchCode;
372	if (cbToRead > cbMaxRead)
373	cbToRead = cbMaxRead;
374	#ifdef IN_RC
375	memcpy(pvDst, pVM->patm.s.pbPatchHelpersRC + (uint32_t)offPatchCode, cbToRead);
376	#else
377	memcpy(pvDst, pVM->patm.s.pbPatchHelpersR3 + (uint32_t)offPatchCode, cbToRead);
378	#endif
379	}
380	else
381	{
382	/*
383	* Patch memory.
384	*/
385	uint32_t cbMaxRead = pVM->patm.s.cbPatchMem - (uint32_t)offPatchCode;
386	if (cbToRead > cbMaxRead)
387	cbToRead = cbMaxRead;
388	#ifdef IN_RC
389	memcpy(pvDst, pVM->patm.s.pPatchMemGC + (uint32_t)offPatchCode, cbToRead);
390	#else
391	memcpy(pvDst, pVM->patm.s.pPatchMemHC + (uint32_t)offPatchCode, cbToRead);
392	#endif
393	}
394
395	if (pcbRead)
396	*pcbRead = cbToRead;
397	return VINF_SUCCESS;
398	}
399
400	/**
401	* Set parameters for pending MMIO patch operation
402	*
403	* @returns VBox status code.
404	* @param pVM The cross context VM structure.
405	* @param GCPhys MMIO physical address.
406	* @param pCachedData RC pointer to cached data.
407	*/
408	VMM_INT_DECL(int) PATMSetMMIOPatchInfo(PVM pVM, RTGCPHYS GCPhys, RTRCPTR pCachedData)
409	{
410	if (!HMIsEnabled(pVM))
411	{
412	pVM->patm.s.mmio.GCPhys = GCPhys;
413	pVM->patm.s.mmio.pCachedData = (RTRCPTR)pCachedData;
414	}
415
416	return VINF_SUCCESS;
417	}
418
419	/**
420	* Checks if the interrupt flag is enabled or not.
421	*
422	* @returns true if it's enabled.
423	* @returns false if it's disabled.
424	*
425	* @param pVM The cross context VM structure.
426	* @todo CPUM should wrap this, EM.cpp shouldn't call us.
427	*/
428	VMM_INT_DECL(bool) PATMAreInterruptsEnabled(PVM pVM)
429	{
430	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(VMMGetCpu(pVM));
431
432	return PATMAreInterruptsEnabledByCtx(pVM, pCtx);
433	}
434
435	/**
436	* Checks if the interrupt flag is enabled or not.
437	*
438	* @returns true if it's enabled.
439	* @returns false if it's disabled.
440	*
441	* @param pVM The cross context VM structure.
442	* @param pCtx The guest CPU context.
443	* @todo CPUM should wrap this, EM.cpp shouldn't call us.
444	*/
445	VMM_INT_DECL(bool) PATMAreInterruptsEnabledByCtx(PVM pVM, PCPUMCTX pCtx)
446	{
447	if (PATMIsEnabled(pVM))
448	{
449	Assert(!HMIsEnabled(pVM));
450	if (PATMIsPatchGCAddr(pVM, pCtx->eip))
451	return false;
452	}
453	return !!(pCtx->eflags.u32 & X86_EFL_IF);
454	}
455
456	/**
457	* Check if the instruction is patched as a duplicated function
458	*
459	* @returns patch record
460	* @param pVM The cross context VM structure.
461	* @param pInstrGC Guest context point to the instruction
462	*
463	*/
464	PPATMPATCHREC patmQueryFunctionPatch(PVM pVM, RTRCPTR pInstrGC)
465	{
466	PPATMPATCHREC pRec;
467
468	AssertCompile(sizeof(AVLOU32KEY) == sizeof(pInstrGC));
469	pRec = (PPATMPATCHREC)RTAvloU32Get(&CTXSUFF(pVM->patm.s.PatchLookupTree)->PatchTree, (AVLOU32KEY)pInstrGC);
470	if ( pRec
471	&& (pRec->patch.uState == PATCH_ENABLED)
472	&& (pRec->patch.flags & (PATMFL_DUPLICATE_FUNCTION\|PATMFL_CALLABLE_AS_FUNCTION))
473	)
474	return pRec;
475	return 0;
476	}
477
478	/**
479	* Checks if the int 3 was caused by a patched instruction
480	*
481	* @returns VBox status
482	*
483	* @param pVM The cross context VM structure.
484	* @param pInstrGC Instruction pointer
485	* @param pOpcode Original instruction opcode (out, optional)
486	* @param pSize Original instruction size (out, optional)
487	*/
488	VMM_INT_DECL(bool) PATMIsInt3Patch(PVM pVM, RTRCPTR pInstrGC, uint32_t pOpcode, uint32_t pSize)
489	{
490	PPATMPATCHREC pRec;
491	Assert(!HMIsEnabled(pVM));
492
493	pRec = (PPATMPATCHREC)RTAvloU32Get(&CTXSUFF(pVM->patm.s.PatchLookupTree)->PatchTree, (AVLOU32KEY)pInstrGC);
494	if ( pRec
495	&& (pRec->patch.uState == PATCH_ENABLED)
496	&& (pRec->patch.flags & (PATMFL_INT3_REPLACEMENT\|PATMFL_INT3_REPLACEMENT_BLOCK))
497	)
498	{
499	if (pOpcode) *pOpcode = pRec->patch.opcode;
500	if (pSize) *pSize = pRec->patch.cbPrivInstr;
501	return true;
502	}
503	return false;
504	}
505
506	/**
507	* Emulate sysenter, sysexit and syscall instructions
508	*
509	* @returns VBox status
510	*
511	* @param pVM The cross context VM structure.
512	* @param pCtx The relevant guest cpu context.
513	* @param pCpu Disassembly state.
514	*/
515	VMMDECL(int) PATMSysCall(PVM pVM, PCPUMCTX pCtx, PDISCPUSTATE pCpu)
516	{
517	Assert(CPUMQueryGuestCtxPtr(VMMGetCpu0(pVM)) == pCtx);
518	AssertReturn(!HMIsEnabled(pVM), VERR_PATM_HM_IPE);
519
520	if (pCpu->pCurInstr->uOpcode == OP_SYSENTER)
521	{
522	if ( pCtx->SysEnter.cs == 0
523	\|\| pCtx->eflags.Bits.u1VM
524	\|\| (pCtx->cs.Sel & X86_SEL_RPL) != 3
525	\|\| pVM->patm.s.pfnSysEnterPatchGC == 0
526	\|\| pVM->patm.s.pfnSysEnterGC != (RTRCPTR)(RTRCUINTPTR)pCtx->SysEnter.eip
527	\|\| !(PATMRawGetEFlags(pVM, pCtx) & X86_EFL_IF))
528	goto end;
529
530	Log2(("PATMSysCall: sysenter from %RRv to %RRv\n", pCtx->eip, pVM->patm.s.pfnSysEnterPatchGC));
531	/** @todo the base and limit are forced to 0 & 4G-1 resp. We assume the selector is wide open here. */
532	/** @note The Intel manual suggests that the OS is responsible for this. */
533	pCtx->cs.Sel = (pCtx->SysEnter.cs & ~X86_SEL_RPL) \| 1;
534	pCtx->eip = /** @todo ugly conversion! */(uint32_t)pVM->patm.s.pfnSysEnterPatchGC;
535	pCtx->ss.Sel = pCtx->cs.Sel + 8; /* SysEnter.cs + 8 */
536	pCtx->esp = pCtx->SysEnter.esp;
537	pCtx->eflags.u32 &= ~(X86_EFL_VM \| X86_EFL_RF);
538	pCtx->eflags.u32 \|= X86_EFL_IF;
539
540	/* Turn off interrupts. */
541	pVM->patm.s.CTXSUFF(pGCState)->uVMFlags &= ~X86_EFL_IF;
542
543	STAM_COUNTER_INC(&pVM->patm.s.StatSysEnter);
544
545	return VINF_SUCCESS;
546	}
547	if (pCpu->pCurInstr->uOpcode == OP_SYSEXIT)
548	{
549	if ( pCtx->SysEnter.cs == 0
550	\|\| (pCtx->cs.Sel & X86_SEL_RPL) != 1
551	\|\| pCtx->eflags.Bits.u1VM
552	\|\| !(PATMRawGetEFlags(pVM, pCtx) & X86_EFL_IF))
553	goto end;
554
555	Log2(("PATMSysCall: sysexit from %RRv to %RRv\n", pCtx->eip, pCtx->edx));
556
557	pCtx->cs.Sel = ((pCtx->SysEnter.cs + 16) & ~X86_SEL_RPL) \| 3;
558	pCtx->eip = pCtx->edx;
559	pCtx->ss.Sel = pCtx->cs.Sel + 8; /* SysEnter.cs + 24 */
560	pCtx->esp = pCtx->ecx;
561
562	STAM_COUNTER_INC(&pVM->patm.s.StatSysExit);
563
564	return VINF_SUCCESS;
565	}
566	if (pCpu->pCurInstr->uOpcode == OP_SYSCALL)
567	{
568	/** @todo implement syscall */
569	}
570	else
571	if (pCpu->pCurInstr->uOpcode == OP_SYSRET)
572	{
573	/** @todo implement sysret */
574	}
575
576	end:
577	return VINF_EM_RAW_RING_SWITCH;
578	}
579
580	/**
581	* Adds branch pair to the lookup cache of the particular branch instruction
582	*
583	* @returns VBox status
584	* @param pVM The cross context VM structure.
585	* @param pJumpTableGC Pointer to branch instruction lookup cache
586	* @param pBranchTarget Original branch target
587	* @param pRelBranchPatch Relative duplicated function address
588	*/
589	int patmAddBranchToLookupCache(PVM pVM, RTRCPTR pJumpTableGC, RTRCPTR pBranchTarget, RTRCUINTPTR pRelBranchPatch)
590	{
591	PPATCHJUMPTABLE pJumpTable;
592
593	Log(("PATMAddBranchToLookupCache: Adding (%RRv->%RRv (%RRv)) to table %RRv\n", pBranchTarget, pRelBranchPatch + pVM->patm.s.pPatchMemGC, pRelBranchPatch, pJumpTableGC));
594
595	AssertReturn(PATMIsPatchGCAddr(pVM, (RTRCUINTPTR)pJumpTableGC), VERR_INVALID_PARAMETER);
596
597	#ifdef IN_RC
598	pJumpTable = (PPATCHJUMPTABLE) pJumpTableGC;
599	#else
600	pJumpTable = (PPATCHJUMPTABLE) (pJumpTableGC - pVM->patm.s.pPatchMemGC + pVM->patm.s.pPatchMemHC);
601	#endif
602	Log(("Nr addresses = %d, insert pos = %d\n", pJumpTable->cAddresses, pJumpTable->ulInsertPos));
603	if (pJumpTable->cAddresses < pJumpTable->nrSlots)
604	{
605	uint32_t i;
606
607	for (i=0;i<pJumpTable->nrSlots;i++)
608	{
609	if (pJumpTable->Slot[i].pInstrGC == 0)
610	{
611	pJumpTable->Slot[i].pInstrGC = pBranchTarget;
612	/* Relative address - eases relocation */
613	pJumpTable->Slot[i].pRelPatchGC = pRelBranchPatch;
614	pJumpTable->cAddresses++;
615	break;
616	}
617	}
618	AssertReturn(i < pJumpTable->nrSlots, VERR_INTERNAL_ERROR);
619	#ifdef VBOX_WITH_STATISTICS
620	STAM_COUNTER_INC(&pVM->patm.s.StatFunctionLookupInsert);
621	if (pVM->patm.s.StatU32FunctionMaxSlotsUsed < i)
622	pVM->patm.s.StatU32FunctionMaxSlotsUsed = i + 1;
623	#endif
624	}
625	else
626	{
627	/* Replace an old entry. */
628	/** @todo replacement strategy isn't really bright. change to something better if required. */
629	Assert(pJumpTable->ulInsertPos < pJumpTable->nrSlots);
630	Assert((pJumpTable->nrSlots & 1) == 0);
631
632	pJumpTable->ulInsertPos &= (pJumpTable->nrSlots-1);
633	pJumpTable->Slot[pJumpTable->ulInsertPos].pInstrGC = pBranchTarget;
634	/* Relative address - eases relocation */
635	pJumpTable->Slot[pJumpTable->ulInsertPos].pRelPatchGC = pRelBranchPatch;
636
637	pJumpTable->ulInsertPos = (pJumpTable->ulInsertPos+1) & (pJumpTable->nrSlots-1);
638
639	STAM_COUNTER_INC(&pVM->patm.s.StatFunctionLookupReplace);
640	}
641
642	return VINF_SUCCESS;
643	}
644
645
646	#if defined(VBOX_WITH_STATISTICS) \|\| defined(LOG_ENABLED)
647	/**
648	* Return the name of the patched instruction
649	*
650	* @returns instruction name
651	*
652	* @param opcode DIS instruction opcode
653	* @param fPatchFlags Patch flags
654	*/
655	const char *patmGetInstructionString(uint32_t opcode, uint32_t fPatchFlags)
656	{
657	const char *pszInstr = NULL;
658
659	switch (opcode)
660	{
661	case OP_CLI:
662	pszInstr = "cli";
663	break;
664	case OP_PUSHF:
665	pszInstr = "pushf";
666	break;
667	case OP_POPF:
668	pszInstr = "popf";
669	break;
670	case OP_STR:
671	pszInstr = "str";
672	break;
673	case OP_LSL:
674	pszInstr = "lsl";
675	break;
676	case OP_LAR:
677	pszInstr = "lar";
678	break;
679	case OP_SGDT:
680	pszInstr = "sgdt";
681	break;
682	case OP_SLDT:
683	pszInstr = "sldt";
684	break;
685	case OP_SIDT:
686	pszInstr = "sidt";
687	break;
688	case OP_SMSW:
689	pszInstr = "smsw";
690	break;
691	case OP_VERW:
692	pszInstr = "verw";
693	break;
694	case OP_VERR:
695	pszInstr = "verr";
696	break;
697	case OP_CPUID:
698	pszInstr = "cpuid";
699	break;
700	case OP_JMP:
701	pszInstr = "jmp";
702	break;
703	case OP_JO:
704	pszInstr = "jo";
705	break;
706	case OP_JNO:
707	pszInstr = "jno";
708	break;
709	case OP_JC:
710	pszInstr = "jc";
711	break;
712	case OP_JNC:
713	pszInstr = "jnc";
714	break;
715	case OP_JE:
716	pszInstr = "je";
717	break;
718	case OP_JNE:
719	pszInstr = "jne";
720	break;
721	case OP_JBE:
722	pszInstr = "jbe";
723	break;
724	case OP_JNBE:
725	pszInstr = "jnbe";
726	break;
727	case OP_JS:
728	pszInstr = "js";
729	break;
730	case OP_JNS:
731	pszInstr = "jns";
732	break;
733	case OP_JP:
734	pszInstr = "jp";
735	break;
736	case OP_JNP:
737	pszInstr = "jnp";
738	break;
739	case OP_JL:
740	pszInstr = "jl";
741	break;
742	case OP_JNL:
743	pszInstr = "jnl";
744	break;
745	case OP_JLE:
746	pszInstr = "jle";
747	break;
748	case OP_JNLE:
749	pszInstr = "jnle";
750	break;
751	case OP_JECXZ:
752	pszInstr = "jecxz";
753	break;
754	case OP_LOOP:
755	pszInstr = "loop";
756	break;
757	case OP_LOOPNE:
758	pszInstr = "loopne";
759	break;
760	case OP_LOOPE:
761	pszInstr = "loope";
762	break;
763	case OP_MOV:
764	if (fPatchFlags & PATMFL_IDTHANDLER)
765	pszInstr = "mov (Int/Trap Handler)";
766	else
767	pszInstr = "mov (cs)";
768	break;
769	case OP_SYSENTER:
770	pszInstr = "sysenter";
771	break;
772	case OP_PUSH:
773	pszInstr = "push (cs)";
774	break;
775	case OP_CALL:
776	pszInstr = "call";
777	break;
778	case OP_IRET:
779	pszInstr = "iret";
780	break;
781	}
782	return pszInstr;
783	}
784	#endif

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source: vbox/trunk/src/VBox/VMM/VMMAll/PATMAll.cpp@ 61555

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