PGMAll.cpp@ 2376

Last change on this file since 2376 was 2324, checked in by vboxsync, 18 years ago
fixed PGMVerifyAccess(), we sometimes did not check the last page
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 55.9 KB

Line
1	/* $Id: PGMAll.cpp 2324 2007-04-23 20:22:00Z vboxsync $ */
2	/** @file
3	* PGM - Page Manager and Monitor - All context code.
4	*/
5
6	/*
7	* Copyright (C) 2006 InnoTek Systemberatung GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* If you received this file as part of a commercial VirtualBox
18	* distribution, then only the terms of your commercial VirtualBox
19	* license agreement apply instead of the previous paragraph.
20	*/
21
22	/*******************************************************************************
23	* Header Files *
24	*******************************************************************************/
25	#define LOG_GROUP LOG_GROUP_PGM
26	#include <VBox/pgm.h>
27	#include <VBox/cpum.h>
28	#include <VBox/selm.h>
29	#include <VBox/iom.h>
30	#include <VBox/sup.h>
31	#include <VBox/mm.h>
32	#include <VBox/stam.h>
33	#include <VBox/csam.h>
34	#include <VBox/patm.h>
35	#include <VBox/trpm.h>
36	#include <VBox/rem.h>
37	#include <VBox/em.h>
38	#include "PGMInternal.h"
39	#include <VBox/vm.h>
40	#include <iprt/assert.h>
41	#include <iprt/asm.h>
42	#include <iprt/string.h>
43	#include <VBox/log.h>
44	#include <VBox/param.h>
45	#include <VBox/err.h>
46
47
48	/*******************************************************************************
49	* Structures and Typedefs *
50	*******************************************************************************/
51	/**
52	* Stated structure for PGM_GST_NAME(HandlerVirtualUpdate) that's
53	* passed to PGM_GST_NAME(VirtHandlerUpdateOne) during enumeration.
54	*/
55	typedef struct PGMHVUSTATE
56	{
57	/** The VM handle. */
58	PVM pVM;
59	/** The todo flags. */
60	RTUINT fTodo;
61	/** The CR4 register value. */
62	uint32_t cr4;
63	} PGMHVUSTATE, *PPGMHVUSTATE;
64
65
66	/*******************************************************************************
67	* Internal Functions *
68	*******************************************************************************/
69	/** @def DUMP_PDE_BIG
70	* Debug routine for dumping a big PDE.
71	*/
72	#ifdef DEBUG_Sander
73	/** Debug routine for dumping a big PDE. */
74	static void pgmDumpPDEBig(const char *pszPrefix, int iPD, VBOXPDE Pde)
75	{
76	Log(("%s: BIG %d u10PageNo=%08X P=%d W=%d U=%d CACHE=%d ACC=%d DIR=%d GBL=%d\n", pszPrefix, iPD, Pde.b.u10PageNo, Pde.b.u1Present, Pde.b.u1Write, Pde.b.u1User, Pde.b.u1CacheDisable, Pde.b.u1Accessed, Pde.b.u1Dirty, Pde.b.u1Global));
77	Log(("%s: BIG %d WRT=%d AVAIL=%X RSV=%X PAT=%d\n", pszPrefix, iPD, Pde.b.u1WriteThru, Pde.b.u3Available, Pde.b.u8PageNoHigh, Pde.b.u1PAT));
78	}
79	#define DUMP_PDE_BIG(a, b, c) pgmDumpPDEBig(a, b, c)
80	#else
81	#define DUMP_PDE_BIG(a, b, c) do { } while (0)
82	#endif
83
84
85
86	#if 1///@todo ndef __AMD64__
87	/*
88	* Shadow - 32-bit mode
89	*/
90	#define PGM_SHW_TYPE PGM_TYPE_32BIT
91	#define PGM_SHW_NAME(name) PGM_SHW_NAME_32BIT(name)
92	#include "PGMAllShw.h"
93
94	/* Guest - real mode */
95	#define PGM_GST_TYPE PGM_TYPE_REAL
96	#define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name)
97	#define PGM_BTH_NAME(name) PGM_BTH_NAME_32BIT_REAL(name)
98	#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_32BIT_PT_FOR_PHYS
99	#include "PGMAllGst.h"
100	#include "PGMAllBth.h"
101	#undef BTH_PGMPOOLKIND_PT_FOR_PT
102	#undef PGM_BTH_NAME
103	#undef PGM_GST_TYPE
104	#undef PGM_GST_NAME
105
106	/* Guest - protected mode */
107	#define PGM_GST_TYPE PGM_TYPE_PROT
108	#define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name)
109	#define PGM_BTH_NAME(name) PGM_BTH_NAME_32BIT_PROT(name)
110	#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_32BIT_PT_FOR_PHYS
111	#include "PGMAllGst.h"
112	#include "PGMAllBth.h"
113	#undef BTH_PGMPOOLKIND_PT_FOR_PT
114	#undef PGM_BTH_NAME
115	#undef PGM_GST_TYPE
116	#undef PGM_GST_NAME
117
118	/* Guest - 32-bit mode */
119	#define PGM_GST_TYPE PGM_TYPE_32BIT
120	#define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name)
121	#define PGM_BTH_NAME(name) PGM_BTH_NAME_32BIT_32BIT(name)
122	#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT
123	#define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB
124	#include "PGMAllGst.h"
125	#include "PGMAllBth.h"
126	#undef BTH_PGMPOOLKIND_PT_FOR_BIG
127	#undef BTH_PGMPOOLKIND_PT_FOR_PT
128	#undef PGM_BTH_NAME
129	#undef PGM_GST_TYPE
130	#undef PGM_GST_NAME
131
132	#undef PGM_SHW_TYPE
133	#undef PGM_SHW_NAME
134	#endif /* !__AMD64__ */
135
136
137	/*
138	* Shadow - PAE mode
139	*/
140	#define PGM_SHW_TYPE PGM_TYPE_PAE
141	#define PGM_SHW_NAME(name) PGM_SHW_NAME_PAE(name)
142	#define PGM_BTH_NAME(name) PGM_BTH_NAME_PAE_REAL(name)
143	#include "PGMAllShw.h"
144
145	/* Guest - real mode */
146	#define PGM_GST_TYPE PGM_TYPE_REAL
147	#define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name)
148	#define PGM_BTH_NAME(name) PGM_BTH_NAME_PAE_REAL(name)
149	#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS
150	#include "PGMAllBth.h"
151	#undef BTH_PGMPOOLKIND_PT_FOR_PT
152	#undef PGM_BTH_NAME
153	#undef PGM_GST_TYPE
154	#undef PGM_GST_NAME
155
156	/* Guest - protected mode */
157	#define PGM_GST_TYPE PGM_TYPE_PROT
158	#define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name)
159	#define PGM_BTH_NAME(name) PGM_BTH_NAME_PAE_PROT(name)
160	#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS
161	#include "PGMAllBth.h"
162	#undef BTH_PGMPOOLKIND_PT_FOR_PT
163	#undef PGM_BTH_NAME
164	#undef PGM_GST_TYPE
165	#undef PGM_GST_NAME
166
167	/* Guest - 32-bit mode */
168	#define PGM_GST_TYPE PGM_TYPE_32BIT
169	#define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name)
170	#define PGM_BTH_NAME(name) PGM_BTH_NAME_PAE_32BIT(name)
171	#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_32BIT_PT
172	#define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB
173	#include "PGMAllBth.h"
174	#undef BTH_PGMPOOLKIND_PT_FOR_BIG
175	#undef BTH_PGMPOOLKIND_PT_FOR_PT
176	#undef PGM_BTH_NAME
177	#undef PGM_GST_TYPE
178	#undef PGM_GST_NAME
179
180
181	/* Guest - PAE mode */
182	#define PGM_GST_TYPE PGM_TYPE_PAE
183	#define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name)
184	#define PGM_BTH_NAME(name) PGM_BTH_NAME_PAE_PAE(name)
185	#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT
186	#define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
187	#include "PGMAllGst.h"
188	#include "PGMAllBth.h"
189	#undef BTH_PGMPOOLKIND_PT_FOR_BIG
190	#undef BTH_PGMPOOLKIND_PT_FOR_PT
191	#undef PGM_BTH_NAME
192	#undef PGM_GST_TYPE
193	#undef PGM_GST_NAME
194
195	#undef PGM_SHW_TYPE
196	#undef PGM_SHW_NAME
197
198
199	/*
200	* Shadow - AMD64 mode
201	*/
202	#define PGM_SHW_TYPE PGM_TYPE_AMD64
203	#define PGM_SHW_NAME(name) PGM_SHW_NAME_AMD64(name)
204	#include "PGMAllShw.h"
205
206	/* Guest - real mode */
207	#define PGM_GST_TYPE PGM_TYPE_REAL
208	#define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name)
209	#define PGM_BTH_NAME(name) PGM_BTH_NAME_AMD64_REAL(name)
210	#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS
211	#include "PGMAllBth.h"
212	#undef BTH_PGMPOOLKIND_PT_FOR_PT
213	#undef PGM_BTH_NAME
214	#undef PGM_GST_NAME
215	#undef PGM_GST_TYPE
216
217	/* Guest - protected mode */
218	#define PGM_GST_TYPE PGM_TYPE_PROT
219	#define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name)
220	#define PGM_BTH_NAME(name) PGM_BTH_NAME_AMD64_PROT(name)
221	#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS
222	#include "PGMAllBth.h"
223	#undef BTH_PGMPOOLKIND_PT_FOR_PT
224	#undef PGM_BTH_NAME
225	#undef PGM_GST_TYPE
226	#undef PGM_GST_NAME
227
228	/* Guest - AMD64 mode */
229	#define PGM_GST_TYPE PGM_TYPE_AMD64
230	#define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name)
231	#define PGM_BTH_NAME(name) PGM_BTH_NAME_AMD64_AMD64(name)
232	#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT
233	#define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
234	#include "PGMAllGst.h"
235	#include "PGMAllBth.h"
236	#undef BTH_PGMPOOLKIND_PT_FOR_BIG
237	#undef BTH_PGMPOOLKIND_PT_FOR_PT
238	#undef PGM_BTH_NAME
239	#undef PGM_GST_TYPE
240	#undef PGM_GST_NAME
241
242	#undef PGM_SHW_TYPE
243	#undef PGM_SHW_NAME
244
245
246
247	/**
248	* #PF Handler.
249	*
250	* @returns VBox status code (appropriate for trap handling and GC return).
251	* @param pVM VM Handle.
252	* @param uErr The trap error code.
253	* @param pRegFrame Trap register frame.
254	* @param pvFault The fault address.
255	*/
256	PGMDECL(int) PGMTrap0eHandler(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)
257	{
258	LogFlow(("PGMTrap0eHandler: uErr=%#x pvFault=%VGv eip=%VGv\n", uErr, pvFault, pRegFrame->eip));
259	STAM_PROFILE_START(&pVM->pgm.s.StatGCTrap0e, a);
260	STAM_STATS({ pVM->pgm.s.CTXSUFF(pStatTrap0eAttribution) = NULL; } );
261
262
263	#ifdef VBOX_WITH_STATISTICS
264	/*
265	* Error code stats.
266	*/
267	if (uErr & X86_TRAP_PF_US)
268	{
269	if (!(uErr & X86_TRAP_PF_P))
270	{
271	if (uErr & X86_TRAP_PF_RW)
272	STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eUSNotPresentWrite);
273	else
274	STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eUSNotPresentRead);
275	}
276	else if (uErr & X86_TRAP_PF_RW)
277	STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eUSWrite);
278	else if (uErr & X86_TRAP_PF_RSVD)
279	STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eUSReserved);
280	else
281	STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eUSRead);
282	}
283	else
284	{ //supervisor
285	if (!(uErr & X86_TRAP_PF_P))
286	{
287	if (uErr & X86_TRAP_PF_RW)
288	STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eSVNotPresentWrite);
289	else
290	STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eSVNotPresentRead);
291	}
292	else if (uErr & X86_TRAP_PF_RW)
293	STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eSVWrite);
294	else if (uErr & X86_TRAP_PF_RSVD)
295	STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eSVReserved);
296	}
297	#endif
298
299	/*
300	* Call the worker.
301	*/
302	int rc = PGM_BTH_PFN(Trap0eHandler, pVM)(pVM, uErr, pRegFrame, pvFault);
303	if (rc == VINF_PGM_SYNCPAGE_MODIFIED_PDE)
304	rc = VINF_SUCCESS;
305	STAM_STATS({ if (!pVM->pgm.s.CTXSUFF(pStatTrap0eAttribution))
306	pVM->pgm.s.CTXSUFF(pStatTrap0eAttribution) = &pVM->pgm.s.StatTrap0eMisc; });
307	STAM_PROFILE_STOP_EX(&pVM->pgm.s.StatGCTrap0e, pVM->pgm.s.CTXSUFF(pStatTrap0eAttribution), a);
308	return rc;
309	}
310
311
312	/**
313	* Prefetch a page
314	*
315	* Typically used to sync commonly used pages before entering raw mode
316	* after a CR3 reload.
317	*
318	* @returns VBox status code suitable for scheduling.
319	* @retval VINF_SUCCESS on success.
320	* @retval VINF_PGM_SYNC_CR3 if we're out of shadow pages or something like that.
321	* @param pVM VM handle.
322	* @param GCPtrPage Page to invalidate.
323	*/
324	PGMDECL(int) PGMPrefetchPage(PVM pVM, RTGCPTR GCPtrPage)
325	{
326	STAM_PROFILE_START(&pVM->pgm.s.StatHCPrefetch, a);
327	int rc = PGM_BTH_PFN(PrefetchPage, pVM)(pVM, (RTGCUINTPTR)GCPtrPage);
328	STAM_PROFILE_STOP(&pVM->pgm.s.StatHCPrefetch, a);
329	AssertMsg(rc == VINF_SUCCESS \|\| rc == VINF_PGM_SYNC_CR3 \|\| VBOX_FAILURE(rc), ("rc=%Vrc\n", rc));
330	return rc;
331	}
332
333
334	/**
335	* Gets the mapping corresponding to the specified address (if any).
336	*
337	* @returns Pointer to the mapping.
338	* @returns NULL if not
339	*
340	* @param pVM The virtual machine.
341	* @param GCPtr The guest context pointer.
342	*/
343	PPGMMAPPING pgmGetMapping(PVM pVM, RTGCPTR GCPtr)
344	{
345	PPGMMAPPING pMapping = CTXALLSUFF(pVM->pgm.s.pMappings);
346	while (pMapping)
347	{
348	if ((uintptr_t)GCPtr < (uintptr_t)pMapping->GCPtr)
349	break;
350	if ((uintptr_t)GCPtr - (uintptr_t)pMapping->GCPtr < pMapping->cb)
351	{
352	STAM_COUNTER_INC(&pVM->pgm.s.StatGCSyncPTConflict);
353	return pMapping;
354	}
355	pMapping = CTXALLSUFF(pMapping->pNext);
356	}
357	return NULL;
358	}
359
360
361	/**
362	* Verifies a range of pages for read or write access
363	*
364	* Only checks the guest's page tables
365	*
366	* @returns VBox status code.
367	* @param pVM VM handle.
368	* @param Addr Guest virtual address to check
369	* @param cbSize Access size
370	* @param fAccess Access type (r/w, user/supervisor (X86_PTE_*))
371	*/
372	PGMDECL(int) PGMIsValidAccess(PVM pVM, RTGCUINTPTR Addr, uint32_t cbSize, uint32_t fAccess)
373	{
374	/*
375	* Validate input.
376	*/
377	if (fAccess & ~(X86_PTE_US \| X86_PTE_RW))
378	{
379	AssertMsgFailed(("PGMIsValidAccess: invalid access type %08x\n", fAccess));
380	return VERR_INVALID_PARAMETER;
381	}
382
383	uint64_t fPage;
384	int rc = PGMGstGetPage(pVM, (RTGCPTR)Addr, &fPage, NULL);
385	if (VBOX_FAILURE(rc))
386	{
387	Log(("PGMIsValidAccess: access violation for %VGv rc=%d\n", Addr, rc));
388	return VINF_EM_RAW_GUEST_TRAP;
389	}
390
391	/*
392	* Check if the access would cause a page fault
393	*
394	* Note that hypervisor page directories are not present in the guest's tables, so this check
395	* is sufficient.
396	*/
397	bool fWrite = !!(fAccess & X86_PTE_RW);
398	bool fUser = !!(fAccess & X86_PTE_US);
399	if ( !(fPage & X86_PTE_P)
400	\|\| (fWrite && !(fPage & X86_PTE_RW))
401	\|\| (fUser && !(fPage & X86_PTE_US)) )
402	{
403	Log(("PGMIsValidAccess: access violation for %VGv attr %#llx vs %d:%d\n", Addr, fPage, fWrite, fUser));
404	return VINF_EM_RAW_GUEST_TRAP;
405	}
406	if ( VBOX_SUCCESS(rc)
407	&& PAGE_ADDRESS(Addr) != PAGE_ADDRESS(Addr + cbSize))
408	return PGMIsValidAccess(pVM, Addr + PAGE_SIZE, (cbSize > PAGE_SIZE) ? cbSize - PAGE_SIZE : 1, fAccess);
409	return rc;
410	}
411
412
413	/**
414	* Verifies a range of pages for read or write access
415	*
416	* Supports handling of pages marked for dirty bit tracking and CSAM
417	*
418	* @returns VBox status code.
419	* @param pVM VM handle.
420	* @param Addr Guest virtual address to check
421	* @param cbSize Access size
422	* @param fAccess Access type (r/w, user/supervisor (X86_PTE_*))
423	*/
424	PGMDECL(int) PGMVerifyAccess(PVM pVM, RTGCUINTPTR Addr, uint32_t cbSize, uint32_t fAccess)
425	{
426	/*
427	* Validate input.
428	*/
429	if (fAccess & ~(X86_PTE_US \| X86_PTE_RW))
430	{
431	AssertMsgFailed(("PGMVerifyAccess: invalid access type %08x\n", fAccess));
432	return VERR_INVALID_PARAMETER;
433	}
434
435	uint64_t fPageGst;
436	int rc = PGMGstGetPage(pVM, (RTGCPTR)Addr, &fPageGst, NULL);
437	if (VBOX_FAILURE(rc))
438	{
439	Log(("PGMVerifyAccess: access violation for %VGv rc=%d\n", Addr, rc));
440	return VINF_EM_RAW_GUEST_TRAP;
441	}
442
443	/*
444	* Check if the access would cause a page fault
445	*
446	* Note that hypervisor page directories are not present in the guest's tables, so this check
447	* is sufficient.
448	*/
449	const bool fWrite = !!(fAccess & X86_PTE_RW);
450	const bool fUser = !!(fAccess & X86_PTE_US);
451	if ( !(fPageGst & X86_PTE_P)
452	\|\| (fWrite && !(fPageGst & X86_PTE_RW))
453	\|\| (fUser && !(fPageGst & X86_PTE_US)) )
454	{
455	Log(("PGMVerifyAccess: access violation for %VGv attr %#llx vs %d:%d\n", Addr, fPageGst, fWrite, fUser));
456	return VINF_EM_RAW_GUEST_TRAP;
457	}
458
459	/*
460	* Next step is to verify if we protected this page for dirty bit tracking or for CSAM scanning
461	*/
462	rc = PGMShwGetPage(pVM, (RTGCPTR)Addr, NULL, NULL);
463	if (rc == VERR_PAGE_NOT_PRESENT)
464	{
465	/*
466	* Page is not present in our page tables.
467	* Try to sync it!
468	*/
469	Assert(X86_TRAP_PF_RW == X86_PTE_RW && X86_TRAP_PF_US == X86_PTE_US);
470	uint32_t uErr = fAccess & (X86_TRAP_PF_RW \| X86_TRAP_PF_US);
471	rc = PGM_BTH_PFN(VerifyAccessSyncPage, pVM)(pVM, Addr, fPageGst, uErr);
472	if (rc != VINF_SUCCESS)
473	return rc;
474	}
475	else if (rc == VERR_PAGE_TABLE_NOT_PRESENT)
476	{
477	/*
478	* Page table is not present; can't do much here (?)
479	* We could of course try sync the page table.... (?)
480	*/
481	return VINF_EM_RAW_EMULATE_INSTR;
482	}
483	else
484	AssertMsg(rc == VINF_SUCCESS, ("PGMShwGetPage %VGv failed with %Vrc\n", Addr, rc));
485
486	#if 0 /* def VBOX_STRICT; triggers too often now */
487	/*
488	* This check is a bit paranoid, but useful.
489	*/
490	/** @note this will assert when writing to monitored pages (a bit annoying actually) */
491	uint64_t fPageShw;
492	rc = PGMShwGetPage(pVM, (RTGCPTR)Addr, &fPageShw, NULL);
493	if ( (rc == VERR_PAGE_NOT_PRESENT \|\| VBOX_FAILURE(rc))
494	\|\| (fWrite && !(fPageShw & X86_PTE_RW))
495	\|\| (fUser && !(fPageShw & X86_PTE_US)) )
496	{
497	AssertMsgFailed(("Unexpected access violation for %VGv! rc=%Vrc write=%d user=%d\n",
498	Addr, rc, fWrite && !(fPageShw & X86_PTE_RW), fUser && !(fPageShw & X86_PTE_US)));
499	return VINF_EM_RAW_GUEST_TRAP;
500	}
501	#endif
502
503	if ( VBOX_SUCCESS(rc)
504	&& ( PAGE_ADDRESS(Addr) != PAGE_ADDRESS(Addr + cbSize - 1)
505	\|\| Addr + cbSize < Addr))
506	{
507	/* Don't recursively call PGMVerifyAccess as we might run out of stack. */
508	for (;;)
509	{
510	Addr += PAGE_SIZE;
511	if (cbSize > PAGE_SIZE)
512	cbSize -= PAGE_SIZE;
513	else
514	cbSize = 1;
515	rc = PGMVerifyAccess(pVM, Addr, 1, fAccess);
516	if (rc != VINF_SUCCESS)
517	break;
518	if (PAGE_ADDRESS(Addr) == PAGE_ADDRESS(Addr + cbSize - 1))
519	break;
520	}
521	}
522	return rc;
523	}
524
525
526	#ifndef IN_GC
527	/**
528	* Emulation of the invlpg instruction (HC only actually).
529	*
530	* @returns VBox status code.
531	* @param pVM VM handle.
532	* @param GCPtrPage Page to invalidate.
533	* @remark ASSUMES the page table entry or page directory is
534	* valid. Fairly safe, but there could be edge cases!
535	* @todo Flush page or page directory only if necessary!
536	*/
537	PGMDECL(int) PGMInvalidatePage(PVM pVM, RTGCPTR GCPtrPage)
538	{
539	LogFlow(("PGMInvalidatePage: GCPtrPage=%VGv\n", GCPtrPage));
540
541	STAM_PROFILE_START(&CTXMID(pVM->pgm.s.Stat,InvalidatePage), a);
542	int rc = PGM_BTH_PFN(InvalidatePage, pVM)(pVM, GCPtrPage);
543	STAM_PROFILE_STOP(&CTXMID(pVM->pgm.s.Stat,InvalidatePage), a);
544
545	#ifndef IN_RING0
546	/*
547	* Check if we have a pending update of the CR3 monitoring.
548	*/
549	if ( VBOX_SUCCESS(rc)
550	&& (pVM->pgm.s.fSyncFlags & PGM_SYNC_MONITOR_CR3))
551	{
552	pVM->pgm.s.fSyncFlags &= ~PGM_SYNC_MONITOR_CR3;
553	Assert(!pVM->pgm.s.fMappingsFixed);
554	Assert(pVM->pgm.s.GCPhysCR3 == pVM->pgm.s.GCPhysGstCR3Monitored);
555	rc = PGM_GST_PFN(MonitorCR3, pVM)(pVM, pVM->pgm.s.GCPhysCR3);
556	}
557	#endif
558
559	#ifdef IN_RING3
560	/*
561	* Inform CSAM about the flush
562	*/
563	/** @note this is to check if monitored pages have been changed; when we implement callbacks for virtual handlers, this is no longer required. */
564	CSAMR3FlushPage(pVM, GCPtrPage);
565	#endif
566	return rc;
567	}
568	#endif
569
570
571	/**
572	* Executes an instruction using the interpreter.
573	*
574	* @returns VBox status code (appropriate for trap handling and GC return).
575	* @param pVM VM handle.
576	* @param pRegFrame Register frame.
577	* @param pvFault Fault address.
578	*/
579	PGMDECL(int) PGMInterpretInstruction(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)
580	{
581	#ifdef IN_RING0
582	/** @todo */
583	int rc = VINF_EM_RAW_EMULATE_INSTR;
584	#else
585	uint32_t cb;
586	int rc = EMInterpretInstruction(pVM, pRegFrame, pvFault, &cb);
587	if (rc == VERR_EM_INTERPRETER)
588	rc = VINF_EM_RAW_EMULATE_INSTR;
589	if (rc != VINF_SUCCESS)
590	Log(("PGMInterpretInstruction: returns %Rrc (pvFault=%VGv)\n", rc, pvFault));
591	#endif
592	return rc;
593	}
594
595
596	/**
597	* Gets effective page information (from the VMM page directory).
598	*
599	* @returns VBox status.
600	* @param pVM VM Handle.
601	* @param GCPtr Guest Context virtual address of the page.
602	* @param pfFlags Where to store the flags. These are X86_PTE_*.
603	* @param pHCPhys Where to store the HC physical address of the page.
604	* This is page aligned.
605	* @remark You should use PGMMapGetPage() for pages in a mapping.
606	*/
607	PGMDECL(int) PGMShwGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys)
608	{
609	return PGM_SHW_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, pfFlags, pHCPhys);
610	}
611
612
613	/**
614	* Sets (replaces) the page flags for a range of pages in the shadow context.
615	*
616	* @returns VBox status.
617	* @param pVM VM handle.
618	* @param GCPtr The address of the first page.
619	* @param cb The size of the range in bytes.
620	* @param fFlags Page flags X86_PTE_*, excluding the page mask of course.
621	* @remark You must use PGMMapSetPage() for pages in a mapping.
622	*/
623	PGMDECL(int) PGMShwSetPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags)
624	{
625	return PGMShwModifyPage(pVM, GCPtr, cb, fFlags, 0);
626	}
627
628
629	/**
630	* Modify page flags for a range of pages in the shadow context.
631	*
632	* The existing flags are ANDed with the fMask and ORed with the fFlags.
633	*
634	* @returns VBox status code.
635	* @param pVM VM handle.
636	* @param GCPtr Virtual address of the first page in the range.
637	* @param cb Size (in bytes) of the range to apply the modification to.
638	* @param fFlags The OR mask - page flags X86_PTE_*, excluding the page mask of course.
639	* @param fMask The AND mask - page flags X86_PTE_*.
640	* Be very CAREFUL when ~'ing constants which could be 32-bit!
641	* @remark You must use PGMMapModifyPage() for pages in a mapping.
642	*/
643	PGMDECL(int) PGMShwModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
644	{
645	/*
646	* Validate input.
647	*/
648	if (fFlags & X86_PTE_PAE_PG_MASK)
649	{
650	AssertMsgFailed(("fFlags=%#llx\n", fFlags));
651	return VERR_INVALID_PARAMETER;
652	}
653	if (!cb)
654	{
655	AssertFailed();
656	return VERR_INVALID_PARAMETER;
657	}
658
659	/*
660	* Align the input.
661	*/
662	cb += (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK;
663	cb = RT_ALIGN_Z(cb, PAGE_SIZE);
664	GCPtr = (RTGCPTR)((RTGCUINTPTR)GCPtr & PAGE_BASE_GC_MASK); /** @todo this ain't necessary, right... */
665
666	/*
667	* Call worker.
668	*/
669	return PGM_SHW_PFN(ModifyPage, pVM)(pVM, (RTGCUINTPTR)GCPtr, cb, fFlags, fMask);
670	}
671
672
673	/**
674	* Gets effective Guest OS page information.
675	*
676	* When GCPtr is in a big page, the function will return as if it was a normal
677	* 4KB page. If the need for distinguishing between big and normal page becomes
678	* necessary at a later point, a PGMGstGetPage() will be created for that
679	* purpose.
680	*
681	* @returns VBox status.
682	* @param pVM VM Handle.
683	* @param GCPtr Guest Context virtual address of the page.
684	* @param pfFlags Where to store the flags. These are X86_PTE_*, even for big pages.
685	* @param pGCPhys Where to store the GC physical address of the page.
686	* This is page aligned. The fact that the
687	*/
688	PGMDECL(int) PGMGstGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys)
689	{
690	return PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, pfFlags, pGCPhys);
691	}
692
693
694	/**
695	* Checks if the page is present.
696	*
697	* @returns true if the page is present.
698	* @returns false if the page is not present.
699	* @param pVM The VM handle.
700	* @param GCPtr Address within the page.
701	*/
702	PGMDECL(bool) PGMGstIsPagePresent(PVM pVM, RTGCPTR GCPtr)
703	{
704	int rc = PGMGstGetPage(pVM, GCPtr, NULL, NULL);
705	return VBOX_SUCCESS(rc);
706	}
707
708
709	/**
710	* Sets (replaces) the page flags for a range of pages in the guest's tables.
711	*
712	* @returns VBox status.
713	* @param pVM VM handle.
714	* @param GCPtr The address of the first page.
715	* @param cb The size of the range in bytes.
716	* @param fFlags Page flags X86_PTE_*, excluding the page mask of course.
717	*/
718	PGMDECL(int) PGMGstSetPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags)
719	{
720	return PGMGstModifyPage(pVM, GCPtr, cb, fFlags, 0);
721	}
722
723
724	/**
725	* Modify page flags for a range of pages in the guest's tables
726	*
727	* The existing flags are ANDed with the fMask and ORed with the fFlags.
728	*
729	* @returns VBox status code.
730	* @param pVM VM handle.
731	* @param GCPtr Virtual address of the first page in the range.
732	* @param cb Size (in bytes) of the range to apply the modification to.
733	* @param fFlags The OR mask - page flags X86_PTE_*, excluding the page mask of course.
734	* @param fMask The AND mask - page flags X86_PTE_*, excluding the page mask of course.
735	* Be very CAREFUL when ~'ing constants which could be 32-bit!
736	*/
737	PGMDECL(int) PGMGstModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
738	{
739	STAM_PROFILE_START(&CTXMID(pVM->pgm.s.Stat,GstModifyPage), a);
740
741	/*
742	* Validate input.
743	*/
744	if (fFlags & X86_PTE_PAE_PG_MASK)
745	{
746	AssertMsgFailed(("fFlags=%#llx\n", fFlags));
747	STAM_PROFILE_STOP(&CTXMID(pVM->pgm.s.Stat,GstModifyPage), a);
748	return VERR_INVALID_PARAMETER;
749	}
750
751	if (!cb)
752	{
753	AssertFailed();
754	STAM_PROFILE_STOP(&CTXMID(pVM->pgm.s.Stat,GstModifyPage), a);
755	return VERR_INVALID_PARAMETER;
756	}
757
758	LogFlow(("PGMGstModifyPage %VGv %d bytes fFlags=%08llx fMask=%08llx\n", GCPtr, cb, fFlags, fMask));
759
760	/*
761	* Adjust input.
762	*/
763	cb += (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK;
764	cb = RT_ALIGN_Z(cb, PAGE_SIZE);
765	GCPtr = (RTGCPTR)((RTGCUINTPTR)GCPtr & PAGE_BASE_GC_MASK);
766
767	/*
768	* Call worker.
769	*/
770	int rc = PGM_GST_PFN(ModifyPage, pVM)(pVM, (RTGCUINTPTR)GCPtr, cb, fFlags, fMask);
771
772	STAM_PROFILE_STOP(&CTXMID(pVM->pgm.s.Stat,GstModifyPage), a);
773	return rc;
774	}
775
776
777	/**
778	* Temporarily turns off the access monitoring of a page within a monitored
779	* physical write/all page access handler region.
780	*
781	* Use this when no further \#PFs are required for that page. Be aware that
782	* a page directory sync might reset the flags, and turn on access monitoring
783	* for the page.
784	*
785	* The caller must do required page table modifications.
786	*
787	* @returns VBox status code.
788	* @param pVM VM Handle
789	* @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister().
790	* @param GCPhysPage Physical address of the page to turn off access monitoring for.
791	*/
792	PGMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)
793	{
794	/*
795	* Validate the range.
796	*/
797	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTXSUFF(pTrees)->PhysHandlers, GCPhys);
798	if (pCur)
799	{
800	if ( GCPhysPage >= pCur->Core.Key
801	&& GCPhysPage <= pCur->Core.KeyLast)
802	{
803	/*
804	* Ok, check that the type is right and then clear the flag.
805	*/
806	unsigned fFlag;
807	switch (pCur->enmType)
808	{
809	case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
810	fFlag = MM_RAM_FLAGS_PHYSICAL_WRITE;
811	break;
812
813	case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
814	fFlag = MM_RAM_FLAGS_PHYSICAL_ALL;
815	break;
816
817	case PGMPHYSHANDLERTYPE_MMIO:
818	case PGMPHYSHANDLERTYPE_PHYSICAL:
819	AssertMsgFailed(("Cannot disable an MMIO or natural PHYSICAL access handler! enmType=%d\n", pCur->enmType));
820	return VERR_ACCESS_DENIED;
821
822	default:
823	AssertMsgFailed(("Invalid mapping type %d\n", pCur->enmType));
824	return VERR_INTERNAL_ERROR;
825	}
826
827	/** @todo add a function which does both clear and set! */
828	/* clear and set */
829	PPGMRAMRANGE pHint = NULL;
830	int rc = PGMRamFlagsClearByGCPhysWithHint(&pVM->pgm.s, GCPhysPage, fFlag, &pHint);
831	if (VBOX_SUCCESS(rc))
832	rc = PGMRamFlagsSetByGCPhysWithHint(&pVM->pgm.s, GCPhysPage, MM_RAM_FLAGS_PHYSICAL_TEMP_OFF, &pHint);
833	return rc;
834	}
835	AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
836	GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
837	return VERR_INVALID_PARAMETER;
838	}
839
840	AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
841	return VERR_PGM_HANDLER_NOT_FOUND;
842	}
843
844
845	/**
846	* Turns access monitoring of a page within a monitored
847	* physical write/all page access handler regio back on.
848	*
849	* The caller must do required page table modifications.
850	*
851	* @returns VBox status code.
852	* @param pVM VM Handle
853	* @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister().
854	* @param GCPhysPage Physical address of the page to turn on access monitoring for.
855	*/
856	PGMDECL(int) PGMHandlerPhysicalPageReset(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)
857	{
858	/*
859	* Validate the range.
860	*/
861	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTXSUFF(pTrees)->PhysHandlers, GCPhys);
862	if (pCur)
863	{
864	if ( GCPhysPage >= pCur->Core.Key
865	&& GCPhysPage <= pCur->Core.KeyLast)
866	{
867	/*
868	* Ok, check that the type is right and then clear the flag.
869	*/
870	unsigned fFlag;
871	switch (pCur->enmType)
872	{
873	case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
874	fFlag = MM_RAM_FLAGS_PHYSICAL_WRITE;
875	break;
876
877	case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
878	fFlag = MM_RAM_FLAGS_PHYSICAL_ALL;
879	break;
880
881	case PGMPHYSHANDLERTYPE_MMIO:
882	case PGMPHYSHANDLERTYPE_PHYSICAL:
883	AssertMsgFailed(("Cannot enable an MMIO or natural PHYSICAL access handler! enmType=%d\n", pCur->enmType));
884	return VERR_ACCESS_DENIED;
885
886	default:
887	AssertMsgFailed(("Invalid mapping type %d\n", pCur->enmType));
888	return VERR_INTERNAL_ERROR;
889	}
890
891	/** @todo add a function which does both clear and set! */
892	/* set and clear */
893	PPGMRAMRANGE pHint = NULL;
894	int rc = PGMRamFlagsSetByGCPhysWithHint(&pVM->pgm.s, GCPhysPage, fFlag, &pHint);
895	if (VBOX_SUCCESS(rc))
896	rc = PGMRamFlagsClearByGCPhysWithHint(&pVM->pgm.s, GCPhysPage, MM_RAM_FLAGS_PHYSICAL_TEMP_OFF, &pHint);
897	return rc;
898
899	}
900	AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
901	GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
902	return VERR_INVALID_PARAMETER;
903	}
904
905	AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
906	return VERR_PGM_HANDLER_NOT_FOUND;
907	}
908
909
910	/**
911	* Checks if a physical range is handled
912	*
913	* @returns boolean
914	* @param pVM VM Handle
915	* @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister().
916	*/
917	PGMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys)
918	{
919	/*
920	* Find the handler.
921	*/
922	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTXSUFF(pTrees)->PhysHandlers, GCPhys);
923	if (pCur)
924	{
925	if ( GCPhys >= pCur->Core.Key
926	&& GCPhys <= pCur->Core.KeyLast)
927	{
928	/*
929	* Validate type.
930	*/
931	switch (pCur->enmType)
932	{
933	case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
934	case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
935	case PGMPHYSHANDLERTYPE_PHYSICAL:
936	case PGMPHYSHANDLERTYPE_MMIO:
937	return true;
938
939	default:
940	AssertMsgFailed(("Invalid type %d! Corruption!\n", pCur->enmType));
941	return false;
942	}
943	}
944	}
945
946	return false;
947	}
948
949
950	#ifdef VBOX_STRICT
951	DECLCALLBACK(int) pgmVirtHandlerDumpPhysRange(PAVLROGCPHYSNODECORE pNode, void *pvUser)
952	{
953	PPGMPHYS2VIRTHANDLER pCur = (PPGMPHYS2VIRTHANDLER)pNode;
954	PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
955	Log(("PHYS2VIRT: Range %VGp-%VGp for virtual handler: %s\n", pCur->Core.Key, pCur->Core.KeyLast, pVirt->pszDesc));
956	return 0;
957	}
958
959
960	void pgmHandlerVirtualDumpPhysPages(PVM pVM)
961	{
962	RTAvlroGCPhysDoWithAll(CTXSUFF(&pVM->pgm.s.pTrees)->PhysToVirtHandlers, true, pgmVirtHandlerDumpPhysRange, 0);
963	}
964	#endif /* VBOX_STRICT */
965
966
967	/**
968	* Gets the current CR3 register value for the shadow memory context.
969	* @returns CR3 value.
970	* @param pVM The VM handle.
971	*/
972	PGMDECL(uint32_t) PGMGetHyperCR3(PVM pVM)
973	{
974	switch (pVM->pgm.s.enmShadowMode)
975	{
976	case PGMMODE_32_BIT:
977	return pVM->pgm.s.HCPhys32BitPD;
978
979	case PGMMODE_PAE:
980	case PGMMODE_PAE_NX:
981	return pVM->pgm.s.HCPhysPaePDPTR;
982
983	case PGMMODE_AMD64:
984	case PGMMODE_AMD64_NX:
985	return pVM->pgm.s.HCPhysPaePML4;
986
987	default:
988	AssertMsgFailed(("enmShadowMode=%d\n", pVM->pgm.s.enmShadowMode));
989	return ~0;
990	}
991	}
992
993
994	/**
995	* Gets the CR3 register value for the 32-Bit shadow memory context.
996	* @returns CR3 value.
997	* @param pVM The VM handle.
998	*/
999	PGMDECL(uint32_t) PGMGetHyper32BitCR3(PVM pVM)
1000	{
1001	return pVM->pgm.s.HCPhys32BitPD;
1002	}
1003
1004
1005	/**
1006	* Gets the CR3 register value for the PAE shadow memory context.
1007	* @returns CR3 value.
1008	* @param pVM The VM handle.
1009	*/
1010	PGMDECL(uint32_t) PGMGetHyperPaeCR3(PVM pVM)
1011	{
1012	return pVM->pgm.s.HCPhysPaePDPTR;
1013	}
1014
1015
1016	/**
1017	* Gets the CR3 register value for the AMD64 shadow memory context.
1018	* @returns CR3 value.
1019	* @param pVM The VM handle.
1020	*/
1021	PGMDECL(uint32_t) PGMGetHyperAmd64CR3(PVM pVM)
1022	{
1023	return pVM->pgm.s.HCPhysPaePML4;
1024	}
1025
1026
1027	/**
1028	* Gets the current CR3 register value for the HC intermediate memory context.
1029	* @returns CR3 value.
1030	* @param pVM The VM handle.
1031	*/
1032	PGMDECL(uint32_t) PGMGetInterHCCR3(PVM pVM)
1033	{
1034	switch (pVM->pgm.s.enmHostMode)
1035	{
1036	case SUPPAGINGMODE_32_BIT:
1037	case SUPPAGINGMODE_32_BIT_GLOBAL:
1038	return pVM->pgm.s.HCPhysInterPD;
1039
1040	case SUPPAGINGMODE_PAE:
1041	case SUPPAGINGMODE_PAE_GLOBAL:
1042	case SUPPAGINGMODE_PAE_NX:
1043	case SUPPAGINGMODE_PAE_GLOBAL_NX:
1044	return pVM->pgm.s.HCPhysInterPaePDPTR;
1045
1046	case SUPPAGINGMODE_AMD64:
1047	case SUPPAGINGMODE_AMD64_GLOBAL:
1048	case SUPPAGINGMODE_AMD64_NX:
1049	case SUPPAGINGMODE_AMD64_GLOBAL_NX:
1050	return pVM->pgm.s.HCPhysInterPaePDPTR;
1051
1052	default:
1053	AssertMsgFailed(("enmHostMode=%d\n", pVM->pgm.s.enmHostMode));
1054	return ~0;
1055	}
1056	}
1057
1058
1059	/**
1060	* Gets the current CR3 register value for the GC intermediate memory context.
1061	* @returns CR3 value.
1062	* @param pVM The VM handle.
1063	*/
1064	PGMDECL(uint32_t) PGMGetInterGCCR3(PVM pVM)
1065	{
1066	switch (pVM->pgm.s.enmShadowMode)
1067	{
1068	case PGMMODE_32_BIT:
1069	return pVM->pgm.s.HCPhysInterPD;
1070
1071	case PGMMODE_PAE:
1072	case PGMMODE_PAE_NX:
1073	return pVM->pgm.s.HCPhysInterPaePDPTR;
1074
1075	case PGMMODE_AMD64:
1076	case PGMMODE_AMD64_NX:
1077	return pVM->pgm.s.HCPhysInterPaePML4;
1078
1079	default:
1080	AssertMsgFailed(("enmShadowMode=%d\n", pVM->pgm.s.enmShadowMode));
1081	return ~0;
1082	}
1083	}
1084
1085
1086	/**
1087	* Gets the CR3 register value for the 32-Bit intermediate memory context.
1088	* @returns CR3 value.
1089	* @param pVM The VM handle.
1090	*/
1091	PGMDECL(uint32_t) PGMGetInter32BitCR3(PVM pVM)
1092	{
1093	return pVM->pgm.s.HCPhysInterPD;
1094	}
1095
1096
1097	/**
1098	* Gets the CR3 register value for the PAE intermediate memory context.
1099	* @returns CR3 value.
1100	* @param pVM The VM handle.
1101	*/
1102	PGMDECL(uint32_t) PGMGetInterPaeCR3(PVM pVM)
1103	{
1104	return pVM->pgm.s.HCPhysInterPaePDPTR;
1105	}
1106
1107
1108	/**
1109	* Gets the CR3 register value for the AMD64 intermediate memory context.
1110	* @returns CR3 value.
1111	* @param pVM The VM handle.
1112	*/
1113	PGMDECL(uint32_t) PGMGetInterAmd64CR3(PVM pVM)
1114	{
1115	return pVM->pgm.s.HCPhysInterPaePML4;
1116	}
1117
1118
1119	/**
1120	* Performs and schedules necessary updates following a CR3 load or reload.
1121	*
1122	* This will normally involve mapping the guest PD or nPDPTR
1123	*
1124	* @returns VBox status code.
1125	* @retval VINF_PGM_SYNC_CR3 if monitoring requires a CR3 sync. This can
1126	* safely be ignored and overridden since the FF will be set too then.
1127	* @param pVM VM handle.
1128	* @param cr3 The new cr3.
1129	* @param fGlobal Indicates whether this is a global flush or not.
1130	*/
1131	PGMDECL(int) PGMFlushTLB(PVM pVM, uint32_t cr3, bool fGlobal)
1132	{
1133	/*
1134	* When in real or protected mode there is no TLB flushing, but
1135	* we may still be called because of REM not caring/knowing this.
1136	* REM is simple and we wish to keep it that way.
1137	*/
1138	if (pVM->pgm.s.enmGuestMode <= PGMMODE_PROTECTED)
1139	return VINF_SUCCESS;
1140	LogFlow(("PGMFlushTLB: cr3=%#x OldCr3=%#x fGlobal=%d\n", cr3, pVM->pgm.s.GCPhysCR3, fGlobal));
1141	STAM_PROFILE_START(&pVM->pgm.s.StatFlushTLB, a);
1142
1143	/*
1144	* Flag the necessary updates.
1145	*/
1146	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3_NON_GLOBAL);
1147	if (fGlobal)
1148	VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
1149
1150	/*
1151	* Remap the CR3 content and adjust the monitoring if CR3 was actually changed.
1152	*/
1153	int rc = VINF_SUCCESS;
1154	RTGCPHYS GCPhysCR3;
1155	if ( pVM->pgm.s.enmGuestMode == PGMMODE_PAE
1156	\|\| pVM->pgm.s.enmGuestMode == PGMMODE_PAE_NX
1157	\|\| pVM->pgm.s.enmGuestMode == PGMMODE_AMD64
1158	\|\| pVM->pgm.s.enmGuestMode == PGMMODE_AMD64_NX)
1159	GCPhysCR3 = (RTGCPHYS)(cr3 & X86_CR3_PAE_PAGE_MASK);
1160	else
1161	GCPhysCR3 = (RTGCPHYS)(cr3 & X86_CR3_PAGE_MASK);
1162	if (pVM->pgm.s.GCPhysCR3 != GCPhysCR3)
1163	{
1164	pVM->pgm.s.GCPhysCR3 = GCPhysCR3;
1165	rc = PGM_GST_PFN(MapCR3, pVM)(pVM, GCPhysCR3);
1166	if (VBOX_SUCCESS(rc) && !pVM->pgm.s.fMappingsFixed)
1167	{
1168	pVM->pgm.s.fSyncFlags &= ~PGM_SYNC_MONITOR_CR3;
1169	rc = PGM_GST_PFN(MonitorCR3, pVM)(pVM, GCPhysCR3);
1170	}
1171	if (fGlobal)
1172	STAM_COUNTER_INC(&pVM->pgm.s.StatFlushTLBNewCR3Global);
1173	else
1174	STAM_COUNTER_INC(&pVM->pgm.s.StatFlushTLBNewCR3);
1175	}
1176	else
1177	{
1178	/*
1179	* Check if we have a pending update of the CR3 monitoring.
1180	*/
1181	if (pVM->pgm.s.fSyncFlags & PGM_SYNC_MONITOR_CR3)
1182	{
1183	pVM->pgm.s.fSyncFlags &= ~PGM_SYNC_MONITOR_CR3;
1184	Assert(!pVM->pgm.s.fMappingsFixed);
1185	rc = PGM_GST_PFN(MonitorCR3, pVM)(pVM, GCPhysCR3);
1186	}
1187	if (fGlobal)
1188	STAM_COUNTER_INC(&pVM->pgm.s.StatFlushTLBSameCR3Global);
1189	else
1190	STAM_COUNTER_INC(&pVM->pgm.s.StatFlushTLBSameCR3);
1191	}
1192
1193	STAM_PROFILE_STOP(&pVM->pgm.s.StatFlushTLB, a);
1194	return rc;
1195	}
1196
1197
1198	/**
1199	* Synchronize the paging structures.
1200	*
1201	* This function is called in response to the VM_FF_PGM_SYNC_CR3 and
1202	* VM_FF_PGM_SYNC_CR3_NONGLOBAL. Those two force action flags are set
1203	* in several places, most importantly whenever the CR3 is loaded.
1204	*
1205	* @returns VBox status code.
1206	* @param pVM The virtual machine.
1207	* @param cr0 Guest context CR0 register
1208	* @param cr3 Guest context CR3 register
1209	* @param cr4 Guest context CR4 register
1210	* @param fGlobal Including global page directories or not
1211	*/
1212	PGMDECL(int) PGMSyncCR3(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal)
1213	{
1214	/*
1215	* We might be called when we shouldn't.
1216	*
1217	* The mode switching will ensure that the PD is resynced
1218	* after every mode switch. So, if we find ourselves here
1219	* when in protected or real mode we can safely disable the
1220	* FF and return immediately.
1221	*/
1222	if (pVM->pgm.s.enmGuestMode <= PGMMODE_PROTECTED)
1223	{
1224	Assert((cr0 & (X86_CR0_PG \| X86_CR0_PE)) != (X86_CR0_PG \| X86_CR0_PE));
1225	VM_FF_CLEAR(pVM, VM_FF_PGM_SYNC_CR3);
1226	VM_FF_CLEAR(pVM, VM_FF_PGM_SYNC_CR3_NON_GLOBAL);
1227	return VINF_SUCCESS;
1228	}
1229
1230	/* If global pages are not supported, then all flushes are global */
1231	if (!(cr4 & X86_CR4_PGE))
1232	fGlobal = true;
1233	LogFlow(("PGMSyncCR3: cr0=%08x cr3=%08x cr4=%08x fGlobal=%d[%d,%d]\n", cr0, cr3, cr4, fGlobal,
1234	VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3), VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3_NON_GLOBAL)));
1235
1236	/*
1237	* Let the 'Bth' function do the work and we'll just keep track of the flags.
1238	*/
1239	STAM_PROFILE_START(&pVM->pgm.s.CTXMID(Stat,SyncCR3), a);
1240	int rc = PGM_BTH_PFN(SyncCR3, pVM)(pVM, cr0, cr3, cr4, fGlobal);
1241	STAM_PROFILE_STOP(&pVM->pgm.s.CTXMID(Stat,SyncCR3), a);
1242	AssertMsg(rc == VINF_SUCCESS \|\| rc == VINF_PGM_SYNC_CR3 \|\| VBOX_FAILURE(rc), ("rc=%VRc\n", rc));
1243	if (rc == VINF_SUCCESS)
1244	{
1245	if (!(pVM->pgm.s.fSyncFlags & PGM_SYNC_ALWAYS))
1246	{
1247	VM_FF_CLEAR(pVM, VM_FF_PGM_SYNC_CR3);
1248	VM_FF_CLEAR(pVM, VM_FF_PGM_SYNC_CR3_NON_GLOBAL);
1249	}
1250
1251	/*
1252	* Check if we have a pending update of the CR3 monitoring.
1253	*/
1254	if (pVM->pgm.s.fSyncFlags & PGM_SYNC_MONITOR_CR3)
1255	{
1256	pVM->pgm.s.fSyncFlags &= ~PGM_SYNC_MONITOR_CR3;
1257	Assert(!pVM->pgm.s.fMappingsFixed);
1258	Assert(pVM->pgm.s.GCPhysCR3 == pVM->pgm.s.GCPhysGstCR3Monitored);
1259	rc = PGM_GST_PFN(MonitorCR3, pVM)(pVM, pVM->pgm.s.GCPhysCR3);
1260	}
1261	}
1262
1263	/*
1264	* Now flush the CR3 (guest context).
1265	*/
1266	if (rc == VINF_SUCCESS)
1267	PGM_INVL_GUEST_TLBS();
1268	return rc;
1269	}
1270
1271
1272	/**
1273	* Called whenever CR0 or CR4 in a way which may change
1274	* the paging mode.
1275	*
1276	* @returns VBox status code fit for scheduling in GC and R0.
1277	* @retval VINF_SUCCESS if the was no change, or it was successfully dealt with.
1278	* @retval VINF_PGM_CHANGE_MODE if we're in GC or R0 and the mode changes.
1279	* @param pVM VM handle.
1280	* @param cr0 The new cr0.
1281	* @param cr4 The new cr4.
1282	* @param efer The new extended feature enable register.
1283	*/
1284	PGMDECL(int) PGMChangeMode(PVM pVM, uint32_t cr0, uint32_t cr4, uint64_t efer)
1285	{
1286	PGMMODE enmGuestMode;
1287
1288	/*
1289	* Calc the new guest mode.
1290	*/
1291	if (!(cr0 & X86_CR0_PE))
1292	enmGuestMode = PGMMODE_REAL;
1293	else if (!(cr0 & X86_CR0_PG))
1294	enmGuestMode = PGMMODE_PROTECTED;
1295	else if (!(cr4 & X86_CR4_PAE))
1296	enmGuestMode = PGMMODE_32_BIT;
1297	else if (!(efer & MSR_K6_EFER_LME))
1298	{
1299	if (!(efer & MSR_K6_EFER_NXE))
1300	enmGuestMode = PGMMODE_PAE;
1301	else
1302	enmGuestMode = PGMMODE_PAE_NX;
1303	}
1304	else
1305	{
1306	if (!(efer & MSR_K6_EFER_NXE))
1307	enmGuestMode = PGMMODE_AMD64;
1308	else
1309	enmGuestMode = PGMMODE_AMD64_NX;
1310	}
1311
1312	/*
1313	* Did it change?
1314	*/
1315	if (pVM->pgm.s.enmGuestMode == enmGuestMode)
1316	return VINF_SUCCESS;
1317	#ifdef IN_RING3
1318	return pgmR3ChangeMode(pVM, enmGuestMode);
1319	#else
1320	Log(("PGMChangeMode: returns VINF_PGM_CHANGE_MODE.\n"));
1321	return VINF_PGM_CHANGE_MODE;
1322	#endif
1323	}
1324
1325
1326	/**
1327	* Gets the current guest paging mode.
1328	*
1329	* @returns The current paging mode.
1330	* @param pVM The VM handle.
1331	*/
1332	PGMDECL(PGMMODE) PGMGetGuestMode(PVM pVM)
1333	{
1334	return pVM->pgm.s.enmGuestMode;
1335	}
1336
1337
1338	/**
1339	* Gets the current shadow paging mode.
1340	*
1341	* @returns The current paging mode.
1342	* @param pVM The VM handle.
1343	*/
1344	PGMDECL(PGMMODE) PGMGetShadowMode(PVM pVM)
1345	{
1346	return pVM->pgm.s.enmShadowMode;
1347	}
1348
1349
1350	/**
1351	* Get mode name.
1352	*
1353	* @returns read-only name string.
1354	* @param enmMode The mode which name is desired.
1355	*/
1356	PGMDECL(const char *) PGMGetModeName(PGMMODE enmMode)
1357	{
1358	switch (enmMode)
1359	{
1360	case PGMMODE_REAL: return "real";
1361	case PGMMODE_PROTECTED: return "protected";
1362	case PGMMODE_32_BIT: return "32-bit";
1363	case PGMMODE_PAE: return "PAE";
1364	case PGMMODE_PAE_NX: return "PAE+NX";
1365	case PGMMODE_AMD64: return "AMD64";
1366	case PGMMODE_AMD64_NX: return "AMD64+NX";
1367	default: return "unknown mode value";
1368	}
1369	}
1370
1371
1372	/**
1373	* Acquire the PGM lock.
1374	*
1375	* @returns VBox status code
1376	* @param pVM The VM to operate on.
1377	*/
1378	int pgmLock(PVM pVM)
1379	{
1380	int rc = PDMCritSectEnter(&pVM->pgm.s.CritSect, VERR_SEM_BUSY);
1381	#ifdef IN_GC
1382	if (rc == VERR_SEM_BUSY)
1383	rc = VMMGCCallHost(pVM, VMMCALLHOST_PGM_LOCK, 0);
1384	#elif defined(IN_RING0)
1385	if (rc == VERR_SEM_BUSY)
1386	rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_LOCK, 0);
1387	#endif
1388	AssertRC(rc);
1389	return rc;
1390	}
1391
1392
1393	/**
1394	* Release the PGM lock.
1395	*
1396	* @returns VBox status code
1397	* @param pVM The VM to operate on.
1398	*/
1399	void pgmUnlock(PVM pVM)
1400	{
1401	PDMCritSectLeave(&pVM->pgm.s.CritSect);
1402	}
1403
1404
1405	#ifdef VBOX_STRICT
1406
1407	/**
1408	* State structure used by the PGMAssertHandlerAndFlagsInSync() function
1409	* and its AVL enumerators.
1410	*/
1411	typedef struct PGMAHAFIS
1412	{
1413	/** The VM handle. */
1414	PVM pVM;
1415	/** Number of errors. */
1416	unsigned cErrors;
1417	/** The flags we've found. */
1418	unsigned fFlagsFound;
1419	/** The flags we're matching up to.
1420	* This is also on the stack as a const, thus only valid during enumeration. */
1421	unsigned fFlags;
1422	/** The current physical address. */
1423	RTGCPHYS GCPhys;
1424	} PGMAHAFIS, *PPGMAHAFIS;
1425
1426	/**
1427	* Verify virtual handler by matching physical address.
1428	*
1429	* @returns 0
1430	* @param pNode Pointer to a PGMVIRTHANDLER.
1431	* @param pvUser Pointer to user parameter.
1432	*/
1433	static DECLCALLBACK(int) pgmVirtHandlerVerifyOneByPhysAddr(PAVLROGCPTRNODECORE pNode, void *pvUser)
1434	{
1435	PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1436	PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1437
1438	for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1439	{
1440	if ((pCur->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) == pState->GCPhys)
1441	{
1442	switch (pCur->enmType)
1443	{
1444	case PGMVIRTHANDLERTYPE_EIP:
1445	case PGMVIRTHANDLERTYPE_NORMAL: pState->fFlagsFound \|= MM_RAM_FLAGS_VIRTUAL_HANDLER; break;
1446	case PGMVIRTHANDLERTYPE_WRITE: pState->fFlagsFound \|= MM_RAM_FLAGS_VIRTUAL_HANDLER \| MM_RAM_FLAGS_VIRTUAL_WRITE; break;
1447	case PGMVIRTHANDLERTYPE_ALL: pState->fFlagsFound \|= MM_RAM_FLAGS_VIRTUAL_HANDLER \| MM_RAM_FLAGS_VIRTUAL_ALL; break;
1448	/* hypervisor handlers need no flags and wouldn't have nowhere to put them in any case. */
1449	case PGMVIRTHANDLERTYPE_HYPERVISOR:
1450	return 0;
1451	}
1452	if ( (pState->fFlags & (MM_RAM_FLAGS_VIRTUAL_HANDLER \| MM_RAM_FLAGS_VIRTUAL_WRITE \| MM_RAM_FLAGS_VIRTUAL_ALL))
1453	== pState->fFlagsFound)
1454	break;
1455	}
1456	}
1457	return 0;
1458	}
1459
1460
1461	/**
1462	* Verify a virtual handler.
1463	*
1464	* @returns 0
1465	* @param pNode Pointer to a PGMVIRTHANDLER.
1466	* @param pvUser Pointer to user parameter.
1467	*/
1468	static DECLCALLBACK(int) pgmVirtHandlerVerifyOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1469	{
1470	PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)pNode;
1471	PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1472	PVM pVM = pState->pVM;
1473
1474	if ( pVirt->aPhysToVirt[0].Core.Key != NIL_RTGCPHYS
1475	&& (pVirt->aPhysToVirt[0].Core.Key & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->GCPtr & PAGE_OFFSET_MASK))
1476	{
1477	AssertMsgFailed(("virt handler phys out has incorrect key! %VGp %VGv %s\n",
1478	pVirt->aPhysToVirt[0].Core.Key, pVirt->GCPtr, HCSTRING(pVirt->pszDesc)));
1479	pState->cErrors++;
1480	}
1481
1482	/*
1483	* Calc flags.
1484	*/
1485	unsigned fFlags;
1486	switch (pVirt->enmType)
1487	{
1488	case PGMVIRTHANDLERTYPE_EIP:
1489	case PGMVIRTHANDLERTYPE_NORMAL: fFlags = MM_RAM_FLAGS_VIRTUAL_HANDLER; break;
1490	case PGMVIRTHANDLERTYPE_WRITE: fFlags = MM_RAM_FLAGS_VIRTUAL_HANDLER \| MM_RAM_FLAGS_VIRTUAL_WRITE; break;
1491	case PGMVIRTHANDLERTYPE_ALL: fFlags = MM_RAM_FLAGS_VIRTUAL_HANDLER \| MM_RAM_FLAGS_VIRTUAL_ALL; break;
1492	/* hypervisor handlers need no flags and wouldn't have nowhere to put them in any case. */
1493	case PGMVIRTHANDLERTYPE_HYPERVISOR:
1494	return 0;
1495	default:
1496	AssertMsgFailed(("unknown enmType=%d\n", pVirt->enmType));
1497	return 0;
1498	}
1499
1500	/*
1501	* Check pages against flags.
1502	*/
1503	RTGCUINTPTR GCPtr = (RTGCUINTPTR)pVirt->GCPtr;
1504	for (unsigned iPage = 0; iPage < pVirt->cPages; iPage++, GCPtr += PAGE_SIZE)
1505	{
1506	RTGCPHYS GCPhysGst;
1507	uint64_t fGst;
1508	int rc = PGMGstGetPage(pVM, (RTGCPTR)GCPtr, &fGst, &GCPhysGst);
1509	if (rc == VERR_PAGE_NOT_PRESENT)
1510	{
1511	if (pVirt->aPhysToVirt[iPage].Core.Key != NIL_RTGCPHYS)
1512	{
1513	AssertMsgFailed(("virt handler phys out of sync. %VGp GCPhysNew=~0 iPage=%#x %VGv %s\n",
1514	pVirt->aPhysToVirt[iPage].Core.Key, iPage, GCPtr, HCSTRING(pVirt->pszDesc)));
1515	pState->cErrors++;
1516	}
1517	continue;
1518	}
1519
1520	AssertRCReturn(rc, 0);
1521	if ((pVirt->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) != GCPhysGst)
1522	{
1523	AssertMsgFailed(("virt handler phys out of sync. %VGp GCPhysGst=%VGp iPage=%#x %VGv %s\n",
1524	pVirt->aPhysToVirt[iPage].Core.Key, GCPhysGst, iPage, GCPtr, HCSTRING(pVirt->pszDesc)));
1525	pState->cErrors++;
1526	continue;
1527	}
1528
1529	RTHCPHYS HCPhys;
1530	rc = PGMRamGCPhys2HCPhysWithFlags(&pVM->pgm.s, GCPhysGst, &HCPhys);
1531	if (VBOX_FAILURE(rc))
1532	{
1533	AssertMsgFailed(("virt handler getting ram flags rc=%Vrc. GCPhysGst=%VGp iPage=%#x %VGv %s\n",
1534	rc, GCPhysGst, iPage, GCPtr, HCSTRING(pVirt->pszDesc)));
1535	pState->cErrors++;
1536	continue;
1537	}
1538
1539	if ((HCPhys & fFlags) != fFlags)
1540	{
1541	AssertMsgFailed(("virt handler flags mismatch. HCPhys=%VHp fFlags=%#x GCPhysGst=%VGp iPage=%#x %VGv %s\n",
1542	HCPhys, fFlags, GCPhysGst, iPage, GCPtr, HCSTRING(pVirt->pszDesc)));
1543	pState->cErrors++;
1544	continue;
1545	}
1546	} /* for pages in virtual mapping. */
1547
1548	return 0;
1549	}
1550
1551
1552	/**
1553	* Asserts that the handlers+guest-page-tables == ramrange-flags and
1554	* that the physical addresses associated with virtual handlers are correct.
1555	*
1556	* @returns Number of mismatches.
1557	* @param pVM The VM handle.
1558	*/
1559	PGMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM)
1560	{
1561	PPGM pPGM = &pVM->pgm.s;
1562	PGMAHAFIS State;
1563	State.cErrors = 0;
1564	State.pVM = pVM;
1565
1566	/*
1567	* Check the RAM flags against the handlers.
1568	*/
1569	for (PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges); pRam; pRam = CTXSUFF(pRam->pNext))
1570	{
1571	const unsigned cPages = pRam->cb >> PAGE_SHIFT;
1572	for (unsigned iPage = 0; iPage < cPages; iPage++)
1573	{
1574	State.GCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT);
1575	const unsigned fFlags = pRam->aHCPhys[iPage]
1576	& ( MM_RAM_FLAGS_VIRTUAL_HANDLER \| MM_RAM_FLAGS_VIRTUAL_WRITE \| MM_RAM_FLAGS_VIRTUAL_ALL
1577	\| MM_RAM_FLAGS_PHYSICAL_HANDLER \| MM_RAM_FLAGS_PHYSICAL_WRITE \| MM_RAM_FLAGS_PHYSICAL_ALL \| MM_RAM_FLAGS_PHYSICAL_TEMP_OFF);
1578	if (fFlags)
1579	{
1580	State.fFlagsFound = 0; /* build flags and compare. */
1581
1582	/* physical first. (simple because of page alignment) */
1583	if ( !(fFlags & MM_RAM_FLAGS_PHYSICAL_TEMP_OFF)
1584	&& (fFlags & (MM_RAM_FLAGS_PHYSICAL_HANDLER \| MM_RAM_FLAGS_PHYSICAL_WRITE \| MM_RAM_FLAGS_PHYSICAL_ALL)))
1585	{
1586	PPGMPHYSHANDLER pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pPGM->CTXSUFF(pTrees)->PhysHandlers, State.GCPhys);
1587	if (!pPhys)
1588	{
1589	pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTXSUFF(pTrees)->PhysHandlers, State.GCPhys, true);
1590	if ( pPhys
1591	&& pPhys->Core.Key > (State.GCPhys + PAGE_SIZE - 1))
1592	pPhys = NULL;
1593	Assert(!pPhys \|\| pPhys->Core.Key >= State.GCPhys);
1594	}
1595	if (pPhys)
1596	{
1597	switch (pPhys->enmType)
1598	{
1599	case PGMPHYSHANDLERTYPE_PHYSICAL: State.fFlagsFound \|= MM_RAM_FLAGS_PHYSICAL_HANDLER; break;
1600	case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE: State.fFlagsFound \|= MM_RAM_FLAGS_PHYSICAL_HANDLER \| MM_RAM_FLAGS_PHYSICAL_WRITE; break;
1601	case PGMPHYSHANDLERTYPE_MMIO:
1602	case PGMPHYSHANDLERTYPE_PHYSICAL_ALL: State.fFlagsFound \|= MM_RAM_FLAGS_PHYSICAL_HANDLER \| MM_RAM_FLAGS_PHYSICAL_ALL; break;
1603	default: AssertMsgFailed(("Invalid type phys type %d\n", pPhys->enmType)); State.cErrors++; break;
1604	}
1605	if ( (fFlags & (MM_RAM_FLAGS_PHYSICAL_HANDLER \| MM_RAM_FLAGS_PHYSICAL_WRITE \| MM_RAM_FLAGS_PHYSICAL_ALL))
1606	!= State.fFlagsFound)
1607	{
1608	AssertMsgFailed(("ram range vs phys handler flags mismatch. GCPhys=%#x fFlags=%#x fFlagsFound=%#x %s\n",
1609	State.GCPhys, fFlags, State.fFlagsFound, pPhys->pszDesc));
1610	State.cErrors++;
1611	}
1612
1613	#ifdef IN_RING3
1614	/* validate that REM is handling it. */
1615	if (!REMR3IsPageAccessHandled(pVM, State.GCPhys))
1616	{
1617	AssertMsgFailed(("ram range vs phys handler REM mismatch. GCPhys=%#x fFlags=%#x %s\n",
1618	State.GCPhys, fFlags, pPhys->pszDesc));
1619	State.cErrors++;
1620	}
1621	#endif
1622	}
1623	else
1624	{
1625	AssertMsgFailed(("ram range vs phys handler mismatch. no handler for GCPhys=%#x\n", State.GCPhys));
1626	State.cErrors++;
1627	}
1628	}
1629
1630	/* virtual flags. */
1631	if (fFlags & (MM_RAM_FLAGS_VIRTUAL_HANDLER \| MM_RAM_FLAGS_VIRTUAL_WRITE \| MM_RAM_FLAGS_VIRTUAL_ALL))
1632	{
1633	State.fFlags = fFlags;
1634	RTAvlroGCPtrDoWithAll(CTXSUFF(&pVM->pgm.s.pTrees)->VirtHandlers, true, pgmVirtHandlerVerifyOneByPhysAddr, &State);
1635	if ( (fFlags & (MM_RAM_FLAGS_VIRTUAL_HANDLER \| MM_RAM_FLAGS_VIRTUAL_WRITE \| MM_RAM_FLAGS_VIRTUAL_ALL))
1636	!= State.fFlagsFound)
1637	{
1638	AssertMsgFailed(("ram range vs virt handler flags mismatch. GCPhys=%#x fFlags=%#x fFlagsFound=%#x\n",
1639	State.GCPhys, fFlags, State.fFlagsFound));
1640	State.cErrors++;
1641	}
1642
1643	}
1644	}
1645	} /* foreach page in ram range. */
1646	} /* foreach ram range. */
1647
1648	/*
1649	* Check that the physical addresses of the virtual handlers matches up.
1650	*/
1651	RTAvlroGCPtrDoWithAll(CTXSUFF(&pVM->pgm.s.pTrees)->VirtHandlers, true, pgmVirtHandlerVerifyOne, &State);
1652
1653	return State.cErrors;
1654	}
1655
1656
1657	/**
1658	* Asserts that there are no mapping conflicts.
1659	*
1660	* @returns Number of conflicts.
1661	* @param pVM The VM Handle.
1662	*/
1663	PGMDECL(unsigned) PGMAssertNoMappingConflicts(PVM pVM)
1664	{
1665	unsigned cErrors = 0;
1666
1667	/*
1668	* Check for mapping conflicts.
1669	*/
1670	for (PPGMMAPPING pMapping = CTXALLSUFF(pVM->pgm.s.pMappings);
1671	pMapping;
1672	pMapping = CTXALLSUFF(pMapping->pNext))
1673	{
1674	/** @todo This is slow and should be optimized, but since it's just assertions I don't care now. */
1675	for (RTGCUINTPTR GCPtr = (RTGCUINTPTR)pMapping->GCPtr;
1676	GCPtr <= (RTGCUINTPTR)pMapping->GCPtrLast;
1677	GCPtr += PAGE_SIZE)
1678	{
1679	int rc = PGMGstGetPage(pVM, (RTGCPTR)GCPtr, NULL, NULL);
1680	if (rc != VERR_PAGE_TABLE_NOT_PRESENT)
1681	{
1682	AssertMsgFailed(("Conflict at %VGv with %s\n", GCPtr, HCSTRING(pMapping->pszDesc)));
1683	cErrors++;
1684	break;
1685	}
1686	}
1687	}
1688
1689	return cErrors;
1690	}
1691
1692
1693	/**
1694	* Asserts that everything related to the guest CR3 is correctly shadowed.
1695	*
1696	* This will call PGMAssertNoMappingConflicts() and PGMAssertHandlerAndFlagsInSync(),
1697	* and assert the correctness of the guest CR3 mapping before asserting that the
1698	* shadow page tables is in sync with the guest page tables.
1699	*
1700	* @returns Number of conflicts.
1701	* @param pVM The VM Handle.
1702	* @param cr3 The current guest CR3 register value.
1703	* @param cr4 The current guest CR4 register value.
1704	*/
1705	PGMDECL(unsigned) PGMAssertCR3(PVM pVM, uint32_t cr3, uint32_t cr4)
1706	{
1707	STAM_PROFILE_START(&pVM->pgm.s.CTXMID(Stat,SyncCR3), a);
1708	unsigned cErrors = PGM_BTH_PFN(AssertCR3, pVM)(pVM, cr3, cr4, 0, ~(RTGCUINTPTR)0);
1709	STAM_PROFILE_STOP(&pVM->pgm.s.CTXMID(Stat,SyncCR3), a);
1710	return cErrors;
1711	}
1712
1713	#endif /* VBOX_STRICT */

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source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAll.cpp@ 2376

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