VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp@ 20552

Last change on this file since 20552 was 20546, checked in by vboxsync, 16 years ago

PGMAllHandler.cpp: wrong assertion? shutting it up for me
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1/* $Id: PGMAllHandler.cpp 20546 2009-06-14 00:25:03Z vboxsync $ */
2/** @file
3 * PGM - Page Manager / Monitor, Access Handlers.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PGM
27#include <VBox/dbgf.h>
28#include <VBox/pgm.h>
29#include <VBox/iom.h>
30#include <VBox/mm.h>
31#include <VBox/em.h>
32#include <VBox/stam.h>
33#include <VBox/rem.h>
34#include <VBox/dbgf.h>
35#include <VBox/rem.h>
36#include "PGMInternal.h"
37#include <VBox/vm.h>
38
39#include <VBox/log.h>
40#include <iprt/assert.h>
41#include <iprt/asm.h>
42#include <iprt/string.h>
43#include <VBox/param.h>
44#include <VBox/err.h>
45#include <VBox/selm.h>
46
47
48/*******************************************************************************
49* Internal Functions *
50*******************************************************************************/
51static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam);
52static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur);
53static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur);
54
55
56
57/**
58 * Register a access handler for a physical range.
59 *
60 * @returns VBox status code.
61 * @retval VINF_SUCCESS when successfully installed.
62 * @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
63 * the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
64 * flagged together with a pool clearing.
65 * @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
66 * one. A debug assertion is raised.
67 *
68 * @param pVM VM Handle.
69 * @param enmType Handler type. Any of the PGMPHYSHANDLERTYPE_PHYSICAL* enums.
70 * @param GCPhys Start physical address.
71 * @param GCPhysLast Last physical address. (inclusive)
72 * @param pfnHandlerR3 The R3 handler.
73 * @param pvUserR3 User argument to the R3 handler.
74 * @param pfnHandlerR0 The R0 handler.
75 * @param pvUserR0 User argument to the R0 handler.
76 * @param pfnHandlerRC The RC handler.
77 * @param pvUserRC User argument to the RC handler. This can be a value
78 * less that 0x10000 or a (non-null) pointer that is
79 * automatically relocatated.
80 * @param pszDesc Pointer to description string. This must not be freed.
81 */
82VMMDECL(int) PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
83 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
84 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
85 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
86 R3PTRTYPE(const char *) pszDesc)
87{
88 Log(("PGMHandlerPhysicalRegisterEx: enmType=%d GCPhys=%RGp GCPhysLast=%RGp pfnHandlerR3=%RHv pvUserR3=%RHv pfnHandlerR0=%RHv pvUserR0=%RHv pfnHandlerGC=%RRv pvUserGC=%RRv pszDesc=%s\n",
89 enmType, GCPhys, GCPhysLast, pfnHandlerR3, pvUserR3, pfnHandlerR0, pvUserR0, pfnHandlerRC, pvUserRC, R3STRING(pszDesc)));
90
91 /*
92 * Validate input.
93 */
94 AssertMsgReturn(GCPhys < GCPhysLast, ("GCPhys >= GCPhysLast (%#x >= %#x)\n", GCPhys, GCPhysLast), VERR_INVALID_PARAMETER);
95 switch (enmType)
96 {
97 case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
98 break;
99 case PGMPHYSHANDLERTYPE_MMIO:
100 case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
101 /* Simplification in PGMPhysRead among other places. */
102 AssertMsgReturn(!(GCPhys & PAGE_OFFSET_MASK), ("%RGp\n", GCPhys), VERR_INVALID_PARAMETER);
103 AssertMsgReturn((GCPhysLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, ("%RGp\n", GCPhysLast), VERR_INVALID_PARAMETER);
104 break;
105 default:
106 AssertMsgFailed(("Invalid input enmType=%d!\n", enmType));
107 return VERR_INVALID_PARAMETER;
108 }
109 AssertMsgReturn( (RTRCUINTPTR)pvUserRC < 0x10000
110 || MMHyperR3ToRC(pVM, MMHyperRCToR3(pVM, pvUserRC)) == pvUserRC,
111 ("Not RC pointer! pvUserRC=%RRv\n", pvUserRC),
112 VERR_INVALID_PARAMETER);
113 AssertMsgReturn( (RTR0UINTPTR)pvUserR0 < 0x10000
114 || MMHyperR3ToR0(pVM, MMHyperR0ToR3(pVM, pvUserR0)) == pvUserR0,
115 ("Not R0 pointer! pvUserR0=%RHv\n", pvUserR0),
116 VERR_INVALID_PARAMETER);
117 AssertPtrReturn(pfnHandlerR3, VERR_INVALID_POINTER);
118 AssertReturn(pfnHandlerR0, VERR_INVALID_PARAMETER);
119 AssertReturn(pfnHandlerRC, VERR_INVALID_PARAMETER);
120
121 /*
122 * We require the range to be within registered ram.
123 * There is no apparent need to support ranges which cover more than one ram range.
124 */
125 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
126 while (pRam && GCPhys > pRam->GCPhysLast)
127 pRam = pRam->CTX_SUFF(pNext);
128 if ( !pRam
129 || GCPhysLast < pRam->GCPhys
130 || GCPhys > pRam->GCPhysLast)
131 {
132#ifdef IN_RING3
133 DBGFR3Info(pVM, "phys", NULL, NULL);
134#endif
135 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
136 return VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
137 }
138
139 /*
140 * Allocate and initialize the new entry.
141 */
142 PPGMPHYSHANDLER pNew;
143 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
144 if (RT_FAILURE(rc))
145 return rc;
146
147 pNew->Core.Key = GCPhys;
148 pNew->Core.KeyLast = GCPhysLast;
149 pNew->enmType = enmType;
150 pNew->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
151 pNew->pfnHandlerR3 = pfnHandlerR3;
152 pNew->pvUserR3 = pvUserR3;
153 pNew->pfnHandlerR0 = pfnHandlerR0;
154 pNew->pvUserR0 = pvUserR0;
155 pNew->pfnHandlerRC = pfnHandlerRC;
156 pNew->pvUserRC = pvUserRC;
157 pNew->pszDesc = pszDesc;
158
159 pgmLock(pVM);
160
161 /*
162 * Try insert into list.
163 */
164 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core))
165 {
166 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pNew, pRam);
167 if (rc == VINF_PGM_SYNC_CR3)
168 rc = VINF_PGM_GCPHYS_ALIASED;
169 pVM->pgm.s.fPhysCacheFlushPending = true;
170 pgmUnlock(pVM);
171 HWACCMFlushTLBOnAllVCpus(pVM);
172#ifndef IN_RING3
173 REMNotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);
174#else
175 REMR3NotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);
176#endif
177 if (rc != VINF_SUCCESS)
178 Log(("PGMHandlerPhysicalRegisterEx: returns %Rrc (%RGp-%RGp)\n", rc, GCPhys, GCPhysLast));
179 return rc;
180 }
181
182 pgmUnlock(pVM);
183
184#if defined(IN_RING3) && defined(VBOX_STRICT)
185 DBGFR3Info(pVM, "handlers", "phys nostats", NULL);
186#endif
187 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp pszDesc=%s\n", GCPhys, GCPhysLast, pszDesc));
188 MMHyperFree(pVM, pNew);
189 return VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
190}
191
192
193/**
194 * Sets ram range flags and attempts updating shadow PTs.
195 *
196 * @returns VBox status code.
197 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
198 * @retval VINF_PGM_SYNC_CR3 when the shadow PTs could be updated because
199 * the guest page aliased or/and mapped by multiple PTs. FFs set.
200 * @param pVM The VM handle.
201 * @param pCur The physical handler.
202 * @param pRam The RAM range.
203 */
204static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam)
205{
206 /*
207 * Iterate the guest ram pages updating the flags and flushing PT entries
208 * mapping the page.
209 */
210 bool fFlushTLBs = false;
211 int rc = VINF_SUCCESS;
212 const unsigned uState = pgmHandlerPhysicalCalcState(pCur);
213 uint32_t cPages = pCur->cPages;
214 uint32_t i = (pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT;
215 for (;;)
216 {
217 PPGMPAGE pPage = &pRam->aPages[i];
218 AssertMsg(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO || PGM_PAGE_IS_MMIO(pPage),
219 ("%RGp %R[pgmpage]\n", pRam->GCPhys + (i << PAGE_SHIFT), pPage));
220
221 /* Only do upgrades. */
222 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
223 {
224 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
225
226 int rc2 = pgmPoolTrackFlushGCPhys(pVM, pPage, &fFlushTLBs);
227 if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
228 rc = rc2;
229 }
230
231 /* next */
232 if (--cPages == 0)
233 break;
234 i++;
235 }
236
237 if (fFlushTLBs && rc == VINF_SUCCESS)
238 {
239 PGM_INVL_ALL_VCPU_TLBS(pVM);
240 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: flushing guest TLBs\n"));
241 }
242 else
243 {
244#ifdef DEBUG_bird
245 Assert(!fFlushTLBs || rc == VINF_PGM_SYNC_CR3);
246#else
247 Assert(!fFlushTLBs);
248#endif
249 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: doesn't flush guest TLBs. rc=%Rrc\n", rc));
250 }
251 return rc;
252}
253
254
255/**
256 * Register a physical page access handler.
257 *
258 * @returns VBox status code.
259 * @param pVM VM Handle.
260 * @param GCPhys Start physical address.
261 */
262VMMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys)
263{
264 /*
265 * Find the handler.
266 */
267 pgmLock(pVM);
268 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
269 if (pCur)
270 {
271 LogFlow(("PGMHandlerPhysicalDeregister: Removing Range %RGp-%RGp %s\n",
272 pCur->Core.Key, pCur->Core.KeyLast, R3STRING(pCur->pszDesc)));
273
274 /*
275 * Clear the page bits and notify the REM about this change.
276 */
277 pgmHandlerPhysicalResetRamFlags(pVM, pCur);
278 pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
279 pgmUnlock(pVM);
280 HWACCMFlushTLBOnAllVCpus(pVM);
281 MMHyperFree(pVM, pCur);
282 return VINF_SUCCESS;
283 }
284 pgmUnlock(pVM);
285
286 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
287 return VERR_PGM_HANDLER_NOT_FOUND;
288}
289
290
291/**
292 * Shared code with modify.
293 */
294static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur)
295{
296 RTGCPHYS GCPhysStart = pCur->Core.Key;
297 RTGCPHYS GCPhysLast = pCur->Core.KeyLast;
298
299 /*
300 * Page align the range.
301 *
302 * Since we've reset (recalculated) the physical handler state of all pages
303 * we can make use of the page states to figure out whether a page should be
304 * included in the REM notification or not.
305 */
306 if ( (pCur->Core.Key & PAGE_OFFSET_MASK)
307 || ((pCur->Core.KeyLast + 1) & PAGE_OFFSET_MASK))
308 {
309 Assert(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO);
310
311 if (GCPhysStart & PAGE_OFFSET_MASK)
312 {
313 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysStart);
314 if ( pPage
315 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
316 {
317 RTGCPHYS GCPhys = (GCPhysStart + (PAGE_SIZE - 1)) & X86_PTE_PAE_PG_MASK;
318 if ( GCPhys > GCPhysLast
319 || GCPhys < GCPhysStart)
320 return;
321 GCPhysStart = GCPhys;
322 }
323 else
324 GCPhysStart &= X86_PTE_PAE_PG_MASK;
325 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
326 }
327
328 if (GCPhysLast & PAGE_OFFSET_MASK)
329 {
330 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysLast);
331 if ( pPage
332 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
333 {
334 RTGCPHYS GCPhys = (GCPhysLast & X86_PTE_PAE_PG_MASK) - 1;
335 if ( GCPhys < GCPhysStart
336 || GCPhys > GCPhysLast)
337 return;
338 GCPhysLast = GCPhys;
339 }
340 else
341 GCPhysLast |= PAGE_OFFSET_MASK;
342 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
343 }
344 }
345
346 /*
347 * Tell REM.
348 */
349 const bool fRestoreAsRAM = pCur->pfnHandlerR3
350 && pCur->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */
351#ifndef IN_RING3
352 REMNotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
353#else
354 REMR3NotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
355#endif
356}
357
358
359/**
360 * pgmHandlerPhysicalResetRamFlags helper that checks for
361 * other handlers on edge pages.
362 */
363DECLINLINE(void) pgmHandlerPhysicalRecalcPageState(PPGM pPGM, RTGCPHYS GCPhys, bool fAbove, PPGMRAMRANGE *ppRamHint)
364{
365 /*
366 * Look for other handlers.
367 */
368 unsigned uState = PGM_PAGE_HNDL_PHYS_STATE_NONE;
369 for (;;)
370 {
371 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, GCPhys, fAbove);
372 if ( !pCur
373 || ((fAbove ? pCur->Core.Key : pCur->Core.KeyLast) >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
374 break;
375 unsigned uThisState = pgmHandlerPhysicalCalcState(pCur);
376 uState = RT_MAX(uState, uThisState);
377
378 /* next? */
379 RTGCPHYS GCPhysNext = fAbove
380 ? pCur->Core.KeyLast + 1
381 : pCur->Core.Key - 1;
382 if ((GCPhysNext >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
383 break;
384 GCPhys = GCPhysNext;
385 }
386
387 /*
388 * Update if we found something that is a higher priority
389 * state than the current.
390 */
391 if (uState != PGM_PAGE_HNDL_PHYS_STATE_NONE)
392 {
393 PPGMPAGE pPage;
394 int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, ppRamHint);
395 if ( RT_SUCCESS(rc)
396 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
397 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
398 else
399 AssertRC(rc);
400 }
401}
402
403
404/**
405 * Resets an aliased page.
406 *
407 * @param pVM The VM.
408 * @param pPage The page.
409 * @param GCPhysPage The page address in case it comes in handy.
410 */
411void pgmHandlerPhysicalResetAliasedPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhysPage)
412{
413 Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO);
414 Assert(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
415
416 /*
417 * Flush any shadow page table references *first*.
418 */
419 bool fFlushTLBs = false;
420 int rc = pgmPoolTrackFlushGCPhys(pVM, pPage, &fFlushTLBs);
421 AssertLogRelRCReturnVoid(rc);
422# ifdef IN_RC
423 if (fFlushTLBs && rc != VINF_PGM_SYNC_CR3)
424 PGM_INVL_VCPU_TLBS(VMMGetCpu0(pVM));
425# else
426 HWACCMFlushTLBOnAllVCpus(pVM);
427# endif
428 pVM->pgm.s.fPhysCacheFlushPending = true;
429
430 /*
431 * Make it an MMIO/Zero page.
432 */
433 PGM_PAGE_SET_HCPHYS(pPage, pVM->pgm.s.HCPhysZeroPg);
434 PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO);
435 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ZERO);
436 PGM_PAGE_SET_PAGEID(pPage, NIL_GMM_PAGEID);
437 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_ALL);
438
439 NOREF(GCPhysPage);
440}
441
442
443/**
444 * Resets ram range flags.
445 *
446 * @returns VBox status code.
447 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
448 * @param pVM The VM handle.
449 * @param pCur The physical handler.
450 *
451 * @remark We don't start messing with the shadow page tables, as we've already got code
452 * in Trap0e which deals with out of sync handler flags (originally conceived for
453 * global pages).
454 */
455static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur)
456{
457 /*
458 * Iterate the guest ram pages updating the state.
459 */
460 RTUINT cPages = pCur->cPages;
461 RTGCPHYS GCPhys = pCur->Core.Key;
462 PPGMRAMRANGE pRamHint = NULL;
463 PPGM pPGM = &pVM->pgm.s;
464 for (;;)
465 {
466 PPGMPAGE pPage;
467 int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, &pRamHint);
468 if (RT_SUCCESS(rc))
469 {
470 /* Reset MMIO2 for MMIO pages to MMIO, since this aliasing is our business.
471 (We don't flip MMIO to RAM though, that's PGMPhys.cpp's job.) */
472 if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO)
473 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhys);
474 AssertMsg(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO || PGM_PAGE_IS_MMIO(pPage), ("%RGp %R[pgmpage]\n", GCPhys, pPage));
475 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_NONE);
476 }
477 else
478 AssertRC(rc);
479
480 /* next */
481 if (--cPages == 0)
482 break;
483 GCPhys += PAGE_SIZE;
484 }
485
486 /*
487 * Check for partial start and end pages.
488 */
489 if (pCur->Core.Key & PAGE_OFFSET_MASK)
490 pgmHandlerPhysicalRecalcPageState(pPGM, pCur->Core.Key - 1, false /* fAbove */, &pRamHint);
491 if ((pCur->Core.KeyLast & PAGE_OFFSET_MASK) != PAGE_SIZE - 1)
492 pgmHandlerPhysicalRecalcPageState(pPGM, pCur->Core.KeyLast + 1, true /* fAbove */, &pRamHint);
493}
494
495
496/**
497 * Modify a physical page access handler.
498 *
499 * Modification can only be done to the range it self, not the type or anything else.
500 *
501 * @returns VBox status code.
502 * For all return codes other than VERR_PGM_HANDLER_NOT_FOUND and VINF_SUCCESS the range is deregistered
503 * and a new registration must be performed!
504 * @param pVM VM handle.
505 * @param GCPhysCurrent Current location.
506 * @param GCPhys New location.
507 * @param GCPhysLast New last location.
508 */
509VMMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
510{
511 /*
512 * Remove it.
513 */
514 int rc;
515 pgmLock(pVM);
516 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhysCurrent);
517 if (pCur)
518 {
519 /*
520 * Clear the ram flags. (We're gonna move or free it!)
521 */
522 pgmHandlerPhysicalResetRamFlags(pVM, pCur);
523 const bool fRestoreAsRAM = pCur->pfnHandlerR3
524 && pCur->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */
525
526 /*
527 * Validate the new range, modify and reinsert.
528 */
529 if (GCPhysLast >= GCPhys)
530 {
531 /*
532 * We require the range to be within registered ram.
533 * There is no apparent need to support ranges which cover more than one ram range.
534 */
535 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
536 while (pRam && GCPhys > pRam->GCPhysLast)
537 pRam = pRam->CTX_SUFF(pNext);
538 if ( pRam
539 && GCPhys <= pRam->GCPhysLast
540 && GCPhysLast >= pRam->GCPhys)
541 {
542 pCur->Core.Key = GCPhys;
543 pCur->Core.KeyLast = GCPhysLast;
544 pCur->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + 1) >> PAGE_SHIFT;
545
546 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pCur->Core))
547 {
548 /*
549 * Set ram flags, flush shadow PT entries and finally tell REM about this.
550 */
551 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
552 pVM->pgm.s.fPhysCacheFlushPending = true;
553
554#ifndef IN_RING3
555 REMNotifyHandlerPhysicalModify(pVM, pCur->enmType, GCPhysCurrent, GCPhys,
556 pCur->Core.KeyLast - GCPhys + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
557#else
558 REMR3NotifyHandlerPhysicalModify(pVM, pCur->enmType, GCPhysCurrent, GCPhys,
559 pCur->Core.KeyLast - GCPhys + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
560#endif
561 pgmUnlock(pVM);
562 HWACCMFlushTLBOnAllVCpus(pVM);
563 Log(("PGMHandlerPhysicalModify: GCPhysCurrent=%RGp -> GCPhys=%RGp GCPhysLast=%RGp\n",
564 GCPhysCurrent, GCPhys, GCPhysLast));
565 return VINF_SUCCESS;
566 }
567
568 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp\n", GCPhys, GCPhysLast));
569 rc = VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
570 }
571 else
572 {
573 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
574 rc = VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
575 }
576 }
577 else
578 {
579 AssertMsgFailed(("Invalid range %RGp-%RGp\n", GCPhys, GCPhysLast));
580 rc = VERR_INVALID_PARAMETER;
581 }
582
583 /*
584 * Invalid new location, free it.
585 * We've only gotta notify REM and free the memory.
586 */
587 pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
588 MMHyperFree(pVM, pCur);
589 }
590 else
591 {
592 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhysCurrent));
593 rc = VERR_PGM_HANDLER_NOT_FOUND;
594 }
595
596 pgmUnlock(pVM);
597 return rc;
598}
599
600
601/**
602 * Changes the callbacks associated with a physical access handler.
603 *
604 * @returns VBox status code.
605 * @param pVM VM Handle.
606 * @param GCPhys Start physical address.
607 * @param pfnHandlerR3 The R3 handler.
608 * @param pvUserR3 User argument to the R3 handler.
609 * @param pfnHandlerR0 The R0 handler.
610 * @param pvUserR0 User argument to the R0 handler.
611 * @param pfnHandlerRC The RC handler.
612 * @param pvUserRC User argument to the RC handler. Values larger or
613 * equal to 0x10000 will be relocated automatically.
614 * @param pszDesc Pointer to description string. This must not be freed.
615 */
616VMMDECL(int) PGMHandlerPhysicalChangeCallbacks(PVM pVM, RTGCPHYS GCPhys,
617 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
618 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
619 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
620 R3PTRTYPE(const char *) pszDesc)
621{
622 /*
623 * Get the handler.
624 */
625 int rc = VINF_SUCCESS;
626 pgmLock(pVM);
627 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
628 if (pCur)
629 {
630 /*
631 * Change callbacks.
632 */
633 pCur->pfnHandlerR3 = pfnHandlerR3;
634 pCur->pvUserR3 = pvUserR3;
635 pCur->pfnHandlerR0 = pfnHandlerR0;
636 pCur->pvUserR0 = pvUserR0;
637 pCur->pfnHandlerRC = pfnHandlerRC;
638 pCur->pvUserRC = pvUserRC;
639 pCur->pszDesc = pszDesc;
640 }
641 else
642 {
643 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
644 rc = VERR_PGM_HANDLER_NOT_FOUND;
645 }
646
647 pgmUnlock(pVM);
648 return rc;
649}
650
651
652/**
653 * Splits a physical access handler in two.
654 *
655 * @returns VBox status code.
656 * @param pVM VM Handle.
657 * @param GCPhys Start physical address of the handler.
658 * @param GCPhysSplit The split address.
659 */
660VMMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit)
661{
662 AssertReturn(GCPhys < GCPhysSplit, VERR_INVALID_PARAMETER);
663
664 /*
665 * Do the allocation without owning the lock.
666 */
667 PPGMPHYSHANDLER pNew;
668 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
669 if (RT_FAILURE(rc))
670 return rc;
671
672 /*
673 * Get the handler.
674 */
675 pgmLock(pVM);
676 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
677 if (RT_LIKELY(pCur))
678 {
679 if (RT_LIKELY(GCPhysSplit <= pCur->Core.KeyLast))
680 {
681 /*
682 * Create new handler node for the 2nd half.
683 */
684 *pNew = *pCur;
685 pNew->Core.Key = GCPhysSplit;
686 pNew->cPages = (pNew->Core.KeyLast - (pNew->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
687
688 pCur->Core.KeyLast = GCPhysSplit - 1;
689 pCur->cPages = (pCur->Core.KeyLast - (pCur->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
690
691 if (RT_LIKELY(RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core)))
692 {
693 LogFlow(("PGMHandlerPhysicalSplit: %RGp-%RGp and %RGp-%RGp\n",
694 pCur->Core.Key, pCur->Core.KeyLast, pNew->Core.Key, pNew->Core.KeyLast));
695 pgmUnlock(pVM);
696 return VINF_SUCCESS;
697 }
698 AssertMsgFailed(("whu?\n"));
699 rc = VERR_INTERNAL_ERROR;
700 }
701 else
702 {
703 AssertMsgFailed(("outside range: %RGp-%RGp split %RGp\n", pCur->Core.Key, pCur->Core.KeyLast, GCPhysSplit));
704 rc = VERR_INVALID_PARAMETER;
705 }
706 }
707 else
708 {
709 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
710 rc = VERR_PGM_HANDLER_NOT_FOUND;
711 }
712 pgmUnlock(pVM);
713 MMHyperFree(pVM, pNew);
714 return rc;
715}
716
717
718/**
719 * Joins up two adjacent physical access handlers which has the same callbacks.
720 *
721 * @returns VBox status code.
722 * @param pVM VM Handle.
723 * @param GCPhys1 Start physical address of the first handler.
724 * @param GCPhys2 Start physical address of the second handler.
725 */
726VMMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2)
727{
728 /*
729 * Get the handlers.
730 */
731 int rc;
732 pgmLock(pVM);
733 PPGMPHYSHANDLER pCur1 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys1);
734 if (RT_LIKELY(pCur1))
735 {
736 PPGMPHYSHANDLER pCur2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
737 if (RT_LIKELY(pCur2))
738 {
739 /*
740 * Make sure that they are adjacent, and that they've got the same callbacks.
741 */
742 if (RT_LIKELY(pCur1->Core.KeyLast + 1 == pCur2->Core.Key))
743 {
744 if (RT_LIKELY( pCur1->pfnHandlerRC == pCur2->pfnHandlerRC
745 && pCur1->pfnHandlerR0 == pCur2->pfnHandlerR0
746 && pCur1->pfnHandlerR3 == pCur2->pfnHandlerR3))
747 {
748 PPGMPHYSHANDLER pCur3 = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
749 if (RT_LIKELY(pCur3 == pCur2))
750 {
751 pCur1->Core.KeyLast = pCur2->Core.KeyLast;
752 pCur1->cPages = (pCur1->Core.KeyLast - (pCur1->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
753 LogFlow(("PGMHandlerPhysicalJoin: %RGp-%RGp %RGp-%RGp\n",
754 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
755 pgmUnlock(pVM);
756 MMHyperFree(pVM, pCur2);
757 return VINF_SUCCESS;
758 }
759
760 Assert(pCur3 == pCur2);
761 rc = VERR_INTERNAL_ERROR;
762 }
763 else
764 {
765 AssertMsgFailed(("mismatching handlers\n"));
766 rc = VERR_ACCESS_DENIED;
767 }
768 }
769 else
770 {
771 AssertMsgFailed(("not adjacent: %RGp-%RGp %RGp-%RGp\n",
772 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
773 rc = VERR_INVALID_PARAMETER;
774 }
775 }
776 else
777 {
778 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys2));
779 rc = VERR_PGM_HANDLER_NOT_FOUND;
780 }
781 }
782 else
783 {
784 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys1));
785 rc = VERR_PGM_HANDLER_NOT_FOUND;
786 }
787 pgmUnlock(pVM);
788 return rc;
789
790}
791
792
793/**
794 * Resets any modifications to individual pages in a physical
795 * page access handler region.
796 *
797 * This is used in pair with PGMHandlerPhysicalPageTempOff() or
798 * PGMHandlerPhysicalPageAlias().
799 *
800 * @returns VBox status code.
801 * @param pVM VM Handle
802 * @param GCPhys The start address of the handler regions, i.e. what you
803 * passed to PGMR3HandlerPhysicalRegister(),
804 * PGMHandlerPhysicalRegisterEx() or
805 * PGMHandlerPhysicalModify().
806 */
807VMMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys)
808{
809 LogFlow(("PGMHandlerPhysicalReset GCPhys=%RGp\n", GCPhys));
810 pgmLock(pVM);
811
812 /*
813 * Find the handler.
814 */
815 int rc;
816 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
817 if (RT_LIKELY(pCur))
818 {
819 /*
820 * Validate type.
821 */
822 switch (pCur->enmType)
823 {
824 case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
825 case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
826 case PGMPHYSHANDLERTYPE_MMIO: /* NOTE: Only use when clearing MMIO ranges with aliased MMIO2 pages! */
827 {
828 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,PhysHandlerReset)); /**@Todo move out of switch */
829 PPGMRAMRANGE pRam = pgmPhysGetRange(&pVM->pgm.s, GCPhys);
830 Assert(pRam);
831 Assert(pRam->GCPhys <= pCur->Core.Key);
832 Assert(pRam->GCPhysLast >= pCur->Core.KeyLast);
833
834 if (pCur->enmType == PGMPHYSHANDLERTYPE_MMIO)
835 {
836 /*
837 * Reset all the PGMPAGETYPE_MMIO2_ALIAS_MMIO pages first and that's it.
838 * This could probably be optimized a bit wrt to flushing, but I'm too lazy
839 * to do that now...
840 */
841 PPGMPAGE pPage = &pRam->aPages[(pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT];
842 uint32_t cLeft = pCur->cPages;
843 while (cLeft-- > 0)
844 {
845 if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO)
846 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)(uintptr_t)(pPage - &pRam->aPages[0]) << PAGE_SHIFT));
847 Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO);
848 pPage++;
849 }
850 }
851 else
852 {
853 /*
854 * Set the flags and flush shadow PT entries.
855 */
856 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
857 pVM->pgm.s.fPhysCacheFlushPending = true;
858 HWACCMFlushTLBOnAllVCpus(pVM);
859 }
860
861 rc = VINF_SUCCESS;
862 break;
863 }
864
865 /*
866 * Invalid.
867 */
868 default:
869 AssertMsgFailed(("Invalid type %d! Corruption!\n", pCur->enmType));
870 rc = VERR_INTERNAL_ERROR;
871 break;
872 }
873 }
874 else
875 {
876 AssertMsgFailed(("Didn't find MMIO Range starting at %#x\n", GCPhys));
877 rc = VERR_PGM_HANDLER_NOT_FOUND;
878 }
879
880 pgmUnlock(pVM);
881 return rc;
882}
883
884
885/**
886 * Temporarily turns off the access monitoring of a page within a monitored
887 * physical write/all page access handler region.
888 *
889 * Use this when no further \#PFs are required for that page. Be aware that
890 * a page directory sync might reset the flags, and turn on access monitoring
891 * for the page.
892 *
893 * The caller must do required page table modifications.
894 *
895 * @returns VBox status code.
896 * @param pVM VM Handle
897 * @param GCPhys The start address of the access handler. This
898 * must be a fully page aligned range or we risk
899 * messing up other handlers installed for the
900 * start and end pages.
901 * @param GCPhysPage The physical address of the page to turn off
902 * access monitoring for.
903 */
904VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)
905{
906 LogFlow(("PGMHandlerPhysicalPageTempOff GCPhys=%RGp\n", GCPhys));
907
908 /*
909 * Validate the range.
910 */
911 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
912 if (RT_LIKELY(pCur))
913 {
914 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
915 && GCPhysPage <= pCur->Core.KeyLast))
916 {
917 Assert(!(pCur->Core.Key & PAGE_OFFSET_MASK));
918 Assert((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
919
920 AssertReturn( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
921 || pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL,
922 VERR_ACCESS_DENIED);
923
924 /*
925 * Change the page status.
926 */
927 PPGMPAGE pPage;
928 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPage, &pPage);
929 AssertRCReturn(rc, rc);
930 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
931#ifndef IN_RC
932 HWACCMInvalidatePhysPage(pVM, GCPhysPage);
933#endif
934 return VINF_SUCCESS;
935 }
936
937 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
938 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
939 return VERR_INVALID_PARAMETER;
940 }
941
942 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
943 return VERR_PGM_HANDLER_NOT_FOUND;
944}
945
946
947/**
948 * Replaces an MMIO page with an MMIO2 page.
949 *
950 * This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
951 * PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
952 * backing, the caller must provide a replacement page. For various reasons the
953 * replacement page must be an MMIO2 page.
954 *
955 * The caller must do required page table modifications. You can get away
956 * without making any modifations since it's an MMIO page, the cost is an extra
957 * \#PF which will the resync the page.
958 *
959 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
960 *
961 * The caller may still get handler callback even after this call and must be
962 * able to deal correctly with such calls. The reason for these callbacks are
963 * either that we're executing in the recompiler (which doesn't know about this
964 * arrangement) or that we've been restored from saved state (where we won't
965 * save the change).
966 *
967 * @returns VBox status code.
968 * @param pVM The VM handle
969 * @param GCPhys The start address of the access handler. This
970 * must be a fully page aligned range or we risk
971 * messing up other handlers installed for the
972 * start and end pages.
973 * @param GCPhysPage The physical address of the page to turn off
974 * access monitoring for.
975 * @param GCPhysPageRemap The physical address of the MMIO2 page that
976 * serves as backing memory.
977 *
978 * @remark May cause a page pool flush if used on a page that is already
979 * aliased.
980 *
981 * @note This trick does only work reliably if the two pages are never ever
982 * mapped in the same page table. If they are the page pool code will
983 * be confused should either of them be flushed. See the special case
984 * of zero page aliasing mentioned in #3170.
985 *
986 */
987VMMDECL(int) PGMHandlerPhysicalPageAlias(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTGCPHYS GCPhysPageRemap)
988{
989/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
990
991 /*
992 * Lookup and validate the range.
993 */
994 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
995 if (RT_LIKELY(pCur))
996 {
997 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
998 && GCPhysPage <= pCur->Core.KeyLast))
999 {
1000 AssertReturn(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, VERR_ACCESS_DENIED);
1001 AssertReturn(!(pCur->Core.Key & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
1002 AssertReturn((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, VERR_INVALID_PARAMETER);
1003
1004 /*
1005 * Get and validate the two pages.
1006 */
1007 PPGMPAGE pPageRemap;
1008 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPageRemap, &pPageRemap);
1009 AssertRCReturn(rc, rc);
1010 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPageRemap) == PGMPAGETYPE_MMIO2,
1011 ("GCPhysPageRemap=%RGp %R[pgmpage]\n", GCPhysPageRemap, pPageRemap),
1012 VERR_PGM_PHYS_NOT_MMIO2);
1013
1014 PPGMPAGE pPage;
1015 rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPage, &pPage);
1016 AssertRCReturn(rc, rc);
1017 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1018 {
1019 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1020 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1021 VERR_PGM_PHYS_NOT_MMIO2);
1022 if (PGM_PAGE_GET_HCPHYS(pPage) == PGM_PAGE_GET_HCPHYS(pPageRemap))
1023 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1024
1025 /*
1026 * The page is already mapped as some other page, reset it
1027 * to an MMIO/ZERO page before doing the new mapping.
1028 */
1029 Log(("PGMHandlerPhysicalPageAlias: GCPhysPage=%RGp (%R[pgmpage]; %RHp -> %RHp\n",
1030 GCPhysPage, pPage, PGM_PAGE_GET_HCPHYS(pPage), PGM_PAGE_GET_HCPHYS(pPageRemap)));
1031 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage);
1032 }
1033 Assert(PGM_PAGE_IS_ZERO(pPage));
1034
1035 /*
1036 * Do the actual remapping here.
1037 * This page now serves as an alias for the backing memory specified.
1038 */
1039 LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RGp (%R[pgmpage])\n",
1040 GCPhysPage, pPage, GCPhysPageRemap, pPageRemap ));
1041 PGM_PAGE_SET_HCPHYS(pPage, PGM_PAGE_GET_HCPHYS(pPageRemap));
1042 PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1043 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
1044 PGM_PAGE_SET_PAGEID(pPage, PGM_PAGE_GET_PAGEID(pPageRemap));
1045 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1046 LogFlow(("PGMHandlerPhysicalPageAlias: => %R[pgmpage]\n", pPage));
1047
1048#ifndef IN_RC
1049 HWACCMInvalidatePhysPage(pVM, GCPhysPage);
1050#endif
1051 return VINF_SUCCESS;
1052 }
1053
1054 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1055 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1056 return VERR_INVALID_PARAMETER;
1057 }
1058
1059 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1060 return VERR_PGM_HANDLER_NOT_FOUND;
1061}
1062
1063/**
1064 * Replaces an MMIO page with an arbitrary HC page.
1065 *
1066 * This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
1067 * PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
1068 * backing, the caller must provide a replacement page. For various reasons the
1069 * replacement page must be an MMIO2 page.
1070 *
1071 * The caller must do required page table modifications. You can get away
1072 * without making any modifations since it's an MMIO page, the cost is an extra
1073 * \#PF which will the resync the page.
1074 *
1075 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
1076 *
1077 * The caller may still get handler callback even after this call and must be
1078 * able to deal correctly with such calls. The reason for these callbacks are
1079 * either that we're executing in the recompiler (which doesn't know about this
1080 * arrangement) or that we've been restored from saved state (where we won't
1081 * save the change).
1082 *
1083 * @returns VBox status code.
1084 * @param pVM The VM handle
1085 * @param GCPhys The start address of the access handler. This
1086 * must be a fully page aligned range or we risk
1087 * messing up other handlers installed for the
1088 * start and end pages.
1089 * @param GCPhysPage The physical address of the page to turn off
1090 * access monitoring for.
1091 * @param HCPhysPageRemap The physical address of the HC page that
1092 * serves as backing memory.
1093 *
1094 * @remark May cause a page pool flush if used on a page that is already
1095 * aliased.
1096 */
1097VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap)
1098{
1099/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
1100
1101 /*
1102 * Lookup and validate the range.
1103 */
1104 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1105 if (RT_LIKELY(pCur))
1106 {
1107 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1108 && GCPhysPage <= pCur->Core.KeyLast))
1109 {
1110 AssertReturn(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, VERR_ACCESS_DENIED);
1111 AssertReturn(!(pCur->Core.Key & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
1112 AssertReturn((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, VERR_INVALID_PARAMETER);
1113
1114 /*
1115 * Get and validate the pages.
1116 */
1117 PPGMPAGE pPage;
1118 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPage, &pPage);
1119 AssertRCReturn(rc, rc);
1120 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1121 {
1122 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1123 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1124 VERR_PGM_PHYS_NOT_MMIO2);
1125 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1126 }
1127 Assert(PGM_PAGE_IS_ZERO(pPage));
1128
1129 /*
1130 * Do the actual remapping here.
1131 * This page now serves as an alias for the backing memory specified.
1132 */
1133 LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RHp\n",
1134 GCPhysPage, pPage, HCPhysPageRemap));
1135 PGM_PAGE_SET_HCPHYS(pPage, HCPhysPageRemap);
1136 PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1137 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
1138 /** @todo hack alert
1139 * This needs to be done properly. Currently we get away with it as the recompiler directly calls
1140 * IOM read and write functions. Access through PGMPhysRead/Write will crash the process.
1141 */
1142 PGM_PAGE_SET_PAGEID(pPage, NIL_GMM_PAGEID);
1143 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1144 LogFlow(("PGMHandlerPhysicalPageAliasHC: => %R[pgmpage]\n", pPage));
1145
1146#ifndef IN_RC
1147 HWACCMInvalidatePhysPage(pVM, GCPhysPage);
1148#endif
1149 return VINF_SUCCESS;
1150 }
1151
1152 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1153 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1154 return VERR_INVALID_PARAMETER;
1155 }
1156
1157 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1158 return VERR_PGM_HANDLER_NOT_FOUND;
1159}
1160
1161
1162/**
1163 * Checks if a physical range is handled
1164 *
1165 * @returns boolean
1166 * @param pVM VM Handle.
1167 * @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister().
1168 * @remarks Caller must take the PGM lock...
1169 * @threads EMT.
1170 */
1171VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys)
1172{
1173 /*
1174 * Find the handler.
1175 */
1176 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1177 if (pCur)
1178 {
1179 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1180 Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
1181 || pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL
1182 || pCur->enmType == PGMPHYSHANDLERTYPE_MMIO);
1183 return true;
1184 }
1185
1186 return false;
1187}
1188
1189
1190/**
1191 * Checks if it's an disabled all access handler or write access handler at the
1192 * given address.
1193 *
1194 * @returns true if it's an all access handler, false if it's a write access
1195 * handler.
1196 * @param pVM Pointer to the shared VM structure.
1197 * @param GCPhys The address of the page with a disabled handler.
1198 *
1199 * @remarks The caller, PGMR3PhysTlbGCPhys2Ptr, must hold the PGM lock.
1200 */
1201bool pgmHandlerPhysicalIsAll(PVM pVM, RTGCPHYS GCPhys)
1202{
1203 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1204 AssertReturn(pCur, true);
1205 Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
1206 || pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL
1207 || pCur->enmType == PGMPHYSHANDLERTYPE_MMIO); /* sanity */
1208 /* Only whole pages can be disabled. */
1209 Assert( pCur->Core.Key <= (GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK)
1210 && pCur->Core.KeyLast >= (GCPhys | PAGE_OFFSET_MASK));
1211 return pCur->enmType != PGMPHYSHANDLERTYPE_PHYSICAL_WRITE;
1212}
1213
1214
1215/**
1216 * Check if particular guest's VA is being monitored.
1217 *
1218 * @returns true or false
1219 * @param pVM VM handle.
1220 * @param GCPtr Virtual address.
1221 * @remarks Will acquire the PGM lock.
1222 * @threads Any.
1223 */
1224VMMDECL(bool) PGMHandlerVirtualIsRegistered(PVM pVM, RTGCPTR GCPtr)
1225{
1226 pgmLock(pVM);
1227 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)RTAvlroGCPtrGet(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, GCPtr);
1228 pgmUnlock(pVM);
1229
1230 return pCur != NULL;
1231}
1232
1233
1234/**
1235 * Search for virtual handler with matching physical address
1236 *
1237 * @returns VBox status code
1238 * @param pVM The VM handle.
1239 * @param GCPhys GC physical address to search for.
1240 * @param ppVirt Where to store the pointer to the virtual handler structure.
1241 * @param piPage Where to store the pointer to the index of the cached physical page.
1242 */
1243int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER *ppVirt, unsigned *piPage)
1244{
1245 STAM_PROFILE_START(&pVM->pgm.s.CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1246 Assert(ppVirt);
1247
1248 pgmLock(pVM);
1249 PPGMPHYS2VIRTHANDLER pCur;
1250 pCur = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, GCPhys);
1251 if (pCur)
1252 {
1253 /* found a match! */
1254 *ppVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1255 *piPage = pCur - &(*ppVirt)->aPhysToVirt[0];
1256 pgmUnlock(pVM);
1257
1258#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1259 AssertRelease(pCur->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD);
1260#endif
1261 LogFlow(("PHYS2VIRT: found match for %RGp -> %RGv *piPage=%#x\n", GCPhys, (*ppVirt)->Core.Key, *piPage));
1262 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1263 return VINF_SUCCESS;
1264 }
1265
1266 pgmUnlock(pVM);
1267 *ppVirt = NULL;
1268 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1269 return VERR_PGM_HANDLER_NOT_FOUND;
1270}
1271
1272
1273/**
1274 * Deal with aliases in phys2virt.
1275 *
1276 * As pointed out by the various todos, this currently only deals with
1277 * aliases where the two ranges match 100%.
1278 *
1279 * @param pVM The VM handle.
1280 * @param pPhys2Virt The node we failed insert.
1281 */
1282static void pgmHandlerVirtualInsertAliased(PVM pVM, PPGMPHYS2VIRTHANDLER pPhys2Virt)
1283{
1284 /*
1285 * First find the node which is conflicting with us.
1286 */
1287 /** @todo Deal with partial overlapping. (Unlikly situation, so I'm too lazy to do anything about it now.) */
1288 /** @todo check if the current head node covers the ground we do. This is highly unlikely
1289 * and I'm too lazy to implement this now as it will require sorting the list and stuff like that. */
1290 PPGMPHYS2VIRTHANDLER pHead = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
1291#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1292 AssertReleaseMsg(pHead != pPhys2Virt, ("%RGp-%RGp offVirtHandler=%#RX32\n",
1293 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler));
1294#endif
1295 if (RT_UNLIKELY(!pHead || pHead->Core.KeyLast != pPhys2Virt->Core.KeyLast))
1296 {
1297 /** @todo do something clever here... */
1298 LogRel(("pgmHandlerVirtualInsertAliased: %RGp-%RGp\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
1299 pPhys2Virt->offNextAlias = 0;
1300 return;
1301 }
1302
1303 /*
1304 * Insert ourselves as the next node.
1305 */
1306 if (!(pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
1307 pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IN_TREE;
1308 else
1309 {
1310 PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pHead + (pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
1311 pPhys2Virt->offNextAlias = ((intptr_t)pNext - (intptr_t)pPhys2Virt)
1312 | PGMPHYS2VIRTHANDLER_IN_TREE;
1313 }
1314 pHead->offNextAlias = ((intptr_t)pPhys2Virt - (intptr_t)pHead)
1315 | (pHead->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
1316 Log(("pgmHandlerVirtualInsertAliased: %RGp-%RGp offNextAlias=%#RX32\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1317}
1318
1319
1320/**
1321 * Resets one virtual handler range.
1322 *
1323 * This is called by HandlerVirtualUpdate when it has detected some kind of
1324 * problem and have started clearing the virtual handler page states (or
1325 * when there have been registration/deregistrations). For this reason this
1326 * function will only update the page status if it's lower than desired.
1327 *
1328 * @returns 0
1329 * @param pNode Pointer to a PGMVIRTHANDLER.
1330 * @param pvUser The VM handle.
1331 */
1332DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1333{
1334 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1335 PVM pVM = (PVM)pvUser;
1336
1337 Assert(PGMIsLockOwner(pVM));
1338 /*
1339 * Iterate the pages and apply the new state.
1340 */
1341 unsigned uState = pgmHandlerVirtualCalcState(pCur);
1342 PPGMRAMRANGE pRamHint = NULL;
1343 RTGCUINTPTR offPage = ((RTGCUINTPTR)pCur->Core.Key & PAGE_OFFSET_MASK);
1344 RTGCUINTPTR cbLeft = pCur->cb;
1345 for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1346 {
1347 PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
1348 if (pPhys2Virt->Core.Key != NIL_RTGCPHYS)
1349 {
1350 /*
1351 * Update the page state wrt virtual handlers.
1352 */
1353 PPGMPAGE pPage;
1354 int rc = pgmPhysGetPageWithHintEx(&pVM->pgm.s, pPhys2Virt->Core.Key, &pPage, &pRamHint);
1355 if ( RT_SUCCESS(rc)
1356 && PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1357 PGM_PAGE_SET_HNDL_VIRT_STATE(pPage, uState);
1358 else
1359 AssertRC(rc);
1360
1361 /*
1362 * Need to insert the page in the Phys2Virt lookup tree?
1363 */
1364 if (pPhys2Virt->Core.KeyLast == NIL_RTGCPHYS)
1365 {
1366#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1367 AssertRelease(!pPhys2Virt->offNextAlias);
1368#endif
1369 unsigned cbPhys = cbLeft;
1370 if (cbPhys > PAGE_SIZE - offPage)
1371 cbPhys = PAGE_SIZE - offPage;
1372 else
1373 Assert(iPage == pCur->cPages - 1);
1374 pPhys2Virt->Core.KeyLast = pPhys2Virt->Core.Key + cbPhys - 1; /* inclusive */
1375 pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IS_HEAD | PGMPHYS2VIRTHANDLER_IN_TREE;
1376 if (!RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, &pPhys2Virt->Core))
1377 pgmHandlerVirtualInsertAliased(pVM, pPhys2Virt);
1378#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1379 else
1380 AssertReleaseMsg(RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key) == &pPhys2Virt->Core,
1381 ("%RGp-%RGp offNextAlias=%#RX32\n",
1382 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1383#endif
1384 Log2(("PHYS2VIRT: Insert physical range %RGp-%RGp offNextAlias=%#RX32 %s\n",
1385 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, R3STRING(pCur->pszDesc)));
1386 }
1387 }
1388 cbLeft -= PAGE_SIZE - offPage;
1389 offPage = 0;
1390 }
1391
1392 return 0;
1393}
1394
1395#if defined(VBOX_STRICT) || defined(LOG_ENABLED)
1396
1397/**
1398 * Worker for pgmHandlerVirtualDumpPhysPages.
1399 *
1400 * @returns 0 (continue enumeration).
1401 * @param pNode The virtual handler node.
1402 * @param pvUser User argument, unused.
1403 */
1404static DECLCALLBACK(int) pgmHandlerVirtualDumpPhysPagesCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1405{
1406 PPGMPHYS2VIRTHANDLER pCur = (PPGMPHYS2VIRTHANDLER)pNode;
1407 PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1408 Log(("PHYS2VIRT: Range %RGp-%RGp for virtual handler: %s\n", pCur->Core.Key, pCur->Core.KeyLast, pVirt->pszDesc));
1409 return 0;
1410}
1411
1412
1413/**
1414 * Assertion / logging helper for dumping all the
1415 * virtual handlers to the log.
1416 *
1417 * @param pVM Pointer to the shared VM structure.
1418 */
1419void pgmHandlerVirtualDumpPhysPages(PVM pVM)
1420{
1421 RTAvlroGCPhysDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, true /* from left */,
1422 pgmHandlerVirtualDumpPhysPagesCallback, 0);
1423}
1424
1425#endif /* VBOX_STRICT || LOG_ENABLED */
1426#ifdef VBOX_STRICT
1427
1428/**
1429 * State structure used by the PGMAssertHandlerAndFlagsInSync() function
1430 * and its AVL enumerators.
1431 */
1432typedef struct PGMAHAFIS
1433{
1434 /** The current physical address. */
1435 RTGCPHYS GCPhys;
1436 /** The state we've calculated. */
1437 unsigned uVirtStateFound;
1438 /** The state we're matching up to. */
1439 unsigned uVirtState;
1440 /** Number of errors. */
1441 unsigned cErrors;
1442 /** The VM handle. */
1443 PVM pVM;
1444} PGMAHAFIS, *PPGMAHAFIS;
1445
1446
1447#if 0 /* unused */
1448/**
1449 * Verify virtual handler by matching physical address.
1450 *
1451 * @returns 0
1452 * @param pNode Pointer to a PGMVIRTHANDLER.
1453 * @param pvUser Pointer to user parameter.
1454 */
1455static DECLCALLBACK(int) pgmHandlerVirtualVerifyOneByPhysAddr(PAVLROGCPTRNODECORE pNode, void *pvUser)
1456{
1457 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1458 PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1459
1460 for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1461 {
1462 if ((pCur->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) == pState->GCPhys)
1463 {
1464 unsigned uState = pgmHandlerVirtualCalcState(pCur);
1465 if (pState->uVirtState < uState)
1466 {
1467 error
1468 }
1469
1470 if (pState->uVirtState == uState)
1471 break; //??
1472 }
1473 }
1474 return 0;
1475}
1476#endif /* unused */
1477
1478
1479/**
1480 * Verify a virtual handler (enumeration callback).
1481 *
1482 * Called by PGMAssertHandlerAndFlagsInSync to check the sanity of all
1483 * the virtual handlers, esp. that the physical addresses matches up.
1484 *
1485 * @returns 0
1486 * @param pNode Pointer to a PGMVIRTHANDLER.
1487 * @param pvUser Pointer to a PPGMAHAFIS structure.
1488 */
1489static DECLCALLBACK(int) pgmHandlerVirtualVerifyOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1490{
1491 PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)pNode;
1492 PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1493 PVM pVM = pState->pVM;
1494
1495 /*
1496 * Validate the type and calc state.
1497 */
1498 switch (pVirt->enmType)
1499 {
1500 case PGMVIRTHANDLERTYPE_WRITE:
1501 case PGMVIRTHANDLERTYPE_ALL:
1502 break;
1503 default:
1504 AssertMsgFailed(("unknown/wrong enmType=%d\n", pVirt->enmType));
1505 pState->cErrors++;
1506 return 0;
1507 }
1508 const unsigned uState = pgmHandlerVirtualCalcState(pVirt);
1509
1510 /*
1511 * Check key alignment.
1512 */
1513 if ( (pVirt->aPhysToVirt[0].Core.Key & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.Key & PAGE_OFFSET_MASK)
1514 && pVirt->aPhysToVirt[0].Core.Key != NIL_RTGCPHYS)
1515 {
1516 AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1517 pVirt->aPhysToVirt[0].Core.Key, pVirt->Core.Key, R3STRING(pVirt->pszDesc)));
1518 pState->cErrors++;
1519 }
1520
1521 if ( (pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.KeyLast & PAGE_OFFSET_MASK)
1522 && pVirt->aPhysToVirt[pVirt->cPages - 1].Core.Key != NIL_RTGCPHYS)
1523 {
1524 AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1525 pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast, pVirt->Core.KeyLast, R3STRING(pVirt->pszDesc)));
1526 pState->cErrors++;
1527 }
1528
1529 /*
1530 * Check pages for sanity and state.
1531 */
1532 RTGCUINTPTR GCPtr = (RTGCUINTPTR)pVirt->Core.Key;
1533 for (unsigned iPage = 0; iPage < pVirt->cPages; iPage++, GCPtr += PAGE_SIZE)
1534 {
1535 for (unsigned i=0;i<pVM->cCPUs;i++)
1536 {
1537 PVMCPU pVCpu = &pVM->aCpus[i];
1538
1539 RTGCPHYS GCPhysGst;
1540 uint64_t fGst;
1541 int rc = PGMGstGetPage(pVCpu, (RTGCPTR)GCPtr, &fGst, &GCPhysGst);
1542 if ( rc == VERR_PAGE_NOT_PRESENT
1543 || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1544 {
1545 if (pVirt->aPhysToVirt[iPage].Core.Key != NIL_RTGCPHYS)
1546 {
1547 AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysNew=~0 iPage=%#x %RGv %s\n",
1548 pVirt->aPhysToVirt[iPage].Core.Key, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1549 pState->cErrors++;
1550 }
1551 continue;
1552 }
1553
1554 AssertRCReturn(rc, 0);
1555 if ((pVirt->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) != GCPhysGst)
1556 {
1557 AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1558 pVirt->aPhysToVirt[iPage].Core.Key, GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1559 pState->cErrors++;
1560 continue;
1561 }
1562
1563 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysGst);
1564 if (!pPage)
1565 {
1566 AssertMsgFailed(("virt handler getting ram flags. GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1567 GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1568 pState->cErrors++;
1569 continue;
1570 }
1571
1572 if (PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1573 {
1574 AssertMsgFailed(("virt handler state mismatch. pPage=%R[pgmpage] GCPhysGst=%RGp iPage=%#x %RGv state=%d expected>=%d %s\n",
1575 pPage, GCPhysGst, iPage, GCPtr, PGM_PAGE_GET_HNDL_VIRT_STATE(pPage), uState, R3STRING(pVirt->pszDesc)));
1576 pState->cErrors++;
1577 continue;
1578 }
1579 } /* for each VCPU */
1580 } /* for pages in virtual mapping. */
1581
1582 return 0;
1583}
1584
1585
1586/**
1587 * Asserts that the handlers+guest-page-tables == ramrange-flags and
1588 * that the physical addresses associated with virtual handlers are correct.
1589 *
1590 * @returns Number of mismatches.
1591 * @param pVM The VM handle.
1592 */
1593VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM)
1594{
1595 PPGM pPGM = &pVM->pgm.s;
1596 PGMAHAFIS State;
1597 State.GCPhys = 0;
1598 State.uVirtState = 0;
1599 State.uVirtStateFound = 0;
1600 State.cErrors = 0;
1601 State.pVM = pVM;
1602
1603 /*
1604 * Check the RAM flags against the handlers.
1605 */
1606 for (PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRanges); pRam; pRam = pRam->CTX_SUFF(pNext))
1607 {
1608 const unsigned cPages = pRam->cb >> PAGE_SHIFT;
1609 for (unsigned iPage = 0; iPage < cPages; iPage++)
1610 {
1611 PGMPAGE const *pPage = &pRam->aPages[iPage];
1612 if (PGM_PAGE_HAS_ANY_HANDLERS(pPage))
1613 {
1614 State.GCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT);
1615
1616 /*
1617 * Physical first - calculate the state based on the handlers
1618 * active on the page, then compare.
1619 */
1620 if (PGM_PAGE_HAS_ANY_PHYSICAL_HANDLERS(pPage))
1621 {
1622 /* the first */
1623 PPGMPHYSHANDLER pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys);
1624 if (!pPhys)
1625 {
1626 pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys, true);
1627 if ( pPhys
1628 && pPhys->Core.Key > (State.GCPhys + PAGE_SIZE - 1))
1629 pPhys = NULL;
1630 Assert(!pPhys || pPhys->Core.Key >= State.GCPhys);
1631 }
1632 if (pPhys)
1633 {
1634 unsigned uState = pgmHandlerPhysicalCalcState(pPhys);
1635
1636 /* more? */
1637 while (pPhys->Core.KeyLast < (State.GCPhys | PAGE_OFFSET_MASK))
1638 {
1639 PPGMPHYSHANDLER pPhys2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers,
1640 pPhys->Core.KeyLast + 1, true);
1641 if ( !pPhys2
1642 || pPhys2->Core.Key > (State.GCPhys | PAGE_OFFSET_MASK))
1643 break;
1644 unsigned uState2 = pgmHandlerPhysicalCalcState(pPhys2);
1645 uState = RT_MAX(uState, uState2);
1646 pPhys = pPhys2;
1647 }
1648
1649 /* compare.*/
1650 if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != uState
1651 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
1652 {
1653 AssertMsgFailed(("ram range vs phys handler flags mismatch. GCPhys=%RGp state=%d expected=%d %s\n",
1654 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), uState, pPhys->pszDesc));
1655 State.cErrors++;
1656 }
1657
1658#ifdef IN_RING3
1659 /* validate that REM is handling it. */
1660 if ( !REMR3IsPageAccessHandled(pVM, State.GCPhys)
1661 /* ignore shadowed ROM for the time being. */
1662 && PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_ROM_SHADOW)
1663 {
1664 AssertMsgFailed(("ram range vs phys handler REM mismatch. GCPhys=%RGp state=%d %s\n",
1665 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), pPhys->pszDesc));
1666 State.cErrors++;
1667 }
1668#endif
1669 }
1670 else
1671 {
1672 AssertMsgFailed(("ram range vs phys handler mismatch. no handler for GCPhys=%RGp\n", State.GCPhys));
1673 State.cErrors++;
1674 }
1675 }
1676
1677 /*
1678 * Virtual handlers.
1679 */
1680 if (PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage))
1681 {
1682 State.uVirtState = PGM_PAGE_GET_HNDL_VIRT_STATE(pPage);
1683#if 1
1684 /* locate all the matching physical ranges. */
1685 State.uVirtStateFound = PGM_PAGE_HNDL_VIRT_STATE_NONE;
1686 RTGCPHYS GCPhysKey = State.GCPhys;
1687 for (;;)
1688 {
1689 PPGMPHYS2VIRTHANDLER pPhys2Virt = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers,
1690 GCPhysKey, true /* above-or-equal */);
1691 if ( !pPhys2Virt
1692 || (pPhys2Virt->Core.Key & X86_PTE_PAE_PG_MASK) != State.GCPhys)
1693 break;
1694
1695 /* the head */
1696 GCPhysKey = pPhys2Virt->Core.KeyLast;
1697 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
1698 unsigned uState = pgmHandlerVirtualCalcState(pCur);
1699 State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
1700
1701 /* any aliases */
1702 while (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
1703 {
1704 pPhys2Virt = (PPGMPHYS2VIRTHANDLER)((uintptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
1705 pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
1706 uState = pgmHandlerVirtualCalcState(pCur);
1707 State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
1708 }
1709
1710 /* done? */
1711 if ((GCPhysKey & X86_PTE_PAE_PG_MASK) != State.GCPhys)
1712 break;
1713 }
1714#else
1715 /* very slow */
1716 RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOneByPhysAddr, &State);
1717#endif
1718 if (State.uVirtState != State.uVirtStateFound)
1719 {
1720 AssertMsgFailed(("ram range vs virt handler flags mismatch. GCPhys=%RGp uVirtState=%#x uVirtStateFound=%#x\n",
1721 State.GCPhys, State.uVirtState, State.uVirtStateFound));
1722 State.cErrors++;
1723 }
1724 }
1725 }
1726 } /* foreach page in ram range. */
1727 } /* foreach ram range. */
1728
1729 /*
1730 * Check that the physical addresses of the virtual handlers matches up
1731 * and that they are otherwise sane.
1732 */
1733 RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOne, &State);
1734
1735 /*
1736 * Do the reverse check for physical handlers.
1737 */
1738 /** @todo */
1739
1740 return State.cErrors;
1741}
1742
1743#endif /* VBOX_STRICT */
1744
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