PGMAllHandler.cpp@ 35499

Last change on this file since 35499 was 35346, checked in by vboxsync, 14 years ago
VMM reorg: Moving the public include files from include/VBox to include/VBox/vmm.
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1	/* $Id: PGMAllHandler.cpp 35346 2010-12-27 16:13:13Z vboxsync $ */
2	/** @file
3	* PGM - Page Manager / Monitor, Access Handlers.
4	*/
5
6	/*
7	* Copyright (C) 2006-2010 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*******************************************************************************
20	* Header Files *
21	*******************************************************************************/
22	#define LOG_GROUP LOG_GROUP_PGM
23	#include <VBox/vmm/dbgf.h>
24	#include <VBox/vmm/pgm.h>
25	#include <VBox/vmm/iom.h>
26	#include <VBox/vmm/mm.h>
27	#include <VBox/vmm/em.h>
28	#include <VBox/vmm/stam.h>
29	#include <VBox/vmm/rem.h>
30	#include <VBox/vmm/dbgf.h>
31	#include <VBox/vmm/rem.h>
32	#include "PGMInternal.h"
33	#include <VBox/vmm/vm.h>
34	#include "PGMInline.h"
35
36	#include <VBox/log.h>
37	#include <iprt/assert.h>
38	#include <iprt/asm-amd64-x86.h>
39	#include <iprt/string.h>
40	#include <VBox/param.h>
41	#include <VBox/err.h>
42	#include <VBox/vmm/selm.h>
43
44
45	/*******************************************************************************
46	* Internal Functions *
47	*******************************************************************************/
48	static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam);
49	static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur);
50	static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur);
51
52
53
54	/**
55	* Register a access handler for a physical range.
56	*
57	* @returns VBox status code.
58	* @retval VINF_SUCCESS when successfully installed.
59	* @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
60	* the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
61	* flagged together with a pool clearing.
62	* @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
63	* one. A debug assertion is raised.
64	*
65	* @param pVM VM Handle.
66	* @param enmType Handler type. Any of the PGMPHYSHANDLERTYPE_PHYSICAL* enums.
67	* @param GCPhys Start physical address.
68	* @param GCPhysLast Last physical address. (inclusive)
69	* @param pfnHandlerR3 The R3 handler.
70	* @param pvUserR3 User argument to the R3 handler.
71	* @param pfnHandlerR0 The R0 handler.
72	* @param pvUserR0 User argument to the R0 handler.
73	* @param pfnHandlerRC The RC handler.
74	* @param pvUserRC User argument to the RC handler. This can be a value
75	* less that 0x10000 or a (non-null) pointer that is
76	* automatically relocated.
77	* @param pszDesc Pointer to description string. This must not be freed.
78	*/
79	VMMDECL(int) PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
80	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
81	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
82	RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
83	R3PTRTYPE(const char *) pszDesc)
84	{
85	Log(("PGMHandlerPhysicalRegisterEx: enmType=%d GCPhys=%RGp GCPhysLast=%RGp pfnHandlerR3=%RHv pvUserR3=%RHv pfnHandlerR0=%RHv pvUserR0=%RHv pfnHandlerGC=%RRv pvUserGC=%RRv pszDesc=%s\n",
86	enmType, GCPhys, GCPhysLast, pfnHandlerR3, pvUserR3, pfnHandlerR0, pvUserR0, pfnHandlerRC, pvUserRC, R3STRING(pszDesc)));
87
88	/*
89	* Validate input.
90	*/
91	AssertMsgReturn(GCPhys < GCPhysLast, ("GCPhys >= GCPhysLast (%#x >= %#x)\n", GCPhys, GCPhysLast), VERR_INVALID_PARAMETER);
92	switch (enmType)
93	{
94	case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
95	break;
96	case PGMPHYSHANDLERTYPE_MMIO:
97	case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
98	/* Simplification for PGMPhysRead, PGMR0Trap0eHandlerNPMisconfig and others. */
99	AssertMsgReturn(!(GCPhys & PAGE_OFFSET_MASK), ("%RGp\n", GCPhys), VERR_INVALID_PARAMETER);
100	AssertMsgReturn((GCPhysLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, ("%RGp\n", GCPhysLast), VERR_INVALID_PARAMETER);
101	break;
102	default:
103	AssertMsgFailed(("Invalid input enmType=%d!\n", enmType));
104	return VERR_INVALID_PARAMETER;
105	}
106	AssertMsgReturn( (RTRCUINTPTR)pvUserRC < 0x10000
107	\|\| MMHyperR3ToRC(pVM, MMHyperRCToR3(pVM, pvUserRC)) == pvUserRC,
108	("Not RC pointer! pvUserRC=%RRv\n", pvUserRC),
109	VERR_INVALID_PARAMETER);
110	AssertMsgReturn( (RTR0UINTPTR)pvUserR0 < 0x10000
111	\|\| MMHyperR3ToR0(pVM, MMHyperR0ToR3(pVM, pvUserR0)) == pvUserR0,
112	("Not R0 pointer! pvUserR0=%RHv\n", pvUserR0),
113	VERR_INVALID_PARAMETER);
114	AssertPtrReturn(pfnHandlerR3, VERR_INVALID_POINTER);
115	AssertReturn(pfnHandlerR0, VERR_INVALID_PARAMETER);
116	AssertReturn(pfnHandlerRC, VERR_INVALID_PARAMETER);
117
118	/*
119	* We require the range to be within registered ram.
120	* There is no apparent need to support ranges which cover more than one ram range.
121	*/
122	PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
123	while (pRam && GCPhys > pRam->GCPhysLast)
124	pRam = pRam->CTX_SUFF(pNext);
125	if ( !pRam
126	\|\| GCPhysLast < pRam->GCPhys
127	\|\| GCPhys > pRam->GCPhysLast)
128	{
129	#ifdef IN_RING3
130	DBGFR3Info(pVM, "phys", NULL, NULL);
131	#endif
132	AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
133	return VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
134	}
135
136	/*
137	* Allocate and initialize the new entry.
138	*/
139	PPGMPHYSHANDLER pNew;
140	int rc = MMHyperAlloc(pVM, sizeof(pNew), 0, MM_TAG_PGM_HANDLERS, (void *)&pNew);
141	if (RT_FAILURE(rc))
142	return rc;
143
144	pNew->Core.Key = GCPhys;
145	pNew->Core.KeyLast = GCPhysLast;
146	pNew->enmType = enmType;
147	pNew->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
148	pNew->cAliasedPages = 0;
149	pNew->cTmpOffPages = 0;
150	pNew->pfnHandlerR3 = pfnHandlerR3;
151	pNew->pvUserR3 = pvUserR3;
152	pNew->pfnHandlerR0 = pfnHandlerR0;
153	pNew->pvUserR0 = pvUserR0;
154	pNew->pfnHandlerRC = pfnHandlerRC;
155	pNew->pvUserRC = pvUserRC;
156	pNew->pszDesc = pszDesc;
157
158	pgmLock(pVM);
159
160	/*
161	* Try insert into list.
162	*/
163	if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core))
164	{
165	rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pNew, pRam);
166	if (rc == VINF_PGM_SYNC_CR3)
167	rc = VINF_PGM_GCPHYS_ALIASED;
168	pgmUnlock(pVM);
169	#ifndef IN_RING3
170	REMNotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);
171	#else
172	REMR3NotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);
173	#endif
174	if (rc != VINF_SUCCESS)
175	Log(("PGMHandlerPhysicalRegisterEx: returns %Rrc (%RGp-%RGp)\n", rc, GCPhys, GCPhysLast));
176	return rc;
177	}
178
179	pgmUnlock(pVM);
180
181	#if defined(IN_RING3) && defined(VBOX_STRICT)
182	DBGFR3Info(pVM, "handlers", "phys nostats", NULL);
183	#endif
184	AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp pszDesc=%s\n", GCPhys, GCPhysLast, pszDesc));
185	MMHyperFree(pVM, pNew);
186	return VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
187	}
188
189
190	/**
191	* Sets ram range flags and attempts updating shadow PTs.
192	*
193	* @returns VBox status code.
194	* @retval VINF_SUCCESS when shadow PTs was successfully updated.
195	* @retval VINF_PGM_SYNC_CR3 when the shadow PTs could be updated because
196	* the guest page aliased or/and mapped by multiple PTs. FFs set.
197	* @param pVM The VM handle.
198	* @param pCur The physical handler.
199	* @param pRam The RAM range.
200	*/
201	static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam)
202	{
203	/*
204	* Iterate the guest ram pages updating the flags and flushing PT entries
205	* mapping the page.
206	*/
207	bool fFlushTLBs = false;
208	int rc = VINF_SUCCESS;
209	const unsigned uState = pgmHandlerPhysicalCalcState(pCur);
210	uint32_t cPages = pCur->cPages;
211	uint32_t i = (pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT;
212	for (;;)
213	{
214	PPGMPAGE pPage = &pRam->aPages[i];
215	AssertMsg(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO \|\| PGM_PAGE_IS_MMIO(pPage),
216	("%RGp %R[pgmpage]\n", pRam->GCPhys + (i << PAGE_SHIFT), pPage));
217
218	/* Only do upgrades. */
219	if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
220	{
221	PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
222
223	int rc2 = pgmPoolTrackUpdateGCPhys(pVM, pRam->GCPhys + (i << PAGE_SHIFT), pPage,
224	false /* allow updates of PTEs (instead of flushing) */, &fFlushTLBs);
225	if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
226	rc = rc2;
227	}
228
229	/* next */
230	if (--cPages == 0)
231	break;
232	i++;
233	}
234
235	if (fFlushTLBs)
236	{
237	PGM_INVL_ALL_VCPU_TLBS(pVM);
238	Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: flushing guest TLBs; rc=%d\n", rc));
239	}
240	else
241	Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: doesn't flush guest TLBs. rc=%Rrc; sync flags=%x VMCPU_FF_PGM_SYNC_CR3=%d\n", rc, VMMGetCpu(pVM)->pgm.s.fSyncFlags, VMCPU_FF_ISSET(VMMGetCpu(pVM), VMCPU_FF_PGM_SYNC_CR3)));
242
243	return rc;
244	}
245
246
247	/**
248	* Register a physical page access handler.
249	*
250	* @returns VBox status code.
251	* @param pVM VM Handle.
252	* @param GCPhys Start physical address.
253	*/
254	VMMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys)
255	{
256	/*
257	* Find the handler.
258	*/
259	pgmLock(pVM);
260	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
261	if (pCur)
262	{
263	LogFlow(("PGMHandlerPhysicalDeregister: Removing Range %RGp-%RGp %s\n",
264	pCur->Core.Key, pCur->Core.KeyLast, R3STRING(pCur->pszDesc)));
265
266	/*
267	* Clear the page bits, notify the REM about this change and clear
268	* the cache.
269	*/
270	pgmHandlerPhysicalResetRamFlags(pVM, pCur);
271	pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
272	pVM->pgm.s.pLastPhysHandlerR0 = 0;
273	pVM->pgm.s.pLastPhysHandlerR3 = 0;
274	pVM->pgm.s.pLastPhysHandlerRC = 0;
275	MMHyperFree(pVM, pCur);
276	pgmUnlock(pVM);
277	return VINF_SUCCESS;
278	}
279	pgmUnlock(pVM);
280
281	AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
282	return VERR_PGM_HANDLER_NOT_FOUND;
283	}
284
285
286	/**
287	* Shared code with modify.
288	*/
289	static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur)
290	{
291	RTGCPHYS GCPhysStart = pCur->Core.Key;
292	RTGCPHYS GCPhysLast = pCur->Core.KeyLast;
293
294	/*
295	* Page align the range.
296	*
297	* Since we've reset (recalculated) the physical handler state of all pages
298	* we can make use of the page states to figure out whether a page should be
299	* included in the REM notification or not.
300	*/
301	if ( (pCur->Core.Key & PAGE_OFFSET_MASK)
302	\|\| ((pCur->Core.KeyLast + 1) & PAGE_OFFSET_MASK))
303	{
304	Assert(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO);
305
306	if (GCPhysStart & PAGE_OFFSET_MASK)
307	{
308	PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysStart);
309	if ( pPage
310	&& PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
311	{
312	RTGCPHYS GCPhys = (GCPhysStart + (PAGE_SIZE - 1)) & X86_PTE_PAE_PG_MASK;
313	if ( GCPhys > GCPhysLast
314	\|\| GCPhys < GCPhysStart)
315	return;
316	GCPhysStart = GCPhys;
317	}
318	else
319	GCPhysStart &= X86_PTE_PAE_PG_MASK;
320	Assert(!pPage \|\| PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
321	}
322
323	if (GCPhysLast & PAGE_OFFSET_MASK)
324	{
325	PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysLast);
326	if ( pPage
327	&& PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
328	{
329	RTGCPHYS GCPhys = (GCPhysLast & X86_PTE_PAE_PG_MASK) - 1;
330	if ( GCPhys < GCPhysStart
331	\|\| GCPhys > GCPhysLast)
332	return;
333	GCPhysLast = GCPhys;
334	}
335	else
336	GCPhysLast \|= PAGE_OFFSET_MASK;
337	Assert(!pPage \|\| PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
338	}
339	}
340
341	/*
342	* Tell REM.
343	*/
344	const bool fRestoreAsRAM = pCur->pfnHandlerR3
345	&& pCur->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */
346	#ifndef IN_RING3
347	REMNotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
348	#else
349	REMR3NotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
350	#endif
351	}
352
353
354	/**
355	* pgmHandlerPhysicalResetRamFlags helper that checks for other handlers on
356	* edge pages.
357	*/
358	DECLINLINE(void) pgmHandlerPhysicalRecalcPageState(PVM pVM, RTGCPHYS GCPhys, bool fAbove, PPGMRAMRANGE *ppRamHint)
359	{
360	/*
361	* Look for other handlers.
362	*/
363	unsigned uState = PGM_PAGE_HNDL_PHYS_STATE_NONE;
364	for (;;)
365	{
366	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys, fAbove);
367	if ( !pCur
368	\|\| ((fAbove ? pCur->Core.Key : pCur->Core.KeyLast) >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
369	break;
370	unsigned uThisState = pgmHandlerPhysicalCalcState(pCur);
371	uState = RT_MAX(uState, uThisState);
372
373	/* next? */
374	RTGCPHYS GCPhysNext = fAbove
375	? pCur->Core.KeyLast + 1
376	: pCur->Core.Key - 1;
377	if ((GCPhysNext >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
378	break;
379	GCPhys = GCPhysNext;
380	}
381
382	/*
383	* Update if we found something that is a higher priority
384	* state than the current.
385	*/
386	if (uState != PGM_PAGE_HNDL_PHYS_STATE_NONE)
387	{
388	PPGMPAGE pPage;
389	int rc = pgmPhysGetPageWithHintEx(&pVM->pgm.s, GCPhys, &pPage, ppRamHint);
390	if ( RT_SUCCESS(rc)
391	&& PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
392	{
393	/* This should normally not be necessary. */
394	PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
395	bool fFlushTLBs ;
396	rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhys, pPage, false /fFlushPTEs/, &fFlushTLBs);
397	if (RT_SUCCESS(rc) && fFlushTLBs)
398	PGM_INVL_ALL_VCPU_TLBS(pVM);
399	else
400	AssertRC(rc);
401	}
402	else
403	AssertRC(rc);
404	}
405	}
406
407
408	/**
409	* Resets an aliased page.
410	*
411	* @param pVM The VM.
412	* @param pPage The page.
413	* @param GCPhysPage The page address in case it comes in handy.
414	* @param fDoAccounting Whether to perform accounting. (Only set during
415	* reset where pgmR3PhysRamReset doesn't have the
416	* handler structure handy.)
417	*/
418	void pgmHandlerPhysicalResetAliasedPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhysPage, bool fDoAccounting)
419	{
420	Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO);
421	Assert(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
422
423	/*
424	* Flush any shadow page table references first.
425	*/
426	bool fFlushTLBs = false;
427	int rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhysPage, pPage, true /fFlushPTEs/, &fFlushTLBs);
428	AssertLogRelRCReturnVoid(rc);
429	# ifdef IN_RC
430	if (fFlushTLBs && rc != VINF_PGM_SYNC_CR3)
431	PGM_INVL_VCPU_TLBS(VMMGetCpu0(pVM));
432	# else
433	HWACCMFlushTLBOnAllVCpus(pVM);
434	# endif
435
436	/*
437	* Make it an MMIO/Zero page.
438	*/
439	PGM_PAGE_SET_HCPHYS(pPage, pVM->pgm.s.HCPhysZeroPg);
440	PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO);
441	PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ZERO);
442	PGM_PAGE_SET_PAGEID(pPage, NIL_GMM_PAGEID);
443	PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_ALL);
444
445	/* Flush its TLB entry. */
446	PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
447
448	/*
449	* Do accounting for pgmR3PhysRamReset.
450	*/
451	if (fDoAccounting)
452	{
453	PPGMPHYSHANDLER pHandler = pgmHandlerPhysicalLookup(pVM, GCPhysPage);
454	if (RT_LIKELY(pHandler))
455	{
456	Assert(pHandler->cAliasedPages > 0);
457	pHandler->cAliasedPages--;
458	}
459	else
460	AssertFailed();
461	}
462	}
463
464
465	/**
466	* Resets ram range flags.
467	*
468	* @returns VBox status code.
469	* @retval VINF_SUCCESS when shadow PTs was successfully updated.
470	* @param pVM The VM handle.
471	* @param pCur The physical handler.
472	*
473	* @remark We don't start messing with the shadow page tables, as we've
474	* already got code in Trap0e which deals with out of sync handler
475	* flags (originally conceived for global pages).
476	*/
477	static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur)
478	{
479	/*
480	* Iterate the guest ram pages updating the state.
481	*/
482	RTUINT cPages = pCur->cPages;
483	RTGCPHYS GCPhys = pCur->Core.Key;
484	PPGMRAMRANGE pRamHint = NULL;
485	PPGM pPGM = &pVM->pgm.s;
486	for (;;)
487	{
488	PPGMPAGE pPage;
489	int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, &pRamHint);
490	if (RT_SUCCESS(rc))
491	{
492	/* Reset MMIO2 for MMIO pages to MMIO, since this aliasing is our business.
493	(We don't flip MMIO to RAM though, that's PGMPhys.cpp's job.) */
494	if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO)
495	{
496	Assert(pCur->cAliasedPages > 0);
497	pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhys, false /fDoAccounting/);
498	pCur->cAliasedPages--;
499	}
500	AssertMsg(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO \|\| PGM_PAGE_IS_MMIO(pPage), ("%RGp %R[pgmpage]\n", GCPhys, pPage));
501	PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_NONE);
502	}
503	else
504	AssertRC(rc);
505
506	/* next */
507	if (--cPages == 0)
508	break;
509	GCPhys += PAGE_SIZE;
510	}
511
512	pCur->cAliasedPages = 0;
513	pCur->cTmpOffPages = 0;
514
515	/*
516	* Check for partial start and end pages.
517	*/
518	if (pCur->Core.Key & PAGE_OFFSET_MASK)
519	pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.Key - 1, false /* fAbove */, &pRamHint);
520	if ((pCur->Core.KeyLast & PAGE_OFFSET_MASK) != PAGE_OFFSET_MASK)
521	pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.KeyLast + 1, true /* fAbove */, &pRamHint);
522	}
523
524
525	/**
526	* Modify a physical page access handler.
527	*
528	* Modification can only be done to the range it self, not the type or anything else.
529	*
530	* @returns VBox status code.
531	* For all return codes other than VERR_PGM_HANDLER_NOT_FOUND and VINF_SUCCESS the range is deregistered
532	* and a new registration must be performed!
533	* @param pVM VM handle.
534	* @param GCPhysCurrent Current location.
535	* @param GCPhys New location.
536	* @param GCPhysLast New last location.
537	*/
538	VMMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
539	{
540	/*
541	* Remove it.
542	*/
543	int rc;
544	pgmLock(pVM);
545	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhysCurrent);
546	if (pCur)
547	{
548	/*
549	* Clear the ram flags. (We're gonna move or free it!)
550	*/
551	pgmHandlerPhysicalResetRamFlags(pVM, pCur);
552	const bool fRestoreAsRAM = pCur->pfnHandlerR3
553	&& pCur->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */
554
555	/*
556	* Validate the new range, modify and reinsert.
557	*/
558	if (GCPhysLast >= GCPhys)
559	{
560	/*
561	* We require the range to be within registered ram.
562	* There is no apparent need to support ranges which cover more than one ram range.
563	*/
564	PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
565	while (pRam && GCPhys > pRam->GCPhysLast)
566	pRam = pRam->CTX_SUFF(pNext);
567	if ( pRam
568	&& GCPhys <= pRam->GCPhysLast
569	&& GCPhysLast >= pRam->GCPhys)
570	{
571	pCur->Core.Key = GCPhys;
572	pCur->Core.KeyLast = GCPhysLast;
573	pCur->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + 1) >> PAGE_SHIFT;
574
575	if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pCur->Core))
576	{
577	PGMPHYSHANDLERTYPE enmType = pCur->enmType;
578	RTGCPHYS cb = GCPhysLast - GCPhys + 1;
579	bool fHasHCHandler = !!pCur->pfnHandlerR3;
580
581	/*
582	* Set ram flags, flush shadow PT entries and finally tell REM about this.
583	*/
584	rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
585	pgmUnlock(pVM);
586
587	#ifndef IN_RING3
588	REMNotifyHandlerPhysicalModify(pVM, enmType, GCPhysCurrent, GCPhys, cb,
589	fHasHCHandler, fRestoreAsRAM);
590	#else
591	REMR3NotifyHandlerPhysicalModify(pVM, enmType, GCPhysCurrent, GCPhys, cb,
592	fHasHCHandler, fRestoreAsRAM);
593	#endif
594	PGM_INVL_ALL_VCPU_TLBS(pVM);
595	Log(("PGMHandlerPhysicalModify: GCPhysCurrent=%RGp -> GCPhys=%RGp GCPhysLast=%RGp\n",
596	GCPhysCurrent, GCPhys, GCPhysLast));
597	return VINF_SUCCESS;
598	}
599
600	AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp\n", GCPhys, GCPhysLast));
601	rc = VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
602	}
603	else
604	{
605	AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
606	rc = VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
607	}
608	}
609	else
610	{
611	AssertMsgFailed(("Invalid range %RGp-%RGp\n", GCPhys, GCPhysLast));
612	rc = VERR_INVALID_PARAMETER;
613	}
614
615	/*
616	* Invalid new location, flush the cache and free it.
617	* We've only gotta notify REM and free the memory.
618	*/
619	pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
620	pVM->pgm.s.pLastPhysHandlerR0 = 0;
621	pVM->pgm.s.pLastPhysHandlerR3 = 0;
622	pVM->pgm.s.pLastPhysHandlerRC = 0;
623	MMHyperFree(pVM, pCur);
624	}
625	else
626	{
627	AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhysCurrent));
628	rc = VERR_PGM_HANDLER_NOT_FOUND;
629	}
630
631	pgmUnlock(pVM);
632	return rc;
633	}
634
635
636	/**
637	* Changes the callbacks associated with a physical access handler.
638	*
639	* @returns VBox status code.
640	* @param pVM VM Handle.
641	* @param GCPhys Start physical address.
642	* @param pfnHandlerR3 The R3 handler.
643	* @param pvUserR3 User argument to the R3 handler.
644	* @param pfnHandlerR0 The R0 handler.
645	* @param pvUserR0 User argument to the R0 handler.
646	* @param pfnHandlerRC The RC handler.
647	* @param pvUserRC User argument to the RC handler. Values larger or
648	* equal to 0x10000 will be relocated automatically.
649	* @param pszDesc Pointer to description string. This must not be freed.
650	*/
651	VMMDECL(int) PGMHandlerPhysicalChangeCallbacks(PVM pVM, RTGCPHYS GCPhys,
652	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
653	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
654	RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
655	R3PTRTYPE(const char *) pszDesc)
656	{
657	/*
658	* Get the handler.
659	*/
660	int rc = VINF_SUCCESS;
661	pgmLock(pVM);
662	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
663	if (pCur)
664	{
665	/*
666	* Change callbacks.
667	*/
668	pCur->pfnHandlerR3 = pfnHandlerR3;
669	pCur->pvUserR3 = pvUserR3;
670	pCur->pfnHandlerR0 = pfnHandlerR0;
671	pCur->pvUserR0 = pvUserR0;
672	pCur->pfnHandlerRC = pfnHandlerRC;
673	pCur->pvUserRC = pvUserRC;
674	pCur->pszDesc = pszDesc;
675	}
676	else
677	{
678	AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
679	rc = VERR_PGM_HANDLER_NOT_FOUND;
680	}
681
682	pgmUnlock(pVM);
683	return rc;
684	}
685
686
687	/**
688	* Splits a physical access handler in two.
689	*
690	* @returns VBox status code.
691	* @param pVM VM Handle.
692	* @param GCPhys Start physical address of the handler.
693	* @param GCPhysSplit The split address.
694	*/
695	VMMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit)
696	{
697	AssertReturn(GCPhys < GCPhysSplit, VERR_INVALID_PARAMETER);
698
699	/*
700	* Do the allocation without owning the lock.
701	*/
702	PPGMPHYSHANDLER pNew;
703	int rc = MMHyperAlloc(pVM, sizeof(pNew), 0, MM_TAG_PGM_HANDLERS, (void *)&pNew);
704	if (RT_FAILURE(rc))
705	return rc;
706
707	/*
708	* Get the handler.
709	*/
710	pgmLock(pVM);
711	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
712	if (RT_LIKELY(pCur))
713	{
714	if (RT_LIKELY(GCPhysSplit <= pCur->Core.KeyLast))
715	{
716	/*
717	* Create new handler node for the 2nd half.
718	*/
719	pNew = pCur;
720	pNew->Core.Key = GCPhysSplit;
721	pNew->cPages = (pNew->Core.KeyLast - (pNew->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
722
723	pCur->Core.KeyLast = GCPhysSplit - 1;
724	pCur->cPages = (pCur->Core.KeyLast - (pCur->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
725
726	if (RT_LIKELY(RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core)))
727	{
728	LogFlow(("PGMHandlerPhysicalSplit: %RGp-%RGp and %RGp-%RGp\n",
729	pCur->Core.Key, pCur->Core.KeyLast, pNew->Core.Key, pNew->Core.KeyLast));
730	pgmUnlock(pVM);
731	return VINF_SUCCESS;
732	}
733	AssertMsgFailed(("whu?\n"));
734	rc = VERR_INTERNAL_ERROR;
735	}
736	else
737	{
738	AssertMsgFailed(("outside range: %RGp-%RGp split %RGp\n", pCur->Core.Key, pCur->Core.KeyLast, GCPhysSplit));
739	rc = VERR_INVALID_PARAMETER;
740	}
741	}
742	else
743	{
744	AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
745	rc = VERR_PGM_HANDLER_NOT_FOUND;
746	}
747	pgmUnlock(pVM);
748	MMHyperFree(pVM, pNew);
749	return rc;
750	}
751
752
753	/**
754	* Joins up two adjacent physical access handlers which has the same callbacks.
755	*
756	* @returns VBox status code.
757	* @param pVM VM Handle.
758	* @param GCPhys1 Start physical address of the first handler.
759	* @param GCPhys2 Start physical address of the second handler.
760	*/
761	VMMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2)
762	{
763	/*
764	* Get the handlers.
765	*/
766	int rc;
767	pgmLock(pVM);
768	PPGMPHYSHANDLER pCur1 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys1);
769	if (RT_LIKELY(pCur1))
770	{
771	PPGMPHYSHANDLER pCur2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
772	if (RT_LIKELY(pCur2))
773	{
774	/*
775	* Make sure that they are adjacent, and that they've got the same callbacks.
776	*/
777	if (RT_LIKELY(pCur1->Core.KeyLast + 1 == pCur2->Core.Key))
778	{
779	if (RT_LIKELY( pCur1->pfnHandlerRC == pCur2->pfnHandlerRC
780	&& pCur1->pfnHandlerR0 == pCur2->pfnHandlerR0
781	&& pCur1->pfnHandlerR3 == pCur2->pfnHandlerR3))
782	{
783	PPGMPHYSHANDLER pCur3 = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
784	if (RT_LIKELY(pCur3 == pCur2))
785	{
786	pCur1->Core.KeyLast = pCur2->Core.KeyLast;
787	pCur1->cPages = (pCur1->Core.KeyLast - (pCur1->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
788	LogFlow(("PGMHandlerPhysicalJoin: %RGp-%RGp %RGp-%RGp\n",
789	pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
790	pVM->pgm.s.pLastPhysHandlerR0 = 0;
791	pVM->pgm.s.pLastPhysHandlerR3 = 0;
792	pVM->pgm.s.pLastPhysHandlerRC = 0;
793	MMHyperFree(pVM, pCur2);
794	pgmUnlock(pVM);
795	return VINF_SUCCESS;
796	}
797
798	Assert(pCur3 == pCur2);
799	rc = VERR_INTERNAL_ERROR;
800	}
801	else
802	{
803	AssertMsgFailed(("mismatching handlers\n"));
804	rc = VERR_ACCESS_DENIED;
805	}
806	}
807	else
808	{
809	AssertMsgFailed(("not adjacent: %RGp-%RGp %RGp-%RGp\n",
810	pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
811	rc = VERR_INVALID_PARAMETER;
812	}
813	}
814	else
815	{
816	AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys2));
817	rc = VERR_PGM_HANDLER_NOT_FOUND;
818	}
819	}
820	else
821	{
822	AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys1));
823	rc = VERR_PGM_HANDLER_NOT_FOUND;
824	}
825	pgmUnlock(pVM);
826	return rc;
827
828	}
829
830
831	/**
832	* Resets any modifications to individual pages in a physical page access
833	* handler region.
834	*
835	* This is used in pair with PGMHandlerPhysicalPageTempOff(),
836	* PGMHandlerPhysicalPageAlias() or PGMHandlerPhysicalPageAliasHC().
837	*
838	* @returns VBox status code.
839	* @param pVM VM Handle
840	* @param GCPhys The start address of the handler regions, i.e. what you
841	* passed to PGMR3HandlerPhysicalRegister(),
842	* PGMHandlerPhysicalRegisterEx() or
843	* PGMHandlerPhysicalModify().
844	*/
845	VMMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys)
846	{
847	LogFlow(("PGMHandlerPhysicalReset GCPhys=%RGp\n", GCPhys));
848	pgmLock(pVM);
849
850	/*
851	* Find the handler.
852	*/
853	int rc;
854	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
855	if (RT_LIKELY(pCur))
856	{
857	/*
858	* Validate type.
859	*/
860	switch (pCur->enmType)
861	{
862	case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
863	case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
864	case PGMPHYSHANDLERTYPE_MMIO: /* NOTE: Only use when clearing MMIO ranges with aliased MMIO2 pages! */
865	{
866	STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,PhysHandlerReset)); /*@Todo move out of switch /
867	PPGMRAMRANGE pRam = pgmPhysGetRange(&pVM->pgm.s, GCPhys);
868	Assert(pRam);
869	Assert(pRam->GCPhys <= pCur->Core.Key);
870	Assert(pRam->GCPhysLast >= pCur->Core.KeyLast);
871
872	if (pCur->enmType == PGMPHYSHANDLERTYPE_MMIO)
873	{
874	/*
875	* Reset all the PGMPAGETYPE_MMIO2_ALIAS_MMIO pages first and that's it.
876	* This could probably be optimized a bit wrt to flushing, but I'm too lazy
877	* to do that now...
878	*/
879	if (pCur->cAliasedPages)
880	{
881	PPGMPAGE pPage = &pRam->aPages[(pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT];
882	uint32_t cLeft = pCur->cPages;
883	while (cLeft-- > 0)
884	{
885	if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO)
886	{
887	Assert(pCur->cAliasedPages > 0);
888	pgmHandlerPhysicalResetAliasedPage(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)cLeft << PAGE_SHIFT),
889	false /fDoAccounting/);
890	--pCur->cAliasedPages;
891	#ifndef VBOX_STRICT
892	if (pCur->cAliasedPages == 0)
893	break;
894	#endif
895	}
896	Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO);
897	pPage++;
898	}
899	Assert(pCur->cAliasedPages == 0);
900	}
901	}
902	else if (pCur->cTmpOffPages > 0)
903	{
904	/*
905	* Set the flags and flush shadow PT entries.
906	*/
907	rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
908	}
909
910	pCur->cAliasedPages = 0;
911	pCur->cTmpOffPages = 0;
912
913	rc = VINF_SUCCESS;
914	break;
915	}
916
917	/*
918	* Invalid.
919	*/
920	default:
921	AssertMsgFailed(("Invalid type %d! Corruption!\n", pCur->enmType));
922	rc = VERR_INTERNAL_ERROR;
923	break;
924	}
925	}
926	else
927	{
928	AssertMsgFailed(("Didn't find MMIO Range starting at %#x\n", GCPhys));
929	rc = VERR_PGM_HANDLER_NOT_FOUND;
930	}
931
932	pgmUnlock(pVM);
933	return rc;
934	}
935
936
937	/**
938	* Temporarily turns off the access monitoring of a page within a monitored
939	* physical write/all page access handler region.
940	*
941	* Use this when no further \#PFs are required for that page. Be aware that
942	* a page directory sync might reset the flags, and turn on access monitoring
943	* for the page.
944	*
945	* The caller must do required page table modifications.
946	*
947	* @returns VBox status code.
948	* @param pVM VM Handle
949	* @param GCPhys The start address of the access handler. This
950	* must be a fully page aligned range or we risk
951	* messing up other handlers installed for the
952	* start and end pages.
953	* @param GCPhysPage The physical address of the page to turn off
954	* access monitoring for.
955	*/
956	VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)
957	{
958	LogFlow(("PGMHandlerPhysicalPageTempOff GCPhysPage=%RGp\n", GCPhysPage));
959
960	pgmLock(pVM);
961	/*
962	* Validate the range.
963	*/
964	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
965	if (RT_LIKELY(pCur))
966	{
967	if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
968	&& GCPhysPage <= pCur->Core.KeyLast))
969	{
970	Assert(!(pCur->Core.Key & PAGE_OFFSET_MASK));
971	Assert((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
972
973	AssertReturnStmt( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
974	\|\| pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL,
975	pgmUnlock(pVM), VERR_ACCESS_DENIED);
976
977	/*
978	* Change the page status.
979	*/
980	PPGMPAGE pPage;
981	int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPage, &pPage);
982	AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
983	if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
984	{
985	PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
986	pCur->cTmpOffPages++;
987	}
988	pgmUnlock(pVM);
989	return VINF_SUCCESS;
990	}
991	pgmUnlock(pVM);
992	AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
993	GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
994	return VERR_INVALID_PARAMETER;
995	}
996	pgmUnlock(pVM);
997	AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
998	return VERR_PGM_HANDLER_NOT_FOUND;
999	}
1000
1001
1002	/**
1003	* Replaces an MMIO page with an MMIO2 page.
1004	*
1005	* This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
1006	* PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
1007	* backing, the caller must provide a replacement page. For various reasons the
1008	* replacement page must be an MMIO2 page.
1009	*
1010	* The caller must do required page table modifications. You can get away
1011	* without making any modifications since it's an MMIO page, the cost is an extra
1012	* \#PF which will the resync the page.
1013	*
1014	* Call PGMHandlerPhysicalReset() to restore the MMIO page.
1015	*
1016	* The caller may still get handler callback even after this call and must be
1017	* able to deal correctly with such calls. The reason for these callbacks are
1018	* either that we're executing in the recompiler (which doesn't know about this
1019	* arrangement) or that we've been restored from saved state (where we won't
1020	* save the change).
1021	*
1022	* @returns VBox status code.
1023	* @param pVM The VM handle
1024	* @param GCPhys The start address of the access handler. This
1025	* must be a fully page aligned range or we risk
1026	* messing up other handlers installed for the
1027	* start and end pages.
1028	* @param GCPhysPage The physical address of the page to turn off
1029	* access monitoring for.
1030	* @param GCPhysPageRemap The physical address of the MMIO2 page that
1031	* serves as backing memory.
1032	*
1033	* @remark May cause a page pool flush if used on a page that is already
1034	* aliased.
1035	*
1036	* @note This trick does only work reliably if the two pages are never ever
1037	* mapped in the same page table. If they are the page pool code will
1038	* be confused should either of them be flushed. See the special case
1039	* of zero page aliasing mentioned in #3170.
1040	*
1041	*/
1042	VMMDECL(int) PGMHandlerPhysicalPageAlias(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTGCPHYS GCPhysPageRemap)
1043	{
1044	/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
1045
1046	pgmLock(pVM);
1047	/*
1048	* Lookup and validate the range.
1049	*/
1050	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1051	if (RT_LIKELY(pCur))
1052	{
1053	if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1054	&& GCPhysPage <= pCur->Core.KeyLast))
1055	{
1056	AssertReturnStmt(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
1057	AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1058	AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1059
1060	/*
1061	* Get and validate the two pages.
1062	*/
1063	PPGMPAGE pPageRemap;
1064	int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPageRemap, &pPageRemap);
1065	AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1066	AssertMsgReturnStmt(PGM_PAGE_GET_TYPE(pPageRemap) == PGMPAGETYPE_MMIO2,
1067	("GCPhysPageRemap=%RGp %R[pgmpage]\n", GCPhysPageRemap, pPageRemap),
1068	pgmUnlock(pVM), VERR_PGM_PHYS_NOT_MMIO2);
1069
1070	PPGMPAGE pPage;
1071	rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPage, &pPage);
1072	AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1073	if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1074	{
1075	AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1076	("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1077	VERR_PGM_PHYS_NOT_MMIO2);
1078	if (PGM_PAGE_GET_HCPHYS(pPage) == PGM_PAGE_GET_HCPHYS(pPageRemap))
1079	{
1080	pgmUnlock(pVM);
1081	return VINF_PGM_HANDLER_ALREADY_ALIASED;
1082	}
1083
1084	/*
1085	* The page is already mapped as some other page, reset it
1086	* to an MMIO/ZERO page before doing the new mapping.
1087	*/
1088	Log(("PGMHandlerPhysicalPageAlias: GCPhysPage=%RGp (%R[pgmpage]; %RHp -> %RHp\n",
1089	GCPhysPage, pPage, PGM_PAGE_GET_HCPHYS(pPage), PGM_PAGE_GET_HCPHYS(pPageRemap)));
1090	pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage, false /fDoAccounting/);
1091	pCur->cAliasedPages--;
1092	}
1093	Assert(PGM_PAGE_IS_ZERO(pPage));
1094
1095	/*
1096	* Do the actual remapping here.
1097	* This page now serves as an alias for the backing memory specified.
1098	*/
1099	LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RGp (%R[pgmpage])\n",
1100	GCPhysPage, pPage, GCPhysPageRemap, pPageRemap ));
1101	PGM_PAGE_SET_HCPHYS(pPage, PGM_PAGE_GET_HCPHYS(pPageRemap));
1102	PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1103	PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
1104	PGM_PAGE_SET_PAGEID(pPage, PGM_PAGE_GET_PAGEID(pPageRemap));
1105	PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1106	pCur->cAliasedPages++;
1107	Assert(pCur->cAliasedPages <= pCur->cPages);
1108
1109	/* Flush its TLB entry. */
1110	PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1111
1112	LogFlow(("PGMHandlerPhysicalPageAlias: => %R[pgmpage]\n", pPage));
1113	pgmUnlock(pVM);
1114	return VINF_SUCCESS;
1115	}
1116
1117	pgmUnlock(pVM);
1118	AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1119	GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1120	return VERR_INVALID_PARAMETER;
1121	}
1122
1123	pgmUnlock(pVM);
1124	AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1125	return VERR_PGM_HANDLER_NOT_FOUND;
1126	}
1127
1128	/**
1129	* Replaces an MMIO page with an arbitrary HC page.
1130	*
1131	* This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
1132	* PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
1133	* backing, the caller must provide a replacement page. For various reasons the
1134	* replacement page must be an MMIO2 page.
1135	*
1136	* The caller must do required page table modifications. You can get away
1137	* without making any modifications since it's an MMIO page, the cost is an extra
1138	* \#PF which will the resync the page.
1139	*
1140	* Call PGMHandlerPhysicalReset() to restore the MMIO page.
1141	*
1142	* The caller may still get handler callback even after this call and must be
1143	* able to deal correctly with such calls. The reason for these callbacks are
1144	* either that we're executing in the recompiler (which doesn't know about this
1145	* arrangement) or that we've been restored from saved state (where we won't
1146	* save the change).
1147	*
1148	* @returns VBox status code.
1149	* @param pVM The VM handle
1150	* @param GCPhys The start address of the access handler. This
1151	* must be a fully page aligned range or we risk
1152	* messing up other handlers installed for the
1153	* start and end pages.
1154	* @param GCPhysPage The physical address of the page to turn off
1155	* access monitoring for.
1156	* @param HCPhysPageRemap The physical address of the HC page that
1157	* serves as backing memory.
1158	*
1159	* @remark May cause a page pool flush if used on a page that is already
1160	* aliased.
1161	*/
1162	VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap)
1163	{
1164	/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
1165
1166	/*
1167	* Lookup and validate the range.
1168	*/
1169	pgmLock(pVM);
1170	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1171	if (RT_LIKELY(pCur))
1172	{
1173	if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1174	&& GCPhysPage <= pCur->Core.KeyLast))
1175	{
1176	AssertReturnStmt(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
1177	AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1178	AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1179
1180	/*
1181	* Get and validate the pages.
1182	*/
1183	PPGMPAGE pPage;
1184	int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPage, &pPage);
1185	AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1186	if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1187	{
1188	pgmUnlock(pVM);
1189	AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1190	("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1191	VERR_PGM_PHYS_NOT_MMIO2);
1192	return VINF_PGM_HANDLER_ALREADY_ALIASED;
1193	}
1194	Assert(PGM_PAGE_IS_ZERO(pPage));
1195
1196	/*
1197	* Do the actual remapping here.
1198	* This page now serves as an alias for the backing memory specified.
1199	*/
1200	LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RHp\n",
1201	GCPhysPage, pPage, HCPhysPageRemap));
1202	PGM_PAGE_SET_HCPHYS(pPage, HCPhysPageRemap);
1203	PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1204	PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
1205	/** @todo hack alert
1206	* This needs to be done properly. Currently we get away with it as the recompiler directly calls
1207	* IOM read and write functions. Access through PGMPhysRead/Write will crash the process.
1208	*/
1209	PGM_PAGE_SET_PAGEID(pPage, NIL_GMM_PAGEID);
1210	PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1211	pCur->cAliasedPages++;
1212	Assert(pCur->cAliasedPages <= pCur->cPages);
1213
1214	/* Flush its TLB entry. */
1215	PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1216
1217	LogFlow(("PGMHandlerPhysicalPageAliasHC: => %R[pgmpage]\n", pPage));
1218	pgmUnlock(pVM);
1219	return VINF_SUCCESS;
1220	}
1221	pgmUnlock(pVM);
1222	AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1223	GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1224	return VERR_INVALID_PARAMETER;
1225	}
1226	pgmUnlock(pVM);
1227
1228	AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1229	return VERR_PGM_HANDLER_NOT_FOUND;
1230	}
1231
1232
1233	/**
1234	* Checks if a physical range is handled
1235	*
1236	* @returns boolean
1237	* @param pVM VM Handle.
1238	* @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister().
1239	* @remarks Caller must take the PGM lock...
1240	* @thread EMT.
1241	*/
1242	VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys)
1243	{
1244	/*
1245	* Find the handler.
1246	*/
1247	pgmLock(pVM);
1248	PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1249	if (pCur)
1250	{
1251	Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1252	Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
1253	\|\| pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL
1254	\|\| pCur->enmType == PGMPHYSHANDLERTYPE_MMIO);
1255	pgmUnlock(pVM);
1256	return true;
1257	}
1258	pgmUnlock(pVM);
1259	return false;
1260	}
1261
1262
1263	/**
1264	* Checks if it's an disabled all access handler or write access handler at the
1265	* given address.
1266	*
1267	* @returns true if it's an all access handler, false if it's a write access
1268	* handler.
1269	* @param pVM Pointer to the shared VM structure.
1270	* @param GCPhys The address of the page with a disabled handler.
1271	*
1272	* @remarks The caller, PGMR3PhysTlbGCPhys2Ptr, must hold the PGM lock.
1273	*/
1274	bool pgmHandlerPhysicalIsAll(PVM pVM, RTGCPHYS GCPhys)
1275	{
1276	pgmLock(pVM);
1277	PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1278	if (!pCur)
1279	{
1280	pgmUnlock(pVM);
1281	AssertFailed();
1282	return true;
1283	}
1284	Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
1285	\|\| pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL
1286	\|\| pCur->enmType == PGMPHYSHANDLERTYPE_MMIO); /* sanity */
1287	/* Only whole pages can be disabled. */
1288	Assert( pCur->Core.Key <= (GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK)
1289	&& pCur->Core.KeyLast >= (GCPhys \| PAGE_OFFSET_MASK));
1290
1291	bool bRet = pCur->enmType != PGMPHYSHANDLERTYPE_PHYSICAL_WRITE;
1292	pgmUnlock(pVM);
1293	return bRet;
1294	}
1295
1296
1297	/**
1298	* Check if particular guest's VA is being monitored.
1299	*
1300	* @returns true or false
1301	* @param pVM VM handle.
1302	* @param GCPtr Virtual address.
1303	* @remarks Will acquire the PGM lock.
1304	* @thread Any.
1305	*/
1306	VMMDECL(bool) PGMHandlerVirtualIsRegistered(PVM pVM, RTGCPTR GCPtr)
1307	{
1308	pgmLock(pVM);
1309	PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)RTAvlroGCPtrGet(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, GCPtr);
1310	pgmUnlock(pVM);
1311
1312	return pCur != NULL;
1313	}
1314
1315
1316	/**
1317	* Search for virtual handler with matching physical address
1318	*
1319	* @returns VBox status code
1320	* @param pVM The VM handle.
1321	* @param GCPhys GC physical address to search for.
1322	* @param ppVirt Where to store the pointer to the virtual handler structure.
1323	* @param piPage Where to store the pointer to the index of the cached physical page.
1324	*/
1325	int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER ppVirt, unsigned piPage)
1326	{
1327	STAM_PROFILE_START(&pVM->pgm.s.CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1328	Assert(ppVirt);
1329
1330	pgmLock(pVM);
1331	PPGMPHYS2VIRTHANDLER pCur;
1332	pCur = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, GCPhys);
1333	if (pCur)
1334	{
1335	/* found a match! */
1336	*ppVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1337	piPage = pCur - &(ppVirt)->aPhysToVirt[0];
1338	pgmUnlock(pVM);
1339
1340	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1341	AssertRelease(pCur->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD);
1342	#endif
1343	LogFlow(("PHYS2VIRT: found match for %RGp -> %RGv piPage=%#x\n", GCPhys, (ppVirt)->Core.Key, *piPage));
1344	STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1345	return VINF_SUCCESS;
1346	}
1347
1348	pgmUnlock(pVM);
1349	*ppVirt = NULL;
1350	STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1351	return VERR_PGM_HANDLER_NOT_FOUND;
1352	}
1353
1354
1355	/**
1356	* Deal with aliases in phys2virt.
1357	*
1358	* As pointed out by the various todos, this currently only deals with
1359	* aliases where the two ranges match 100%.
1360	*
1361	* @param pVM The VM handle.
1362	* @param pPhys2Virt The node we failed insert.
1363	*/
1364	static void pgmHandlerVirtualInsertAliased(PVM pVM, PPGMPHYS2VIRTHANDLER pPhys2Virt)
1365	{
1366	/*
1367	* First find the node which is conflicting with us.
1368	*/
1369	/** @todo Deal with partial overlapping. (Unlikely situation, so I'm too lazy to do anything about it now.) */
1370	/** @todo check if the current head node covers the ground we do. This is highly unlikely
1371	* and I'm too lazy to implement this now as it will require sorting the list and stuff like that. */
1372	PPGMPHYS2VIRTHANDLER pHead = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
1373	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1374	AssertReleaseMsg(pHead != pPhys2Virt, ("%RGp-%RGp offVirtHandler=%#RX32\n",
1375	pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler));
1376	#endif
1377	if (RT_UNLIKELY(!pHead \|\| pHead->Core.KeyLast != pPhys2Virt->Core.KeyLast))
1378	{
1379	/** @todo do something clever here... */
1380	LogRel(("pgmHandlerVirtualInsertAliased: %RGp-%RGp\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
1381	pPhys2Virt->offNextAlias = 0;
1382	return;
1383	}
1384
1385	/*
1386	* Insert ourselves as the next node.
1387	*/
1388	if (!(pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
1389	pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IN_TREE;
1390	else
1391	{
1392	PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pHead + (pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
1393	pPhys2Virt->offNextAlias = ((intptr_t)pNext - (intptr_t)pPhys2Virt)
1394	\| PGMPHYS2VIRTHANDLER_IN_TREE;
1395	}
1396	pHead->offNextAlias = ((intptr_t)pPhys2Virt - (intptr_t)pHead)
1397	\| (pHead->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
1398	Log(("pgmHandlerVirtualInsertAliased: %RGp-%RGp offNextAlias=%#RX32\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1399	}
1400
1401
1402	/**
1403	* Resets one virtual handler range.
1404	*
1405	* This is called by HandlerVirtualUpdate when it has detected some kind of
1406	* problem and have started clearing the virtual handler page states (or
1407	* when there have been registration/deregistrations). For this reason this
1408	* function will only update the page status if it's lower than desired.
1409	*
1410	* @returns 0
1411	* @param pNode Pointer to a PGMVIRTHANDLER.
1412	* @param pvUser The VM handle.
1413	*/
1414	DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1415	{
1416	PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1417	PVM pVM = (PVM)pvUser;
1418
1419	Assert(PGMIsLockOwner(pVM));
1420	/*
1421	* Iterate the pages and apply the new state.
1422	*/
1423	unsigned uState = pgmHandlerVirtualCalcState(pCur);
1424	PPGMRAMRANGE pRamHint = NULL;
1425	RTGCUINTPTR offPage = ((RTGCUINTPTR)pCur->Core.Key & PAGE_OFFSET_MASK);
1426	RTGCUINTPTR cbLeft = pCur->cb;
1427	for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1428	{
1429	PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
1430	if (pPhys2Virt->Core.Key != NIL_RTGCPHYS)
1431	{
1432	/*
1433	* Update the page state wrt virtual handlers.
1434	*/
1435	PPGMPAGE pPage;
1436	int rc = pgmPhysGetPageWithHintEx(&pVM->pgm.s, pPhys2Virt->Core.Key, &pPage, &pRamHint);
1437	if ( RT_SUCCESS(rc)
1438	&& PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1439	PGM_PAGE_SET_HNDL_VIRT_STATE(pPage, uState);
1440	else
1441	AssertRC(rc);
1442
1443	/*
1444	* Need to insert the page in the Phys2Virt lookup tree?
1445	*/
1446	if (pPhys2Virt->Core.KeyLast == NIL_RTGCPHYS)
1447	{
1448	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1449	AssertRelease(!pPhys2Virt->offNextAlias);
1450	#endif
1451	unsigned cbPhys = cbLeft;
1452	if (cbPhys > PAGE_SIZE - offPage)
1453	cbPhys = PAGE_SIZE - offPage;
1454	else
1455	Assert(iPage == pCur->cPages - 1);
1456	pPhys2Virt->Core.KeyLast = pPhys2Virt->Core.Key + cbPhys - 1; /* inclusive */
1457	pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IS_HEAD \| PGMPHYS2VIRTHANDLER_IN_TREE;
1458	if (!RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, &pPhys2Virt->Core))
1459	pgmHandlerVirtualInsertAliased(pVM, pPhys2Virt);
1460	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1461	else
1462	AssertReleaseMsg(RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key) == &pPhys2Virt->Core,
1463	("%RGp-%RGp offNextAlias=%#RX32\n",
1464	pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1465	#endif
1466	Log2(("PHYS2VIRT: Insert physical range %RGp-%RGp offNextAlias=%#RX32 %s\n",
1467	pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, R3STRING(pCur->pszDesc)));
1468	}
1469	}
1470	cbLeft -= PAGE_SIZE - offPage;
1471	offPage = 0;
1472	}
1473
1474	return 0;
1475	}
1476
1477	#if defined(VBOX_STRICT) \|\| defined(LOG_ENABLED)
1478
1479	/**
1480	* Worker for pgmHandlerVirtualDumpPhysPages.
1481	*
1482	* @returns 0 (continue enumeration).
1483	* @param pNode The virtual handler node.
1484	* @param pvUser User argument, unused.
1485	*/
1486	static DECLCALLBACK(int) pgmHandlerVirtualDumpPhysPagesCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1487	{
1488	PPGMPHYS2VIRTHANDLER pCur = (PPGMPHYS2VIRTHANDLER)pNode;
1489	PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1490	Log(("PHYS2VIRT: Range %RGp-%RGp for virtual handler: %s\n", pCur->Core.Key, pCur->Core.KeyLast, pVirt->pszDesc));
1491	return 0;
1492	}
1493
1494
1495	/**
1496	* Assertion / logging helper for dumping all the
1497	* virtual handlers to the log.
1498	*
1499	* @param pVM Pointer to the shared VM structure.
1500	*/
1501	void pgmHandlerVirtualDumpPhysPages(PVM pVM)
1502	{
1503	RTAvlroGCPhysDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, true /* from left */,
1504	pgmHandlerVirtualDumpPhysPagesCallback, 0);
1505	}
1506
1507	#endif /* VBOX_STRICT \|\| LOG_ENABLED */
1508	#ifdef VBOX_STRICT
1509
1510	/**
1511	* State structure used by the PGMAssertHandlerAndFlagsInSync() function
1512	* and its AVL enumerators.
1513	*/
1514	typedef struct PGMAHAFIS
1515	{
1516	/** The current physical address. */
1517	RTGCPHYS GCPhys;
1518	/** The state we've calculated. */
1519	unsigned uVirtStateFound;
1520	/** The state we're matching up to. */
1521	unsigned uVirtState;
1522	/** Number of errors. */
1523	unsigned cErrors;
1524	/** The VM handle. */
1525	PVM pVM;
1526	} PGMAHAFIS, *PPGMAHAFIS;
1527
1528
1529	#if 0 /* unused */
1530	/**
1531	* Verify virtual handler by matching physical address.
1532	*
1533	* @returns 0
1534	* @param pNode Pointer to a PGMVIRTHANDLER.
1535	* @param pvUser Pointer to user parameter.
1536	*/
1537	static DECLCALLBACK(int) pgmHandlerVirtualVerifyOneByPhysAddr(PAVLROGCPTRNODECORE pNode, void *pvUser)
1538	{
1539	PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1540	PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1541
1542	for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1543	{
1544	if ((pCur->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) == pState->GCPhys)
1545	{
1546	unsigned uState = pgmHandlerVirtualCalcState(pCur);
1547	if (pState->uVirtState < uState)
1548	{
1549	error
1550	}
1551
1552	if (pState->uVirtState == uState)
1553	break; //??
1554	}
1555	}
1556	return 0;
1557	}
1558	#endif /* unused */
1559
1560
1561	/**
1562	* Verify a virtual handler (enumeration callback).
1563	*
1564	* Called by PGMAssertHandlerAndFlagsInSync to check the sanity of all
1565	* the virtual handlers, esp. that the physical addresses matches up.
1566	*
1567	* @returns 0
1568	* @param pNode Pointer to a PGMVIRTHANDLER.
1569	* @param pvUser Pointer to a PPGMAHAFIS structure.
1570	*/
1571	static DECLCALLBACK(int) pgmHandlerVirtualVerifyOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1572	{
1573	PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)pNode;
1574	PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1575	PVM pVM = pState->pVM;
1576
1577	/*
1578	* Validate the type and calc state.
1579	*/
1580	switch (pVirt->enmType)
1581	{
1582	case PGMVIRTHANDLERTYPE_WRITE:
1583	case PGMVIRTHANDLERTYPE_ALL:
1584	break;
1585	default:
1586	AssertMsgFailed(("unknown/wrong enmType=%d\n", pVirt->enmType));
1587	pState->cErrors++;
1588	return 0;
1589	}
1590	const unsigned uState = pgmHandlerVirtualCalcState(pVirt);
1591
1592	/*
1593	* Check key alignment.
1594	*/
1595	if ( (pVirt->aPhysToVirt[0].Core.Key & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.Key & PAGE_OFFSET_MASK)
1596	&& pVirt->aPhysToVirt[0].Core.Key != NIL_RTGCPHYS)
1597	{
1598	AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1599	pVirt->aPhysToVirt[0].Core.Key, pVirt->Core.Key, R3STRING(pVirt->pszDesc)));
1600	pState->cErrors++;
1601	}
1602
1603	if ( (pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.KeyLast & PAGE_OFFSET_MASK)
1604	&& pVirt->aPhysToVirt[pVirt->cPages - 1].Core.Key != NIL_RTGCPHYS)
1605	{
1606	AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1607	pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast, pVirt->Core.KeyLast, R3STRING(pVirt->pszDesc)));
1608	pState->cErrors++;
1609	}
1610
1611	/*
1612	* Check pages for sanity and state.
1613	*/
1614	RTGCUINTPTR GCPtr = (RTGCUINTPTR)pVirt->Core.Key;
1615	for (unsigned iPage = 0; iPage < pVirt->cPages; iPage++, GCPtr += PAGE_SIZE)
1616	{
1617	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1618	{
1619	PVMCPU pVCpu = &pVM->aCpus[i];
1620
1621	RTGCPHYS GCPhysGst;
1622	uint64_t fGst;
1623	int rc = PGMGstGetPage(pVCpu, (RTGCPTR)GCPtr, &fGst, &GCPhysGst);
1624	if ( rc == VERR_PAGE_NOT_PRESENT
1625	\|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1626	{
1627	if (pVirt->aPhysToVirt[iPage].Core.Key != NIL_RTGCPHYS)
1628	{
1629	AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysNew=~0 iPage=%#x %RGv %s\n",
1630	pVirt->aPhysToVirt[iPage].Core.Key, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1631	pState->cErrors++;
1632	}
1633	continue;
1634	}
1635
1636	AssertRCReturn(rc, 0);
1637	if ((pVirt->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) != GCPhysGst)
1638	{
1639	AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1640	pVirt->aPhysToVirt[iPage].Core.Key, GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1641	pState->cErrors++;
1642	continue;
1643	}
1644
1645	PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysGst);
1646	if (!pPage)
1647	{
1648	AssertMsgFailed(("virt handler getting ram flags. GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1649	GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1650	pState->cErrors++;
1651	continue;
1652	}
1653
1654	if (PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1655	{
1656	AssertMsgFailed(("virt handler state mismatch. pPage=%R[pgmpage] GCPhysGst=%RGp iPage=%#x %RGv state=%d expected>=%d %s\n",
1657	pPage, GCPhysGst, iPage, GCPtr, PGM_PAGE_GET_HNDL_VIRT_STATE(pPage), uState, R3STRING(pVirt->pszDesc)));
1658	pState->cErrors++;
1659	continue;
1660	}
1661	} /* for each VCPU */
1662	} /* for pages in virtual mapping. */
1663
1664	return 0;
1665	}
1666
1667
1668	/**
1669	* Asserts that the handlers+guest-page-tables == ramrange-flags and
1670	* that the physical addresses associated with virtual handlers are correct.
1671	*
1672	* @returns Number of mismatches.
1673	* @param pVM The VM handle.
1674	*/
1675	VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM)
1676	{
1677	PPGM pPGM = &pVM->pgm.s;
1678	PGMAHAFIS State;
1679	State.GCPhys = 0;
1680	State.uVirtState = 0;
1681	State.uVirtStateFound = 0;
1682	State.cErrors = 0;
1683	State.pVM = pVM;
1684
1685	Assert(PGMIsLockOwner(pVM));
1686
1687	/*
1688	* Check the RAM flags against the handlers.
1689	*/
1690	for (PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRanges); pRam; pRam = pRam->CTX_SUFF(pNext))
1691	{
1692	const unsigned cPages = pRam->cb >> PAGE_SHIFT;
1693	for (unsigned iPage = 0; iPage < cPages; iPage++)
1694	{
1695	PGMPAGE const *pPage = &pRam->aPages[iPage];
1696	if (PGM_PAGE_HAS_ANY_HANDLERS(pPage))
1697	{
1698	State.GCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT);
1699
1700	/*
1701	* Physical first - calculate the state based on the handlers
1702	* active on the page, then compare.
1703	*/
1704	if (PGM_PAGE_HAS_ANY_PHYSICAL_HANDLERS(pPage))
1705	{
1706	/* the first */
1707	PPGMPHYSHANDLER pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys);
1708	if (!pPhys)
1709	{
1710	pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys, true);
1711	if ( pPhys
1712	&& pPhys->Core.Key > (State.GCPhys + PAGE_SIZE - 1))
1713	pPhys = NULL;
1714	Assert(!pPhys \|\| pPhys->Core.Key >= State.GCPhys);
1715	}
1716	if (pPhys)
1717	{
1718	unsigned uState = pgmHandlerPhysicalCalcState(pPhys);
1719
1720	/* more? */
1721	while (pPhys->Core.KeyLast < (State.GCPhys \| PAGE_OFFSET_MASK))
1722	{
1723	PPGMPHYSHANDLER pPhys2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers,
1724	pPhys->Core.KeyLast + 1, true);
1725	if ( !pPhys2
1726	\|\| pPhys2->Core.Key > (State.GCPhys \| PAGE_OFFSET_MASK))
1727	break;
1728	unsigned uState2 = pgmHandlerPhysicalCalcState(pPhys2);
1729	uState = RT_MAX(uState, uState2);
1730	pPhys = pPhys2;
1731	}
1732
1733	/* compare.*/
1734	if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != uState
1735	&& PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
1736	{
1737	AssertMsgFailed(("ram range vs phys handler flags mismatch. GCPhys=%RGp state=%d expected=%d %s\n",
1738	State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), uState, pPhys->pszDesc));
1739	State.cErrors++;
1740	}
1741
1742	#ifdef IN_RING3
1743	/* validate that REM is handling it. */
1744	if ( !REMR3IsPageAccessHandled(pVM, State.GCPhys)
1745	/* ignore shadowed ROM for the time being. */
1746	&& PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_ROM_SHADOW)
1747	{
1748	AssertMsgFailed(("ram range vs phys handler REM mismatch. GCPhys=%RGp state=%d %s\n",
1749	State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), pPhys->pszDesc));
1750	State.cErrors++;
1751	}
1752	#endif
1753	}
1754	else
1755	{
1756	AssertMsgFailed(("ram range vs phys handler mismatch. no handler for GCPhys=%RGp\n", State.GCPhys));
1757	State.cErrors++;
1758	}
1759	}
1760
1761	/*
1762	* Virtual handlers.
1763	*/
1764	if (PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage))
1765	{
1766	State.uVirtState = PGM_PAGE_GET_HNDL_VIRT_STATE(pPage);
1767	#if 1
1768	/* locate all the matching physical ranges. */
1769	State.uVirtStateFound = PGM_PAGE_HNDL_VIRT_STATE_NONE;
1770	RTGCPHYS GCPhysKey = State.GCPhys;
1771	for (;;)
1772	{
1773	PPGMPHYS2VIRTHANDLER pPhys2Virt = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers,
1774	GCPhysKey, true /* above-or-equal */);
1775	if ( !pPhys2Virt
1776	\|\| (pPhys2Virt->Core.Key & X86_PTE_PAE_PG_MASK) != State.GCPhys)
1777	break;
1778
1779	/* the head */
1780	GCPhysKey = pPhys2Virt->Core.KeyLast;
1781	PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
1782	unsigned uState = pgmHandlerVirtualCalcState(pCur);
1783	State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
1784
1785	/* any aliases */
1786	while (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
1787	{
1788	pPhys2Virt = (PPGMPHYS2VIRTHANDLER)((uintptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
1789	pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
1790	uState = pgmHandlerVirtualCalcState(pCur);
1791	State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
1792	}
1793
1794	/* done? */
1795	if ((GCPhysKey & X86_PTE_PAE_PG_MASK) != State.GCPhys)
1796	break;
1797	}
1798	#else
1799	/* very slow */
1800	RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOneByPhysAddr, &State);
1801	#endif
1802	if (State.uVirtState != State.uVirtStateFound)
1803	{
1804	AssertMsgFailed(("ram range vs virt handler flags mismatch. GCPhys=%RGp uVirtState=%#x uVirtStateFound=%#x\n",
1805	State.GCPhys, State.uVirtState, State.uVirtStateFound));
1806	State.cErrors++;
1807	}
1808	}
1809	}
1810	} /* foreach page in ram range. */
1811	} /* foreach ram range. */
1812
1813	/*
1814	* Check that the physical addresses of the virtual handlers matches up
1815	* and that they are otherwise sane.
1816	*/
1817	RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOne, &State);
1818
1819	/*
1820	* Do the reverse check for physical handlers.
1821	*/
1822	/** @todo */
1823
1824	return State.cErrors;
1825	}
1826
1827	#endif /* VBOX_STRICT */
1828

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source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp@ 35499

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