VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp@ 55362

Last change on this file since 55362 was 55331, checked in by vboxsync, 10 years ago

PGMHandlerPhysicalChangeCallbacks -> PGMHandlerPhysicalChangeUserArgs.

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1/* $Id: PGMAllHandler.cpp 55331 2015-04-17 13:38:38Z vboxsync $ */
2/** @file
3 * PGM - Page Manager / Monitor, Access Handlers.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*******************************************************************************
20* Header Files *
21*******************************************************************************/
22#define LOG_GROUP LOG_GROUP_PGM
23#include <VBox/vmm/dbgf.h>
24#include <VBox/vmm/pgm.h>
25#include <VBox/vmm/iom.h>
26#include <VBox/vmm/mm.h>
27#include <VBox/vmm/em.h>
28#include <VBox/vmm/stam.h>
29#ifdef VBOX_WITH_REM
30# include <VBox/vmm/rem.h>
31#endif
32#include <VBox/vmm/dbgf.h>
33#ifdef VBOX_WITH_REM
34# include <VBox/vmm/rem.h>
35#endif
36#include "PGMInternal.h"
37#include <VBox/vmm/vm.h>
38#include "PGMInline.h"
39
40#include <VBox/log.h>
41#include <iprt/assert.h>
42#include <iprt/asm-amd64-x86.h>
43#include <iprt/string.h>
44#include <VBox/param.h>
45#include <VBox/err.h>
46#include <VBox/vmm/selm.h>
47
48
49/*******************************************************************************
50* Internal Functions *
51*******************************************************************************/
52static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam);
53static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur);
54static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur);
55
56
57
58/**
59 * Register a access handler for a physical range.
60 *
61 * @returns VBox status code.
62 * @retval VINF_SUCCESS when successfully installed.
63 * @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
64 * the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
65 * flagged together with a pool clearing.
66 * @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
67 * one. A debug assertion is raised.
68 *
69 * @param pVM Pointer to the VM.
70 * @param enmType Handler type. Any of the PGMPHYSHANDLERTYPE_PHYSICAL* enums.
71 * @param GCPhys Start physical address.
72 * @param GCPhysLast Last physical address. (inclusive)
73 * @param pfnHandlerR3 The R3 handler.
74 * @param pvUserR3 User argument to the R3 handler.
75 * @param pfnHandlerR0 The R0 handler.
76 * @param pvUserR0 User argument to the R0 handler.
77 * @param pfnHandlerRC The RC handler.
78 * @param pvUserRC User argument to the RC handler. This can be a value
79 * less that 0x10000 or a (non-null) pointer that is
80 * automatically relocated.
81 * @param pszDesc Pointer to description string. This must not be freed.
82 */
83VMMDECL(int) PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
84 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
85 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
86 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
87 R3PTRTYPE(const char *) pszDesc)
88{
89 Log(("PGMHandlerPhysicalRegisterEx: enmType=%d GCPhys=%RGp GCPhysLast=%RGp pfnHandlerR3=%RHv pvUserR3=%RHv pfnHandlerR0=%RHv pvUserR0=%RHv pfnHandlerGC=%RRv pvUserGC=%RRv pszDesc=%s\n",
90 enmType, GCPhys, GCPhysLast, pfnHandlerR3, pvUserR3, pfnHandlerR0, pvUserR0, pfnHandlerRC, pvUserRC, R3STRING(pszDesc)));
91
92 /*
93 * Validate input.
94 */
95 AssertMsgReturn(GCPhys < GCPhysLast, ("GCPhys >= GCPhysLast (%#x >= %#x)\n", GCPhys, GCPhysLast), VERR_INVALID_PARAMETER);
96 switch (enmType)
97 {
98 case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
99 break;
100 case PGMPHYSHANDLERTYPE_MMIO:
101 case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
102 /* Simplification for PGMPhysRead, PGMR0Trap0eHandlerNPMisconfig and others. */
103 AssertMsgReturn(!(GCPhys & PAGE_OFFSET_MASK), ("%RGp\n", GCPhys), VERR_INVALID_PARAMETER);
104 AssertMsgReturn((GCPhysLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, ("%RGp\n", GCPhysLast), VERR_INVALID_PARAMETER);
105 break;
106 default:
107 AssertMsgFailed(("Invalid input enmType=%d!\n", enmType));
108 return VERR_INVALID_PARAMETER;
109 }
110 AssertMsgReturn( (RTRCUINTPTR)pvUserRC < 0x10000
111 || MMHyperR3ToRC(pVM, MMHyperRCToR3(pVM, pvUserRC)) == pvUserRC,
112 ("Not RC pointer! pvUserRC=%RRv\n", pvUserRC),
113 VERR_INVALID_PARAMETER);
114 AssertMsgReturn( (RTR0UINTPTR)pvUserR0 < 0x10000
115 || MMHyperR3ToR0(pVM, MMHyperR0ToR3(pVM, pvUserR0)) == pvUserR0,
116 ("Not R0 pointer! pvUserR0=%RHv\n", pvUserR0),
117 VERR_INVALID_PARAMETER);
118 AssertPtrReturn(pfnHandlerR3, VERR_INVALID_POINTER);
119 AssertReturn(pfnHandlerR0, VERR_INVALID_PARAMETER);
120 AssertReturn(pfnHandlerRC || HMIsEnabled(pVM), VERR_INVALID_PARAMETER);
121
122 /*
123 * We require the range to be within registered ram.
124 * There is no apparent need to support ranges which cover more than one ram range.
125 */
126 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
127 if ( !pRam
128 || GCPhysLast < pRam->GCPhys
129 || GCPhys > pRam->GCPhysLast)
130 {
131#ifdef IN_RING3
132 DBGFR3Info(pVM->pUVM, "phys", NULL, NULL);
133#endif
134 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
135 return VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
136 }
137
138 /*
139 * Allocate and initialize the new entry.
140 */
141 PPGMPHYSHANDLER pNew;
142 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
143 if (RT_FAILURE(rc))
144 return rc;
145
146 pNew->Core.Key = GCPhys;
147 pNew->Core.KeyLast = GCPhysLast;
148 pNew->enmType = enmType;
149 pNew->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
150 pNew->cAliasedPages = 0;
151 pNew->cTmpOffPages = 0;
152 pNew->pfnHandlerR3 = pfnHandlerR3;
153 pNew->pvUserR3 = pvUserR3;
154 pNew->pfnHandlerR0 = pfnHandlerR0;
155 pNew->pvUserR0 = pvUserR0;
156 pNew->pfnHandlerRC = pfnHandlerRC;
157 pNew->pvUserRC = pvUserRC;
158 pNew->pszDesc = pszDesc;
159
160 pgmLock(pVM);
161
162 /*
163 * Try insert into list.
164 */
165 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core))
166 {
167 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pNew, pRam);
168 if (rc == VINF_PGM_SYNC_CR3)
169 rc = VINF_PGM_GCPHYS_ALIASED;
170 pgmUnlock(pVM);
171#ifdef VBOX_WITH_REM
172# ifndef IN_RING3
173 REMNotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);
174# else
175 REMR3NotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);
176# endif
177#endif
178 if (rc != VINF_SUCCESS)
179 Log(("PGMHandlerPhysicalRegisterEx: returns %Rrc (%RGp-%RGp)\n", rc, GCPhys, GCPhysLast));
180 return rc;
181 }
182
183 pgmUnlock(pVM);
184
185#if defined(IN_RING3) && defined(VBOX_STRICT)
186 DBGFR3Info(pVM->pUVM, "handlers", "phys nostats", NULL);
187#endif
188 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp pszDesc=%s\n", GCPhys, GCPhysLast, pszDesc));
189 MMHyperFree(pVM, pNew);
190 return VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
191}
192
193
194/**
195 * Sets ram range flags and attempts updating shadow PTs.
196 *
197 * @returns VBox status code.
198 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
199 * @retval VINF_PGM_SYNC_CR3 when the shadow PTs could be updated because
200 * the guest page aliased or/and mapped by multiple PTs. FFs set.
201 * @param pVM Pointer to the VM.
202 * @param pCur The physical handler.
203 * @param pRam The RAM range.
204 */
205static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam)
206{
207 /*
208 * Iterate the guest ram pages updating the flags and flushing PT entries
209 * mapping the page.
210 */
211 bool fFlushTLBs = false;
212 int rc = VINF_SUCCESS;
213 const unsigned uState = pgmHandlerPhysicalCalcState(pCur);
214 uint32_t cPages = pCur->cPages;
215 uint32_t i = (pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT;
216 for (;;)
217 {
218 PPGMPAGE pPage = &pRam->aPages[i];
219 AssertMsg(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO || PGM_PAGE_IS_MMIO(pPage),
220 ("%RGp %R[pgmpage]\n", pRam->GCPhys + (i << PAGE_SHIFT), pPage));
221
222 /* Only do upgrades. */
223 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
224 {
225 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
226
227 int rc2 = pgmPoolTrackUpdateGCPhys(pVM, pRam->GCPhys + (i << PAGE_SHIFT), pPage,
228 false /* allow updates of PTEs (instead of flushing) */, &fFlushTLBs);
229 if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
230 rc = rc2;
231 }
232
233 /* next */
234 if (--cPages == 0)
235 break;
236 i++;
237 }
238
239 if (fFlushTLBs)
240 {
241 PGM_INVL_ALL_VCPU_TLBS(pVM);
242 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: flushing guest TLBs; rc=%d\n", rc));
243 }
244 else
245 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: doesn't flush guest TLBs. rc=%Rrc; sync flags=%x VMCPU_FF_PGM_SYNC_CR3=%d\n", rc, VMMGetCpu(pVM)->pgm.s.fSyncFlags, VMCPU_FF_IS_SET(VMMGetCpu(pVM), VMCPU_FF_PGM_SYNC_CR3)));
246
247 return rc;
248}
249
250
251/**
252 * Register a physical page access handler.
253 *
254 * @returns VBox status code.
255 * @param pVM Pointer to the VM.
256 * @param GCPhys Start physical address.
257 */
258VMMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys)
259{
260 /*
261 * Find the handler.
262 */
263 pgmLock(pVM);
264 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
265 if (pCur)
266 {
267 LogFlow(("PGMHandlerPhysicalDeregister: Removing Range %RGp-%RGp %s\n",
268 pCur->Core.Key, pCur->Core.KeyLast, R3STRING(pCur->pszDesc)));
269
270 /*
271 * Clear the page bits, notify the REM about this change and clear
272 * the cache.
273 */
274 pgmHandlerPhysicalResetRamFlags(pVM, pCur);
275 pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
276 pVM->pgm.s.pLastPhysHandlerR0 = 0;
277 pVM->pgm.s.pLastPhysHandlerR3 = 0;
278 pVM->pgm.s.pLastPhysHandlerRC = 0;
279 MMHyperFree(pVM, pCur);
280 pgmUnlock(pVM);
281 return VINF_SUCCESS;
282 }
283 pgmUnlock(pVM);
284
285 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
286 return VERR_PGM_HANDLER_NOT_FOUND;
287}
288
289
290/**
291 * Shared code with modify.
292 */
293static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur)
294{
295 RTGCPHYS GCPhysStart = pCur->Core.Key;
296 RTGCPHYS GCPhysLast = pCur->Core.KeyLast;
297
298 /*
299 * Page align the range.
300 *
301 * Since we've reset (recalculated) the physical handler state of all pages
302 * we can make use of the page states to figure out whether a page should be
303 * included in the REM notification or not.
304 */
305 if ( (pCur->Core.Key & PAGE_OFFSET_MASK)
306 || ((pCur->Core.KeyLast + 1) & PAGE_OFFSET_MASK))
307 {
308 Assert(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO);
309
310 if (GCPhysStart & PAGE_OFFSET_MASK)
311 {
312 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysStart);
313 if ( pPage
314 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
315 {
316 RTGCPHYS GCPhys = (GCPhysStart + (PAGE_SIZE - 1)) & X86_PTE_PAE_PG_MASK;
317 if ( GCPhys > GCPhysLast
318 || GCPhys < GCPhysStart)
319 return;
320 GCPhysStart = GCPhys;
321 }
322 else
323 GCPhysStart &= X86_PTE_PAE_PG_MASK;
324 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
325 }
326
327 if (GCPhysLast & PAGE_OFFSET_MASK)
328 {
329 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysLast);
330 if ( pPage
331 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
332 {
333 RTGCPHYS GCPhys = (GCPhysLast & X86_PTE_PAE_PG_MASK) - 1;
334 if ( GCPhys < GCPhysStart
335 || GCPhys > GCPhysLast)
336 return;
337 GCPhysLast = GCPhys;
338 }
339 else
340 GCPhysLast |= PAGE_OFFSET_MASK;
341 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
342 }
343 }
344
345 /*
346 * Tell REM.
347 */
348 const bool fRestoreAsRAM = pCur->pfnHandlerR3
349 && pCur->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */
350#ifdef VBOX_WITH_REM
351# ifndef IN_RING3
352 REMNotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
353# else
354 REMR3NotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
355# endif
356#endif
357}
358
359
360/**
361 * pgmHandlerPhysicalResetRamFlags helper that checks for other handlers on
362 * edge pages.
363 */
364DECLINLINE(void) pgmHandlerPhysicalRecalcPageState(PVM pVM, RTGCPHYS GCPhys, bool fAbove, PPGMRAMRANGE *ppRamHint)
365{
366 /*
367 * Look for other handlers.
368 */
369 unsigned uState = PGM_PAGE_HNDL_PHYS_STATE_NONE;
370 for (;;)
371 {
372 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys, fAbove);
373 if ( !pCur
374 || ((fAbove ? pCur->Core.Key : pCur->Core.KeyLast) >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
375 break;
376 unsigned uThisState = pgmHandlerPhysicalCalcState(pCur);
377 uState = RT_MAX(uState, uThisState);
378
379 /* next? */
380 RTGCPHYS GCPhysNext = fAbove
381 ? pCur->Core.KeyLast + 1
382 : pCur->Core.Key - 1;
383 if ((GCPhysNext >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
384 break;
385 GCPhys = GCPhysNext;
386 }
387
388 /*
389 * Update if we found something that is a higher priority
390 * state than the current.
391 */
392 if (uState != PGM_PAGE_HNDL_PHYS_STATE_NONE)
393 {
394 PPGMPAGE pPage;
395 int rc = pgmPhysGetPageWithHintEx(pVM, GCPhys, &pPage, ppRamHint);
396 if ( RT_SUCCESS(rc)
397 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
398 {
399 /* This should normally not be necessary. */
400 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
401 bool fFlushTLBs ;
402 rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhys, pPage, false /*fFlushPTEs*/, &fFlushTLBs);
403 if (RT_SUCCESS(rc) && fFlushTLBs)
404 PGM_INVL_ALL_VCPU_TLBS(pVM);
405 else
406 AssertRC(rc);
407 }
408 else
409 AssertRC(rc);
410 }
411}
412
413
414/**
415 * Resets an aliased page.
416 *
417 * @param pVM The VM.
418 * @param pPage The page.
419 * @param GCPhysPage The page address in case it comes in handy.
420 * @param fDoAccounting Whether to perform accounting. (Only set during
421 * reset where pgmR3PhysRamReset doesn't have the
422 * handler structure handy.)
423 */
424void pgmHandlerPhysicalResetAliasedPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhysPage, bool fDoAccounting)
425{
426 Assert( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
427 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO);
428 Assert(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
429
430 /*
431 * Flush any shadow page table references *first*.
432 */
433 bool fFlushTLBs = false;
434 int rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhysPage, pPage, true /*fFlushPTEs*/, &fFlushTLBs);
435 AssertLogRelRCReturnVoid(rc);
436# ifdef IN_RC
437 if (fFlushTLBs && rc != VINF_PGM_SYNC_CR3)
438 PGM_INVL_VCPU_TLBS(VMMGetCpu0(pVM));
439# else
440 HMFlushTLBOnAllVCpus(pVM);
441# endif
442
443 /*
444 * Make it an MMIO/Zero page.
445 */
446 PGM_PAGE_SET_HCPHYS(pVM, pPage, pVM->pgm.s.HCPhysZeroPg);
447 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO);
448 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ZERO);
449 PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
450 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_ALL);
451
452 /* Flush its TLB entry. */
453 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
454
455 /*
456 * Do accounting for pgmR3PhysRamReset.
457 */
458 if (fDoAccounting)
459 {
460 PPGMPHYSHANDLER pHandler = pgmHandlerPhysicalLookup(pVM, GCPhysPage);
461 if (RT_LIKELY(pHandler))
462 {
463 Assert(pHandler->cAliasedPages > 0);
464 pHandler->cAliasedPages--;
465 }
466 else
467 AssertFailed();
468 }
469}
470
471
472/**
473 * Resets ram range flags.
474 *
475 * @returns VBox status code.
476 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
477 * @param pVM Pointer to the VM.
478 * @param pCur The physical handler.
479 *
480 * @remark We don't start messing with the shadow page tables, as we've
481 * already got code in Trap0e which deals with out of sync handler
482 * flags (originally conceived for global pages).
483 */
484static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur)
485{
486 /*
487 * Iterate the guest ram pages updating the state.
488 */
489 RTUINT cPages = pCur->cPages;
490 RTGCPHYS GCPhys = pCur->Core.Key;
491 PPGMRAMRANGE pRamHint = NULL;
492 for (;;)
493 {
494 PPGMPAGE pPage;
495 int rc = pgmPhysGetPageWithHintEx(pVM, GCPhys, &pPage, &pRamHint);
496 if (RT_SUCCESS(rc))
497 {
498 /* Reset aliased MMIO pages to MMIO, since this aliasing is our business.
499 (We don't flip MMIO to RAM though, that's PGMPhys.cpp's job.) */
500 if ( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
501 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO)
502 {
503 Assert(pCur->cAliasedPages > 0);
504 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhys, false /*fDoAccounting*/);
505 pCur->cAliasedPages--;
506 }
507 AssertMsg(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO || PGM_PAGE_IS_MMIO(pPage), ("%RGp %R[pgmpage]\n", GCPhys, pPage));
508 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_NONE);
509 }
510 else
511 AssertRC(rc);
512
513 /* next */
514 if (--cPages == 0)
515 break;
516 GCPhys += PAGE_SIZE;
517 }
518
519 pCur->cAliasedPages = 0;
520 pCur->cTmpOffPages = 0;
521
522 /*
523 * Check for partial start and end pages.
524 */
525 if (pCur->Core.Key & PAGE_OFFSET_MASK)
526 pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.Key - 1, false /* fAbove */, &pRamHint);
527 if ((pCur->Core.KeyLast & PAGE_OFFSET_MASK) != PAGE_OFFSET_MASK)
528 pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.KeyLast + 1, true /* fAbove */, &pRamHint);
529}
530
531
532/**
533 * Modify a physical page access handler.
534 *
535 * Modification can only be done to the range it self, not the type or anything else.
536 *
537 * @returns VBox status code.
538 * For all return codes other than VERR_PGM_HANDLER_NOT_FOUND and VINF_SUCCESS the range is deregistered
539 * and a new registration must be performed!
540 * @param pVM Pointer to the VM.
541 * @param GCPhysCurrent Current location.
542 * @param GCPhys New location.
543 * @param GCPhysLast New last location.
544 */
545VMMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
546{
547 /*
548 * Remove it.
549 */
550 int rc;
551 pgmLock(pVM);
552 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhysCurrent);
553 if (pCur)
554 {
555 /*
556 * Clear the ram flags. (We're gonna move or free it!)
557 */
558 pgmHandlerPhysicalResetRamFlags(pVM, pCur);
559 const bool fRestoreAsRAM = pCur->pfnHandlerR3
560 && pCur->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */
561
562 /*
563 * Validate the new range, modify and reinsert.
564 */
565 if (GCPhysLast >= GCPhys)
566 {
567 /*
568 * We require the range to be within registered ram.
569 * There is no apparent need to support ranges which cover more than one ram range.
570 */
571 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
572 if ( pRam
573 && GCPhys <= pRam->GCPhysLast
574 && GCPhysLast >= pRam->GCPhys)
575 {
576 pCur->Core.Key = GCPhys;
577 pCur->Core.KeyLast = GCPhysLast;
578 pCur->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + 1) >> PAGE_SHIFT;
579
580 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pCur->Core))
581 {
582 PGMPHYSHANDLERTYPE enmType = pCur->enmType;
583 RTGCPHYS cb = GCPhysLast - GCPhys + 1;
584 bool fHasHCHandler = !!pCur->pfnHandlerR3;
585
586 /*
587 * Set ram flags, flush shadow PT entries and finally tell REM about this.
588 */
589 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
590 pgmUnlock(pVM);
591
592#ifdef VBOX_WITH_REM
593# ifndef IN_RING3
594 REMNotifyHandlerPhysicalModify(pVM, enmType, GCPhysCurrent, GCPhys, cb,
595 fHasHCHandler, fRestoreAsRAM);
596# else
597 REMR3NotifyHandlerPhysicalModify(pVM, enmType, GCPhysCurrent, GCPhys, cb,
598 fHasHCHandler, fRestoreAsRAM);
599# endif
600#endif
601 PGM_INVL_ALL_VCPU_TLBS(pVM);
602 Log(("PGMHandlerPhysicalModify: GCPhysCurrent=%RGp -> GCPhys=%RGp GCPhysLast=%RGp\n",
603 GCPhysCurrent, GCPhys, GCPhysLast));
604 return VINF_SUCCESS;
605 }
606
607 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp\n", GCPhys, GCPhysLast));
608 rc = VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
609 }
610 else
611 {
612 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
613 rc = VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
614 }
615 }
616 else
617 {
618 AssertMsgFailed(("Invalid range %RGp-%RGp\n", GCPhys, GCPhysLast));
619 rc = VERR_INVALID_PARAMETER;
620 }
621
622 /*
623 * Invalid new location, flush the cache and free it.
624 * We've only gotta notify REM and free the memory.
625 */
626 pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
627 pVM->pgm.s.pLastPhysHandlerR0 = 0;
628 pVM->pgm.s.pLastPhysHandlerR3 = 0;
629 pVM->pgm.s.pLastPhysHandlerRC = 0;
630 MMHyperFree(pVM, pCur);
631 }
632 else
633 {
634 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhysCurrent));
635 rc = VERR_PGM_HANDLER_NOT_FOUND;
636 }
637
638 pgmUnlock(pVM);
639 return rc;
640}
641
642
643/**
644 * Changes the user callback arguments associated with a physical access
645 * handler.
646 *
647 * @returns VBox status code.
648 * @param pVM Pointer to the VM.
649 * @param GCPhys Start physical address of the handler.
650 * @param pvUserR3 User argument to the R3 handler.
651 * @param pvUserR0 User argument to the R0 handler.
652 * @param pvUserRC User argument to the RC handler. Values larger or
653 * equal to 0x10000 will be relocated automatically.
654 */
655VMMDECL(int) PGMHandlerPhysicalChangeUserArgs(PVM pVM, RTGCPHYS GCPhys, RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC)
656{
657 /*
658 * Find the handler.
659 */
660 int rc = VINF_SUCCESS;
661 pgmLock(pVM);
662 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
663 if (pCur)
664 {
665 /*
666 * Change arguments.
667 */
668 pCur->pvUserR3 = pvUserR3;
669 pCur->pvUserR0 = pvUserR0;
670 pCur->pvUserRC = pvUserRC;
671 }
672 else
673 {
674 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
675 rc = VERR_PGM_HANDLER_NOT_FOUND;
676 }
677
678 pgmUnlock(pVM);
679 return rc;
680}
681
682
683/**
684 * Splits a physical access handler in two.
685 *
686 * @returns VBox status code.
687 * @param pVM Pointer to the VM.
688 * @param GCPhys Start physical address of the handler.
689 * @param GCPhysSplit The split address.
690 */
691VMMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit)
692{
693 AssertReturn(GCPhys < GCPhysSplit, VERR_INVALID_PARAMETER);
694
695 /*
696 * Do the allocation without owning the lock.
697 */
698 PPGMPHYSHANDLER pNew;
699 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
700 if (RT_FAILURE(rc))
701 return rc;
702
703 /*
704 * Get the handler.
705 */
706 pgmLock(pVM);
707 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
708 if (RT_LIKELY(pCur))
709 {
710 if (RT_LIKELY(GCPhysSplit <= pCur->Core.KeyLast))
711 {
712 /*
713 * Create new handler node for the 2nd half.
714 */
715 *pNew = *pCur;
716 pNew->Core.Key = GCPhysSplit;
717 pNew->cPages = (pNew->Core.KeyLast - (pNew->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
718
719 pCur->Core.KeyLast = GCPhysSplit - 1;
720 pCur->cPages = (pCur->Core.KeyLast - (pCur->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
721
722 if (RT_LIKELY(RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core)))
723 {
724 LogFlow(("PGMHandlerPhysicalSplit: %RGp-%RGp and %RGp-%RGp\n",
725 pCur->Core.Key, pCur->Core.KeyLast, pNew->Core.Key, pNew->Core.KeyLast));
726 pgmUnlock(pVM);
727 return VINF_SUCCESS;
728 }
729 AssertMsgFailed(("whu?\n"));
730 rc = VERR_PGM_PHYS_HANDLER_IPE;
731 }
732 else
733 {
734 AssertMsgFailed(("outside range: %RGp-%RGp split %RGp\n", pCur->Core.Key, pCur->Core.KeyLast, GCPhysSplit));
735 rc = VERR_INVALID_PARAMETER;
736 }
737 }
738 else
739 {
740 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
741 rc = VERR_PGM_HANDLER_NOT_FOUND;
742 }
743 pgmUnlock(pVM);
744 MMHyperFree(pVM, pNew);
745 return rc;
746}
747
748
749/**
750 * Joins up two adjacent physical access handlers which has the same callbacks.
751 *
752 * @returns VBox status code.
753 * @param pVM Pointer to the VM.
754 * @param GCPhys1 Start physical address of the first handler.
755 * @param GCPhys2 Start physical address of the second handler.
756 */
757VMMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2)
758{
759 /*
760 * Get the handlers.
761 */
762 int rc;
763 pgmLock(pVM);
764 PPGMPHYSHANDLER pCur1 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys1);
765 if (RT_LIKELY(pCur1))
766 {
767 PPGMPHYSHANDLER pCur2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
768 if (RT_LIKELY(pCur2))
769 {
770 /*
771 * Make sure that they are adjacent, and that they've got the same callbacks.
772 */
773 if (RT_LIKELY(pCur1->Core.KeyLast + 1 == pCur2->Core.Key))
774 {
775 if (RT_LIKELY( pCur1->pfnHandlerRC == pCur2->pfnHandlerRC
776 && pCur1->pfnHandlerR0 == pCur2->pfnHandlerR0
777 && pCur1->pfnHandlerR3 == pCur2->pfnHandlerR3))
778 {
779 PPGMPHYSHANDLER pCur3 = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
780 if (RT_LIKELY(pCur3 == pCur2))
781 {
782 pCur1->Core.KeyLast = pCur2->Core.KeyLast;
783 pCur1->cPages = (pCur1->Core.KeyLast - (pCur1->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
784 LogFlow(("PGMHandlerPhysicalJoin: %RGp-%RGp %RGp-%RGp\n",
785 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
786 pVM->pgm.s.pLastPhysHandlerR0 = 0;
787 pVM->pgm.s.pLastPhysHandlerR3 = 0;
788 pVM->pgm.s.pLastPhysHandlerRC = 0;
789 MMHyperFree(pVM, pCur2);
790 pgmUnlock(pVM);
791 return VINF_SUCCESS;
792 }
793
794 Assert(pCur3 == pCur2);
795 rc = VERR_PGM_PHYS_HANDLER_IPE;
796 }
797 else
798 {
799 AssertMsgFailed(("mismatching handlers\n"));
800 rc = VERR_ACCESS_DENIED;
801 }
802 }
803 else
804 {
805 AssertMsgFailed(("not adjacent: %RGp-%RGp %RGp-%RGp\n",
806 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
807 rc = VERR_INVALID_PARAMETER;
808 }
809 }
810 else
811 {
812 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys2));
813 rc = VERR_PGM_HANDLER_NOT_FOUND;
814 }
815 }
816 else
817 {
818 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys1));
819 rc = VERR_PGM_HANDLER_NOT_FOUND;
820 }
821 pgmUnlock(pVM);
822 return rc;
823
824}
825
826
827/**
828 * Resets any modifications to individual pages in a physical page access
829 * handler region.
830 *
831 * This is used in pair with PGMHandlerPhysicalPageTempOff(),
832 * PGMHandlerPhysicalPageAlias() or PGMHandlerPhysicalPageAliasHC().
833 *
834 * @returns VBox status code.
835 * @param pVM Pointer to the VM
836 * @param GCPhys The start address of the handler regions, i.e. what you
837 * passed to PGMR3HandlerPhysicalRegister(),
838 * PGMHandlerPhysicalRegisterEx() or
839 * PGMHandlerPhysicalModify().
840 */
841VMMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys)
842{
843 LogFlow(("PGMHandlerPhysicalReset GCPhys=%RGp\n", GCPhys));
844 pgmLock(pVM);
845
846 /*
847 * Find the handler.
848 */
849 int rc;
850 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
851 if (RT_LIKELY(pCur))
852 {
853 /*
854 * Validate type.
855 */
856 switch (pCur->enmType)
857 {
858 case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
859 case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
860 case PGMPHYSHANDLERTYPE_MMIO: /* NOTE: Only use when clearing MMIO ranges with aliased MMIO2 pages! */
861 {
862 STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,PhysHandlerReset)); /**@Todo move out of switch */
863 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
864 Assert(pRam);
865 Assert(pRam->GCPhys <= pCur->Core.Key);
866 Assert(pRam->GCPhysLast >= pCur->Core.KeyLast);
867
868 if (pCur->enmType == PGMPHYSHANDLERTYPE_MMIO)
869 {
870 /*
871 * Reset all the PGMPAGETYPE_MMIO2_ALIAS_MMIO pages first and that's it.
872 * This could probably be optimized a bit wrt to flushing, but I'm too lazy
873 * to do that now...
874 */
875 if (pCur->cAliasedPages)
876 {
877 PPGMPAGE pPage = &pRam->aPages[(pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT];
878 uint32_t cLeft = pCur->cPages;
879 while (cLeft-- > 0)
880 {
881 if ( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
882 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO)
883 {
884 Assert(pCur->cAliasedPages > 0);
885 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)cLeft << PAGE_SHIFT),
886 false /*fDoAccounting*/);
887 --pCur->cAliasedPages;
888#ifndef VBOX_STRICT
889 if (pCur->cAliasedPages == 0)
890 break;
891#endif
892 }
893 Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO);
894 pPage++;
895 }
896 Assert(pCur->cAliasedPages == 0);
897 }
898 }
899 else if (pCur->cTmpOffPages > 0)
900 {
901 /*
902 * Set the flags and flush shadow PT entries.
903 */
904 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
905 }
906
907 pCur->cAliasedPages = 0;
908 pCur->cTmpOffPages = 0;
909
910 rc = VINF_SUCCESS;
911 break;
912 }
913
914 /*
915 * Invalid.
916 */
917 default:
918 AssertMsgFailed(("Invalid type %d! Corruption!\n", pCur->enmType));
919 rc = VERR_PGM_PHYS_HANDLER_IPE;
920 break;
921 }
922 }
923 else
924 {
925 AssertMsgFailed(("Didn't find MMIO Range starting at %#x\n", GCPhys));
926 rc = VERR_PGM_HANDLER_NOT_FOUND;
927 }
928
929 pgmUnlock(pVM);
930 return rc;
931}
932
933
934/**
935 * Temporarily turns off the access monitoring of a page within a monitored
936 * physical write/all page access handler region.
937 *
938 * Use this when no further \#PFs are required for that page. Be aware that
939 * a page directory sync might reset the flags, and turn on access monitoring
940 * for the page.
941 *
942 * The caller must do required page table modifications.
943 *
944 * @returns VBox status code.
945 * @param pVM Pointer to the VM
946 * @param GCPhys The start address of the access handler. This
947 * must be a fully page aligned range or we risk
948 * messing up other handlers installed for the
949 * start and end pages.
950 * @param GCPhysPage The physical address of the page to turn off
951 * access monitoring for.
952 */
953VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)
954{
955 LogFlow(("PGMHandlerPhysicalPageTempOff GCPhysPage=%RGp\n", GCPhysPage));
956
957 pgmLock(pVM);
958 /*
959 * Validate the range.
960 */
961 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
962 if (RT_LIKELY(pCur))
963 {
964 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
965 && GCPhysPage <= pCur->Core.KeyLast))
966 {
967 Assert(!(pCur->Core.Key & PAGE_OFFSET_MASK));
968 Assert((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
969
970 AssertReturnStmt( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
971 || pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL,
972 pgmUnlock(pVM), VERR_ACCESS_DENIED);
973
974 /*
975 * Change the page status.
976 */
977 PPGMPAGE pPage;
978 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
979 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
980 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
981 {
982 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
983 pCur->cTmpOffPages++;
984 }
985 pgmUnlock(pVM);
986 return VINF_SUCCESS;
987 }
988 pgmUnlock(pVM);
989 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
990 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
991 return VERR_INVALID_PARAMETER;
992 }
993 pgmUnlock(pVM);
994 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
995 return VERR_PGM_HANDLER_NOT_FOUND;
996}
997
998#ifndef IEM_VERIFICATION_MODE_FULL
999
1000/**
1001 * Replaces an MMIO page with an MMIO2 page.
1002 *
1003 * This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
1004 * PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
1005 * backing, the caller must provide a replacement page. For various reasons the
1006 * replacement page must be an MMIO2 page.
1007 *
1008 * The caller must do required page table modifications. You can get away
1009 * without making any modifications since it's an MMIO page, the cost is an extra
1010 * \#PF which will the resync the page.
1011 *
1012 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
1013 *
1014 * The caller may still get handler callback even after this call and must be
1015 * able to deal correctly with such calls. The reason for these callbacks are
1016 * either that we're executing in the recompiler (which doesn't know about this
1017 * arrangement) or that we've been restored from saved state (where we won't
1018 * save the change).
1019 *
1020 * @returns VBox status code.
1021 * @param pVM Pointer to the VM.
1022 * @param GCPhys The start address of the access handler. This
1023 * must be a fully page aligned range or we risk
1024 * messing up other handlers installed for the
1025 * start and end pages.
1026 * @param GCPhysPage The physical address of the page to turn off
1027 * access monitoring for.
1028 * @param GCPhysPageRemap The physical address of the MMIO2 page that
1029 * serves as backing memory.
1030 *
1031 * @remark May cause a page pool flush if used on a page that is already
1032 * aliased.
1033 *
1034 * @note This trick does only work reliably if the two pages are never ever
1035 * mapped in the same page table. If they are the page pool code will
1036 * be confused should either of them be flushed. See the special case
1037 * of zero page aliasing mentioned in #3170.
1038 *
1039 */
1040VMMDECL(int) PGMHandlerPhysicalPageAlias(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTGCPHYS GCPhysPageRemap)
1041{
1042/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
1043
1044 pgmLock(pVM);
1045 /*
1046 * Lookup and validate the range.
1047 */
1048 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1049 if (RT_LIKELY(pCur))
1050 {
1051 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1052 && GCPhysPage <= pCur->Core.KeyLast))
1053 {
1054 AssertReturnStmt(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
1055 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1056 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1057
1058 /*
1059 * Get and validate the two pages.
1060 */
1061 PPGMPAGE pPageRemap;
1062 int rc = pgmPhysGetPageEx(pVM, GCPhysPageRemap, &pPageRemap);
1063 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1064 AssertMsgReturnStmt(PGM_PAGE_GET_TYPE(pPageRemap) == PGMPAGETYPE_MMIO2,
1065 ("GCPhysPageRemap=%RGp %R[pgmpage]\n", GCPhysPageRemap, pPageRemap),
1066 pgmUnlock(pVM), VERR_PGM_PHYS_NOT_MMIO2);
1067
1068 PPGMPAGE pPage;
1069 rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
1070 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1071 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1072 {
1073 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1074 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1075 VERR_PGM_PHYS_NOT_MMIO2);
1076 if (PGM_PAGE_GET_HCPHYS(pPage) == PGM_PAGE_GET_HCPHYS(pPageRemap))
1077 {
1078 pgmUnlock(pVM);
1079 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1080 }
1081
1082 /*
1083 * The page is already mapped as some other page, reset it
1084 * to an MMIO/ZERO page before doing the new mapping.
1085 */
1086 Log(("PGMHandlerPhysicalPageAlias: GCPhysPage=%RGp (%R[pgmpage]; %RHp -> %RHp\n",
1087 GCPhysPage, pPage, PGM_PAGE_GET_HCPHYS(pPage), PGM_PAGE_GET_HCPHYS(pPageRemap)));
1088 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage, false /*fDoAccounting*/);
1089 pCur->cAliasedPages--;
1090 }
1091 Assert(PGM_PAGE_IS_ZERO(pPage));
1092
1093 /*
1094 * Do the actual remapping here.
1095 * This page now serves as an alias for the backing memory specified.
1096 */
1097 LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RGp (%R[pgmpage])\n",
1098 GCPhysPage, pPage, GCPhysPageRemap, pPageRemap ));
1099 PGM_PAGE_SET_HCPHYS(pVM, pPage, PGM_PAGE_GET_HCPHYS(pPageRemap));
1100 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1101 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
1102 PGM_PAGE_SET_PAGEID(pVM, pPage, PGM_PAGE_GET_PAGEID(pPageRemap));
1103 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1104 pCur->cAliasedPages++;
1105 Assert(pCur->cAliasedPages <= pCur->cPages);
1106
1107 /* Flush its TLB entry. */
1108 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1109
1110 LogFlow(("PGMHandlerPhysicalPageAlias: => %R[pgmpage]\n", pPage));
1111 pgmUnlock(pVM);
1112 return VINF_SUCCESS;
1113 }
1114
1115 pgmUnlock(pVM);
1116 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1117 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1118 return VERR_INVALID_PARAMETER;
1119 }
1120
1121 pgmUnlock(pVM);
1122 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1123 return VERR_PGM_HANDLER_NOT_FOUND;
1124}
1125
1126
1127/**
1128 * Replaces an MMIO page with an arbitrary HC page in the shadow page tables.
1129 *
1130 * This differs from PGMHandlerPhysicalPageAlias in that the page doesn't need
1131 * to be a known MMIO2 page and that only shadow paging may access the page.
1132 * The latter distinction is important because the only use for this feature is
1133 * for mapping the special APIC access page that VT-x uses to detect APIC MMIO
1134 * operations, the page is shared between all guest CPUs and actually not
1135 * written to. At least at the moment.
1136 *
1137 * The caller must do required page table modifications. You can get away
1138 * without making any modifications since it's an MMIO page, the cost is an extra
1139 * \#PF which will the resync the page.
1140 *
1141 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
1142 *
1143 *
1144 * @returns VBox status code.
1145 * @param pVM Pointer to the VM.
1146 * @param GCPhys The start address of the access handler. This
1147 * must be a fully page aligned range or we risk
1148 * messing up other handlers installed for the
1149 * start and end pages.
1150 * @param GCPhysPage The physical address of the page to turn off
1151 * access monitoring for.
1152 * @param HCPhysPageRemap The physical address of the HC page that
1153 * serves as backing memory.
1154 *
1155 * @remark May cause a page pool flush if used on a page that is already
1156 * aliased.
1157 */
1158VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap)
1159{
1160/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
1161
1162 /*
1163 * Lookup and validate the range.
1164 */
1165 pgmLock(pVM);
1166 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1167 if (RT_LIKELY(pCur))
1168 {
1169 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1170 && GCPhysPage <= pCur->Core.KeyLast))
1171 {
1172 AssertReturnStmt(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
1173 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1174 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1175
1176 /*
1177 * Get and validate the pages.
1178 */
1179 PPGMPAGE pPage;
1180 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
1181 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1182 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1183 {
1184 pgmUnlock(pVM);
1185 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO,
1186 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1187 VERR_PGM_PHYS_NOT_MMIO2);
1188 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1189 }
1190 Assert(PGM_PAGE_IS_ZERO(pPage));
1191
1192 /*
1193 * Do the actual remapping here.
1194 * This page now serves as an alias for the backing memory
1195 * specified as far as shadow paging is concerned.
1196 */
1197 LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RHp\n",
1198 GCPhysPage, pPage, HCPhysPageRemap));
1199 PGM_PAGE_SET_HCPHYS(pVM, pPage, HCPhysPageRemap);
1200 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_SPECIAL_ALIAS_MMIO);
1201 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
1202 PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
1203 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1204 pCur->cAliasedPages++;
1205 Assert(pCur->cAliasedPages <= pCur->cPages);
1206
1207 /* Flush its TLB entry. */
1208 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1209
1210 LogFlow(("PGMHandlerPhysicalPageAliasHC: => %R[pgmpage]\n", pPage));
1211 pgmUnlock(pVM);
1212 return VINF_SUCCESS;
1213 }
1214 pgmUnlock(pVM);
1215 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1216 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1217 return VERR_INVALID_PARAMETER;
1218 }
1219 pgmUnlock(pVM);
1220
1221 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1222 return VERR_PGM_HANDLER_NOT_FOUND;
1223}
1224
1225#endif /* !IEM_VERIFICATION_MODE_FULL */
1226
1227/**
1228 * Checks if a physical range is handled
1229 *
1230 * @returns boolean
1231 * @param pVM Pointer to the VM.
1232 * @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister().
1233 * @remarks Caller must take the PGM lock...
1234 * @thread EMT.
1235 */
1236VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys)
1237{
1238 /*
1239 * Find the handler.
1240 */
1241 pgmLock(pVM);
1242 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1243 if (pCur)
1244 {
1245 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1246 Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
1247 || pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL
1248 || pCur->enmType == PGMPHYSHANDLERTYPE_MMIO);
1249 pgmUnlock(pVM);
1250 return true;
1251 }
1252 pgmUnlock(pVM);
1253 return false;
1254}
1255
1256
1257/**
1258 * Checks if it's an disabled all access handler or write access handler at the
1259 * given address.
1260 *
1261 * @returns true if it's an all access handler, false if it's a write access
1262 * handler.
1263 * @param pVM Pointer to the VM.
1264 * @param GCPhys The address of the page with a disabled handler.
1265 *
1266 * @remarks The caller, PGMR3PhysTlbGCPhys2Ptr, must hold the PGM lock.
1267 */
1268bool pgmHandlerPhysicalIsAll(PVM pVM, RTGCPHYS GCPhys)
1269{
1270 pgmLock(pVM);
1271 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1272 if (!pCur)
1273 {
1274 pgmUnlock(pVM);
1275 AssertFailed();
1276 return true;
1277 }
1278 Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
1279 || pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL
1280 || pCur->enmType == PGMPHYSHANDLERTYPE_MMIO); /* sanity */
1281 /* Only whole pages can be disabled. */
1282 Assert( pCur->Core.Key <= (GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK)
1283 && pCur->Core.KeyLast >= (GCPhys | PAGE_OFFSET_MASK));
1284
1285 bool bRet = pCur->enmType != PGMPHYSHANDLERTYPE_PHYSICAL_WRITE;
1286 pgmUnlock(pVM);
1287 return bRet;
1288}
1289
1290
1291/**
1292 * Check if particular guest's VA is being monitored.
1293 *
1294 * @returns true or false
1295 * @param pVM Pointer to the VM.
1296 * @param GCPtr Virtual address.
1297 * @remarks Will acquire the PGM lock.
1298 * @thread Any.
1299 */
1300VMMDECL(bool) PGMHandlerVirtualIsRegistered(PVM pVM, RTGCPTR GCPtr)
1301{
1302 pgmLock(pVM);
1303 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)RTAvlroGCPtrGet(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, GCPtr);
1304 pgmUnlock(pVM);
1305
1306 return pCur != NULL;
1307}
1308
1309
1310/**
1311 * Search for virtual handler with matching physical address
1312 *
1313 * @returns VBox status code
1314 * @param pVM Pointer to the VM.
1315 * @param GCPhys GC physical address to search for.
1316 * @param ppVirt Where to store the pointer to the virtual handler structure.
1317 * @param piPage Where to store the pointer to the index of the cached physical page.
1318 */
1319int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER *ppVirt, unsigned *piPage)
1320{
1321 STAM_PROFILE_START(&pVM->pgm.s.CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1322 Assert(ppVirt);
1323
1324 pgmLock(pVM);
1325 PPGMPHYS2VIRTHANDLER pCur;
1326 pCur = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, GCPhys);
1327 if (pCur)
1328 {
1329 /* found a match! */
1330 *ppVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1331 *piPage = pCur - &(*ppVirt)->aPhysToVirt[0];
1332 pgmUnlock(pVM);
1333
1334#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1335 AssertRelease(pCur->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD);
1336#endif
1337 LogFlow(("PHYS2VIRT: found match for %RGp -> %RGv *piPage=%#x\n", GCPhys, (*ppVirt)->Core.Key, *piPage));
1338 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1339 return VINF_SUCCESS;
1340 }
1341
1342 pgmUnlock(pVM);
1343 *ppVirt = NULL;
1344 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1345 return VERR_PGM_HANDLER_NOT_FOUND;
1346}
1347
1348
1349/**
1350 * Deal with aliases in phys2virt.
1351 *
1352 * As pointed out by the various todos, this currently only deals with
1353 * aliases where the two ranges match 100%.
1354 *
1355 * @param pVM Pointer to the VM.
1356 * @param pPhys2Virt The node we failed insert.
1357 */
1358static void pgmHandlerVirtualInsertAliased(PVM pVM, PPGMPHYS2VIRTHANDLER pPhys2Virt)
1359{
1360 /*
1361 * First find the node which is conflicting with us.
1362 */
1363 /** @todo Deal with partial overlapping. (Unlikely situation, so I'm too lazy to do anything about it now.) */
1364 /** @todo check if the current head node covers the ground we do. This is highly unlikely
1365 * and I'm too lazy to implement this now as it will require sorting the list and stuff like that. */
1366 PPGMPHYS2VIRTHANDLER pHead = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
1367#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1368 AssertReleaseMsg(pHead != pPhys2Virt, ("%RGp-%RGp offVirtHandler=%#RX32\n",
1369 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler));
1370#endif
1371 if (RT_UNLIKELY(!pHead || pHead->Core.KeyLast != pPhys2Virt->Core.KeyLast))
1372 {
1373 /** @todo do something clever here... */
1374 LogRel(("pgmHandlerVirtualInsertAliased: %RGp-%RGp\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
1375 pPhys2Virt->offNextAlias = 0;
1376 return;
1377 }
1378
1379 /*
1380 * Insert ourselves as the next node.
1381 */
1382 if (!(pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
1383 pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IN_TREE;
1384 else
1385 {
1386 PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pHead + (pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
1387 pPhys2Virt->offNextAlias = ((intptr_t)pNext - (intptr_t)pPhys2Virt)
1388 | PGMPHYS2VIRTHANDLER_IN_TREE;
1389 }
1390 pHead->offNextAlias = ((intptr_t)pPhys2Virt - (intptr_t)pHead)
1391 | (pHead->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
1392 Log(("pgmHandlerVirtualInsertAliased: %RGp-%RGp offNextAlias=%#RX32\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1393}
1394
1395
1396/**
1397 * Resets one virtual handler range.
1398 *
1399 * This is called by HandlerVirtualUpdate when it has detected some kind of
1400 * problem and have started clearing the virtual handler page states (or
1401 * when there have been registration/deregistrations). For this reason this
1402 * function will only update the page status if it's lower than desired.
1403 *
1404 * @returns 0
1405 * @param pNode Pointer to a PGMVIRTHANDLER.
1406 * @param pvUser Pointer to the VM.
1407 */
1408DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1409{
1410 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1411 PVM pVM = (PVM)pvUser;
1412
1413 PGM_LOCK_ASSERT_OWNER(pVM);
1414
1415 /*
1416 * Iterate the pages and apply the new state.
1417 */
1418 unsigned uState = pgmHandlerVirtualCalcState(pCur);
1419 PPGMRAMRANGE pRamHint = NULL;
1420 RTGCUINTPTR offPage = ((RTGCUINTPTR)pCur->Core.Key & PAGE_OFFSET_MASK);
1421 RTGCUINTPTR cbLeft = pCur->cb;
1422 for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1423 {
1424 PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
1425 if (pPhys2Virt->Core.Key != NIL_RTGCPHYS)
1426 {
1427 /*
1428 * Update the page state wrt virtual handlers.
1429 */
1430 PPGMPAGE pPage;
1431 int rc = pgmPhysGetPageWithHintEx(pVM, pPhys2Virt->Core.Key, &pPage, &pRamHint);
1432 if ( RT_SUCCESS(rc)
1433 && PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1434 PGM_PAGE_SET_HNDL_VIRT_STATE(pPage, uState);
1435 else
1436 AssertRC(rc);
1437
1438 /*
1439 * Need to insert the page in the Phys2Virt lookup tree?
1440 */
1441 if (pPhys2Virt->Core.KeyLast == NIL_RTGCPHYS)
1442 {
1443#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1444 AssertRelease(!pPhys2Virt->offNextAlias);
1445#endif
1446 unsigned cbPhys = cbLeft;
1447 if (cbPhys > PAGE_SIZE - offPage)
1448 cbPhys = PAGE_SIZE - offPage;
1449 else
1450 Assert(iPage == pCur->cPages - 1);
1451 pPhys2Virt->Core.KeyLast = pPhys2Virt->Core.Key + cbPhys - 1; /* inclusive */
1452 pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IS_HEAD | PGMPHYS2VIRTHANDLER_IN_TREE;
1453 if (!RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, &pPhys2Virt->Core))
1454 pgmHandlerVirtualInsertAliased(pVM, pPhys2Virt);
1455#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1456 else
1457 AssertReleaseMsg(RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key) == &pPhys2Virt->Core,
1458 ("%RGp-%RGp offNextAlias=%#RX32\n",
1459 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1460#endif
1461 Log2(("PHYS2VIRT: Insert physical range %RGp-%RGp offNextAlias=%#RX32 %s\n",
1462 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, R3STRING(pCur->pszDesc)));
1463 }
1464 }
1465 cbLeft -= PAGE_SIZE - offPage;
1466 offPage = 0;
1467 }
1468
1469 return 0;
1470}
1471
1472#if defined(VBOX_STRICT) || defined(LOG_ENABLED)
1473
1474/**
1475 * Worker for pgmHandlerVirtualDumpPhysPages.
1476 *
1477 * @returns 0 (continue enumeration).
1478 * @param pNode The virtual handler node.
1479 * @param pvUser User argument, unused.
1480 */
1481static DECLCALLBACK(int) pgmHandlerVirtualDumpPhysPagesCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1482{
1483 PPGMPHYS2VIRTHANDLER pCur = (PPGMPHYS2VIRTHANDLER)pNode;
1484 PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1485 NOREF(pvUser); NOREF(pVirt);
1486
1487 Log(("PHYS2VIRT: Range %RGp-%RGp for virtual handler: %s\n", pCur->Core.Key, pCur->Core.KeyLast, pVirt->pszDesc));
1488 return 0;
1489}
1490
1491
1492/**
1493 * Assertion / logging helper for dumping all the
1494 * virtual handlers to the log.
1495 *
1496 * @param pVM Pointer to the VM.
1497 */
1498void pgmHandlerVirtualDumpPhysPages(PVM pVM)
1499{
1500 RTAvlroGCPhysDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, true /* from left */,
1501 pgmHandlerVirtualDumpPhysPagesCallback, 0);
1502}
1503
1504#endif /* VBOX_STRICT || LOG_ENABLED */
1505#ifdef VBOX_STRICT
1506
1507/**
1508 * State structure used by the PGMAssertHandlerAndFlagsInSync() function
1509 * and its AVL enumerators.
1510 */
1511typedef struct PGMAHAFIS
1512{
1513 /** The current physical address. */
1514 RTGCPHYS GCPhys;
1515 /** The state we've calculated. */
1516 unsigned uVirtStateFound;
1517 /** The state we're matching up to. */
1518 unsigned uVirtState;
1519 /** Number of errors. */
1520 unsigned cErrors;
1521 /** Pointer to the VM. */
1522 PVM pVM;
1523} PGMAHAFIS, *PPGMAHAFIS;
1524
1525
1526#if 0 /* unused */
1527/**
1528 * Verify virtual handler by matching physical address.
1529 *
1530 * @returns 0
1531 * @param pNode Pointer to a PGMVIRTHANDLER.
1532 * @param pvUser Pointer to user parameter.
1533 */
1534static DECLCALLBACK(int) pgmHandlerVirtualVerifyOneByPhysAddr(PAVLROGCPTRNODECORE pNode, void *pvUser)
1535{
1536 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1537 PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1538
1539 for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1540 {
1541 if ((pCur->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) == pState->GCPhys)
1542 {
1543 unsigned uState = pgmHandlerVirtualCalcState(pCur);
1544 if (pState->uVirtState < uState)
1545 {
1546 error
1547 }
1548
1549 if (pState->uVirtState == uState)
1550 break; //??
1551 }
1552 }
1553 return 0;
1554}
1555#endif /* unused */
1556
1557
1558/**
1559 * Verify a virtual handler (enumeration callback).
1560 *
1561 * Called by PGMAssertHandlerAndFlagsInSync to check the sanity of all
1562 * the virtual handlers, esp. that the physical addresses matches up.
1563 *
1564 * @returns 0
1565 * @param pNode Pointer to a PGMVIRTHANDLER.
1566 * @param pvUser Pointer to a PPGMAHAFIS structure.
1567 */
1568static DECLCALLBACK(int) pgmHandlerVirtualVerifyOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1569{
1570 PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)pNode;
1571 PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1572 PVM pVM = pState->pVM;
1573
1574 /*
1575 * Validate the type and calc state.
1576 */
1577 switch (pVirt->enmType)
1578 {
1579 case PGMVIRTHANDLERTYPE_WRITE:
1580 case PGMVIRTHANDLERTYPE_ALL:
1581 break;
1582 default:
1583 AssertMsgFailed(("unknown/wrong enmType=%d\n", pVirt->enmType));
1584 pState->cErrors++;
1585 return 0;
1586 }
1587 const unsigned uState = pgmHandlerVirtualCalcState(pVirt);
1588
1589 /*
1590 * Check key alignment.
1591 */
1592 if ( (pVirt->aPhysToVirt[0].Core.Key & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.Key & PAGE_OFFSET_MASK)
1593 && pVirt->aPhysToVirt[0].Core.Key != NIL_RTGCPHYS)
1594 {
1595 AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1596 pVirt->aPhysToVirt[0].Core.Key, pVirt->Core.Key, R3STRING(pVirt->pszDesc)));
1597 pState->cErrors++;
1598 }
1599
1600 if ( (pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.KeyLast & PAGE_OFFSET_MASK)
1601 && pVirt->aPhysToVirt[pVirt->cPages - 1].Core.Key != NIL_RTGCPHYS)
1602 {
1603 AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1604 pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast, pVirt->Core.KeyLast, R3STRING(pVirt->pszDesc)));
1605 pState->cErrors++;
1606 }
1607
1608 /*
1609 * Check pages for sanity and state.
1610 */
1611 RTGCUINTPTR GCPtr = (RTGCUINTPTR)pVirt->Core.Key;
1612 for (unsigned iPage = 0; iPage < pVirt->cPages; iPage++, GCPtr += PAGE_SIZE)
1613 {
1614 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1615 {
1616 PVMCPU pVCpu = &pVM->aCpus[i];
1617
1618 RTGCPHYS GCPhysGst;
1619 uint64_t fGst;
1620 int rc = PGMGstGetPage(pVCpu, (RTGCPTR)GCPtr, &fGst, &GCPhysGst);
1621 if ( rc == VERR_PAGE_NOT_PRESENT
1622 || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1623 {
1624 if (pVirt->aPhysToVirt[iPage].Core.Key != NIL_RTGCPHYS)
1625 {
1626 AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysNew=~0 iPage=%#x %RGv %s\n",
1627 pVirt->aPhysToVirt[iPage].Core.Key, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1628 pState->cErrors++;
1629 }
1630 continue;
1631 }
1632
1633 AssertRCReturn(rc, 0);
1634 if ((pVirt->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) != GCPhysGst)
1635 {
1636 AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1637 pVirt->aPhysToVirt[iPage].Core.Key, GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1638 pState->cErrors++;
1639 continue;
1640 }
1641
1642 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysGst);
1643 if (!pPage)
1644 {
1645 AssertMsgFailed(("virt handler getting ram flags. GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1646 GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1647 pState->cErrors++;
1648 continue;
1649 }
1650
1651 if (PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1652 {
1653 AssertMsgFailed(("virt handler state mismatch. pPage=%R[pgmpage] GCPhysGst=%RGp iPage=%#x %RGv state=%d expected>=%d %s\n",
1654 pPage, GCPhysGst, iPage, GCPtr, PGM_PAGE_GET_HNDL_VIRT_STATE(pPage), uState, R3STRING(pVirt->pszDesc)));
1655 pState->cErrors++;
1656 continue;
1657 }
1658 } /* for each VCPU */
1659 } /* for pages in virtual mapping. */
1660
1661 return 0;
1662}
1663
1664
1665/**
1666 * Asserts that the handlers+guest-page-tables == ramrange-flags and
1667 * that the physical addresses associated with virtual handlers are correct.
1668 *
1669 * @returns Number of mismatches.
1670 * @param pVM Pointer to the VM.
1671 */
1672VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM)
1673{
1674 PPGM pPGM = &pVM->pgm.s;
1675 PGMAHAFIS State;
1676 State.GCPhys = 0;
1677 State.uVirtState = 0;
1678 State.uVirtStateFound = 0;
1679 State.cErrors = 0;
1680 State.pVM = pVM;
1681
1682 PGM_LOCK_ASSERT_OWNER(pVM);
1683
1684 /*
1685 * Check the RAM flags against the handlers.
1686 */
1687 for (PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRangesX); pRam; pRam = pRam->CTX_SUFF(pNext))
1688 {
1689 const uint32_t cPages = pRam->cb >> PAGE_SHIFT;
1690 for (uint32_t iPage = 0; iPage < cPages; iPage++)
1691 {
1692 PGMPAGE const *pPage = &pRam->aPages[iPage];
1693 if (PGM_PAGE_HAS_ANY_HANDLERS(pPage))
1694 {
1695 State.GCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT);
1696
1697 /*
1698 * Physical first - calculate the state based on the handlers
1699 * active on the page, then compare.
1700 */
1701 if (PGM_PAGE_HAS_ANY_PHYSICAL_HANDLERS(pPage))
1702 {
1703 /* the first */
1704 PPGMPHYSHANDLER pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys);
1705 if (!pPhys)
1706 {
1707 pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys, true);
1708 if ( pPhys
1709 && pPhys->Core.Key > (State.GCPhys + PAGE_SIZE - 1))
1710 pPhys = NULL;
1711 Assert(!pPhys || pPhys->Core.Key >= State.GCPhys);
1712 }
1713 if (pPhys)
1714 {
1715 unsigned uState = pgmHandlerPhysicalCalcState(pPhys);
1716
1717 /* more? */
1718 while (pPhys->Core.KeyLast < (State.GCPhys | PAGE_OFFSET_MASK))
1719 {
1720 PPGMPHYSHANDLER pPhys2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers,
1721 pPhys->Core.KeyLast + 1, true);
1722 if ( !pPhys2
1723 || pPhys2->Core.Key > (State.GCPhys | PAGE_OFFSET_MASK))
1724 break;
1725 unsigned uState2 = pgmHandlerPhysicalCalcState(pPhys2);
1726 uState = RT_MAX(uState, uState2);
1727 pPhys = pPhys2;
1728 }
1729
1730 /* compare.*/
1731 if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != uState
1732 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
1733 {
1734 AssertMsgFailed(("ram range vs phys handler flags mismatch. GCPhys=%RGp state=%d expected=%d %s\n",
1735 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), uState, pPhys->pszDesc));
1736 State.cErrors++;
1737 }
1738
1739#ifdef VBOX_WITH_REM
1740# ifdef IN_RING3
1741 /* validate that REM is handling it. */
1742 if ( !REMR3IsPageAccessHandled(pVM, State.GCPhys)
1743 /* ignore shadowed ROM for the time being. */
1744 && PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_ROM_SHADOW)
1745 {
1746 AssertMsgFailed(("ram range vs phys handler REM mismatch. GCPhys=%RGp state=%d %s\n",
1747 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), pPhys->pszDesc));
1748 State.cErrors++;
1749 }
1750# endif
1751#endif
1752 }
1753 else
1754 {
1755 AssertMsgFailed(("ram range vs phys handler mismatch. no handler for GCPhys=%RGp\n", State.GCPhys));
1756 State.cErrors++;
1757 }
1758 }
1759
1760 /*
1761 * Virtual handlers.
1762 */
1763 if (PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage))
1764 {
1765 State.uVirtState = PGM_PAGE_GET_HNDL_VIRT_STATE(pPage);
1766#if 1
1767 /* locate all the matching physical ranges. */
1768 State.uVirtStateFound = PGM_PAGE_HNDL_VIRT_STATE_NONE;
1769 RTGCPHYS GCPhysKey = State.GCPhys;
1770 for (;;)
1771 {
1772 PPGMPHYS2VIRTHANDLER pPhys2Virt = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers,
1773 GCPhysKey, true /* above-or-equal */);
1774 if ( !pPhys2Virt
1775 || (pPhys2Virt->Core.Key & X86_PTE_PAE_PG_MASK) != State.GCPhys)
1776 break;
1777
1778 /* the head */
1779 GCPhysKey = pPhys2Virt->Core.KeyLast;
1780 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
1781 unsigned uState = pgmHandlerVirtualCalcState(pCur);
1782 State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
1783
1784 /* any aliases */
1785 while (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
1786 {
1787 pPhys2Virt = (PPGMPHYS2VIRTHANDLER)((uintptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
1788 pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
1789 uState = pgmHandlerVirtualCalcState(pCur);
1790 State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
1791 }
1792
1793 /* done? */
1794 if ((GCPhysKey & X86_PTE_PAE_PG_MASK) != State.GCPhys)
1795 break;
1796 }
1797#else
1798 /* very slow */
1799 RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOneByPhysAddr, &State);
1800#endif
1801 if (State.uVirtState != State.uVirtStateFound)
1802 {
1803 AssertMsgFailed(("ram range vs virt handler flags mismatch. GCPhys=%RGp uVirtState=%#x uVirtStateFound=%#x\n",
1804 State.GCPhys, State.uVirtState, State.uVirtStateFound));
1805 State.cErrors++;
1806 }
1807 }
1808 }
1809 } /* foreach page in ram range. */
1810 } /* foreach ram range. */
1811
1812 /*
1813 * Check that the physical addresses of the virtual handlers matches up
1814 * and that they are otherwise sane.
1815 */
1816 RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOne, &State);
1817
1818 /*
1819 * Do the reverse check for physical handlers.
1820 */
1821 /** @todo */
1822
1823 return State.cErrors;
1824}
1825
1826#endif /* VBOX_STRICT */
1827
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