VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp@ 56636

Last change on this file since 56636 was 56384, checked in by vboxsync, 10 years ago

PGM: Disabled the virtual handler code for !VBOX_WITH_RAW_MODE.
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File size: 75.3 KB
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1/* $Id: PGMAllHandler.cpp 56384 2015-06-12 12:34:31Z vboxsync $ */
2/** @file
3 * PGM - Page Manager / Monitor, Access Handlers.
4 */
5
6/*
7 * Copyright (C) 2006-2015 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*******************************************************************************
20* Header Files *
21*******************************************************************************/
22#define LOG_GROUP LOG_GROUP_PGM
23#include <VBox/vmm/dbgf.h>
24#include <VBox/vmm/pgm.h>
25#include <VBox/vmm/iom.h>
26#include <VBox/vmm/mm.h>
27#include <VBox/vmm/em.h>
28#include <VBox/vmm/stam.h>
29#ifdef VBOX_WITH_REM
30# include <VBox/vmm/rem.h>
31#endif
32#include <VBox/vmm/dbgf.h>
33#ifdef VBOX_WITH_REM
34# include <VBox/vmm/rem.h>
35#endif
36#include "PGMInternal.h"
37#include <VBox/vmm/vm.h>
38#include "PGMInline.h"
39
40#include <VBox/log.h>
41#include <iprt/assert.h>
42#include <iprt/asm-amd64-x86.h>
43#include <iprt/string.h>
44#include <VBox/param.h>
45#include <VBox/err.h>
46#include <VBox/vmm/selm.h>
47
48
49/*******************************************************************************
50* Internal Functions *
51*******************************************************************************/
52static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam);
53static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur);
54static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur);
55
56
57/**
58 * Internal worker for releasing a physical handler type registration reference.
59 *
60 * @returns New reference count. UINT32_MAX if invalid input (asserted).
61 * @param pVM Pointer to the cross context VM structure.
62 * @param pType Pointer to the type registration.
63 */
64DECLINLINE(uint32_t) pgmHandlerPhysicalTypeRelease(PVM pVM, PPGMPHYSHANDLERTYPEINT pType)
65{
66 AssertMsgReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX);
67 uint32_t cRefs = ASMAtomicDecU32(&pType->cRefs);
68 if (cRefs == 0)
69 {
70 pgmLock(pVM);
71 pType->u32Magic = PGMPHYSHANDLERTYPEINT_MAGIC_DEAD;
72 RTListOff32NodeRemove(&pType->ListNode);
73 pgmUnlock(pVM);
74 MMHyperFree(pVM, pType);
75 }
76 return cRefs;
77}
78
79
80/**
81 * Internal worker for retaining a physical handler type registration reference.
82 *
83 * @returns New reference count. UINT32_MAX if invalid input (asserted).
84 * @param pVM Pointer to the cross context VM structure.
85 * @param pType Pointer to the type registration.
86 */
87DECLINLINE(uint32_t) pgmHandlerPhysicalTypeRetain(PVM pVM, PPGMPHYSHANDLERTYPEINT pType)
88{
89 AssertMsgReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX);
90 uint32_t cRefs = ASMAtomicIncU32(&pType->cRefs);
91 Assert(cRefs < _1M && cRefs > 0);
92 return cRefs;
93}
94
95
96/**
97 * Releases a reference to a physical handler type registration.
98 *
99 * @returns New reference count. UINT32_MAX if invalid input (asserted).
100 * @param pVM Pointer to the cross context VM structure.
101 * @param hType The type regiration handle.
102 */
103VMMDECL(uint32_t) PGMHandlerPhysicalTypeRelease(PVM pVM, PGMPHYSHANDLERTYPE hType)
104{
105 if (hType != NIL_PGMPHYSHANDLERTYPE)
106 return pgmHandlerPhysicalTypeRelease(pVM, PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType));
107 return 0;
108}
109
110
111/**
112 * Retains a reference to a physical handler type registration.
113 *
114 * @returns New reference count. UINT32_MAX if invalid input (asserted).
115 * @param pVM Pointer to the cross context VM structure.
116 * @param hType The type regiration handle.
117 */
118VMMDECL(uint32_t) PGMHandlerPhysicalTypeRetain(PVM pVM, PGMPHYSHANDLERTYPE hType)
119{
120 return pgmHandlerPhysicalTypeRetain(pVM, PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType));
121}
122
123
124
125/**
126 * Register a access handler for a physical range.
127 *
128 * @returns VBox status code.
129 * @retval VINF_SUCCESS when successfully installed.
130 * @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
131 * the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
132 * flagged together with a pool clearing.
133 * @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
134 * one. A debug assertion is raised.
135 *
136 * @param pVM Pointer to the VM.
137 * @param GCPhys Start physical address.
138 * @param GCPhysLast Last physical address. (inclusive)
139 * @param hType The handler type registration handle.
140 * @param pvUserR3 User argument to the R3 handler.
141 * @param pvUserR0 User argument to the R0 handler.
142 * @param pvUserRC User argument to the RC handler. This can be a value
143 * less that 0x10000 or a (non-null) pointer that is
144 * automatically relocated.
145 * @param pszDesc Description of this handler. If NULL, the type
146 * description will be used instead.
147 */
148VMMDECL(int) PGMHandlerPhysicalRegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, PGMPHYSHANDLERTYPE hType,
149 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, R3PTRTYPE(const char *) pszDesc)
150{
151 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType);
152 Log(("PGMHandlerPhysicalRegister: GCPhys=%RGp GCPhysLast=%RGp pvUserR3=%RHv pvUserR0=%RHv pvUserGC=%RRv hType=%#x (%d, %s) pszDesc=%RHv:%s\n",
153 GCPhys, GCPhysLast, pvUserR3, pvUserR0, pvUserRC, hType, pType->enmKind, R3STRING(pType->pszDesc), pszDesc, R3STRING(pszDesc)));
154
155 /*
156 * Validate input.
157 */
158 AssertReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, VERR_INVALID_HANDLE);
159 AssertMsgReturn(GCPhys < GCPhysLast, ("GCPhys >= GCPhysLast (%#x >= %#x)\n", GCPhys, GCPhysLast), VERR_INVALID_PARAMETER);
160 switch (pType->enmKind)
161 {
162 case PGMPHYSHANDLERKIND_WRITE:
163 break;
164 case PGMPHYSHANDLERKIND_MMIO:
165 case PGMPHYSHANDLERKIND_ALL:
166 /* Simplification for PGMPhysRead, PGMR0Trap0eHandlerNPMisconfig and others: Full pages. */
167 AssertMsgReturn(!(GCPhys & PAGE_OFFSET_MASK), ("%RGp\n", GCPhys), VERR_INVALID_PARAMETER);
168 AssertMsgReturn((GCPhysLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, ("%RGp\n", GCPhysLast), VERR_INVALID_PARAMETER);
169 break;
170 default:
171 AssertMsgFailed(("Invalid input enmKind=%d!\n", pType->enmKind));
172 return VERR_INVALID_PARAMETER;
173 }
174 AssertMsgReturn( (RTRCUINTPTR)pvUserRC < 0x10000
175 || MMHyperR3ToRC(pVM, MMHyperRCToR3(pVM, pvUserRC)) == pvUserRC,
176 ("Not RC pointer! pvUserRC=%RRv\n", pvUserRC),
177 VERR_INVALID_PARAMETER);
178 AssertMsgReturn( (RTR0UINTPTR)pvUserR0 < 0x10000
179 || MMHyperR3ToR0(pVM, MMHyperR0ToR3(pVM, pvUserR0)) == pvUserR0,
180 ("Not R0 pointer! pvUserR0=%RHv\n", pvUserR0),
181 VERR_INVALID_PARAMETER);
182
183 /*
184 * We require the range to be within registered ram.
185 * There is no apparent need to support ranges which cover more than one ram range.
186 */
187 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
188 if ( !pRam
189 || GCPhysLast < pRam->GCPhys
190 || GCPhys > pRam->GCPhysLast)
191 {
192#ifdef IN_RING3
193 DBGFR3Info(pVM->pUVM, "phys", NULL, NULL);
194#endif
195 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
196 return VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
197 }
198
199 /*
200 * Allocate and initialize the new entry.
201 */
202 PPGMPHYSHANDLER pNew;
203 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
204 if (RT_FAILURE(rc))
205 return rc;
206
207 pNew->Core.Key = GCPhys;
208 pNew->Core.KeyLast = GCPhysLast;
209 pNew->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
210 pNew->cAliasedPages = 0;
211 pNew->cTmpOffPages = 0;
212 pNew->pvUserR3 = pvUserR3;
213 pNew->pvUserR0 = pvUserR0;
214 pNew->pvUserRC = pvUserRC;
215 pNew->hType = hType;
216 pNew->pszDesc = pszDesc != NIL_RTR3PTR ? pszDesc : pType->pszDesc;
217 pgmHandlerPhysicalTypeRetain(pVM, pType);
218
219 pgmLock(pVM);
220
221 /*
222 * Try insert into list.
223 */
224 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core))
225 {
226 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pNew, pRam);
227 if (rc == VINF_PGM_SYNC_CR3)
228 rc = VINF_PGM_GCPHYS_ALIASED;
229 pgmUnlock(pVM);
230#ifdef VBOX_WITH_REM
231# ifndef IN_RING3
232 REMNotifyHandlerPhysicalRegister(pVM, pType->enmKind, GCPhys, GCPhysLast - GCPhys + 1, !!pType->pfnHandlerR3);
233# else
234 REMR3NotifyHandlerPhysicalRegister(pVM, pType->enmKind, GCPhys, GCPhysLast - GCPhys + 1, !!pType->pfnHandlerR3);
235# endif
236#endif
237 if (rc != VINF_SUCCESS)
238 Log(("PGMHandlerPhysicalRegisterEx: returns %Rrc (%RGp-%RGp)\n", rc, GCPhys, GCPhysLast));
239 return rc;
240 }
241
242 pgmUnlock(pVM);
243
244#if defined(IN_RING3) && defined(VBOX_STRICT)
245 DBGFR3Info(pVM->pUVM, "handlers", "phys nostats", NULL);
246#endif
247 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp pszDesc=%s/%s\n",
248 GCPhys, GCPhysLast, R3STRING(pszDesc), R3STRING(pType->pszDesc)));
249 pgmHandlerPhysicalTypeRelease(pVM, pType);
250 MMHyperFree(pVM, pNew);
251 return VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
252}
253
254
255/**
256 * Sets ram range flags and attempts updating shadow PTs.
257 *
258 * @returns VBox status code.
259 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
260 * @retval VINF_PGM_SYNC_CR3 when the shadow PTs could be updated because
261 * the guest page aliased or/and mapped by multiple PTs. FFs set.
262 * @param pVM Pointer to the VM.
263 * @param pCur The physical handler.
264 * @param pRam The RAM range.
265 */
266static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam)
267{
268 /*
269 * Iterate the guest ram pages updating the flags and flushing PT entries
270 * mapping the page.
271 */
272 bool fFlushTLBs = false;
273 int rc = VINF_SUCCESS;
274 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
275 const unsigned uState = pCurType->uState;
276 uint32_t cPages = pCur->cPages;
277 uint32_t i = (pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT;
278 for (;;)
279 {
280 PPGMPAGE pPage = &pRam->aPages[i];
281 AssertMsg(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO || PGM_PAGE_IS_MMIO(pPage),
282 ("%RGp %R[pgmpage]\n", pRam->GCPhys + (i << PAGE_SHIFT), pPage));
283
284 /* Only do upgrades. */
285 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
286 {
287 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
288
289 int rc2 = pgmPoolTrackUpdateGCPhys(pVM, pRam->GCPhys + (i << PAGE_SHIFT), pPage,
290 false /* allow updates of PTEs (instead of flushing) */, &fFlushTLBs);
291 if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
292 rc = rc2;
293 }
294
295 /* next */
296 if (--cPages == 0)
297 break;
298 i++;
299 }
300
301 if (fFlushTLBs)
302 {
303 PGM_INVL_ALL_VCPU_TLBS(pVM);
304 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: flushing guest TLBs; rc=%d\n", rc));
305 }
306 else
307 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: doesn't flush guest TLBs. rc=%Rrc; sync flags=%x VMCPU_FF_PGM_SYNC_CR3=%d\n", rc, VMMGetCpu(pVM)->pgm.s.fSyncFlags, VMCPU_FF_IS_SET(VMMGetCpu(pVM), VMCPU_FF_PGM_SYNC_CR3)));
308
309 return rc;
310}
311
312
313/**
314 * Register a physical page access handler.
315 *
316 * @returns VBox status code.
317 * @param pVM Pointer to the VM.
318 * @param GCPhys Start physical address.
319 */
320VMMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys)
321{
322 /*
323 * Find the handler.
324 */
325 pgmLock(pVM);
326 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
327 if (pCur)
328 {
329 LogFlow(("PGMHandlerPhysicalDeregister: Removing Range %RGp-%RGp %s\n", pCur->Core.Key, pCur->Core.KeyLast, R3STRING(pCur->pszDesc)));
330
331 /*
332 * Clear the page bits, notify the REM about this change and clear
333 * the cache.
334 */
335 pgmHandlerPhysicalResetRamFlags(pVM, pCur);
336 pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
337 pVM->pgm.s.pLastPhysHandlerR0 = 0;
338 pVM->pgm.s.pLastPhysHandlerR3 = 0;
339 pVM->pgm.s.pLastPhysHandlerRC = 0;
340 PGMHandlerPhysicalTypeRelease(pVM, pCur->hType);
341 MMHyperFree(pVM, pCur);
342 pgmUnlock(pVM);
343 return VINF_SUCCESS;
344 }
345 pgmUnlock(pVM);
346
347 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
348 return VERR_PGM_HANDLER_NOT_FOUND;
349}
350
351
352/**
353 * Shared code with modify.
354 */
355static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur)
356{
357 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
358 RTGCPHYS GCPhysStart = pCur->Core.Key;
359 RTGCPHYS GCPhysLast = pCur->Core.KeyLast;
360
361 /*
362 * Page align the range.
363 *
364 * Since we've reset (recalculated) the physical handler state of all pages
365 * we can make use of the page states to figure out whether a page should be
366 * included in the REM notification or not.
367 */
368 if ( (pCur->Core.Key & PAGE_OFFSET_MASK)
369 || ((pCur->Core.KeyLast + 1) & PAGE_OFFSET_MASK))
370 {
371 Assert(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO);
372
373 if (GCPhysStart & PAGE_OFFSET_MASK)
374 {
375 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysStart);
376 if ( pPage
377 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
378 {
379 RTGCPHYS GCPhys = (GCPhysStart + (PAGE_SIZE - 1)) & X86_PTE_PAE_PG_MASK;
380 if ( GCPhys > GCPhysLast
381 || GCPhys < GCPhysStart)
382 return;
383 GCPhysStart = GCPhys;
384 }
385 else
386 GCPhysStart &= X86_PTE_PAE_PG_MASK;
387 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
388 }
389
390 if (GCPhysLast & PAGE_OFFSET_MASK)
391 {
392 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysLast);
393 if ( pPage
394 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
395 {
396 RTGCPHYS GCPhys = (GCPhysLast & X86_PTE_PAE_PG_MASK) - 1;
397 if ( GCPhys < GCPhysStart
398 || GCPhys > GCPhysLast)
399 return;
400 GCPhysLast = GCPhys;
401 }
402 else
403 GCPhysLast |= PAGE_OFFSET_MASK;
404 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
405 }
406 }
407
408 /*
409 * Tell REM.
410 */
411 const bool fRestoreAsRAM = pCurType->pfnHandlerR3
412 && pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO; /** @todo this isn't entirely correct. */
413#ifdef VBOX_WITH_REM
414# ifndef IN_RING3
415 REMNotifyHandlerPhysicalDeregister(pVM, pCurType->enmKind, GCPhysStart, GCPhysLast - GCPhysStart + 1,
416 !!pCurType->pfnHandlerR3, fRestoreAsRAM);
417# else
418 REMR3NotifyHandlerPhysicalDeregister(pVM, pCurType->enmKind, GCPhysStart, GCPhysLast - GCPhysStart + 1,
419 !!pCurType->pfnHandlerR3, fRestoreAsRAM);
420# endif
421#endif
422}
423
424
425/**
426 * pgmHandlerPhysicalResetRamFlags helper that checks for other handlers on
427 * edge pages.
428 */
429DECLINLINE(void) pgmHandlerPhysicalRecalcPageState(PVM pVM, RTGCPHYS GCPhys, bool fAbove, PPGMRAMRANGE *ppRamHint)
430{
431 /*
432 * Look for other handlers.
433 */
434 unsigned uState = PGM_PAGE_HNDL_PHYS_STATE_NONE;
435 for (;;)
436 {
437 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys, fAbove);
438 if ( !pCur
439 || ((fAbove ? pCur->Core.Key : pCur->Core.KeyLast) >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
440 break;
441 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
442 uState = RT_MAX(uState, pCurType->uState);
443
444 /* next? */
445 RTGCPHYS GCPhysNext = fAbove
446 ? pCur->Core.KeyLast + 1
447 : pCur->Core.Key - 1;
448 if ((GCPhysNext >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
449 break;
450 GCPhys = GCPhysNext;
451 }
452
453 /*
454 * Update if we found something that is a higher priority
455 * state than the current.
456 */
457 if (uState != PGM_PAGE_HNDL_PHYS_STATE_NONE)
458 {
459 PPGMPAGE pPage;
460 int rc = pgmPhysGetPageWithHintEx(pVM, GCPhys, &pPage, ppRamHint);
461 if ( RT_SUCCESS(rc)
462 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
463 {
464 /* This should normally not be necessary. */
465 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
466 bool fFlushTLBs ;
467 rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhys, pPage, false /*fFlushPTEs*/, &fFlushTLBs);
468 if (RT_SUCCESS(rc) && fFlushTLBs)
469 PGM_INVL_ALL_VCPU_TLBS(pVM);
470 else
471 AssertRC(rc);
472 }
473 else
474 AssertRC(rc);
475 }
476}
477
478
479/**
480 * Resets an aliased page.
481 *
482 * @param pVM The VM.
483 * @param pPage The page.
484 * @param GCPhysPage The page address in case it comes in handy.
485 * @param fDoAccounting Whether to perform accounting. (Only set during
486 * reset where pgmR3PhysRamReset doesn't have the
487 * handler structure handy.)
488 */
489void pgmHandlerPhysicalResetAliasedPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhysPage, bool fDoAccounting)
490{
491 Assert( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
492 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO);
493 Assert(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
494
495 /*
496 * Flush any shadow page table references *first*.
497 */
498 bool fFlushTLBs = false;
499 int rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhysPage, pPage, true /*fFlushPTEs*/, &fFlushTLBs);
500 AssertLogRelRCReturnVoid(rc);
501# ifdef IN_RC
502 if (fFlushTLBs && rc != VINF_PGM_SYNC_CR3)
503 PGM_INVL_VCPU_TLBS(VMMGetCpu0(pVM));
504# else
505 HMFlushTLBOnAllVCpus(pVM);
506# endif
507
508 /*
509 * Make it an MMIO/Zero page.
510 */
511 PGM_PAGE_SET_HCPHYS(pVM, pPage, pVM->pgm.s.HCPhysZeroPg);
512 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO);
513 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ZERO);
514 PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
515 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_ALL);
516
517 /* Flush its TLB entry. */
518 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
519
520 /*
521 * Do accounting for pgmR3PhysRamReset.
522 */
523 if (fDoAccounting)
524 {
525 PPGMPHYSHANDLER pHandler = pgmHandlerPhysicalLookup(pVM, GCPhysPage);
526 if (RT_LIKELY(pHandler))
527 {
528 Assert(pHandler->cAliasedPages > 0);
529 pHandler->cAliasedPages--;
530 }
531 else
532 AssertFailed();
533 }
534}
535
536
537/**
538 * Resets ram range flags.
539 *
540 * @returns VBox status code.
541 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
542 * @param pVM Pointer to the VM.
543 * @param pCur The physical handler.
544 *
545 * @remark We don't start messing with the shadow page tables, as we've
546 * already got code in Trap0e which deals with out of sync handler
547 * flags (originally conceived for global pages).
548 */
549static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur)
550{
551 /*
552 * Iterate the guest ram pages updating the state.
553 */
554 RTUINT cPages = pCur->cPages;
555 RTGCPHYS GCPhys = pCur->Core.Key;
556 PPGMRAMRANGE pRamHint = NULL;
557 for (;;)
558 {
559 PPGMPAGE pPage;
560 int rc = pgmPhysGetPageWithHintEx(pVM, GCPhys, &pPage, &pRamHint);
561 if (RT_SUCCESS(rc))
562 {
563 /* Reset aliased MMIO pages to MMIO, since this aliasing is our business.
564 (We don't flip MMIO to RAM though, that's PGMPhys.cpp's job.) */
565 if ( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
566 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO)
567 {
568 Assert(pCur->cAliasedPages > 0);
569 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhys, false /*fDoAccounting*/);
570 pCur->cAliasedPages--;
571 }
572#ifdef VBOX_STRICT
573 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
574 AssertMsg(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO || PGM_PAGE_IS_MMIO(pPage), ("%RGp %R[pgmpage]\n", GCPhys, pPage));
575#endif
576 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_NONE);
577 }
578 else
579 AssertRC(rc);
580
581 /* next */
582 if (--cPages == 0)
583 break;
584 GCPhys += PAGE_SIZE;
585 }
586
587 pCur->cAliasedPages = 0;
588 pCur->cTmpOffPages = 0;
589
590 /*
591 * Check for partial start and end pages.
592 */
593 if (pCur->Core.Key & PAGE_OFFSET_MASK)
594 pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.Key - 1, false /* fAbove */, &pRamHint);
595 if ((pCur->Core.KeyLast & PAGE_OFFSET_MASK) != PAGE_OFFSET_MASK)
596 pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.KeyLast + 1, true /* fAbove */, &pRamHint);
597}
598
599
600/**
601 * Modify a physical page access handler.
602 *
603 * Modification can only be done to the range it self, not the type or anything else.
604 *
605 * @returns VBox status code.
606 * For all return codes other than VERR_PGM_HANDLER_NOT_FOUND and VINF_SUCCESS the range is deregistered
607 * and a new registration must be performed!
608 * @param pVM Pointer to the VM.
609 * @param GCPhysCurrent Current location.
610 * @param GCPhys New location.
611 * @param GCPhysLast New last location.
612 */
613VMMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
614{
615 /*
616 * Remove it.
617 */
618 int rc;
619 pgmLock(pVM);
620 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhysCurrent);
621 if (pCur)
622 {
623 /*
624 * Clear the ram flags. (We're gonna move or free it!)
625 */
626 pgmHandlerPhysicalResetRamFlags(pVM, pCur);
627 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
628 const bool fRestoreAsRAM = pCurType->pfnHandlerR3
629 && pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO; /** @todo this isn't entirely correct. */
630
631 /*
632 * Validate the new range, modify and reinsert.
633 */
634 if (GCPhysLast >= GCPhys)
635 {
636 /*
637 * We require the range to be within registered ram.
638 * There is no apparent need to support ranges which cover more than one ram range.
639 */
640 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
641 if ( pRam
642 && GCPhys <= pRam->GCPhysLast
643 && GCPhysLast >= pRam->GCPhys)
644 {
645 pCur->Core.Key = GCPhys;
646 pCur->Core.KeyLast = GCPhysLast;
647 pCur->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + 1) >> PAGE_SHIFT;
648
649 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pCur->Core))
650 {
651 RTGCPHYS cb = GCPhysLast - GCPhys + 1;
652 PGMPHYSHANDLERKIND enmKind = pCurType->enmKind;
653 bool fHasHCHandler = !!pCurType->pfnHandlerR3;
654
655 /*
656 * Set ram flags, flush shadow PT entries and finally tell REM about this.
657 */
658 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
659 pgmUnlock(pVM);
660
661#ifdef VBOX_WITH_REM
662# ifndef IN_RING3
663 REMNotifyHandlerPhysicalModify(pVM, enmKind, GCPhysCurrent, GCPhys, cb,
664 fHasHCHandler, fRestoreAsRAM);
665# else
666 REMR3NotifyHandlerPhysicalModify(pVM, enmKind, GCPhysCurrent, GCPhys, cb,
667 fHasHCHandler, fRestoreAsRAM);
668# endif
669#endif
670 PGM_INVL_ALL_VCPU_TLBS(pVM);
671 Log(("PGMHandlerPhysicalModify: GCPhysCurrent=%RGp -> GCPhys=%RGp GCPhysLast=%RGp\n",
672 GCPhysCurrent, GCPhys, GCPhysLast));
673 return VINF_SUCCESS;
674 }
675
676 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp\n", GCPhys, GCPhysLast));
677 rc = VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
678 }
679 else
680 {
681 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
682 rc = VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
683 }
684 }
685 else
686 {
687 AssertMsgFailed(("Invalid range %RGp-%RGp\n", GCPhys, GCPhysLast));
688 rc = VERR_INVALID_PARAMETER;
689 }
690
691 /*
692 * Invalid new location, flush the cache and free it.
693 * We've only gotta notify REM and free the memory.
694 */
695 pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
696 pVM->pgm.s.pLastPhysHandlerR0 = 0;
697 pVM->pgm.s.pLastPhysHandlerR3 = 0;
698 pVM->pgm.s.pLastPhysHandlerRC = 0;
699 PGMHandlerPhysicalTypeRelease(pVM, pCur->hType);
700 MMHyperFree(pVM, pCur);
701 }
702 else
703 {
704 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhysCurrent));
705 rc = VERR_PGM_HANDLER_NOT_FOUND;
706 }
707
708 pgmUnlock(pVM);
709 return rc;
710}
711
712
713/**
714 * Changes the user callback arguments associated with a physical access
715 * handler.
716 *
717 * @returns VBox status code.
718 * @param pVM Pointer to the VM.
719 * @param GCPhys Start physical address of the handler.
720 * @param pvUserR3 User argument to the R3 handler.
721 * @param pvUserR0 User argument to the R0 handler.
722 * @param pvUserRC User argument to the RC handler. Values larger or
723 * equal to 0x10000 will be relocated automatically.
724 */
725VMMDECL(int) PGMHandlerPhysicalChangeUserArgs(PVM pVM, RTGCPHYS GCPhys, RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC)
726{
727 /*
728 * Find the handler.
729 */
730 int rc = VINF_SUCCESS;
731 pgmLock(pVM);
732 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
733 if (pCur)
734 {
735 /*
736 * Change arguments.
737 */
738 pCur->pvUserR3 = pvUserR3;
739 pCur->pvUserR0 = pvUserR0;
740 pCur->pvUserRC = pvUserRC;
741 }
742 else
743 {
744 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
745 rc = VERR_PGM_HANDLER_NOT_FOUND;
746 }
747
748 pgmUnlock(pVM);
749 return rc;
750}
751
752
753/**
754 * Splits a physical access handler in two.
755 *
756 * @returns VBox status code.
757 * @param pVM Pointer to the VM.
758 * @param GCPhys Start physical address of the handler.
759 * @param GCPhysSplit The split address.
760 */
761VMMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit)
762{
763 AssertReturn(GCPhys < GCPhysSplit, VERR_INVALID_PARAMETER);
764
765 /*
766 * Do the allocation without owning the lock.
767 */
768 PPGMPHYSHANDLER pNew;
769 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
770 if (RT_FAILURE(rc))
771 return rc;
772
773 /*
774 * Get the handler.
775 */
776 pgmLock(pVM);
777 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
778 if (RT_LIKELY(pCur))
779 {
780 if (RT_LIKELY(GCPhysSplit <= pCur->Core.KeyLast))
781 {
782 /*
783 * Create new handler node for the 2nd half.
784 */
785 *pNew = *pCur;
786 pNew->Core.Key = GCPhysSplit;
787 pNew->cPages = (pNew->Core.KeyLast - (pNew->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
788
789 pCur->Core.KeyLast = GCPhysSplit - 1;
790 pCur->cPages = (pCur->Core.KeyLast - (pCur->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
791
792 if (RT_LIKELY(RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core)))
793 {
794 LogFlow(("PGMHandlerPhysicalSplit: %RGp-%RGp and %RGp-%RGp\n",
795 pCur->Core.Key, pCur->Core.KeyLast, pNew->Core.Key, pNew->Core.KeyLast));
796 pgmUnlock(pVM);
797 return VINF_SUCCESS;
798 }
799 AssertMsgFailed(("whu?\n"));
800 rc = VERR_PGM_PHYS_HANDLER_IPE;
801 }
802 else
803 {
804 AssertMsgFailed(("outside range: %RGp-%RGp split %RGp\n", pCur->Core.Key, pCur->Core.KeyLast, GCPhysSplit));
805 rc = VERR_INVALID_PARAMETER;
806 }
807 }
808 else
809 {
810 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
811 rc = VERR_PGM_HANDLER_NOT_FOUND;
812 }
813 pgmUnlock(pVM);
814 MMHyperFree(pVM, pNew);
815 return rc;
816}
817
818
819/**
820 * Joins up two adjacent physical access handlers which has the same callbacks.
821 *
822 * @returns VBox status code.
823 * @param pVM Pointer to the VM.
824 * @param GCPhys1 Start physical address of the first handler.
825 * @param GCPhys2 Start physical address of the second handler.
826 */
827VMMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2)
828{
829 /*
830 * Get the handlers.
831 */
832 int rc;
833 pgmLock(pVM);
834 PPGMPHYSHANDLER pCur1 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys1);
835 if (RT_LIKELY(pCur1))
836 {
837 PPGMPHYSHANDLER pCur2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
838 if (RT_LIKELY(pCur2))
839 {
840 /*
841 * Make sure that they are adjacent, and that they've got the same callbacks.
842 */
843 if (RT_LIKELY(pCur1->Core.KeyLast + 1 == pCur2->Core.Key))
844 {
845 if (RT_LIKELY(pCur1->hType == pCur2->hType))
846 {
847 PPGMPHYSHANDLER pCur3 = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
848 if (RT_LIKELY(pCur3 == pCur2))
849 {
850 pCur1->Core.KeyLast = pCur2->Core.KeyLast;
851 pCur1->cPages = (pCur1->Core.KeyLast - (pCur1->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
852 LogFlow(("PGMHandlerPhysicalJoin: %RGp-%RGp %RGp-%RGp\n",
853 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
854 pVM->pgm.s.pLastPhysHandlerR0 = 0;
855 pVM->pgm.s.pLastPhysHandlerR3 = 0;
856 pVM->pgm.s.pLastPhysHandlerRC = 0;
857 PGMHandlerPhysicalTypeRelease(pVM, pCur2->hType);
858 MMHyperFree(pVM, pCur2);
859 pgmUnlock(pVM);
860 return VINF_SUCCESS;
861 }
862
863 Assert(pCur3 == pCur2);
864 rc = VERR_PGM_PHYS_HANDLER_IPE;
865 }
866 else
867 {
868 AssertMsgFailed(("mismatching handlers\n"));
869 rc = VERR_ACCESS_DENIED;
870 }
871 }
872 else
873 {
874 AssertMsgFailed(("not adjacent: %RGp-%RGp %RGp-%RGp\n",
875 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
876 rc = VERR_INVALID_PARAMETER;
877 }
878 }
879 else
880 {
881 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys2));
882 rc = VERR_PGM_HANDLER_NOT_FOUND;
883 }
884 }
885 else
886 {
887 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys1));
888 rc = VERR_PGM_HANDLER_NOT_FOUND;
889 }
890 pgmUnlock(pVM);
891 return rc;
892
893}
894
895
896/**
897 * Resets any modifications to individual pages in a physical page access
898 * handler region.
899 *
900 * This is used in pair with PGMHandlerPhysicalPageTempOff(),
901 * PGMHandlerPhysicalPageAlias() or PGMHandlerPhysicalPageAliasHC().
902 *
903 * @returns VBox status code.
904 * @param pVM Pointer to the VM
905 * @param GCPhys The start address of the handler regions, i.e. what you
906 * passed to PGMR3HandlerPhysicalRegister(),
907 * PGMHandlerPhysicalRegisterEx() or
908 * PGMHandlerPhysicalModify().
909 */
910VMMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys)
911{
912 LogFlow(("PGMHandlerPhysicalReset GCPhys=%RGp\n", GCPhys));
913 pgmLock(pVM);
914
915 /*
916 * Find the handler.
917 */
918 int rc;
919 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
920 if (RT_LIKELY(pCur))
921 {
922 /*
923 * Validate kind.
924 */
925 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
926 switch (pCurType->enmKind)
927 {
928 case PGMPHYSHANDLERKIND_WRITE:
929 case PGMPHYSHANDLERKIND_ALL:
930 case PGMPHYSHANDLERKIND_MMIO: /* NOTE: Only use when clearing MMIO ranges with aliased MMIO2 pages! */
931 {
932 STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,PhysHandlerReset)); /**@Todo move out of switch */
933 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
934 Assert(pRam);
935 Assert(pRam->GCPhys <= pCur->Core.Key);
936 Assert(pRam->GCPhysLast >= pCur->Core.KeyLast);
937
938 if (pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO)
939 {
940 /*
941 * Reset all the PGMPAGETYPE_MMIO2_ALIAS_MMIO pages first and that's it.
942 * This could probably be optimized a bit wrt to flushing, but I'm too lazy
943 * to do that now...
944 */
945 if (pCur->cAliasedPages)
946 {
947 PPGMPAGE pPage = &pRam->aPages[(pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT];
948 uint32_t cLeft = pCur->cPages;
949 while (cLeft-- > 0)
950 {
951 if ( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
952 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO)
953 {
954 Assert(pCur->cAliasedPages > 0);
955 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)cLeft << PAGE_SHIFT),
956 false /*fDoAccounting*/);
957 --pCur->cAliasedPages;
958#ifndef VBOX_STRICT
959 if (pCur->cAliasedPages == 0)
960 break;
961#endif
962 }
963 Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO);
964 pPage++;
965 }
966 Assert(pCur->cAliasedPages == 0);
967 }
968 }
969 else if (pCur->cTmpOffPages > 0)
970 {
971 /*
972 * Set the flags and flush shadow PT entries.
973 */
974 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
975 }
976
977 pCur->cAliasedPages = 0;
978 pCur->cTmpOffPages = 0;
979
980 rc = VINF_SUCCESS;
981 break;
982 }
983
984 /*
985 * Invalid.
986 */
987 default:
988 AssertMsgFailed(("Invalid type %d! Corruption!\n", pCurType->enmKind));
989 rc = VERR_PGM_PHYS_HANDLER_IPE;
990 break;
991 }
992 }
993 else
994 {
995 AssertMsgFailed(("Didn't find MMIO Range starting at %#x\n", GCPhys));
996 rc = VERR_PGM_HANDLER_NOT_FOUND;
997 }
998
999 pgmUnlock(pVM);
1000 return rc;
1001}
1002
1003
1004/**
1005 * Temporarily turns off the access monitoring of a page within a monitored
1006 * physical write/all page access handler region.
1007 *
1008 * Use this when no further \#PFs are required for that page. Be aware that
1009 * a page directory sync might reset the flags, and turn on access monitoring
1010 * for the page.
1011 *
1012 * The caller must do required page table modifications.
1013 *
1014 * @returns VBox status code.
1015 * @param pVM Pointer to the VM
1016 * @param GCPhys The start address of the access handler. This
1017 * must be a fully page aligned range or we risk
1018 * messing up other handlers installed for the
1019 * start and end pages.
1020 * @param GCPhysPage The physical address of the page to turn off
1021 * access monitoring for.
1022 */
1023VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)
1024{
1025 LogFlow(("PGMHandlerPhysicalPageTempOff GCPhysPage=%RGp\n", GCPhysPage));
1026
1027 pgmLock(pVM);
1028 /*
1029 * Validate the range.
1030 */
1031 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1032 if (RT_LIKELY(pCur))
1033 {
1034 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1035 && GCPhysPage <= pCur->Core.KeyLast))
1036 {
1037 Assert(!(pCur->Core.Key & PAGE_OFFSET_MASK));
1038 Assert((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
1039
1040 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1041 AssertReturnStmt( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE
1042 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL,
1043 pgmUnlock(pVM), VERR_ACCESS_DENIED);
1044
1045 /*
1046 * Change the page status.
1047 */
1048 PPGMPAGE pPage;
1049 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
1050 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1051 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
1052 {
1053 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1054 pCur->cTmpOffPages++;
1055 }
1056 pgmUnlock(pVM);
1057 return VINF_SUCCESS;
1058 }
1059 pgmUnlock(pVM);
1060 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1061 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1062 return VERR_INVALID_PARAMETER;
1063 }
1064 pgmUnlock(pVM);
1065 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1066 return VERR_PGM_HANDLER_NOT_FOUND;
1067}
1068
1069#ifndef IEM_VERIFICATION_MODE_FULL
1070
1071/**
1072 * Replaces an MMIO page with an MMIO2 page.
1073 *
1074 * This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
1075 * PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
1076 * backing, the caller must provide a replacement page. For various reasons the
1077 * replacement page must be an MMIO2 page.
1078 *
1079 * The caller must do required page table modifications. You can get away
1080 * without making any modifications since it's an MMIO page, the cost is an extra
1081 * \#PF which will the resync the page.
1082 *
1083 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
1084 *
1085 * The caller may still get handler callback even after this call and must be
1086 * able to deal correctly with such calls. The reason for these callbacks are
1087 * either that we're executing in the recompiler (which doesn't know about this
1088 * arrangement) or that we've been restored from saved state (where we won't
1089 * save the change).
1090 *
1091 * @returns VBox status code.
1092 * @param pVM Pointer to the VM.
1093 * @param GCPhys The start address of the access handler. This
1094 * must be a fully page aligned range or we risk
1095 * messing up other handlers installed for the
1096 * start and end pages.
1097 * @param GCPhysPage The physical address of the page to turn off
1098 * access monitoring for.
1099 * @param GCPhysPageRemap The physical address of the MMIO2 page that
1100 * serves as backing memory.
1101 *
1102 * @remark May cause a page pool flush if used on a page that is already
1103 * aliased.
1104 *
1105 * @note This trick does only work reliably if the two pages are never ever
1106 * mapped in the same page table. If they are the page pool code will
1107 * be confused should either of them be flushed. See the special case
1108 * of zero page aliasing mentioned in #3170.
1109 *
1110 */
1111VMMDECL(int) PGMHandlerPhysicalPageAlias(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTGCPHYS GCPhysPageRemap)
1112{
1113/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
1114 pgmLock(pVM);
1115
1116 /*
1117 * Lookup and validate the range.
1118 */
1119 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1120 if (RT_LIKELY(pCur))
1121 {
1122 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1123 && GCPhysPage <= pCur->Core.KeyLast))
1124 {
1125 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1126 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
1127 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1128 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1129
1130 /*
1131 * Get and validate the two pages.
1132 */
1133 PPGMPAGE pPageRemap;
1134 int rc = pgmPhysGetPageEx(pVM, GCPhysPageRemap, &pPageRemap);
1135 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1136 AssertMsgReturnStmt(PGM_PAGE_GET_TYPE(pPageRemap) == PGMPAGETYPE_MMIO2,
1137 ("GCPhysPageRemap=%RGp %R[pgmpage]\n", GCPhysPageRemap, pPageRemap),
1138 pgmUnlock(pVM), VERR_PGM_PHYS_NOT_MMIO2);
1139
1140 PPGMPAGE pPage;
1141 rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
1142 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1143 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1144 {
1145 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1146 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1147 VERR_PGM_PHYS_NOT_MMIO2);
1148 if (PGM_PAGE_GET_HCPHYS(pPage) == PGM_PAGE_GET_HCPHYS(pPageRemap))
1149 {
1150 pgmUnlock(pVM);
1151 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1152 }
1153
1154 /*
1155 * The page is already mapped as some other page, reset it
1156 * to an MMIO/ZERO page before doing the new mapping.
1157 */
1158 Log(("PGMHandlerPhysicalPageAlias: GCPhysPage=%RGp (%R[pgmpage]; %RHp -> %RHp\n",
1159 GCPhysPage, pPage, PGM_PAGE_GET_HCPHYS(pPage), PGM_PAGE_GET_HCPHYS(pPageRemap)));
1160 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage, false /*fDoAccounting*/);
1161 pCur->cAliasedPages--;
1162 }
1163 Assert(PGM_PAGE_IS_ZERO(pPage));
1164
1165 /*
1166 * Do the actual remapping here.
1167 * This page now serves as an alias for the backing memory specified.
1168 */
1169 LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RGp (%R[pgmpage])\n",
1170 GCPhysPage, pPage, GCPhysPageRemap, pPageRemap ));
1171 PGM_PAGE_SET_HCPHYS(pVM, pPage, PGM_PAGE_GET_HCPHYS(pPageRemap));
1172 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1173 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
1174 PGM_PAGE_SET_PAGEID(pVM, pPage, PGM_PAGE_GET_PAGEID(pPageRemap));
1175 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1176 pCur->cAliasedPages++;
1177 Assert(pCur->cAliasedPages <= pCur->cPages);
1178
1179 /* Flush its TLB entry. */
1180 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1181
1182 LogFlow(("PGMHandlerPhysicalPageAlias: => %R[pgmpage]\n", pPage));
1183 pgmUnlock(pVM);
1184 return VINF_SUCCESS;
1185 }
1186
1187 pgmUnlock(pVM);
1188 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1189 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1190 return VERR_INVALID_PARAMETER;
1191 }
1192
1193 pgmUnlock(pVM);
1194 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1195 return VERR_PGM_HANDLER_NOT_FOUND;
1196}
1197
1198
1199/**
1200 * Replaces an MMIO page with an arbitrary HC page in the shadow page tables.
1201 *
1202 * This differs from PGMHandlerPhysicalPageAlias in that the page doesn't need
1203 * to be a known MMIO2 page and that only shadow paging may access the page.
1204 * The latter distinction is important because the only use for this feature is
1205 * for mapping the special APIC access page that VT-x uses to detect APIC MMIO
1206 * operations, the page is shared between all guest CPUs and actually not
1207 * written to. At least at the moment.
1208 *
1209 * The caller must do required page table modifications. You can get away
1210 * without making any modifications since it's an MMIO page, the cost is an extra
1211 * \#PF which will the resync the page.
1212 *
1213 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
1214 *
1215 *
1216 * @returns VBox status code.
1217 * @param pVM Pointer to the VM.
1218 * @param GCPhys The start address of the access handler. This
1219 * must be a fully page aligned range or we risk
1220 * messing up other handlers installed for the
1221 * start and end pages.
1222 * @param GCPhysPage The physical address of the page to turn off
1223 * access monitoring for.
1224 * @param HCPhysPageRemap The physical address of the HC page that
1225 * serves as backing memory.
1226 *
1227 * @remark May cause a page pool flush if used on a page that is already
1228 * aliased.
1229 */
1230VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap)
1231{
1232/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
1233 pgmLock(pVM);
1234
1235 /*
1236 * Lookup and validate the range.
1237 */
1238 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1239 if (RT_LIKELY(pCur))
1240 {
1241 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1242 && GCPhysPage <= pCur->Core.KeyLast))
1243 {
1244 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1245 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
1246 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1247 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1248
1249 /*
1250 * Get and validate the pages.
1251 */
1252 PPGMPAGE pPage;
1253 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
1254 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1255 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1256 {
1257 pgmUnlock(pVM);
1258 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO,
1259 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1260 VERR_PGM_PHYS_NOT_MMIO2);
1261 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1262 }
1263 Assert(PGM_PAGE_IS_ZERO(pPage));
1264
1265 /*
1266 * Do the actual remapping here.
1267 * This page now serves as an alias for the backing memory
1268 * specified as far as shadow paging is concerned.
1269 */
1270 LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RHp\n",
1271 GCPhysPage, pPage, HCPhysPageRemap));
1272 PGM_PAGE_SET_HCPHYS(pVM, pPage, HCPhysPageRemap);
1273 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_SPECIAL_ALIAS_MMIO);
1274 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
1275 PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
1276 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1277 pCur->cAliasedPages++;
1278 Assert(pCur->cAliasedPages <= pCur->cPages);
1279
1280 /* Flush its TLB entry. */
1281 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1282
1283 LogFlow(("PGMHandlerPhysicalPageAliasHC: => %R[pgmpage]\n", pPage));
1284 pgmUnlock(pVM);
1285 return VINF_SUCCESS;
1286 }
1287 pgmUnlock(pVM);
1288 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1289 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1290 return VERR_INVALID_PARAMETER;
1291 }
1292 pgmUnlock(pVM);
1293
1294 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1295 return VERR_PGM_HANDLER_NOT_FOUND;
1296}
1297
1298#endif /* !IEM_VERIFICATION_MODE_FULL */
1299
1300/**
1301 * Checks if a physical range is handled
1302 *
1303 * @returns boolean
1304 * @param pVM Pointer to the VM.
1305 * @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister().
1306 * @remarks Caller must take the PGM lock...
1307 * @thread EMT.
1308 */
1309VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys)
1310{
1311 /*
1312 * Find the handler.
1313 */
1314 pgmLock(pVM);
1315 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1316 if (pCur)
1317 {
1318#ifdef VBOX_STRICT
1319 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1320 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1321 Assert( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE
1322 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL
1323 || pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO);
1324#endif
1325 pgmUnlock(pVM);
1326 return true;
1327 }
1328 pgmUnlock(pVM);
1329 return false;
1330}
1331
1332
1333/**
1334 * Checks if it's an disabled all access handler or write access handler at the
1335 * given address.
1336 *
1337 * @returns true if it's an all access handler, false if it's a write access
1338 * handler.
1339 * @param pVM Pointer to the VM.
1340 * @param GCPhys The address of the page with a disabled handler.
1341 *
1342 * @remarks The caller, PGMR3PhysTlbGCPhys2Ptr, must hold the PGM lock.
1343 */
1344bool pgmHandlerPhysicalIsAll(PVM pVM, RTGCPHYS GCPhys)
1345{
1346 pgmLock(pVM);
1347 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1348 if (!pCur)
1349 {
1350 pgmUnlock(pVM);
1351 AssertFailed();
1352 return true;
1353 }
1354 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1355 Assert( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE
1356 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL
1357 || pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO); /* sanity */
1358 /* Only whole pages can be disabled. */
1359 Assert( pCur->Core.Key <= (GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK)
1360 && pCur->Core.KeyLast >= (GCPhys | PAGE_OFFSET_MASK));
1361
1362 bool bRet = pCurType->enmKind != PGMPHYSHANDLERKIND_WRITE;
1363 pgmUnlock(pVM);
1364 return bRet;
1365}
1366
1367
1368#ifdef VBOX_WITH_RAW_MODE
1369
1370/**
1371 * Internal worker for releasing a virtual handler type registration reference.
1372 *
1373 * @returns New reference count. UINT32_MAX if invalid input (asserted).
1374 * @param pVM Pointer to the cross context VM structure.
1375 * @param pType Pointer to the type registration.
1376 */
1377DECLINLINE(uint32_t) pgmHandlerVirtualTypeRelease(PVM pVM, PPGMVIRTHANDLERTYPEINT pType)
1378{
1379 AssertMsgReturn(pType->u32Magic == PGMVIRTHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX);
1380 uint32_t cRefs = ASMAtomicDecU32(&pType->cRefs);
1381 if (cRefs == 0)
1382 {
1383 pgmLock(pVM);
1384 pType->u32Magic = PGMVIRTHANDLERTYPEINT_MAGIC_DEAD;
1385 RTListOff32NodeRemove(&pType->ListNode);
1386 pgmUnlock(pVM);
1387 MMHyperFree(pVM, pType);
1388 }
1389 return cRefs;
1390}
1391
1392
1393/**
1394 * Internal worker for retaining a virtual handler type registration reference.
1395 *
1396 * @returns New reference count. UINT32_MAX if invalid input (asserted).
1397 * @param pVM Pointer to the cross context VM structure.
1398 * @param pType Pointer to the type registration.
1399 */
1400DECLINLINE(uint32_t) pgmHandlerVirtualTypeRetain(PVM pVM, PPGMVIRTHANDLERTYPEINT pType)
1401{
1402 AssertMsgReturn(pType->u32Magic == PGMVIRTHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX);
1403 uint32_t cRefs = ASMAtomicIncU32(&pType->cRefs);
1404 Assert(cRefs < _1M && cRefs > 0);
1405 return cRefs;
1406}
1407
1408
1409/**
1410 * Releases a reference to a virtual handler type registration.
1411 *
1412 * @returns New reference count. UINT32_MAX if invalid input (asserted).
1413 * @param pVM Pointer to the cross context VM structure.
1414 * @param hType The type regiration handle.
1415 */
1416VMM_INT_DECL(uint32_t) PGMHandlerVirtualTypeRelease(PVM pVM, PGMVIRTHANDLERTYPE hType)
1417{
1418 if (hType != NIL_PGMVIRTHANDLERTYPE)
1419 return pgmHandlerVirtualTypeRelease(pVM, PGMVIRTHANDLERTYPEINT_FROM_HANDLE(pVM, hType));
1420 return 0;
1421}
1422
1423
1424/**
1425 * Retains a reference to a virtual handler type registration.
1426 *
1427 * @returns New reference count. UINT32_MAX if invalid input (asserted).
1428 * @param pVM Pointer to the cross context VM structure.
1429 * @param hType The type regiration handle.
1430 */
1431VMM_INT_DECL(uint32_t) PGMHandlerVirtualTypeRetain(PVM pVM, PGMVIRTHANDLERTYPE hType)
1432{
1433 return pgmHandlerVirtualTypeRetain(pVM, PGMVIRTHANDLERTYPEINT_FROM_HANDLE(pVM, hType));
1434}
1435
1436
1437/**
1438 * Check if particular guest's VA is being monitored.
1439 *
1440 * @returns true or false
1441 * @param pVM Pointer to the VM.
1442 * @param GCPtr Virtual address.
1443 * @remarks Will acquire the PGM lock.
1444 * @thread Any.
1445 */
1446VMM_INT_DECL(bool) PGMHandlerVirtualIsRegistered(PVM pVM, RTGCPTR GCPtr)
1447{
1448 pgmLock(pVM);
1449 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)RTAvlroGCPtrGet(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, GCPtr);
1450 pgmUnlock(pVM);
1451
1452 return pCur != NULL;
1453}
1454
1455
1456/**
1457 * Search for virtual handler with matching physical address
1458 *
1459 * @returns Pointer to the virtual handler structure if found, otherwise NULL.
1460 * @param pVM Pointer to the VM.
1461 * @param GCPhys GC physical address to search for.
1462 * @param piPage Where to store the pointer to the index of the cached physical page.
1463 */
1464PPGMVIRTHANDLER pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, unsigned *piPage)
1465{
1466 STAM_PROFILE_START(&pVM->pgm.s.CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1467
1468 pgmLock(pVM);
1469 PPGMPHYS2VIRTHANDLER pCur;
1470 pCur = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, GCPhys);
1471 if (pCur)
1472 {
1473 /* found a match! */
1474 PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1475 *piPage = pCur - &pVirt->aPhysToVirt[0];
1476 pgmUnlock(pVM);
1477
1478#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1479 AssertRelease(pCur->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD);
1480#endif
1481 LogFlow(("PHYS2VIRT: found match for %RGp -> %RGv *piPage=%#x\n", GCPhys, pVirt->Core.Key, *piPage));
1482 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1483 return pVirt;
1484 }
1485
1486 pgmUnlock(pVM);
1487 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1488 return NULL;
1489}
1490
1491
1492/**
1493 * Deal with aliases in phys2virt.
1494 *
1495 * As pointed out by the various todos, this currently only deals with
1496 * aliases where the two ranges match 100%.
1497 *
1498 * @param pVM Pointer to the VM.
1499 * @param pPhys2Virt The node we failed insert.
1500 */
1501static void pgmHandlerVirtualInsertAliased(PVM pVM, PPGMPHYS2VIRTHANDLER pPhys2Virt)
1502{
1503 /*
1504 * First find the node which is conflicting with us.
1505 */
1506 /** @todo Deal with partial overlapping. (Unlikely situation, so I'm too lazy to do anything about it now.) */
1507 /** @todo check if the current head node covers the ground we do. This is highly unlikely
1508 * and I'm too lazy to implement this now as it will require sorting the list and stuff like that. */
1509 PPGMPHYS2VIRTHANDLER pHead = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
1510#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1511 AssertReleaseMsg(pHead != pPhys2Virt, ("%RGp-%RGp offVirtHandler=%#RX32\n",
1512 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler));
1513#endif
1514 if (RT_UNLIKELY(!pHead || pHead->Core.KeyLast != pPhys2Virt->Core.KeyLast))
1515 {
1516 /** @todo do something clever here... */
1517 LogRel(("pgmHandlerVirtualInsertAliased: %RGp-%RGp\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
1518 pPhys2Virt->offNextAlias = 0;
1519 return;
1520 }
1521
1522 /*
1523 * Insert ourselves as the next node.
1524 */
1525 if (!(pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
1526 pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IN_TREE;
1527 else
1528 {
1529 PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pHead + (pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
1530 pPhys2Virt->offNextAlias = ((intptr_t)pNext - (intptr_t)pPhys2Virt)
1531 | PGMPHYS2VIRTHANDLER_IN_TREE;
1532 }
1533 pHead->offNextAlias = ((intptr_t)pPhys2Virt - (intptr_t)pHead)
1534 | (pHead->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
1535 Log(("pgmHandlerVirtualInsertAliased: %RGp-%RGp offNextAlias=%#RX32\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1536}
1537
1538
1539/**
1540 * Resets one virtual handler range.
1541 *
1542 * This is called by HandlerVirtualUpdate when it has detected some kind of
1543 * problem and have started clearing the virtual handler page states (or
1544 * when there have been registration/deregistrations). For this reason this
1545 * function will only update the page status if it's lower than desired.
1546 *
1547 * @returns 0
1548 * @param pNode Pointer to a PGMVIRTHANDLER.
1549 * @param pvUser Pointer to the VM.
1550 */
1551DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1552{
1553 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1554 PVM pVM = (PVM)pvUser;
1555
1556 PGM_LOCK_ASSERT_OWNER(pVM);
1557
1558 /*
1559 * Iterate the pages and apply the new state.
1560 */
1561 uint32_t uState = PGMVIRTANDLER_GET_TYPE(pVM, pCur)->uState;
1562 PPGMRAMRANGE pRamHint = NULL;
1563 RTGCUINTPTR offPage = ((RTGCUINTPTR)pCur->Core.Key & PAGE_OFFSET_MASK);
1564 RTGCUINTPTR cbLeft = pCur->cb;
1565 for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1566 {
1567 PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
1568 if (pPhys2Virt->Core.Key != NIL_RTGCPHYS)
1569 {
1570 /*
1571 * Update the page state wrt virtual handlers.
1572 */
1573 PPGMPAGE pPage;
1574 int rc = pgmPhysGetPageWithHintEx(pVM, pPhys2Virt->Core.Key, &pPage, &pRamHint);
1575 if ( RT_SUCCESS(rc)
1576 && PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1577 PGM_PAGE_SET_HNDL_VIRT_STATE(pPage, uState);
1578 else
1579 AssertRC(rc);
1580
1581 /*
1582 * Need to insert the page in the Phys2Virt lookup tree?
1583 */
1584 if (pPhys2Virt->Core.KeyLast == NIL_RTGCPHYS)
1585 {
1586#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1587 AssertRelease(!pPhys2Virt->offNextAlias);
1588#endif
1589 unsigned cbPhys = cbLeft;
1590 if (cbPhys > PAGE_SIZE - offPage)
1591 cbPhys = PAGE_SIZE - offPage;
1592 else
1593 Assert(iPage == pCur->cPages - 1);
1594 pPhys2Virt->Core.KeyLast = pPhys2Virt->Core.Key + cbPhys - 1; /* inclusive */
1595 pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IS_HEAD | PGMPHYS2VIRTHANDLER_IN_TREE;
1596 if (!RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, &pPhys2Virt->Core))
1597 pgmHandlerVirtualInsertAliased(pVM, pPhys2Virt);
1598#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1599 else
1600 AssertReleaseMsg(RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key) == &pPhys2Virt->Core,
1601 ("%RGp-%RGp offNextAlias=%#RX32\n",
1602 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1603#endif
1604 Log2(("PHYS2VIRT: Insert physical range %RGp-%RGp offNextAlias=%#RX32 %s\n",
1605 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, R3STRING(pCur->pszDesc)));
1606 }
1607 }
1608 cbLeft -= PAGE_SIZE - offPage;
1609 offPage = 0;
1610 }
1611
1612 return 0;
1613}
1614
1615# if defined(VBOX_STRICT) || defined(LOG_ENABLED)
1616
1617/**
1618 * Worker for pgmHandlerVirtualDumpPhysPages.
1619 *
1620 * @returns 0 (continue enumeration).
1621 * @param pNode The virtual handler node.
1622 * @param pvUser User argument, unused.
1623 */
1624static DECLCALLBACK(int) pgmHandlerVirtualDumpPhysPagesCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1625{
1626 PPGMPHYS2VIRTHANDLER pCur = (PPGMPHYS2VIRTHANDLER)pNode;
1627 PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1628 NOREF(pvUser); NOREF(pVirt);
1629
1630 Log(("PHYS2VIRT: Range %RGp-%RGp for virtual handler: %s\n", pCur->Core.Key, pCur->Core.KeyLast, pVirt->pszDesc));
1631 return 0;
1632}
1633
1634
1635/**
1636 * Assertion / logging helper for dumping all the
1637 * virtual handlers to the log.
1638 *
1639 * @param pVM Pointer to the VM.
1640 */
1641void pgmHandlerVirtualDumpPhysPages(PVM pVM)
1642{
1643 RTAvlroGCPhysDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, true /* from left */,
1644 pgmHandlerVirtualDumpPhysPagesCallback, 0);
1645}
1646
1647# endif /* VBOX_STRICT || LOG_ENABLED */
1648#endif /* VBOX_WITH_RAW_MODE */
1649#ifdef VBOX_STRICT
1650
1651/**
1652 * State structure used by the PGMAssertHandlerAndFlagsInSync() function
1653 * and its AVL enumerators.
1654 */
1655typedef struct PGMAHAFIS
1656{
1657 /** The current physical address. */
1658 RTGCPHYS GCPhys;
1659 /** The state we've calculated. */
1660 unsigned uVirtStateFound;
1661 /** The state we're matching up to. */
1662 unsigned uVirtState;
1663 /** Number of errors. */
1664 unsigned cErrors;
1665 /** Pointer to the VM. */
1666 PVM pVM;
1667} PGMAHAFIS, *PPGMAHAFIS;
1668
1669# ifdef VBOX_WITH_RAW_MODE
1670
1671# if 0 /* unused */
1672/**
1673 * Verify virtual handler by matching physical address.
1674 *
1675 * @returns 0
1676 * @param pNode Pointer to a PGMVIRTHANDLER.
1677 * @param pvUser Pointer to user parameter.
1678 */
1679static DECLCALLBACK(int) pgmHandlerVirtualVerifyOneByPhysAddr(PAVLROGCPTRNODECORE pNode, void *pvUser)
1680{
1681 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1682 PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1683
1684 for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1685 {
1686 if ((pCur->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) == pState->GCPhys)
1687 {
1688 unsigned uState = pgmHandlerVirtualCalcState(pCur);
1689 if (pState->uVirtState < uState)
1690 {
1691 error
1692 }
1693
1694 if (pState->uVirtState == uState)
1695 break; //??
1696 }
1697 }
1698 return 0;
1699}
1700# endif /* unused */
1701
1702
1703/**
1704 * Verify a virtual handler (enumeration callback).
1705 *
1706 * Called by PGMAssertHandlerAndFlagsInSync to check the sanity of all
1707 * the virtual handlers, esp. that the physical addresses matches up.
1708 *
1709 * @returns 0
1710 * @param pNode Pointer to a PGMVIRTHANDLER.
1711 * @param pvUser Pointer to a PPGMAHAFIS structure.
1712 */
1713static DECLCALLBACK(int) pgmHandlerVirtualVerifyOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1714{
1715 PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1716 PVM pVM = pState->pVM;
1717 PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)pNode;
1718 PPGMVIRTHANDLERTYPEINT pType = PGMVIRTANDLER_GET_TYPE(pVM, pVirt);
1719
1720 /*
1721 * Validate the type and calc state.
1722 */
1723 switch (pType->enmKind)
1724 {
1725 case PGMVIRTHANDLERKIND_WRITE:
1726 case PGMVIRTHANDLERKIND_ALL:
1727 break;
1728 default:
1729 AssertMsgFailed(("unknown/wrong enmKind=%d\n", pType->enmKind));
1730 pState->cErrors++;
1731 return 0;
1732 }
1733 const uint32_t uState = pType->uState;
1734
1735 /*
1736 * Check key alignment.
1737 */
1738 if ( (pVirt->aPhysToVirt[0].Core.Key & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.Key & PAGE_OFFSET_MASK)
1739 && pVirt->aPhysToVirt[0].Core.Key != NIL_RTGCPHYS)
1740 {
1741 AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1742 pVirt->aPhysToVirt[0].Core.Key, pVirt->Core.Key, R3STRING(pVirt->pszDesc)));
1743 pState->cErrors++;
1744 }
1745
1746 if ( (pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.KeyLast & PAGE_OFFSET_MASK)
1747 && pVirt->aPhysToVirt[pVirt->cPages - 1].Core.Key != NIL_RTGCPHYS)
1748 {
1749 AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1750 pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast, pVirt->Core.KeyLast, R3STRING(pVirt->pszDesc)));
1751 pState->cErrors++;
1752 }
1753
1754 /*
1755 * Check pages for sanity and state.
1756 */
1757 RTGCUINTPTR GCPtr = (RTGCUINTPTR)pVirt->Core.Key;
1758 for (unsigned iPage = 0; iPage < pVirt->cPages; iPage++, GCPtr += PAGE_SIZE)
1759 {
1760 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1761 {
1762 PVMCPU pVCpu = &pVM->aCpus[i];
1763
1764 RTGCPHYS GCPhysGst;
1765 uint64_t fGst;
1766 int rc = PGMGstGetPage(pVCpu, (RTGCPTR)GCPtr, &fGst, &GCPhysGst);
1767 if ( rc == VERR_PAGE_NOT_PRESENT
1768 || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1769 {
1770 if (pVirt->aPhysToVirt[iPage].Core.Key != NIL_RTGCPHYS)
1771 {
1772 AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysNew=~0 iPage=%#x %RGv %s\n",
1773 pVirt->aPhysToVirt[iPage].Core.Key, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1774 pState->cErrors++;
1775 }
1776 continue;
1777 }
1778
1779 AssertRCReturn(rc, 0);
1780 if ((pVirt->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) != GCPhysGst)
1781 {
1782 AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1783 pVirt->aPhysToVirt[iPage].Core.Key, GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1784 pState->cErrors++;
1785 continue;
1786 }
1787
1788 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysGst);
1789 if (!pPage)
1790 {
1791 AssertMsgFailed(("virt handler getting ram flags. GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1792 GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1793 pState->cErrors++;
1794 continue;
1795 }
1796
1797 if (PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1798 {
1799 AssertMsgFailed(("virt handler state mismatch. pPage=%R[pgmpage] GCPhysGst=%RGp iPage=%#x %RGv state=%d expected>=%d %s\n",
1800 pPage, GCPhysGst, iPage, GCPtr, PGM_PAGE_GET_HNDL_VIRT_STATE(pPage), uState, R3STRING(pVirt->pszDesc)));
1801 pState->cErrors++;
1802 continue;
1803 }
1804 } /* for each VCPU */
1805 } /* for pages in virtual mapping. */
1806
1807 return 0;
1808}
1809
1810# endif /* VBOX_WITH_RAW_MODE */
1811
1812/**
1813 * Asserts that the handlers+guest-page-tables == ramrange-flags and
1814 * that the physical addresses associated with virtual handlers are correct.
1815 *
1816 * @returns Number of mismatches.
1817 * @param pVM Pointer to the VM.
1818 */
1819VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM)
1820{
1821 PPGM pPGM = &pVM->pgm.s;
1822 PGMAHAFIS State;
1823 State.GCPhys = 0;
1824 State.uVirtState = 0;
1825 State.uVirtStateFound = 0;
1826 State.cErrors = 0;
1827 State.pVM = pVM;
1828
1829 PGM_LOCK_ASSERT_OWNER(pVM);
1830
1831 /*
1832 * Check the RAM flags against the handlers.
1833 */
1834 for (PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRangesX); pRam; pRam = pRam->CTX_SUFF(pNext))
1835 {
1836 const uint32_t cPages = pRam->cb >> PAGE_SHIFT;
1837 for (uint32_t iPage = 0; iPage < cPages; iPage++)
1838 {
1839 PGMPAGE const *pPage = &pRam->aPages[iPage];
1840 if (PGM_PAGE_HAS_ANY_HANDLERS(pPage))
1841 {
1842 State.GCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT);
1843
1844 /*
1845 * Physical first - calculate the state based on the handlers
1846 * active on the page, then compare.
1847 */
1848 if (PGM_PAGE_HAS_ANY_PHYSICAL_HANDLERS(pPage))
1849 {
1850 /* the first */
1851 PPGMPHYSHANDLER pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys);
1852 if (!pPhys)
1853 {
1854 pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys, true);
1855 if ( pPhys
1856 && pPhys->Core.Key > (State.GCPhys + PAGE_SIZE - 1))
1857 pPhys = NULL;
1858 Assert(!pPhys || pPhys->Core.Key >= State.GCPhys);
1859 }
1860 if (pPhys)
1861 {
1862 PPGMPHYSHANDLERTYPEINT pPhysType = (PPGMPHYSHANDLERTYPEINT)MMHyperHeapOffsetToPtr(pVM, pPhys->hType);
1863 unsigned uState = pPhysType->uState;
1864
1865 /* more? */
1866 while (pPhys->Core.KeyLast < (State.GCPhys | PAGE_OFFSET_MASK))
1867 {
1868 PPGMPHYSHANDLER pPhys2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers,
1869 pPhys->Core.KeyLast + 1, true);
1870 if ( !pPhys2
1871 || pPhys2->Core.Key > (State.GCPhys | PAGE_OFFSET_MASK))
1872 break;
1873 PPGMPHYSHANDLERTYPEINT pPhysType2 = (PPGMPHYSHANDLERTYPEINT)MMHyperHeapOffsetToPtr(pVM, pPhys2->hType);
1874 uState = RT_MAX(uState, pPhysType2->uState);
1875 pPhys = pPhys2;
1876 }
1877
1878 /* compare.*/
1879 if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != uState
1880 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
1881 {
1882 AssertMsgFailed(("ram range vs phys handler flags mismatch. GCPhys=%RGp state=%d expected=%d %s\n",
1883 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), uState, pPhysType->pszDesc));
1884 State.cErrors++;
1885 }
1886
1887# ifdef VBOX_WITH_REM
1888# ifdef IN_RING3
1889 /* validate that REM is handling it. */
1890 if ( !REMR3IsPageAccessHandled(pVM, State.GCPhys)
1891 /* ignore shadowed ROM for the time being. */
1892 && PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_ROM_SHADOW)
1893 {
1894 AssertMsgFailed(("ram range vs phys handler REM mismatch. GCPhys=%RGp state=%d %s\n",
1895 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), pPhysType->pszDesc));
1896 State.cErrors++;
1897 }
1898# endif
1899# endif
1900 }
1901 else
1902 {
1903 AssertMsgFailed(("ram range vs phys handler mismatch. no handler for GCPhys=%RGp\n", State.GCPhys));
1904 State.cErrors++;
1905 }
1906 }
1907
1908 /*
1909 * Virtual handlers.
1910 */
1911 if (PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage))
1912 {
1913 State.uVirtState = PGM_PAGE_GET_HNDL_VIRT_STATE(pPage);
1914
1915 /* locate all the matching physical ranges. */
1916 State.uVirtStateFound = PGM_PAGE_HNDL_VIRT_STATE_NONE;
1917# ifdef VBOX_WITH_RAW_MODE
1918 RTGCPHYS GCPhysKey = State.GCPhys;
1919 for (;;)
1920 {
1921 PPGMPHYS2VIRTHANDLER pPhys2Virt = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers,
1922 GCPhysKey, true /* above-or-equal */);
1923 if ( !pPhys2Virt
1924 || (pPhys2Virt->Core.Key & X86_PTE_PAE_PG_MASK) != State.GCPhys)
1925 break;
1926
1927 /* the head */
1928 GCPhysKey = pPhys2Virt->Core.KeyLast;
1929 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
1930 unsigned uState = PGMVIRTANDLER_GET_TYPE(pVM, pCur)->uState;
1931 State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
1932
1933 /* any aliases */
1934 while (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
1935 {
1936 pPhys2Virt = (PPGMPHYS2VIRTHANDLER)((uintptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
1937 pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
1938 uState = PGMVIRTANDLER_GET_TYPE(pVM, pCur)->uState;
1939 State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
1940 }
1941
1942 /* done? */
1943 if ((GCPhysKey & X86_PTE_PAE_PG_MASK) != State.GCPhys)
1944 break;
1945 }
1946# endif /* VBOX_WITH_RAW_MODE */
1947 if (State.uVirtState != State.uVirtStateFound)
1948 {
1949 AssertMsgFailed(("ram range vs virt handler flags mismatch. GCPhys=%RGp uVirtState=%#x uVirtStateFound=%#x\n",
1950 State.GCPhys, State.uVirtState, State.uVirtStateFound));
1951 State.cErrors++;
1952 }
1953 }
1954 }
1955 } /* foreach page in ram range. */
1956 } /* foreach ram range. */
1957
1958# ifdef VBOX_WITH_RAW_MODE
1959 /*
1960 * Check that the physical addresses of the virtual handlers matches up
1961 * and that they are otherwise sane.
1962 */
1963 RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOne, &State);
1964# endif
1965
1966 /*
1967 * Do the reverse check for physical handlers.
1968 */
1969 /** @todo */
1970
1971 return State.cErrors;
1972}
1973
1974#endif /* VBOX_STRICT */
1975
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