PGMAllHandler.cpp@ 25577

Last change on this file since 25577 was 25577, checked in by vboxsync, 15 years ago
pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs already flushes the TLB; the caller doesn't need to do it again
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1	/* $Id: PGMAllHandler.cpp 25577 2009-12-23 16:37:26Z vboxsync $ */
2	/** @file
3	* PGM - Page Manager / Monitor, Access Handlers.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_PGM
27	#include <VBox/dbgf.h>
28	#include <VBox/pgm.h>
29	#include <VBox/iom.h>
30	#include <VBox/mm.h>
31	#include <VBox/em.h>
32	#include <VBox/stam.h>
33	#include <VBox/rem.h>
34	#include <VBox/dbgf.h>
35	#include <VBox/rem.h>
36	#include "PGMInternal.h"
37	#include <VBox/vm.h>
38
39	#include <VBox/log.h>
40	#include <iprt/assert.h>
41	#include <iprt/asm.h>
42	#include <iprt/string.h>
43	#include <VBox/param.h>
44	#include <VBox/err.h>
45	#include <VBox/selm.h>
46
47
48	/*******************************************************************************
49	* Internal Functions *
50	*******************************************************************************/
51	static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam);
52	static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur);
53	static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur);
54
55
56
57	/**
58	* Register a access handler for a physical range.
59	*
60	* @returns VBox status code.
61	* @retval VINF_SUCCESS when successfully installed.
62	* @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
63	* the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
64	* flagged together with a pool clearing.
65	* @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
66	* one. A debug assertion is raised.
67	*
68	* @param pVM VM Handle.
69	* @param enmType Handler type. Any of the PGMPHYSHANDLERTYPE_PHYSICAL* enums.
70	* @param GCPhys Start physical address.
71	* @param GCPhysLast Last physical address. (inclusive)
72	* @param pfnHandlerR3 The R3 handler.
73	* @param pvUserR3 User argument to the R3 handler.
74	* @param pfnHandlerR0 The R0 handler.
75	* @param pvUserR0 User argument to the R0 handler.
76	* @param pfnHandlerRC The RC handler.
77	* @param pvUserRC User argument to the RC handler. This can be a value
78	* less that 0x10000 or a (non-null) pointer that is
79	* automatically relocatated.
80	* @param pszDesc Pointer to description string. This must not be freed.
81	*/
82	VMMDECL(int) PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
83	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
84	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
85	RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
86	R3PTRTYPE(const char *) pszDesc)
87	{
88	Log(("PGMHandlerPhysicalRegisterEx: enmType=%d GCPhys=%RGp GCPhysLast=%RGp pfnHandlerR3=%RHv pvUserR3=%RHv pfnHandlerR0=%RHv pvUserR0=%RHv pfnHandlerGC=%RRv pvUserGC=%RRv pszDesc=%s\n",
89	enmType, GCPhys, GCPhysLast, pfnHandlerR3, pvUserR3, pfnHandlerR0, pvUserR0, pfnHandlerRC, pvUserRC, R3STRING(pszDesc)));
90
91	/*
92	* Validate input.
93	*/
94	AssertMsgReturn(GCPhys < GCPhysLast, ("GCPhys >= GCPhysLast (%#x >= %#x)\n", GCPhys, GCPhysLast), VERR_INVALID_PARAMETER);
95	switch (enmType)
96	{
97	case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
98	break;
99	case PGMPHYSHANDLERTYPE_MMIO:
100	case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
101	/* Simplification in PGMPhysRead among other places. */
102	AssertMsgReturn(!(GCPhys & PAGE_OFFSET_MASK), ("%RGp\n", GCPhys), VERR_INVALID_PARAMETER);
103	AssertMsgReturn((GCPhysLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, ("%RGp\n", GCPhysLast), VERR_INVALID_PARAMETER);
104	break;
105	default:
106	AssertMsgFailed(("Invalid input enmType=%d!\n", enmType));
107	return VERR_INVALID_PARAMETER;
108	}
109	AssertMsgReturn( (RTRCUINTPTR)pvUserRC < 0x10000
110	\|\| MMHyperR3ToRC(pVM, MMHyperRCToR3(pVM, pvUserRC)) == pvUserRC,
111	("Not RC pointer! pvUserRC=%RRv\n", pvUserRC),
112	VERR_INVALID_PARAMETER);
113	AssertMsgReturn( (RTR0UINTPTR)pvUserR0 < 0x10000
114	\|\| MMHyperR3ToR0(pVM, MMHyperR0ToR3(pVM, pvUserR0)) == pvUserR0,
115	("Not R0 pointer! pvUserR0=%RHv\n", pvUserR0),
116	VERR_INVALID_PARAMETER);
117	AssertPtrReturn(pfnHandlerR3, VERR_INVALID_POINTER);
118	AssertReturn(pfnHandlerR0, VERR_INVALID_PARAMETER);
119	AssertReturn(pfnHandlerRC, VERR_INVALID_PARAMETER);
120
121	/*
122	* We require the range to be within registered ram.
123	* There is no apparent need to support ranges which cover more than one ram range.
124	*/
125	PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
126	while (pRam && GCPhys > pRam->GCPhysLast)
127	pRam = pRam->CTX_SUFF(pNext);
128	if ( !pRam
129	\|\| GCPhysLast < pRam->GCPhys
130	\|\| GCPhys > pRam->GCPhysLast)
131	{
132	#ifdef IN_RING3
133	DBGFR3Info(pVM, "phys", NULL, NULL);
134	#endif
135	AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
136	return VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
137	}
138
139	/*
140	* Allocate and initialize the new entry.
141	*/
142	PPGMPHYSHANDLER pNew;
143	int rc = MMHyperAlloc(pVM, sizeof(pNew), 0, MM_TAG_PGM_HANDLERS, (void *)&pNew);
144	if (RT_FAILURE(rc))
145	return rc;
146
147	pNew->Core.Key = GCPhys;
148	pNew->Core.KeyLast = GCPhysLast;
149	pNew->enmType = enmType;
150	pNew->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
151	pNew->pfnHandlerR3 = pfnHandlerR3;
152	pNew->pvUserR3 = pvUserR3;
153	pNew->pfnHandlerR0 = pfnHandlerR0;
154	pNew->pvUserR0 = pvUserR0;
155	pNew->pfnHandlerRC = pfnHandlerRC;
156	pNew->pvUserRC = pvUserRC;
157	pNew->pszDesc = pszDesc;
158
159	pgmLock(pVM);
160
161	/*
162	* Try insert into list.
163	*/
164	if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core))
165	{
166	rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pNew, pRam);
167	if (rc == VINF_PGM_SYNC_CR3)
168	rc = VINF_PGM_GCPHYS_ALIASED;
169	pgmUnlock(pVM);
170	#ifndef IN_RING3
171	REMNotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);
172	#else
173	REMR3NotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);
174	#endif
175	if (rc != VINF_SUCCESS)
176	Log(("PGMHandlerPhysicalRegisterEx: returns %Rrc (%RGp-%RGp)\n", rc, GCPhys, GCPhysLast));
177	return rc;
178	}
179
180	pgmUnlock(pVM);
181
182	#if defined(IN_RING3) && defined(VBOX_STRICT)
183	DBGFR3Info(pVM, "handlers", "phys nostats", NULL);
184	#endif
185	AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp pszDesc=%s\n", GCPhys, GCPhysLast, pszDesc));
186	MMHyperFree(pVM, pNew);
187	return VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
188	}
189
190
191	/**
192	* Sets ram range flags and attempts updating shadow PTs.
193	*
194	* @returns VBox status code.
195	* @retval VINF_SUCCESS when shadow PTs was successfully updated.
196	* @retval VINF_PGM_SYNC_CR3 when the shadow PTs could be updated because
197	* the guest page aliased or/and mapped by multiple PTs. FFs set.
198	* @param pVM The VM handle.
199	* @param pCur The physical handler.
200	* @param pRam The RAM range.
201	*/
202	static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam)
203	{
204	/*
205	* Iterate the guest ram pages updating the flags and flushing PT entries
206	* mapping the page.
207	*/
208	bool fFlushTLBs = false;
209	int rc = VINF_SUCCESS;
210	const unsigned uState = pgmHandlerPhysicalCalcState(pCur);
211	uint32_t cPages = pCur->cPages;
212	uint32_t i = (pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT;
213	for (;;)
214	{
215	PPGMPAGE pPage = &pRam->aPages[i];
216	AssertMsg(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO \|\| PGM_PAGE_IS_MMIO(pPage),
217	("%RGp %R[pgmpage]\n", pRam->GCPhys + (i << PAGE_SHIFT), pPage));
218
219	/* Only do upgrades. */
220	if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
221	{
222	PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
223
224	int rc2 = pgmPoolTrackUpdateGCPhys(pVM, pPage, false /* allow updates of PTEs (instead of flushing) */, &fFlushTLBs);
225	if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
226	rc = rc2;
227	}
228
229	/* next */
230	if (--cPages == 0)
231	break;
232	i++;
233	}
234
235	if (fFlushTLBs && rc == VINF_SUCCESS)
236	{
237	PGM_INVL_ALL_VCPU_TLBS(pVM);
238	Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: flushing guest TLBs\n"));
239	}
240	else
241	{
242	Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: doesn't flush guest TLBs. rc=%Rrc\n", rc));
243	}
244	return rc;
245	}
246
247
248	/**
249	* Register a physical page access handler.
250	*
251	* @returns VBox status code.
252	* @param pVM VM Handle.
253	* @param GCPhys Start physical address.
254	*/
255	VMMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys)
256	{
257	/*
258	* Find the handler.
259	*/
260	pgmLock(pVM);
261	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
262	if (pCur)
263	{
264	LogFlow(("PGMHandlerPhysicalDeregister: Removing Range %RGp-%RGp %s\n",
265	pCur->Core.Key, pCur->Core.KeyLast, R3STRING(pCur->pszDesc)));
266
267	/*
268	* Clear the page bits and notify the REM about this change.
269	*/
270	pgmHandlerPhysicalResetRamFlags(pVM, pCur);
271	pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
272	MMHyperFree(pVM, pCur);
273	pgmUnlock(pVM);
274	/** @todo not really necessary; we'll correct this for dirty tlb entries in the page fault handler. */
275	PGM_INVL_ALL_VCPU_TLBS(pVM);
276	return VINF_SUCCESS;
277	}
278	pgmUnlock(pVM);
279
280	AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
281	return VERR_PGM_HANDLER_NOT_FOUND;
282	}
283
284
285	/**
286	* Shared code with modify.
287	*/
288	static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur)
289	{
290	RTGCPHYS GCPhysStart = pCur->Core.Key;
291	RTGCPHYS GCPhysLast = pCur->Core.KeyLast;
292
293	/*
294	* Page align the range.
295	*
296	* Since we've reset (recalculated) the physical handler state of all pages
297	* we can make use of the page states to figure out whether a page should be
298	* included in the REM notification or not.
299	*/
300	if ( (pCur->Core.Key & PAGE_OFFSET_MASK)
301	\|\| ((pCur->Core.KeyLast + 1) & PAGE_OFFSET_MASK))
302	{
303	Assert(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO);
304
305	if (GCPhysStart & PAGE_OFFSET_MASK)
306	{
307	PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysStart);
308	if ( pPage
309	&& PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
310	{
311	RTGCPHYS GCPhys = (GCPhysStart + (PAGE_SIZE - 1)) & X86_PTE_PAE_PG_MASK;
312	if ( GCPhys > GCPhysLast
313	\|\| GCPhys < GCPhysStart)
314	return;
315	GCPhysStart = GCPhys;
316	}
317	else
318	GCPhysStart &= X86_PTE_PAE_PG_MASK;
319	Assert(!pPage \|\| PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
320	}
321
322	if (GCPhysLast & PAGE_OFFSET_MASK)
323	{
324	PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysLast);
325	if ( pPage
326	&& PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
327	{
328	RTGCPHYS GCPhys = (GCPhysLast & X86_PTE_PAE_PG_MASK) - 1;
329	if ( GCPhys < GCPhysStart
330	\|\| GCPhys > GCPhysLast)
331	return;
332	GCPhysLast = GCPhys;
333	}
334	else
335	GCPhysLast \|= PAGE_OFFSET_MASK;
336	Assert(!pPage \|\| PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
337	}
338	}
339
340	/*
341	* Tell REM.
342	*/
343	const bool fRestoreAsRAM = pCur->pfnHandlerR3
344	&& pCur->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */
345	#ifndef IN_RING3
346	REMNotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
347	#else
348	REMR3NotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
349	#endif
350	}
351
352
353	/**
354	* pgmHandlerPhysicalResetRamFlags helper that checks for
355	* other handlers on edge pages.
356	*/
357	DECLINLINE(void) pgmHandlerPhysicalRecalcPageState(PPGM pPGM, RTGCPHYS GCPhys, bool fAbove, PPGMRAMRANGE *ppRamHint)
358	{
359	/*
360	* Look for other handlers.
361	*/
362	unsigned uState = PGM_PAGE_HNDL_PHYS_STATE_NONE;
363	for (;;)
364	{
365	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, GCPhys, fAbove);
366	if ( !pCur
367	\|\| ((fAbove ? pCur->Core.Key : pCur->Core.KeyLast) >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
368	break;
369	unsigned uThisState = pgmHandlerPhysicalCalcState(pCur);
370	uState = RT_MAX(uState, uThisState);
371
372	/* next? */
373	RTGCPHYS GCPhysNext = fAbove
374	? pCur->Core.KeyLast + 1
375	: pCur->Core.Key - 1;
376	if ((GCPhysNext >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
377	break;
378	GCPhys = GCPhysNext;
379	}
380
381	/*
382	* Update if we found something that is a higher priority
383	* state than the current.
384	*/
385	if (uState != PGM_PAGE_HNDL_PHYS_STATE_NONE)
386	{
387	PPGMPAGE pPage;
388	int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, ppRamHint);
389	if ( RT_SUCCESS(rc)
390	&& PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
391	PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
392	else
393	AssertRC(rc);
394	}
395	}
396
397
398	/**
399	* Resets an aliased page.
400	*
401	* @param pVM The VM.
402	* @param pPage The page.
403	* @param GCPhysPage The page address in case it comes in handy.
404	*/
405	void pgmHandlerPhysicalResetAliasedPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhysPage)
406	{
407	Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO);
408	Assert(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
409
410	/*
411	* Flush any shadow page table references first.
412	*/
413	bool fFlushTLBs = false;
414	int rc = pgmPoolTrackFlushGCPhys(pVM, pPage, &fFlushTLBs);
415	AssertLogRelRCReturnVoid(rc);
416	# ifdef IN_RC
417	if (fFlushTLBs && rc != VINF_PGM_SYNC_CR3)
418	PGM_INVL_VCPU_TLBS(VMMGetCpu0(pVM));
419	# else
420	HWACCMFlushTLBOnAllVCpus(pVM);
421	# endif
422
423	/*
424	* Make it an MMIO/Zero page.
425	*/
426	PGM_PAGE_SET_HCPHYS(pPage, pVM->pgm.s.HCPhysZeroPg);
427	PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO);
428	PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ZERO);
429	PGM_PAGE_SET_PAGEID(pPage, NIL_GMM_PAGEID);
430	PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_ALL);
431
432	/* Flush its TLB entry. */
433	PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
434
435	NOREF(GCPhysPage);
436	}
437
438
439	/**
440	* Resets ram range flags.
441	*
442	* @returns VBox status code.
443	* @retval VINF_SUCCESS when shadow PTs was successfully updated.
444	* @param pVM The VM handle.
445	* @param pCur The physical handler.
446	*
447	* @remark We don't start messing with the shadow page tables, as we've already got code
448	* in Trap0e which deals with out of sync handler flags (originally conceived for
449	* global pages).
450	*/
451	static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur)
452	{
453	/*
454	* Iterate the guest ram pages updating the state.
455	*/
456	RTUINT cPages = pCur->cPages;
457	RTGCPHYS GCPhys = pCur->Core.Key;
458	PPGMRAMRANGE pRamHint = NULL;
459	PPGM pPGM = &pVM->pgm.s;
460	for (;;)
461	{
462	PPGMPAGE pPage;
463	int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, &pRamHint);
464	if (RT_SUCCESS(rc))
465	{
466	/* Reset MMIO2 for MMIO pages to MMIO, since this aliasing is our business.
467	(We don't flip MMIO to RAM though, that's PGMPhys.cpp's job.) */
468	if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO)
469	pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhys);
470	AssertMsg(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO \|\| PGM_PAGE_IS_MMIO(pPage), ("%RGp %R[pgmpage]\n", GCPhys, pPage));
471	PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_NONE);
472	}
473	else
474	AssertRC(rc);
475
476	/* next */
477	if (--cPages == 0)
478	break;
479	GCPhys += PAGE_SIZE;
480	}
481
482	/*
483	* Check for partial start and end pages.
484	*/
485	if (pCur->Core.Key & PAGE_OFFSET_MASK)
486	pgmHandlerPhysicalRecalcPageState(pPGM, pCur->Core.Key - 1, false /* fAbove */, &pRamHint);
487	if ((pCur->Core.KeyLast & PAGE_OFFSET_MASK) != PAGE_SIZE - 1)
488	pgmHandlerPhysicalRecalcPageState(pPGM, pCur->Core.KeyLast + 1, true /* fAbove */, &pRamHint);
489	}
490
491
492	/**
493	* Modify a physical page access handler.
494	*
495	* Modification can only be done to the range it self, not the type or anything else.
496	*
497	* @returns VBox status code.
498	* For all return codes other than VERR_PGM_HANDLER_NOT_FOUND and VINF_SUCCESS the range is deregistered
499	* and a new registration must be performed!
500	* @param pVM VM handle.
501	* @param GCPhysCurrent Current location.
502	* @param GCPhys New location.
503	* @param GCPhysLast New last location.
504	*/
505	VMMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
506	{
507	/*
508	* Remove it.
509	*/
510	int rc;
511	pgmLock(pVM);
512	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhysCurrent);
513	if (pCur)
514	{
515	/*
516	* Clear the ram flags. (We're gonna move or free it!)
517	*/
518	pgmHandlerPhysicalResetRamFlags(pVM, pCur);
519	const bool fRestoreAsRAM = pCur->pfnHandlerR3
520	&& pCur->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */
521
522	/*
523	* Validate the new range, modify and reinsert.
524	*/
525	if (GCPhysLast >= GCPhys)
526	{
527	/*
528	* We require the range to be within registered ram.
529	* There is no apparent need to support ranges which cover more than one ram range.
530	*/
531	PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
532	while (pRam && GCPhys > pRam->GCPhysLast)
533	pRam = pRam->CTX_SUFF(pNext);
534	if ( pRam
535	&& GCPhys <= pRam->GCPhysLast
536	&& GCPhysLast >= pRam->GCPhys)
537	{
538	pCur->Core.Key = GCPhys;
539	pCur->Core.KeyLast = GCPhysLast;
540	pCur->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + 1) >> PAGE_SHIFT;
541
542	if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pCur->Core))
543	{
544	PGMPHYSHANDLERTYPE enmType = pCur->enmType;
545	RTGCPHYS cb = GCPhysLast - GCPhys + 1;
546	bool fHasHCHandler = !!pCur->pfnHandlerR3;
547
548	/*
549	* Set ram flags, flush shadow PT entries and finally tell REM about this.
550	*/
551	rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
552	pgmUnlock(pVM);
553
554	#ifndef IN_RING3
555	REMNotifyHandlerPhysicalModify(pVM, enmType, GCPhysCurrent, GCPhys, cb,
556	fHasHCHandler, fRestoreAsRAM);
557	#else
558	REMR3NotifyHandlerPhysicalModify(pVM, enmType, GCPhysCurrent, GCPhys, cb,
559	fHasHCHandler, fRestoreAsRAM);
560	#endif
561	PGM_INVL_ALL_VCPU_TLBS(pVM);
562	Log(("PGMHandlerPhysicalModify: GCPhysCurrent=%RGp -> GCPhys=%RGp GCPhysLast=%RGp\n",
563	GCPhysCurrent, GCPhys, GCPhysLast));
564	return VINF_SUCCESS;
565	}
566
567	AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp\n", GCPhys, GCPhysLast));
568	rc = VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
569	}
570	else
571	{
572	AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
573	rc = VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
574	}
575	}
576	else
577	{
578	AssertMsgFailed(("Invalid range %RGp-%RGp\n", GCPhys, GCPhysLast));
579	rc = VERR_INVALID_PARAMETER;
580	}
581
582	/*
583	* Invalid new location, free it.
584	* We've only gotta notify REM and free the memory.
585	*/
586	pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
587	MMHyperFree(pVM, pCur);
588	}
589	else
590	{
591	AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhysCurrent));
592	rc = VERR_PGM_HANDLER_NOT_FOUND;
593	}
594
595	pgmUnlock(pVM);
596	return rc;
597	}
598
599
600	/**
601	* Changes the callbacks associated with a physical access handler.
602	*
603	* @returns VBox status code.
604	* @param pVM VM Handle.
605	* @param GCPhys Start physical address.
606	* @param pfnHandlerR3 The R3 handler.
607	* @param pvUserR3 User argument to the R3 handler.
608	* @param pfnHandlerR0 The R0 handler.
609	* @param pvUserR0 User argument to the R0 handler.
610	* @param pfnHandlerRC The RC handler.
611	* @param pvUserRC User argument to the RC handler. Values larger or
612	* equal to 0x10000 will be relocated automatically.
613	* @param pszDesc Pointer to description string. This must not be freed.
614	*/
615	VMMDECL(int) PGMHandlerPhysicalChangeCallbacks(PVM pVM, RTGCPHYS GCPhys,
616	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
617	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
618	RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
619	R3PTRTYPE(const char *) pszDesc)
620	{
621	/*
622	* Get the handler.
623	*/
624	int rc = VINF_SUCCESS;
625	pgmLock(pVM);
626	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
627	if (pCur)
628	{
629	/*
630	* Change callbacks.
631	*/
632	pCur->pfnHandlerR3 = pfnHandlerR3;
633	pCur->pvUserR3 = pvUserR3;
634	pCur->pfnHandlerR0 = pfnHandlerR0;
635	pCur->pvUserR0 = pvUserR0;
636	pCur->pfnHandlerRC = pfnHandlerRC;
637	pCur->pvUserRC = pvUserRC;
638	pCur->pszDesc = pszDesc;
639	}
640	else
641	{
642	AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
643	rc = VERR_PGM_HANDLER_NOT_FOUND;
644	}
645
646	pgmUnlock(pVM);
647	return rc;
648	}
649
650
651	/**
652	* Splits a physical access handler in two.
653	*
654	* @returns VBox status code.
655	* @param pVM VM Handle.
656	* @param GCPhys Start physical address of the handler.
657	* @param GCPhysSplit The split address.
658	*/
659	VMMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit)
660	{
661	AssertReturn(GCPhys < GCPhysSplit, VERR_INVALID_PARAMETER);
662
663	/*
664	* Do the allocation without owning the lock.
665	*/
666	PPGMPHYSHANDLER pNew;
667	int rc = MMHyperAlloc(pVM, sizeof(pNew), 0, MM_TAG_PGM_HANDLERS, (void *)&pNew);
668	if (RT_FAILURE(rc))
669	return rc;
670
671	/*
672	* Get the handler.
673	*/
674	pgmLock(pVM);
675	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
676	if (RT_LIKELY(pCur))
677	{
678	if (RT_LIKELY(GCPhysSplit <= pCur->Core.KeyLast))
679	{
680	/*
681	* Create new handler node for the 2nd half.
682	*/
683	pNew = pCur;
684	pNew->Core.Key = GCPhysSplit;
685	pNew->cPages = (pNew->Core.KeyLast - (pNew->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
686
687	pCur->Core.KeyLast = GCPhysSplit - 1;
688	pCur->cPages = (pCur->Core.KeyLast - (pCur->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
689
690	if (RT_LIKELY(RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core)))
691	{
692	LogFlow(("PGMHandlerPhysicalSplit: %RGp-%RGp and %RGp-%RGp\n",
693	pCur->Core.Key, pCur->Core.KeyLast, pNew->Core.Key, pNew->Core.KeyLast));
694	pgmUnlock(pVM);
695	return VINF_SUCCESS;
696	}
697	AssertMsgFailed(("whu?\n"));
698	rc = VERR_INTERNAL_ERROR;
699	}
700	else
701	{
702	AssertMsgFailed(("outside range: %RGp-%RGp split %RGp\n", pCur->Core.Key, pCur->Core.KeyLast, GCPhysSplit));
703	rc = VERR_INVALID_PARAMETER;
704	}
705	}
706	else
707	{
708	AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
709	rc = VERR_PGM_HANDLER_NOT_FOUND;
710	}
711	pgmUnlock(pVM);
712	MMHyperFree(pVM, pNew);
713	return rc;
714	}
715
716
717	/**
718	* Joins up two adjacent physical access handlers which has the same callbacks.
719	*
720	* @returns VBox status code.
721	* @param pVM VM Handle.
722	* @param GCPhys1 Start physical address of the first handler.
723	* @param GCPhys2 Start physical address of the second handler.
724	*/
725	VMMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2)
726	{
727	/*
728	* Get the handlers.
729	*/
730	int rc;
731	pgmLock(pVM);
732	PPGMPHYSHANDLER pCur1 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys1);
733	if (RT_LIKELY(pCur1))
734	{
735	PPGMPHYSHANDLER pCur2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
736	if (RT_LIKELY(pCur2))
737	{
738	/*
739	* Make sure that they are adjacent, and that they've got the same callbacks.
740	*/
741	if (RT_LIKELY(pCur1->Core.KeyLast + 1 == pCur2->Core.Key))
742	{
743	if (RT_LIKELY( pCur1->pfnHandlerRC == pCur2->pfnHandlerRC
744	&& pCur1->pfnHandlerR0 == pCur2->pfnHandlerR0
745	&& pCur1->pfnHandlerR3 == pCur2->pfnHandlerR3))
746	{
747	PPGMPHYSHANDLER pCur3 = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
748	if (RT_LIKELY(pCur3 == pCur2))
749	{
750	pCur1->Core.KeyLast = pCur2->Core.KeyLast;
751	pCur1->cPages = (pCur1->Core.KeyLast - (pCur1->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
752	LogFlow(("PGMHandlerPhysicalJoin: %RGp-%RGp %RGp-%RGp\n",
753	pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
754	MMHyperFree(pVM, pCur2);
755	pgmUnlock(pVM);
756	return VINF_SUCCESS;
757	}
758
759	Assert(pCur3 == pCur2);
760	rc = VERR_INTERNAL_ERROR;
761	}
762	else
763	{
764	AssertMsgFailed(("mismatching handlers\n"));
765	rc = VERR_ACCESS_DENIED;
766	}
767	}
768	else
769	{
770	AssertMsgFailed(("not adjacent: %RGp-%RGp %RGp-%RGp\n",
771	pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
772	rc = VERR_INVALID_PARAMETER;
773	}
774	}
775	else
776	{
777	AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys2));
778	rc = VERR_PGM_HANDLER_NOT_FOUND;
779	}
780	}
781	else
782	{
783	AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys1));
784	rc = VERR_PGM_HANDLER_NOT_FOUND;
785	}
786	pgmUnlock(pVM);
787	return rc;
788
789	}
790
791
792	/**
793	* Resets any modifications to individual pages in a physical
794	* page access handler region.
795	*
796	* This is used in pair with PGMHandlerPhysicalPageTempOff() or
797	* PGMHandlerPhysicalPageAlias().
798	*
799	* @returns VBox status code.
800	* @param pVM VM Handle
801	* @param GCPhys The start address of the handler regions, i.e. what you
802	* passed to PGMR3HandlerPhysicalRegister(),
803	* PGMHandlerPhysicalRegisterEx() or
804	* PGMHandlerPhysicalModify().
805	*/
806	VMMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys)
807	{
808	LogFlow(("PGMHandlerPhysicalReset GCPhys=%RGp\n", GCPhys));
809	pgmLock(pVM);
810
811	/*
812	* Find the handler.
813	*/
814	int rc;
815	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
816	if (RT_LIKELY(pCur))
817	{
818	/*
819	* Validate type.
820	*/
821	switch (pCur->enmType)
822	{
823	case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
824	case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
825	case PGMPHYSHANDLERTYPE_MMIO: /* NOTE: Only use when clearing MMIO ranges with aliased MMIO2 pages! */
826	{
827	STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,PhysHandlerReset)); /*@Todo move out of switch /
828	PPGMRAMRANGE pRam = pgmPhysGetRange(&pVM->pgm.s, GCPhys);
829	Assert(pRam);
830	Assert(pRam->GCPhys <= pCur->Core.Key);
831	Assert(pRam->GCPhysLast >= pCur->Core.KeyLast);
832
833	if (pCur->enmType == PGMPHYSHANDLERTYPE_MMIO)
834	{
835	/*
836	* Reset all the PGMPAGETYPE_MMIO2_ALIAS_MMIO pages first and that's it.
837	* This could probably be optimized a bit wrt to flushing, but I'm too lazy
838	* to do that now...
839	*/
840	PPGMPAGE pPage = &pRam->aPages[(pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT];
841	uint32_t cLeft = pCur->cPages;
842	while (cLeft-- > 0)
843	{
844	if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO)
845	pgmHandlerPhysicalResetAliasedPage(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)(uintptr_t)(pPage - &pRam->aPages[0]) << PAGE_SHIFT));
846	Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO);
847	pPage++;
848	}
849	}
850	else
851	{
852	/*
853	* Set the flags and flush shadow PT entries.
854	*/
855	rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
856	}
857
858	rc = VINF_SUCCESS;
859	break;
860	}
861
862	/*
863	* Invalid.
864	*/
865	default:
866	AssertMsgFailed(("Invalid type %d! Corruption!\n", pCur->enmType));
867	rc = VERR_INTERNAL_ERROR;
868	break;
869	}
870	}
871	else
872	{
873	AssertMsgFailed(("Didn't find MMIO Range starting at %#x\n", GCPhys));
874	rc = VERR_PGM_HANDLER_NOT_FOUND;
875	}
876
877	pgmUnlock(pVM);
878	return rc;
879	}
880
881
882	/**
883	* Temporarily turns off the access monitoring of a page within a monitored
884	* physical write/all page access handler region.
885	*
886	* Use this when no further \#PFs are required for that page. Be aware that
887	* a page directory sync might reset the flags, and turn on access monitoring
888	* for the page.
889	*
890	* The caller must do required page table modifications.
891	*
892	* @returns VBox status code.
893	* @param pVM VM Handle
894	* @param GCPhys The start address of the access handler. This
895	* must be a fully page aligned range or we risk
896	* messing up other handlers installed for the
897	* start and end pages.
898	* @param GCPhysPage The physical address of the page to turn off
899	* access monitoring for.
900	*/
901	VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)
902	{
903	LogFlow(("PGMHandlerPhysicalPageTempOff GCPhys=%RGp\n", GCPhys));
904
905	pgmLock(pVM);
906	/*
907	* Validate the range.
908	*/
909	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
910	if (RT_LIKELY(pCur))
911	{
912	if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
913	&& GCPhysPage <= pCur->Core.KeyLast))
914	{
915	Assert(!(pCur->Core.Key & PAGE_OFFSET_MASK));
916	Assert((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
917
918	AssertReturnStmt( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
919	\|\| pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL,
920	pgmUnlock(pVM), VERR_ACCESS_DENIED);
921
922	/*
923	* Change the page status.
924	*/
925	PPGMPAGE pPage;
926	int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPage, &pPage);
927	AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
928	PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
929	pgmUnlock(pVM);
930	return VINF_SUCCESS;
931	}
932	pgmUnlock(pVM);
933	AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
934	GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
935	return VERR_INVALID_PARAMETER;
936	}
937	pgmUnlock(pVM);
938	AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
939	return VERR_PGM_HANDLER_NOT_FOUND;
940	}
941
942
943	/**
944	* Replaces an MMIO page with an MMIO2 page.
945	*
946	* This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
947	* PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
948	* backing, the caller must provide a replacement page. For various reasons the
949	* replacement page must be an MMIO2 page.
950	*
951	* The caller must do required page table modifications. You can get away
952	* without making any modifations since it's an MMIO page, the cost is an extra
953	* \#PF which will the resync the page.
954	*
955	* Call PGMHandlerPhysicalReset() to restore the MMIO page.
956	*
957	* The caller may still get handler callback even after this call and must be
958	* able to deal correctly with such calls. The reason for these callbacks are
959	* either that we're executing in the recompiler (which doesn't know about this
960	* arrangement) or that we've been restored from saved state (where we won't
961	* save the change).
962	*
963	* @returns VBox status code.
964	* @param pVM The VM handle
965	* @param GCPhys The start address of the access handler. This
966	* must be a fully page aligned range or we risk
967	* messing up other handlers installed for the
968	* start and end pages.
969	* @param GCPhysPage The physical address of the page to turn off
970	* access monitoring for.
971	* @param GCPhysPageRemap The physical address of the MMIO2 page that
972	* serves as backing memory.
973	*
974	* @remark May cause a page pool flush if used on a page that is already
975	* aliased.
976	*
977	* @note This trick does only work reliably if the two pages are never ever
978	* mapped in the same page table. If they are the page pool code will
979	* be confused should either of them be flushed. See the special case
980	* of zero page aliasing mentioned in #3170.
981	*
982	*/
983	VMMDECL(int) PGMHandlerPhysicalPageAlias(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTGCPHYS GCPhysPageRemap)
984	{
985	/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
986
987	pgmLock(pVM);
988	/*
989	* Lookup and validate the range.
990	*/
991	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
992	if (RT_LIKELY(pCur))
993	{
994	if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
995	&& GCPhysPage <= pCur->Core.KeyLast))
996	{
997	AssertReturnStmt(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
998	AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
999	AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1000
1001	/*
1002	* Get and validate the two pages.
1003	*/
1004	PPGMPAGE pPageRemap;
1005	int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPageRemap, &pPageRemap);
1006	AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1007	AssertMsgReturnStmt(PGM_PAGE_GET_TYPE(pPageRemap) == PGMPAGETYPE_MMIO2,
1008	("GCPhysPageRemap=%RGp %R[pgmpage]\n", GCPhysPageRemap, pPageRemap),
1009	pgmUnlock(pVM), VERR_PGM_PHYS_NOT_MMIO2);
1010
1011	PPGMPAGE pPage;
1012	rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPage, &pPage);
1013	AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1014	if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1015	{
1016	AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1017	("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1018	VERR_PGM_PHYS_NOT_MMIO2);
1019	if (PGM_PAGE_GET_HCPHYS(pPage) == PGM_PAGE_GET_HCPHYS(pPageRemap))
1020	{
1021	pgmUnlock(pVM);
1022	return VINF_PGM_HANDLER_ALREADY_ALIASED;
1023	}
1024
1025	/*
1026	* The page is already mapped as some other page, reset it
1027	* to an MMIO/ZERO page before doing the new mapping.
1028	*/
1029	Log(("PGMHandlerPhysicalPageAlias: GCPhysPage=%RGp (%R[pgmpage]; %RHp -> %RHp\n",
1030	GCPhysPage, pPage, PGM_PAGE_GET_HCPHYS(pPage), PGM_PAGE_GET_HCPHYS(pPageRemap)));
1031	pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage);
1032	}
1033	Assert(PGM_PAGE_IS_ZERO(pPage));
1034
1035	/*
1036	* Do the actual remapping here.
1037	* This page now serves as an alias for the backing memory specified.
1038	*/
1039	LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RGp (%R[pgmpage])\n",
1040	GCPhysPage, pPage, GCPhysPageRemap, pPageRemap ));
1041	PGM_PAGE_SET_HCPHYS(pPage, PGM_PAGE_GET_HCPHYS(pPageRemap));
1042	PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1043	PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
1044	PGM_PAGE_SET_PAGEID(pPage, PGM_PAGE_GET_PAGEID(pPageRemap));
1045	PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1046
1047	/* Flush its TLB entry. */
1048	PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1049
1050	LogFlow(("PGMHandlerPhysicalPageAlias: => %R[pgmpage]\n", pPage));
1051	pgmUnlock(pVM);
1052	return VINF_SUCCESS;
1053	}
1054
1055	pgmUnlock(pVM);
1056	AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1057	GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1058	return VERR_INVALID_PARAMETER;
1059	}
1060
1061	pgmUnlock(pVM);
1062	AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1063	return VERR_PGM_HANDLER_NOT_FOUND;
1064	}
1065
1066	/**
1067	* Replaces an MMIO page with an arbitrary HC page.
1068	*
1069	* This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
1070	* PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
1071	* backing, the caller must provide a replacement page. For various reasons the
1072	* replacement page must be an MMIO2 page.
1073	*
1074	* The caller must do required page table modifications. You can get away
1075	* without making any modifations since it's an MMIO page, the cost is an extra
1076	* \#PF which will the resync the page.
1077	*
1078	* Call PGMHandlerPhysicalReset() to restore the MMIO page.
1079	*
1080	* The caller may still get handler callback even after this call and must be
1081	* able to deal correctly with such calls. The reason for these callbacks are
1082	* either that we're executing in the recompiler (which doesn't know about this
1083	* arrangement) or that we've been restored from saved state (where we won't
1084	* save the change).
1085	*
1086	* @returns VBox status code.
1087	* @param pVM The VM handle
1088	* @param GCPhys The start address of the access handler. This
1089	* must be a fully page aligned range or we risk
1090	* messing up other handlers installed for the
1091	* start and end pages.
1092	* @param GCPhysPage The physical address of the page to turn off
1093	* access monitoring for.
1094	* @param HCPhysPageRemap The physical address of the HC page that
1095	* serves as backing memory.
1096	*
1097	* @remark May cause a page pool flush if used on a page that is already
1098	* aliased.
1099	*/
1100	VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap)
1101	{
1102	/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
1103
1104	/*
1105	* Lookup and validate the range.
1106	*/
1107	pgmLock(pVM);
1108	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1109	if (RT_LIKELY(pCur))
1110	{
1111	if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1112	&& GCPhysPage <= pCur->Core.KeyLast))
1113	{
1114	AssertReturnStmt(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
1115	AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1116	AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1117
1118	/*
1119	* Get and validate the pages.
1120	*/
1121	PPGMPAGE pPage;
1122	int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPage, &pPage);
1123	AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1124	if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1125	{
1126	pgmUnlock(pVM);
1127	AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1128	("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1129	VERR_PGM_PHYS_NOT_MMIO2);
1130	return VINF_PGM_HANDLER_ALREADY_ALIASED;
1131	}
1132	Assert(PGM_PAGE_IS_ZERO(pPage));
1133
1134	/*
1135	* Do the actual remapping here.
1136	* This page now serves as an alias for the backing memory specified.
1137	*/
1138	LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RHp\n",
1139	GCPhysPage, pPage, HCPhysPageRemap));
1140	PGM_PAGE_SET_HCPHYS(pPage, HCPhysPageRemap);
1141	PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1142	PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
1143	/** @todo hack alert
1144	* This needs to be done properly. Currently we get away with it as the recompiler directly calls
1145	* IOM read and write functions. Access through PGMPhysRead/Write will crash the process.
1146	*/
1147	PGM_PAGE_SET_PAGEID(pPage, NIL_GMM_PAGEID);
1148	PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1149
1150	/* Flush its TLB entry. */
1151	PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1152	LogFlow(("PGMHandlerPhysicalPageAliasHC: => %R[pgmpage]\n", pPage));
1153	pgmUnlock(pVM);
1154	return VINF_SUCCESS;
1155	}
1156	pgmUnlock(pVM);
1157	AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1158	GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1159	return VERR_INVALID_PARAMETER;
1160	}
1161	pgmUnlock(pVM);
1162
1163	AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1164	return VERR_PGM_HANDLER_NOT_FOUND;
1165	}
1166
1167
1168	/**
1169	* Checks if a physical range is handled
1170	*
1171	* @returns boolean
1172	* @param pVM VM Handle.
1173	* @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister().
1174	* @remarks Caller must take the PGM lock...
1175	* @threads EMT.
1176	*/
1177	VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys)
1178	{
1179	/*
1180	* Find the handler.
1181	*/
1182	pgmLock(pVM);
1183	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1184	if (pCur)
1185	{
1186	Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1187	Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
1188	\|\| pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL
1189	\|\| pCur->enmType == PGMPHYSHANDLERTYPE_MMIO);
1190	pgmUnlock(pVM);
1191	return true;
1192	}
1193	pgmUnlock(pVM);
1194	return false;
1195	}
1196
1197
1198	/**
1199	* Checks if it's an disabled all access handler or write access handler at the
1200	* given address.
1201	*
1202	* @returns true if it's an all access handler, false if it's a write access
1203	* handler.
1204	* @param pVM Pointer to the shared VM structure.
1205	* @param GCPhys The address of the page with a disabled handler.
1206	*
1207	* @remarks The caller, PGMR3PhysTlbGCPhys2Ptr, must hold the PGM lock.
1208	*/
1209	bool pgmHandlerPhysicalIsAll(PVM pVM, RTGCPHYS GCPhys)
1210	{
1211	pgmLock(pVM);
1212	PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1213	if (!pCur)
1214	{
1215	pgmUnlock(pVM);
1216	AssertFailed();
1217	return true;
1218	}
1219	Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
1220	\|\| pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL
1221	\|\| pCur->enmType == PGMPHYSHANDLERTYPE_MMIO); /* sanity */
1222	/* Only whole pages can be disabled. */
1223	Assert( pCur->Core.Key <= (GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK)
1224	&& pCur->Core.KeyLast >= (GCPhys \| PAGE_OFFSET_MASK));
1225
1226	bool bRet = pCur->enmType != PGMPHYSHANDLERTYPE_PHYSICAL_WRITE;
1227	pgmUnlock(pVM);
1228	return bRet;
1229	}
1230
1231
1232	/**
1233	* Check if particular guest's VA is being monitored.
1234	*
1235	* @returns true or false
1236	* @param pVM VM handle.
1237	* @param GCPtr Virtual address.
1238	* @remarks Will acquire the PGM lock.
1239	* @threads Any.
1240	*/
1241	VMMDECL(bool) PGMHandlerVirtualIsRegistered(PVM pVM, RTGCPTR GCPtr)
1242	{
1243	pgmLock(pVM);
1244	PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)RTAvlroGCPtrGet(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, GCPtr);
1245	pgmUnlock(pVM);
1246
1247	return pCur != NULL;
1248	}
1249
1250
1251	/**
1252	* Search for virtual handler with matching physical address
1253	*
1254	* @returns VBox status code
1255	* @param pVM The VM handle.
1256	* @param GCPhys GC physical address to search for.
1257	* @param ppVirt Where to store the pointer to the virtual handler structure.
1258	* @param piPage Where to store the pointer to the index of the cached physical page.
1259	*/
1260	int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER ppVirt, unsigned piPage)
1261	{
1262	STAM_PROFILE_START(&pVM->pgm.s.CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1263	Assert(ppVirt);
1264
1265	pgmLock(pVM);
1266	PPGMPHYS2VIRTHANDLER pCur;
1267	pCur = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, GCPhys);
1268	if (pCur)
1269	{
1270	/* found a match! */
1271	*ppVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1272	piPage = pCur - &(ppVirt)->aPhysToVirt[0];
1273	pgmUnlock(pVM);
1274
1275	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1276	AssertRelease(pCur->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD);
1277	#endif
1278	LogFlow(("PHYS2VIRT: found match for %RGp -> %RGv piPage=%#x\n", GCPhys, (ppVirt)->Core.Key, *piPage));
1279	STAM_PROFILE_STOP(&pVM->pgm.s.CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1280	return VINF_SUCCESS;
1281	}
1282
1283	pgmUnlock(pVM);
1284	*ppVirt = NULL;
1285	STAM_PROFILE_STOP(&pVM->pgm.s.CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1286	return VERR_PGM_HANDLER_NOT_FOUND;
1287	}
1288
1289
1290	/**
1291	* Deal with aliases in phys2virt.
1292	*
1293	* As pointed out by the various todos, this currently only deals with
1294	* aliases where the two ranges match 100%.
1295	*
1296	* @param pVM The VM handle.
1297	* @param pPhys2Virt The node we failed insert.
1298	*/
1299	static void pgmHandlerVirtualInsertAliased(PVM pVM, PPGMPHYS2VIRTHANDLER pPhys2Virt)
1300	{
1301	/*
1302	* First find the node which is conflicting with us.
1303	*/
1304	/** @todo Deal with partial overlapping. (Unlikly situation, so I'm too lazy to do anything about it now.) */
1305	/** @todo check if the current head node covers the ground we do. This is highly unlikely
1306	* and I'm too lazy to implement this now as it will require sorting the list and stuff like that. */
1307	PPGMPHYS2VIRTHANDLER pHead = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
1308	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1309	AssertReleaseMsg(pHead != pPhys2Virt, ("%RGp-%RGp offVirtHandler=%#RX32\n",
1310	pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler));
1311	#endif
1312	if (RT_UNLIKELY(!pHead \|\| pHead->Core.KeyLast != pPhys2Virt->Core.KeyLast))
1313	{
1314	/** @todo do something clever here... */
1315	LogRel(("pgmHandlerVirtualInsertAliased: %RGp-%RGp\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
1316	pPhys2Virt->offNextAlias = 0;
1317	return;
1318	}
1319
1320	/*
1321	* Insert ourselves as the next node.
1322	*/
1323	if (!(pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
1324	pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IN_TREE;
1325	else
1326	{
1327	PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pHead + (pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
1328	pPhys2Virt->offNextAlias = ((intptr_t)pNext - (intptr_t)pPhys2Virt)
1329	\| PGMPHYS2VIRTHANDLER_IN_TREE;
1330	}
1331	pHead->offNextAlias = ((intptr_t)pPhys2Virt - (intptr_t)pHead)
1332	\| (pHead->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
1333	Log(("pgmHandlerVirtualInsertAliased: %RGp-%RGp offNextAlias=%#RX32\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1334	}
1335
1336
1337	/**
1338	* Resets one virtual handler range.
1339	*
1340	* This is called by HandlerVirtualUpdate when it has detected some kind of
1341	* problem and have started clearing the virtual handler page states (or
1342	* when there have been registration/deregistrations). For this reason this
1343	* function will only update the page status if it's lower than desired.
1344	*
1345	* @returns 0
1346	* @param pNode Pointer to a PGMVIRTHANDLER.
1347	* @param pvUser The VM handle.
1348	*/
1349	DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1350	{
1351	PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1352	PVM pVM = (PVM)pvUser;
1353
1354	Assert(PGMIsLockOwner(pVM));
1355	/*
1356	* Iterate the pages and apply the new state.
1357	*/
1358	unsigned uState = pgmHandlerVirtualCalcState(pCur);
1359	PPGMRAMRANGE pRamHint = NULL;
1360	RTGCUINTPTR offPage = ((RTGCUINTPTR)pCur->Core.Key & PAGE_OFFSET_MASK);
1361	RTGCUINTPTR cbLeft = pCur->cb;
1362	for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1363	{
1364	PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
1365	if (pPhys2Virt->Core.Key != NIL_RTGCPHYS)
1366	{
1367	/*
1368	* Update the page state wrt virtual handlers.
1369	*/
1370	PPGMPAGE pPage;
1371	int rc = pgmPhysGetPageWithHintEx(&pVM->pgm.s, pPhys2Virt->Core.Key, &pPage, &pRamHint);
1372	if ( RT_SUCCESS(rc)
1373	&& PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1374	PGM_PAGE_SET_HNDL_VIRT_STATE(pPage, uState);
1375	else
1376	AssertRC(rc);
1377
1378	/*
1379	* Need to insert the page in the Phys2Virt lookup tree?
1380	*/
1381	if (pPhys2Virt->Core.KeyLast == NIL_RTGCPHYS)
1382	{
1383	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1384	AssertRelease(!pPhys2Virt->offNextAlias);
1385	#endif
1386	unsigned cbPhys = cbLeft;
1387	if (cbPhys > PAGE_SIZE - offPage)
1388	cbPhys = PAGE_SIZE - offPage;
1389	else
1390	Assert(iPage == pCur->cPages - 1);
1391	pPhys2Virt->Core.KeyLast = pPhys2Virt->Core.Key + cbPhys - 1; /* inclusive */
1392	pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IS_HEAD \| PGMPHYS2VIRTHANDLER_IN_TREE;
1393	if (!RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, &pPhys2Virt->Core))
1394	pgmHandlerVirtualInsertAliased(pVM, pPhys2Virt);
1395	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1396	else
1397	AssertReleaseMsg(RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key) == &pPhys2Virt->Core,
1398	("%RGp-%RGp offNextAlias=%#RX32\n",
1399	pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1400	#endif
1401	Log2(("PHYS2VIRT: Insert physical range %RGp-%RGp offNextAlias=%#RX32 %s\n",
1402	pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, R3STRING(pCur->pszDesc)));
1403	}
1404	}
1405	cbLeft -= PAGE_SIZE - offPage;
1406	offPage = 0;
1407	}
1408
1409	return 0;
1410	}
1411
1412	#if defined(VBOX_STRICT) \|\| defined(LOG_ENABLED)
1413
1414	/**
1415	* Worker for pgmHandlerVirtualDumpPhysPages.
1416	*
1417	* @returns 0 (continue enumeration).
1418	* @param pNode The virtual handler node.
1419	* @param pvUser User argument, unused.
1420	*/
1421	static DECLCALLBACK(int) pgmHandlerVirtualDumpPhysPagesCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1422	{
1423	PPGMPHYS2VIRTHANDLER pCur = (PPGMPHYS2VIRTHANDLER)pNode;
1424	PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1425	Log(("PHYS2VIRT: Range %RGp-%RGp for virtual handler: %s\n", pCur->Core.Key, pCur->Core.KeyLast, pVirt->pszDesc));
1426	return 0;
1427	}
1428
1429
1430	/**
1431	* Assertion / logging helper for dumping all the
1432	* virtual handlers to the log.
1433	*
1434	* @param pVM Pointer to the shared VM structure.
1435	*/
1436	void pgmHandlerVirtualDumpPhysPages(PVM pVM)
1437	{
1438	RTAvlroGCPhysDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, true /* from left */,
1439	pgmHandlerVirtualDumpPhysPagesCallback, 0);
1440	}
1441
1442	#endif /* VBOX_STRICT \|\| LOG_ENABLED */
1443	#ifdef VBOX_STRICT
1444
1445	/**
1446	* State structure used by the PGMAssertHandlerAndFlagsInSync() function
1447	* and its AVL enumerators.
1448	*/
1449	typedef struct PGMAHAFIS
1450	{
1451	/** The current physical address. */
1452	RTGCPHYS GCPhys;
1453	/** The state we've calculated. */
1454	unsigned uVirtStateFound;
1455	/** The state we're matching up to. */
1456	unsigned uVirtState;
1457	/** Number of errors. */
1458	unsigned cErrors;
1459	/** The VM handle. */
1460	PVM pVM;
1461	} PGMAHAFIS, *PPGMAHAFIS;
1462
1463
1464	#if 0 /* unused */
1465	/**
1466	* Verify virtual handler by matching physical address.
1467	*
1468	* @returns 0
1469	* @param pNode Pointer to a PGMVIRTHANDLER.
1470	* @param pvUser Pointer to user parameter.
1471	*/
1472	static DECLCALLBACK(int) pgmHandlerVirtualVerifyOneByPhysAddr(PAVLROGCPTRNODECORE pNode, void *pvUser)
1473	{
1474	PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1475	PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1476
1477	for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1478	{
1479	if ((pCur->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) == pState->GCPhys)
1480	{
1481	unsigned uState = pgmHandlerVirtualCalcState(pCur);
1482	if (pState->uVirtState < uState)
1483	{
1484	error
1485	}
1486
1487	if (pState->uVirtState == uState)
1488	break; //??
1489	}
1490	}
1491	return 0;
1492	}
1493	#endif /* unused */
1494
1495
1496	/**
1497	* Verify a virtual handler (enumeration callback).
1498	*
1499	* Called by PGMAssertHandlerAndFlagsInSync to check the sanity of all
1500	* the virtual handlers, esp. that the physical addresses matches up.
1501	*
1502	* @returns 0
1503	* @param pNode Pointer to a PGMVIRTHANDLER.
1504	* @param pvUser Pointer to a PPGMAHAFIS structure.
1505	*/
1506	static DECLCALLBACK(int) pgmHandlerVirtualVerifyOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1507	{
1508	PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)pNode;
1509	PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1510	PVM pVM = pState->pVM;
1511
1512	/*
1513	* Validate the type and calc state.
1514	*/
1515	switch (pVirt->enmType)
1516	{
1517	case PGMVIRTHANDLERTYPE_WRITE:
1518	case PGMVIRTHANDLERTYPE_ALL:
1519	break;
1520	default:
1521	AssertMsgFailed(("unknown/wrong enmType=%d\n", pVirt->enmType));
1522	pState->cErrors++;
1523	return 0;
1524	}
1525	const unsigned uState = pgmHandlerVirtualCalcState(pVirt);
1526
1527	/*
1528	* Check key alignment.
1529	*/
1530	if ( (pVirt->aPhysToVirt[0].Core.Key & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.Key & PAGE_OFFSET_MASK)
1531	&& pVirt->aPhysToVirt[0].Core.Key != NIL_RTGCPHYS)
1532	{
1533	AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1534	pVirt->aPhysToVirt[0].Core.Key, pVirt->Core.Key, R3STRING(pVirt->pszDesc)));
1535	pState->cErrors++;
1536	}
1537
1538	if ( (pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.KeyLast & PAGE_OFFSET_MASK)
1539	&& pVirt->aPhysToVirt[pVirt->cPages - 1].Core.Key != NIL_RTGCPHYS)
1540	{
1541	AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1542	pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast, pVirt->Core.KeyLast, R3STRING(pVirt->pszDesc)));
1543	pState->cErrors++;
1544	}
1545
1546	/*
1547	* Check pages for sanity and state.
1548	*/
1549	RTGCUINTPTR GCPtr = (RTGCUINTPTR)pVirt->Core.Key;
1550	for (unsigned iPage = 0; iPage < pVirt->cPages; iPage++, GCPtr += PAGE_SIZE)
1551	{
1552	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1553	{
1554	PVMCPU pVCpu = &pVM->aCpus[i];
1555
1556	RTGCPHYS GCPhysGst;
1557	uint64_t fGst;
1558	int rc = PGMGstGetPage(pVCpu, (RTGCPTR)GCPtr, &fGst, &GCPhysGst);
1559	if ( rc == VERR_PAGE_NOT_PRESENT
1560	\|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1561	{
1562	if (pVirt->aPhysToVirt[iPage].Core.Key != NIL_RTGCPHYS)
1563	{
1564	AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysNew=~0 iPage=%#x %RGv %s\n",
1565	pVirt->aPhysToVirt[iPage].Core.Key, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1566	pState->cErrors++;
1567	}
1568	continue;
1569	}
1570
1571	AssertRCReturn(rc, 0);
1572	if ((pVirt->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) != GCPhysGst)
1573	{
1574	AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1575	pVirt->aPhysToVirt[iPage].Core.Key, GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1576	pState->cErrors++;
1577	continue;
1578	}
1579
1580	PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysGst);
1581	if (!pPage)
1582	{
1583	AssertMsgFailed(("virt handler getting ram flags. GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1584	GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1585	pState->cErrors++;
1586	continue;
1587	}
1588
1589	if (PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1590	{
1591	AssertMsgFailed(("virt handler state mismatch. pPage=%R[pgmpage] GCPhysGst=%RGp iPage=%#x %RGv state=%d expected>=%d %s\n",
1592	pPage, GCPhysGst, iPage, GCPtr, PGM_PAGE_GET_HNDL_VIRT_STATE(pPage), uState, R3STRING(pVirt->pszDesc)));
1593	pState->cErrors++;
1594	continue;
1595	}
1596	} /* for each VCPU */
1597	} /* for pages in virtual mapping. */
1598
1599	return 0;
1600	}
1601
1602
1603	/**
1604	* Asserts that the handlers+guest-page-tables == ramrange-flags and
1605	* that the physical addresses associated with virtual handlers are correct.
1606	*
1607	* @returns Number of mismatches.
1608	* @param pVM The VM handle.
1609	*/
1610	VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM)
1611	{
1612	PPGM pPGM = &pVM->pgm.s;
1613	PGMAHAFIS State;
1614	State.GCPhys = 0;
1615	State.uVirtState = 0;
1616	State.uVirtStateFound = 0;
1617	State.cErrors = 0;
1618	State.pVM = pVM;
1619
1620	Assert(PGMIsLockOwner(pVM));
1621
1622	/*
1623	* Check the RAM flags against the handlers.
1624	*/
1625	for (PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRanges); pRam; pRam = pRam->CTX_SUFF(pNext))
1626	{
1627	const unsigned cPages = pRam->cb >> PAGE_SHIFT;
1628	for (unsigned iPage = 0; iPage < cPages; iPage++)
1629	{
1630	PGMPAGE const *pPage = &pRam->aPages[iPage];
1631	if (PGM_PAGE_HAS_ANY_HANDLERS(pPage))
1632	{
1633	State.GCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT);
1634
1635	/*
1636	* Physical first - calculate the state based on the handlers
1637	* active on the page, then compare.
1638	*/
1639	if (PGM_PAGE_HAS_ANY_PHYSICAL_HANDLERS(pPage))
1640	{
1641	/* the first */
1642	PPGMPHYSHANDLER pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys);
1643	if (!pPhys)
1644	{
1645	pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys, true);
1646	if ( pPhys
1647	&& pPhys->Core.Key > (State.GCPhys + PAGE_SIZE - 1))
1648	pPhys = NULL;
1649	Assert(!pPhys \|\| pPhys->Core.Key >= State.GCPhys);
1650	}
1651	if (pPhys)
1652	{
1653	unsigned uState = pgmHandlerPhysicalCalcState(pPhys);
1654
1655	/* more? */
1656	while (pPhys->Core.KeyLast < (State.GCPhys \| PAGE_OFFSET_MASK))
1657	{
1658	PPGMPHYSHANDLER pPhys2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers,
1659	pPhys->Core.KeyLast + 1, true);
1660	if ( !pPhys2
1661	\|\| pPhys2->Core.Key > (State.GCPhys \| PAGE_OFFSET_MASK))
1662	break;
1663	unsigned uState2 = pgmHandlerPhysicalCalcState(pPhys2);
1664	uState = RT_MAX(uState, uState2);
1665	pPhys = pPhys2;
1666	}
1667
1668	/* compare.*/
1669	if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != uState
1670	&& PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
1671	{
1672	AssertMsgFailed(("ram range vs phys handler flags mismatch. GCPhys=%RGp state=%d expected=%d %s\n",
1673	State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), uState, pPhys->pszDesc));
1674	State.cErrors++;
1675	}
1676
1677	#ifdef IN_RING3
1678	/* validate that REM is handling it. */
1679	if ( !REMR3IsPageAccessHandled(pVM, State.GCPhys)
1680	/* ignore shadowed ROM for the time being. */
1681	&& PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_ROM_SHADOW)
1682	{
1683	AssertMsgFailed(("ram range vs phys handler REM mismatch. GCPhys=%RGp state=%d %s\n",
1684	State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), pPhys->pszDesc));
1685	State.cErrors++;
1686	}
1687	#endif
1688	}
1689	else
1690	{
1691	AssertMsgFailed(("ram range vs phys handler mismatch. no handler for GCPhys=%RGp\n", State.GCPhys));
1692	State.cErrors++;
1693	}
1694	}
1695
1696	/*
1697	* Virtual handlers.
1698	*/
1699	if (PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage))
1700	{
1701	State.uVirtState = PGM_PAGE_GET_HNDL_VIRT_STATE(pPage);
1702	#if 1
1703	/* locate all the matching physical ranges. */
1704	State.uVirtStateFound = PGM_PAGE_HNDL_VIRT_STATE_NONE;
1705	RTGCPHYS GCPhysKey = State.GCPhys;
1706	for (;;)
1707	{
1708	PPGMPHYS2VIRTHANDLER pPhys2Virt = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers,
1709	GCPhysKey, true /* above-or-equal */);
1710	if ( !pPhys2Virt
1711	\|\| (pPhys2Virt->Core.Key & X86_PTE_PAE_PG_MASK) != State.GCPhys)
1712	break;
1713
1714	/* the head */
1715	GCPhysKey = pPhys2Virt->Core.KeyLast;
1716	PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
1717	unsigned uState = pgmHandlerVirtualCalcState(pCur);
1718	State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
1719
1720	/* any aliases */
1721	while (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
1722	{
1723	pPhys2Virt = (PPGMPHYS2VIRTHANDLER)((uintptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
1724	pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
1725	uState = pgmHandlerVirtualCalcState(pCur);
1726	State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
1727	}
1728
1729	/* done? */
1730	if ((GCPhysKey & X86_PTE_PAE_PG_MASK) != State.GCPhys)
1731	break;
1732	}
1733	#else
1734	/* very slow */
1735	RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOneByPhysAddr, &State);
1736	#endif
1737	if (State.uVirtState != State.uVirtStateFound)
1738	{
1739	AssertMsgFailed(("ram range vs virt handler flags mismatch. GCPhys=%RGp uVirtState=%#x uVirtStateFound=%#x\n",
1740	State.GCPhys, State.uVirtState, State.uVirtStateFound));
1741	State.cErrors++;
1742	}
1743	}
1744	}
1745	} /* foreach page in ram range. */
1746	} /* foreach ram range. */
1747
1748	/*
1749	* Check that the physical addresses of the virtual handlers matches up
1750	* and that they are otherwise sane.
1751	*/
1752	RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOne, &State);
1753
1754	/*
1755	* Do the reverse check for physical handlers.
1756	*/
1757	/** @todo */
1758
1759	return State.cErrors;
1760	}
1761
1762	#endif /* VBOX_STRICT */
1763

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source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp@ 25577

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