VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp@ 91360

Last change on this file since 91360 was 91247, checked in by vboxsync, 3 years ago

PGM: Moved the statistics into the VM and VMCPU structures (was on the hyper heap). bugref:10093
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1/* $Id: PGMAllHandler.cpp 91247 2021-09-15 12:20:52Z vboxsync $ */
2/** @file
3 * PGM - Page Manager / Monitor, Access Handlers.
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_PGM
23#define VBOX_WITHOUT_PAGING_BIT_FIELDS /* 64-bit bitfields are just asking for trouble. See @bugref{9841} and others. */
24#include <VBox/vmm/dbgf.h>
25#include <VBox/vmm/pgm.h>
26#include <VBox/vmm/iom.h>
27#include <VBox/vmm/mm.h>
28#include <VBox/vmm/em.h>
29#include <VBox/vmm/nem.h>
30#include <VBox/vmm/stam.h>
31#include <VBox/vmm/dbgf.h>
32#ifdef IN_RING0
33# include <VBox/vmm/pdmdev.h>
34#endif
35#include "PGMInternal.h"
36#include <VBox/vmm/vmcc.h>
37#include "PGMInline.h"
38
39#include <VBox/log.h>
40#include <iprt/assert.h>
41#include <iprt/asm-amd64-x86.h>
42#include <iprt/string.h>
43#include <VBox/param.h>
44#include <VBox/err.h>
45#include <VBox/vmm/selm.h>
46
47
48/*********************************************************************************************************************************
49* Internal Functions *
50*********************************************************************************************************************************/
51static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVMCC pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam);
52static void pgmHandlerPhysicalDeregisterNotifyREMAndNEM(PVMCC pVM, PPGMPHYSHANDLER pCur, int fRestoreRAM);
53static void pgmHandlerPhysicalResetRamFlags(PVMCC pVM, PPGMPHYSHANDLER pCur);
54
55
56/**
57 * Internal worker for releasing a physical handler type registration reference.
58 *
59 * @returns New reference count. UINT32_MAX if invalid input (asserted).
60 * @param pVM The cross context VM structure.
61 * @param pType Pointer to the type registration.
62 */
63DECLINLINE(uint32_t) pgmHandlerPhysicalTypeRelease(PVMCC pVM, PPGMPHYSHANDLERTYPEINT pType)
64{
65 AssertMsgReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX);
66 uint32_t cRefs = ASMAtomicDecU32(&pType->cRefs);
67 if (cRefs == 0)
68 {
69 PGM_LOCK_VOID(pVM);
70 pType->u32Magic = PGMPHYSHANDLERTYPEINT_MAGIC_DEAD;
71 RTListOff32NodeRemove(&pType->ListNode);
72 PGM_UNLOCK(pVM);
73 MMHyperFree(pVM, pType);
74 }
75 return cRefs;
76}
77
78
79/**
80 * Internal worker for retaining a physical handler type registration reference.
81 *
82 * @returns New reference count. UINT32_MAX if invalid input (asserted).
83 * @param pVM The cross context VM structure.
84 * @param pType Pointer to the type registration.
85 */
86DECLINLINE(uint32_t) pgmHandlerPhysicalTypeRetain(PVM pVM, PPGMPHYSHANDLERTYPEINT pType)
87{
88 NOREF(pVM);
89 AssertMsgReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX);
90 uint32_t cRefs = ASMAtomicIncU32(&pType->cRefs);
91 Assert(cRefs < _1M && cRefs > 0);
92 return cRefs;
93}
94
95
96/**
97 * Releases a reference to a physical handler type registration.
98 *
99 * @returns New reference count. UINT32_MAX if invalid input (asserted).
100 * @param pVM The cross context VM structure.
101 * @param hType The type regiration handle.
102 */
103VMMDECL(uint32_t) PGMHandlerPhysicalTypeRelease(PVMCC pVM, PGMPHYSHANDLERTYPE hType)
104{
105 if (hType != NIL_PGMPHYSHANDLERTYPE)
106 return pgmHandlerPhysicalTypeRelease(pVM, PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType));
107 return 0;
108}
109
110
111/**
112 * Retains a reference to a physical handler type registration.
113 *
114 * @returns New reference count. UINT32_MAX if invalid input (asserted).
115 * @param pVM The cross context VM structure.
116 * @param hType The type regiration handle.
117 */
118VMMDECL(uint32_t) PGMHandlerPhysicalTypeRetain(PVM pVM, PGMPHYSHANDLERTYPE hType)
119{
120 return pgmHandlerPhysicalTypeRetain(pVM, PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType));
121}
122
123
124/**
125 * Creates a physical access handler.
126 *
127 * @returns VBox status code.
128 * @retval VINF_SUCCESS when successfully installed.
129 * @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
130 * the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
131 * flagged together with a pool clearing.
132 * @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
133 * one. A debug assertion is raised.
134 *
135 * @param pVM The cross context VM structure.
136 * @param hType The handler type registration handle.
137 * @param pvUserR3 User argument to the R3 handler.
138 * @param pvUserR0 User argument to the R0 handler.
139 * @param pvUserRC User argument to the RC handler. This can be a value
140 * less that 0x10000 or a (non-null) pointer that is
141 * automatically relocated.
142 * @param pszDesc Description of this handler. If NULL, the type
143 * description will be used instead.
144 * @param ppPhysHandler Where to return the access handler structure on
145 * success.
146 */
147int pgmHandlerPhysicalExCreate(PVMCC pVM, PGMPHYSHANDLERTYPE hType, RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC,
148 R3PTRTYPE(const char *) pszDesc, PPGMPHYSHANDLER *ppPhysHandler)
149{
150 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType);
151 Log(("pgmHandlerPhysicalExCreate: pvUserR3=%RHv pvUserR0=%RHv pvUserGC=%RRv hType=%#x (%d, %s) pszDesc=%RHv:%s\n",
152 pvUserR3, pvUserR0, pvUserRC, hType, pType->enmKind, R3STRING(pType->pszDesc), pszDesc, R3STRING(pszDesc)));
153
154 /*
155 * Validate input.
156 */
157 AssertPtr(ppPhysHandler);
158 AssertReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, VERR_INVALID_HANDLE);
159 AssertMsgReturn( (RTRCUINTPTR)pvUserRC < 0x10000
160 || MMHyperR3ToRC(pVM, MMHyperRCToR3(pVM, pvUserRC)) == pvUserRC,
161 ("Not RC pointer! pvUserRC=%RRv\n", pvUserRC),
162 VERR_INVALID_PARAMETER);
163#if 0 /* No longer valid. */
164 AssertMsgReturn( (RTR0UINTPTR)pvUserR0 < 0x10000
165 || MMHyperR3ToR0(pVM, MMHyperR0ToR3(pVM, pvUserR0)) == pvUserR0,
166 ("Not R0 pointer! pvUserR0=%RHv\n", pvUserR0),
167 VERR_INVALID_PARAMETER);
168#endif
169
170 /*
171 * Allocate and initialize the new entry.
172 */
173 PPGMPHYSHANDLER pNew;
174 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
175 if (RT_SUCCESS(rc))
176 {
177 pNew->Core.Key = NIL_RTGCPHYS;
178 pNew->Core.KeyLast = NIL_RTGCPHYS;
179 pNew->cPages = 0;
180 pNew->cAliasedPages = 0;
181 pNew->cTmpOffPages = 0;
182 pNew->pvUserR3 = pvUserR3;
183 pNew->pvUserR0 = pvUserR0;
184 pNew->hType = hType;
185 pNew->pszDesc = pszDesc != NIL_RTR3PTR ? pszDesc : pType->pszDesc;
186 pgmHandlerPhysicalTypeRetain(pVM, pType);
187 *ppPhysHandler = pNew;
188 return VINF_SUCCESS;
189 }
190
191 return rc;
192}
193
194
195/**
196 * Duplicates a physical access handler.
197 *
198 * @returns VBox status code.
199 * @retval VINF_SUCCESS when successfully installed.
200 *
201 * @param pVM The cross context VM structure.
202 * @param pPhysHandlerSrc The source handler to duplicate
203 * @param ppPhysHandler Where to return the access handler structure on
204 * success.
205 */
206int pgmHandlerPhysicalExDup(PVMCC pVM, PPGMPHYSHANDLER pPhysHandlerSrc, PPGMPHYSHANDLER *ppPhysHandler)
207{
208 return pgmHandlerPhysicalExCreate(pVM,
209 pPhysHandlerSrc->hType,
210 pPhysHandlerSrc->pvUserR3,
211 pPhysHandlerSrc->pvUserR0,
212 NIL_RTR0PTR,
213 pPhysHandlerSrc->pszDesc,
214 ppPhysHandler);
215}
216
217
218/**
219 * Register a access handler for a physical range.
220 *
221 * @returns VBox status code.
222 * @retval VINF_SUCCESS when successfully installed.
223 *
224 * @param pVM The cross context VM structure.
225 * @param pPhysHandler The physical handler.
226 * @param GCPhys Start physical address.
227 * @param GCPhysLast Last physical address. (inclusive)
228 */
229int pgmHandlerPhysicalExRegister(PVMCC pVM, PPGMPHYSHANDLER pPhysHandler, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
230{
231 /*
232 * Validate input.
233 */
234 AssertPtr(pPhysHandler);
235 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, pPhysHandler->hType);
236 Assert(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC);
237 Log(("pgmHandlerPhysicalExRegister: GCPhys=%RGp GCPhysLast=%RGp hType=%#x (%d, %s) pszDesc=%RHv:%s\n",
238 GCPhys, GCPhysLast, pPhysHandler->hType, pType->enmKind, R3STRING(pType->pszDesc), pPhysHandler->pszDesc, R3STRING(pPhysHandler->pszDesc)));
239 AssertReturn(pPhysHandler->Core.Key == NIL_RTGCPHYS, VERR_WRONG_ORDER);
240
241 AssertMsgReturn(GCPhys < GCPhysLast, ("GCPhys >= GCPhysLast (%#x >= %#x)\n", GCPhys, GCPhysLast), VERR_INVALID_PARAMETER);
242 switch (pType->enmKind)
243 {
244 case PGMPHYSHANDLERKIND_WRITE:
245 break;
246 case PGMPHYSHANDLERKIND_MMIO:
247 case PGMPHYSHANDLERKIND_ALL:
248 /* Simplification for PGMPhysRead, PGMR0Trap0eHandlerNPMisconfig and others: Full pages. */
249 AssertMsgReturn(!(GCPhys & PAGE_OFFSET_MASK), ("%RGp\n", GCPhys), VERR_INVALID_PARAMETER);
250 AssertMsgReturn((GCPhysLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, ("%RGp\n", GCPhysLast), VERR_INVALID_PARAMETER);
251 break;
252 default:
253 AssertMsgFailed(("Invalid input enmKind=%d!\n", pType->enmKind));
254 return VERR_INVALID_PARAMETER;
255 }
256
257 /*
258 * We require the range to be within registered ram.
259 * There is no apparent need to support ranges which cover more than one ram range.
260 */
261 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
262 if ( !pRam
263 || GCPhysLast > pRam->GCPhysLast)
264 {
265#ifdef IN_RING3
266 DBGFR3Info(pVM->pUVM, "phys", NULL, NULL);
267#endif
268 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
269 return VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
270 }
271 Assert(GCPhys >= pRam->GCPhys && GCPhys < pRam->GCPhysLast);
272 Assert(GCPhysLast <= pRam->GCPhysLast && GCPhysLast >= pRam->GCPhys);
273
274 /*
275 * Try insert into list.
276 */
277 pPhysHandler->Core.Key = GCPhys;
278 pPhysHandler->Core.KeyLast = GCPhysLast;
279 pPhysHandler->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
280
281 PGM_LOCK_VOID(pVM);
282 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pPhysHandler->Core))
283 {
284 int rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pPhysHandler, pRam);
285 if (rc == VINF_PGM_SYNC_CR3)
286 rc = VINF_PGM_GCPHYS_ALIASED;
287
288#if defined(IN_RING3) || defined(IN_RING0)
289 NEMHCNotifyHandlerPhysicalRegister(pVM, pType->enmKind, GCPhys, GCPhysLast - GCPhys + 1);
290#endif
291 PGM_UNLOCK(pVM);
292
293 if (rc != VINF_SUCCESS)
294 Log(("PGMHandlerPhysicalRegisterEx: returns %Rrc (%RGp-%RGp)\n", rc, GCPhys, GCPhysLast));
295 return rc;
296 }
297 PGM_UNLOCK(pVM);
298
299 pPhysHandler->Core.Key = NIL_RTGCPHYS;
300 pPhysHandler->Core.KeyLast = NIL_RTGCPHYS;
301
302#if defined(IN_RING3) && defined(VBOX_STRICT)
303 DBGFR3Info(pVM->pUVM, "handlers", "phys nostats", NULL);
304#endif
305 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp pszDesc=%s/%s\n",
306 GCPhys, GCPhysLast, R3STRING(pPhysHandler->pszDesc), R3STRING(pType->pszDesc)));
307 return VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
308}
309
310
311/**
312 * Register a access handler for a physical range.
313 *
314 * @returns VBox status code.
315 * @retval VINF_SUCCESS when successfully installed.
316 * @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
317 * the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
318 * flagged together with a pool clearing.
319 * @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
320 * one. A debug assertion is raised.
321 *
322 * @param pVM The cross context VM structure.
323 * @param GCPhys Start physical address.
324 * @param GCPhysLast Last physical address. (inclusive)
325 * @param hType The handler type registration handle.
326 * @param pvUserR3 User argument to the R3 handler.
327 * @param pvUserR0 User argument to the R0 handler.
328 * @param pvUserRC User argument to the RC handler. This can be a value
329 * less that 0x10000 or a (non-null) pointer that is
330 * automatically relocated.
331 * @param pszDesc Description of this handler. If NULL, the type
332 * description will be used instead.
333 */
334VMMDECL(int) PGMHandlerPhysicalRegister(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, PGMPHYSHANDLERTYPE hType,
335 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, R3PTRTYPE(const char *) pszDesc)
336{
337#ifdef LOG_ENABLED
338 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType);
339 Log(("PGMHandlerPhysicalRegister: GCPhys=%RGp GCPhysLast=%RGp pvUserR3=%RHv pvUserR0=%RHv pvUserGC=%RRv hType=%#x (%d, %s) pszDesc=%RHv:%s\n",
340 GCPhys, GCPhysLast, pvUserR3, pvUserR0, pvUserRC, hType, pType->enmKind, R3STRING(pType->pszDesc), pszDesc, R3STRING(pszDesc)));
341#endif
342
343 PPGMPHYSHANDLER pNew;
344 int rc = pgmHandlerPhysicalExCreate(pVM, hType, pvUserR3, pvUserR0, pvUserRC, pszDesc, &pNew);
345 if (RT_SUCCESS(rc))
346 {
347 rc = pgmHandlerPhysicalExRegister(pVM, pNew, GCPhys, GCPhysLast);
348 if (RT_SUCCESS(rc))
349 return rc;
350 pgmHandlerPhysicalExDestroy(pVM, pNew);
351 }
352 return rc;
353}
354
355
356/**
357 * Sets ram range flags and attempts updating shadow PTs.
358 *
359 * @returns VBox status code.
360 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
361 * @retval VINF_PGM_SYNC_CR3 when the shadow PTs could be updated because
362 * the guest page aliased or/and mapped by multiple PTs. FFs set.
363 * @param pVM The cross context VM structure.
364 * @param pCur The physical handler.
365 * @param pRam The RAM range.
366 */
367static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVMCC pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam)
368{
369 /*
370 * Iterate the guest ram pages updating the flags and flushing PT entries
371 * mapping the page.
372 */
373 bool fFlushTLBs = false;
374 int rc = VINF_SUCCESS;
375 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
376 const unsigned uState = pCurType->uState;
377 uint32_t cPages = pCur->cPages;
378 uint32_t i = (pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT;
379 for (;;)
380 {
381 PPGMPAGE pPage = &pRam->aPages[i];
382 AssertMsg(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO || PGM_PAGE_IS_MMIO(pPage),
383 ("%RGp %R[pgmpage]\n", pRam->GCPhys + (i << PAGE_SHIFT), pPage));
384
385 /* Only do upgrades. */
386 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
387 {
388 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
389
390 const RTGCPHYS GCPhysPage = pRam->GCPhys + (i << PAGE_SHIFT);
391 int rc2 = pgmPoolTrackUpdateGCPhys(pVM, GCPhysPage, pPage,
392 false /* allow updates of PTEs (instead of flushing) */, &fFlushTLBs);
393 if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
394 rc = rc2;
395
396 /* Tell NEM about the protection update. */
397 if (VM_IS_NEM_ENABLED(pVM))
398 {
399 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
400 PGMPAGETYPE enmType = (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage);
401 NEMHCNotifyPhysPageProtChanged(pVM, GCPhysPage, PGM_PAGE_GET_HCPHYS(pPage),
402 pgmPhysPageCalcNemProtection(pPage, enmType), enmType, &u2State);
403 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
404 }
405 }
406
407 /* next */
408 if (--cPages == 0)
409 break;
410 i++;
411 }
412
413 if (fFlushTLBs)
414 {
415 PGM_INVL_ALL_VCPU_TLBS(pVM);
416 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: flushing guest TLBs; rc=%d\n", rc));
417 }
418 else
419 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: doesn't flush guest TLBs. rc=%Rrc; sync flags=%x VMCPU_FF_PGM_SYNC_CR3=%d\n", rc, VMMGetCpu(pVM)->pgm.s.fSyncFlags, VMCPU_FF_IS_SET(VMMGetCpu(pVM), VMCPU_FF_PGM_SYNC_CR3)));
420
421 return rc;
422}
423
424
425/**
426 * Deregister a physical page access handler.
427 *
428 * @returns VBox status code.
429 * @param pVM The cross context VM structure.
430 * @param pPhysHandler The handler to deregister (but not free).
431 * @param fRestoreAsRAM How this will likely be restored, if we know (true,
432 * false, or if we don't know -1).
433 */
434int pgmHandlerPhysicalExDeregister(PVMCC pVM, PPGMPHYSHANDLER pPhysHandler, int fRestoreAsRAM)
435{
436 LogFlow(("pgmHandlerPhysicalExDeregister: Removing Range %RGp-%RGp %s fRestoreAsRAM=%d\n",
437 pPhysHandler->Core.Key, pPhysHandler->Core.KeyLast, R3STRING(pPhysHandler->pszDesc), fRestoreAsRAM));
438 AssertReturn(pPhysHandler->Core.Key != NIL_RTGCPHYS, VERR_PGM_HANDLER_NOT_FOUND);
439
440 /*
441 * Remove the handler from the tree.
442 */
443 PGM_LOCK_VOID(pVM);
444 PPGMPHYSHANDLER pRemoved = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers,
445 pPhysHandler->Core.Key);
446 if (pRemoved == pPhysHandler)
447 {
448 /*
449 * Clear the page bits, notify the REM about this change and clear
450 * the cache.
451 */
452 pgmHandlerPhysicalResetRamFlags(pVM, pPhysHandler);
453 pgmHandlerPhysicalDeregisterNotifyREMAndNEM(pVM, pPhysHandler, fRestoreAsRAM);
454 pVM->pgm.s.pLastPhysHandlerR0 = 0;
455 pVM->pgm.s.pLastPhysHandlerR3 = 0;
456
457 pPhysHandler->Core.Key = NIL_RTGCPHYS;
458 pPhysHandler->Core.KeyLast = NIL_RTGCPHYS;
459
460 PGM_UNLOCK(pVM);
461
462 return VINF_SUCCESS;
463 }
464
465 /*
466 * Both of the failure conditions here are considered internal processing
467 * errors because they can only be caused by race conditions or corruption.
468 * If we ever need to handle concurrent deregistration, we have to move
469 * the NIL_RTGCPHYS check inside the PGM lock.
470 */
471 if (pRemoved)
472 RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pRemoved->Core);
473
474 PGM_UNLOCK(pVM);
475
476 if (!pRemoved)
477 AssertMsgFailed(("Didn't find range starting at %RGp in the tree!\n", pPhysHandler->Core.Key));
478 else
479 AssertMsgFailed(("Found different handle at %RGp in the tree: got %p insteaded of %p\n",
480 pPhysHandler->Core.Key, pRemoved, pPhysHandler));
481 return VERR_PGM_HANDLER_IPE_1;
482}
483
484
485/**
486 * Destroys (frees) a physical handler.
487 *
488 * The caller must deregister it before destroying it!
489 *
490 * @returns VBox status code.
491 * @param pVM The cross context VM structure.
492 * @param pHandler The handler to free. NULL if ignored.
493 */
494int pgmHandlerPhysicalExDestroy(PVMCC pVM, PPGMPHYSHANDLER pHandler)
495{
496 if (pHandler)
497 {
498 AssertPtr(pHandler);
499 AssertReturn(pHandler->Core.Key == NIL_RTGCPHYS, VERR_WRONG_ORDER);
500 PGMHandlerPhysicalTypeRelease(pVM, pHandler->hType);
501 MMHyperFree(pVM, pHandler);
502 }
503 return VINF_SUCCESS;
504}
505
506
507/**
508 * Deregister a physical page access handler.
509 *
510 * @returns VBox status code.
511 * @param pVM The cross context VM structure.
512 * @param GCPhys Start physical address.
513 */
514VMMDECL(int) PGMHandlerPhysicalDeregister(PVMCC pVM, RTGCPHYS GCPhys)
515{
516 /*
517 * Find the handler.
518 */
519 PGM_LOCK_VOID(pVM);
520 PPGMPHYSHANDLER pRemoved = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
521 if (pRemoved)
522 {
523 LogFlow(("PGMHandlerPhysicalDeregister: Removing Range %RGp-%RGp %s\n",
524 pRemoved->Core.Key, pRemoved->Core.KeyLast, R3STRING(pRemoved->pszDesc)));
525
526 /*
527 * Clear the page bits, notify the REM about this change and clear
528 * the cache.
529 */
530 pgmHandlerPhysicalResetRamFlags(pVM, pRemoved);
531 pgmHandlerPhysicalDeregisterNotifyREMAndNEM(pVM, pRemoved, -1);
532 pVM->pgm.s.pLastPhysHandlerR0 = 0;
533 pVM->pgm.s.pLastPhysHandlerR3 = 0;
534
535 PGM_UNLOCK(pVM);
536
537 pRemoved->Core.Key = NIL_RTGCPHYS;
538 pgmHandlerPhysicalExDestroy(pVM, pRemoved);
539 return VINF_SUCCESS;
540 }
541
542 PGM_UNLOCK(pVM);
543
544 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
545 return VERR_PGM_HANDLER_NOT_FOUND;
546}
547
548
549/**
550 * Shared code with modify.
551 */
552static void pgmHandlerPhysicalDeregisterNotifyREMAndNEM(PVMCC pVM, PPGMPHYSHANDLER pCur, int fRestoreAsRAM)
553{
554 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
555 RTGCPHYS GCPhysStart = pCur->Core.Key;
556 RTGCPHYS GCPhysLast = pCur->Core.KeyLast;
557
558 /*
559 * Page align the range.
560 *
561 * Since we've reset (recalculated) the physical handler state of all pages
562 * we can make use of the page states to figure out whether a page should be
563 * included in the REM notification or not.
564 */
565 if ( (pCur->Core.Key & PAGE_OFFSET_MASK)
566 || ((pCur->Core.KeyLast + 1) & PAGE_OFFSET_MASK))
567 {
568 Assert(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO);
569
570 if (GCPhysStart & PAGE_OFFSET_MASK)
571 {
572 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysStart);
573 if ( pPage
574 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
575 {
576 RTGCPHYS GCPhys = (GCPhysStart + (PAGE_SIZE - 1)) & X86_PTE_PAE_PG_MASK;
577 if ( GCPhys > GCPhysLast
578 || GCPhys < GCPhysStart)
579 return;
580 GCPhysStart = GCPhys;
581 }
582 else
583 GCPhysStart &= X86_PTE_PAE_PG_MASK;
584 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
585 }
586
587 if (GCPhysLast & PAGE_OFFSET_MASK)
588 {
589 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysLast);
590 if ( pPage
591 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
592 {
593 RTGCPHYS GCPhys = (GCPhysLast & X86_PTE_PAE_PG_MASK) - 1;
594 if ( GCPhys < GCPhysStart
595 || GCPhys > GCPhysLast)
596 return;
597 GCPhysLast = GCPhys;
598 }
599 else
600 GCPhysLast |= PAGE_OFFSET_MASK;
601 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
602 }
603 }
604
605 /*
606 * Tell REM and NEM.
607 */
608 const bool fRestoreAsRAM2 = pCurType->pfnHandlerR3
609 && pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO; /** @todo this isn't entirely correct. */
610 /** @todo do we need this notification? */
611 NEMHCNotifyHandlerPhysicalDeregister(pVM, pCurType->enmKind, GCPhysStart, GCPhysLast - GCPhysStart + 1,
612 fRestoreAsRAM, fRestoreAsRAM2);
613}
614
615
616/**
617 * pgmHandlerPhysicalResetRamFlags helper that checks for other handlers on
618 * edge pages.
619 */
620DECLINLINE(void) pgmHandlerPhysicalRecalcPageState(PVMCC pVM, RTGCPHYS GCPhys, bool fAbove, PPGMRAMRANGE *ppRamHint)
621{
622 /*
623 * Look for other handlers.
624 */
625 unsigned uState = PGM_PAGE_HNDL_PHYS_STATE_NONE;
626 for (;;)
627 {
628 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys, fAbove);
629 if ( !pCur
630 || ((fAbove ? pCur->Core.Key : pCur->Core.KeyLast) >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
631 break;
632 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
633 uState = RT_MAX(uState, pCurType->uState);
634
635 /* next? */
636 RTGCPHYS GCPhysNext = fAbove
637 ? pCur->Core.KeyLast + 1
638 : pCur->Core.Key - 1;
639 if ((GCPhysNext >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
640 break;
641 GCPhys = GCPhysNext;
642 }
643
644 /*
645 * Update if we found something that is a higher priority
646 * state than the current.
647 */
648 if (uState != PGM_PAGE_HNDL_PHYS_STATE_NONE)
649 {
650 PPGMPAGE pPage;
651 int rc = pgmPhysGetPageWithHintEx(pVM, GCPhys, &pPage, ppRamHint);
652 if ( RT_SUCCESS(rc)
653 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
654 {
655 /* This should normally not be necessary. */
656 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
657 bool fFlushTLBs ;
658 rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhys, pPage, false /*fFlushPTEs*/, &fFlushTLBs);
659 if (RT_SUCCESS(rc) && fFlushTLBs)
660 PGM_INVL_ALL_VCPU_TLBS(pVM);
661 else
662 AssertRC(rc);
663
664 /* Tell NEM about the protection update. */
665 if (VM_IS_NEM_ENABLED(pVM))
666 {
667 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
668 PGMPAGETYPE enmType = (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage);
669 NEMHCNotifyPhysPageProtChanged(pVM, GCPhys, PGM_PAGE_GET_HCPHYS(pPage),
670 pgmPhysPageCalcNemProtection(pPage, enmType), enmType, &u2State);
671 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
672 }
673 }
674 else
675 AssertRC(rc);
676 }
677}
678
679
680/**
681 * Resets an aliased page.
682 *
683 * @param pVM The cross context VM structure.
684 * @param pPage The page.
685 * @param GCPhysPage The page address in case it comes in handy.
686 * @param fDoAccounting Whether to perform accounting. (Only set during
687 * reset where pgmR3PhysRamReset doesn't have the
688 * handler structure handy.)
689 */
690void pgmHandlerPhysicalResetAliasedPage(PVMCC pVM, PPGMPAGE pPage, RTGCPHYS GCPhysPage, bool fDoAccounting)
691{
692 Assert( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
693 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO);
694 Assert(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
695 RTHCPHYS const HCPhysPrev = PGM_PAGE_GET_HCPHYS(pPage);
696
697 /*
698 * Flush any shadow page table references *first*.
699 */
700 bool fFlushTLBs = false;
701 int rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhysPage, pPage, true /*fFlushPTEs*/, &fFlushTLBs);
702 AssertLogRelRCReturnVoid(rc);
703 HMFlushTlbOnAllVCpus(pVM);
704
705 /*
706 * Make it an MMIO/Zero page.
707 */
708 PGM_PAGE_SET_HCPHYS(pVM, pPage, pVM->pgm.s.HCPhysZeroPg);
709 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO);
710 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ZERO);
711 PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
712 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_ALL);
713
714 /* Flush its TLB entry. */
715 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
716
717 /*
718 * Do accounting for pgmR3PhysRamReset.
719 */
720 if (fDoAccounting)
721 {
722 PPGMPHYSHANDLER pHandler = pgmHandlerPhysicalLookup(pVM, GCPhysPage);
723 if (RT_LIKELY(pHandler))
724 {
725 Assert(pHandler->cAliasedPages > 0);
726 pHandler->cAliasedPages--;
727 }
728 else
729 AssertFailed();
730 }
731
732 /*
733 * Tell NEM about the protection change.
734 */
735 if (VM_IS_NEM_ENABLED(pVM))
736 {
737 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
738 NEMHCNotifyPhysPageChanged(pVM, GCPhysPage, HCPhysPrev, pVM->pgm.s.HCPhysZeroPg,
739 NEM_PAGE_PROT_NONE, PGMPAGETYPE_MMIO, &u2State);
740 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
741 }
742}
743
744
745/**
746 * Resets ram range flags.
747 *
748 * @returns VBox status code.
749 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
750 * @param pVM The cross context VM structure.
751 * @param pCur The physical handler.
752 *
753 * @remark We don't start messing with the shadow page tables, as we've
754 * already got code in Trap0e which deals with out of sync handler
755 * flags (originally conceived for global pages).
756 */
757static void pgmHandlerPhysicalResetRamFlags(PVMCC pVM, PPGMPHYSHANDLER pCur)
758{
759 /*
760 * Iterate the guest ram pages updating the state.
761 */
762 RTUINT cPages = pCur->cPages;
763 RTGCPHYS GCPhys = pCur->Core.Key;
764 PPGMRAMRANGE pRamHint = NULL;
765 for (;;)
766 {
767 PPGMPAGE pPage;
768 int rc = pgmPhysGetPageWithHintEx(pVM, GCPhys, &pPage, &pRamHint);
769 if (RT_SUCCESS(rc))
770 {
771 /* Reset aliased MMIO pages to MMIO, since this aliasing is our business.
772 (We don't flip MMIO to RAM though, that's PGMPhys.cpp's job.) */
773 bool fNemNotifiedAlready = false;
774 if ( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
775 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO)
776 {
777 Assert(pCur->cAliasedPages > 0);
778 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhys, false /*fDoAccounting*/);
779 pCur->cAliasedPages--;
780 fNemNotifiedAlready = true;
781 }
782#ifdef VBOX_STRICT
783 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
784 AssertMsg(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO || PGM_PAGE_IS_MMIO(pPage), ("%RGp %R[pgmpage]\n", GCPhys, pPage));
785#endif
786 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_NONE);
787
788 /* Tell NEM about the protection change. */
789 if (VM_IS_NEM_ENABLED(pVM) && !fNemNotifiedAlready)
790 {
791 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
792 PGMPAGETYPE enmType = (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage);
793 NEMHCNotifyPhysPageProtChanged(pVM, GCPhys, PGM_PAGE_GET_HCPHYS(pPage),
794 pgmPhysPageCalcNemProtection(pPage, enmType), enmType, &u2State);
795 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
796 }
797 }
798 else
799 AssertRC(rc);
800
801 /* next */
802 if (--cPages == 0)
803 break;
804 GCPhys += PAGE_SIZE;
805 }
806
807 pCur->cAliasedPages = 0;
808 pCur->cTmpOffPages = 0;
809
810 /*
811 * Check for partial start and end pages.
812 */
813 if (pCur->Core.Key & PAGE_OFFSET_MASK)
814 pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.Key - 1, false /* fAbove */, &pRamHint);
815 if ((pCur->Core.KeyLast & PAGE_OFFSET_MASK) != PAGE_OFFSET_MASK)
816 pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.KeyLast + 1, true /* fAbove */, &pRamHint);
817}
818
819
820/**
821 * Modify a physical page access handler.
822 *
823 * Modification can only be done to the range it self, not the type or anything else.
824 *
825 * @returns VBox status code.
826 * For all return codes other than VERR_PGM_HANDLER_NOT_FOUND and VINF_SUCCESS the range is deregistered
827 * and a new registration must be performed!
828 * @param pVM The cross context VM structure.
829 * @param GCPhysCurrent Current location.
830 * @param GCPhys New location.
831 * @param GCPhysLast New last location.
832 */
833VMMDECL(int) PGMHandlerPhysicalModify(PVMCC pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
834{
835 /*
836 * Remove it.
837 */
838 int rc;
839 PGM_LOCK_VOID(pVM);
840 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhysCurrent);
841 if (pCur)
842 {
843 /*
844 * Clear the ram flags. (We're gonna move or free it!)
845 */
846 pgmHandlerPhysicalResetRamFlags(pVM, pCur);
847 PPGMPHYSHANDLERTYPEINT const pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
848 bool const fRestoreAsRAM = pCurType->pfnHandlerR3 /** @todo this isn't entirely correct. */
849 && pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO;
850
851 /*
852 * Validate the new range, modify and reinsert.
853 */
854 if (GCPhysLast >= GCPhys)
855 {
856 /*
857 * We require the range to be within registered ram.
858 * There is no apparent need to support ranges which cover more than one ram range.
859 */
860 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
861 if ( pRam
862 && GCPhys <= pRam->GCPhysLast
863 && GCPhysLast >= pRam->GCPhys)
864 {
865 pCur->Core.Key = GCPhys;
866 pCur->Core.KeyLast = GCPhysLast;
867 pCur->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + 1) >> PAGE_SHIFT;
868
869 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pCur->Core))
870 {
871 RTGCPHYS const cb = GCPhysLast - GCPhys + 1;
872 PGMPHYSHANDLERKIND const enmKind = pCurType->enmKind;
873
874 /*
875 * Set ram flags, flush shadow PT entries and finally tell REM about this.
876 */
877 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
878
879 /** @todo NEM: not sure we need this notification... */
880 NEMHCNotifyHandlerPhysicalModify(pVM, enmKind, GCPhysCurrent, GCPhys, cb, fRestoreAsRAM);
881
882 PGM_UNLOCK(pVM);
883
884 PGM_INVL_ALL_VCPU_TLBS(pVM);
885 Log(("PGMHandlerPhysicalModify: GCPhysCurrent=%RGp -> GCPhys=%RGp GCPhysLast=%RGp\n",
886 GCPhysCurrent, GCPhys, GCPhysLast));
887 return VINF_SUCCESS;
888 }
889
890 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp\n", GCPhys, GCPhysLast));
891 rc = VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
892 }
893 else
894 {
895 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
896 rc = VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
897 }
898 }
899 else
900 {
901 AssertMsgFailed(("Invalid range %RGp-%RGp\n", GCPhys, GCPhysLast));
902 rc = VERR_INVALID_PARAMETER;
903 }
904
905 /*
906 * Invalid new location, flush the cache and free it.
907 * We've only gotta notify REM and free the memory.
908 */
909 pgmHandlerPhysicalDeregisterNotifyREMAndNEM(pVM, pCur, -1);
910 pVM->pgm.s.pLastPhysHandlerR0 = 0;
911 pVM->pgm.s.pLastPhysHandlerR3 = 0;
912 PGMHandlerPhysicalTypeRelease(pVM, pCur->hType);
913 MMHyperFree(pVM, pCur);
914 }
915 else
916 {
917 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhysCurrent));
918 rc = VERR_PGM_HANDLER_NOT_FOUND;
919 }
920
921 PGM_UNLOCK(pVM);
922 return rc;
923}
924
925
926/**
927 * Changes the user callback arguments associated with a physical access handler.
928 *
929 * @returns VBox status code.
930 * @param pVM The cross context VM structure.
931 * @param GCPhys Start physical address of the handler.
932 * @param pvUserR3 User argument to the R3 handler.
933 * @param pvUserR0 User argument to the R0 handler.
934 */
935VMMDECL(int) PGMHandlerPhysicalChangeUserArgs(PVMCC pVM, RTGCPHYS GCPhys, RTR3PTR pvUserR3, RTR0PTR pvUserR0)
936{
937 /*
938 * Find the handler.
939 */
940 int rc = VINF_SUCCESS;
941 PGM_LOCK_VOID(pVM);
942 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
943 if (pCur)
944 {
945 /*
946 * Change arguments.
947 */
948 pCur->pvUserR3 = pvUserR3;
949 pCur->pvUserR0 = pvUserR0;
950 }
951 else
952 {
953 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
954 rc = VERR_PGM_HANDLER_NOT_FOUND;
955 }
956
957 PGM_UNLOCK(pVM);
958 return rc;
959}
960
961
962/**
963 * Splits a physical access handler in two.
964 *
965 * @returns VBox status code.
966 * @param pVM The cross context VM structure.
967 * @param GCPhys Start physical address of the handler.
968 * @param GCPhysSplit The split address.
969 */
970VMMDECL(int) PGMHandlerPhysicalSplit(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit)
971{
972 AssertReturn(GCPhys < GCPhysSplit, VERR_INVALID_PARAMETER);
973
974 /*
975 * Do the allocation without owning the lock.
976 */
977 PPGMPHYSHANDLER pNew;
978 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
979 if (RT_FAILURE(rc))
980 return rc;
981
982 /*
983 * Get the handler.
984 */
985 PGM_LOCK_VOID(pVM);
986 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
987 if (RT_LIKELY(pCur))
988 {
989 if (RT_LIKELY(GCPhysSplit <= pCur->Core.KeyLast))
990 {
991 /*
992 * Create new handler node for the 2nd half.
993 */
994 *pNew = *pCur;
995 pNew->Core.Key = GCPhysSplit;
996 pNew->cPages = (pNew->Core.KeyLast - (pNew->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
997
998 pCur->Core.KeyLast = GCPhysSplit - 1;
999 pCur->cPages = (pCur->Core.KeyLast - (pCur->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
1000
1001 if (RT_LIKELY(RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core)))
1002 {
1003 LogFlow(("PGMHandlerPhysicalSplit: %RGp-%RGp and %RGp-%RGp\n",
1004 pCur->Core.Key, pCur->Core.KeyLast, pNew->Core.Key, pNew->Core.KeyLast));
1005 PGM_UNLOCK(pVM);
1006 return VINF_SUCCESS;
1007 }
1008 AssertMsgFailed(("whu?\n"));
1009 rc = VERR_PGM_PHYS_HANDLER_IPE;
1010 }
1011 else
1012 {
1013 AssertMsgFailed(("outside range: %RGp-%RGp split %RGp\n", pCur->Core.Key, pCur->Core.KeyLast, GCPhysSplit));
1014 rc = VERR_INVALID_PARAMETER;
1015 }
1016 }
1017 else
1018 {
1019 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
1020 rc = VERR_PGM_HANDLER_NOT_FOUND;
1021 }
1022 PGM_UNLOCK(pVM);
1023 MMHyperFree(pVM, pNew);
1024 return rc;
1025}
1026
1027
1028/**
1029 * Joins up two adjacent physical access handlers which has the same callbacks.
1030 *
1031 * @returns VBox status code.
1032 * @param pVM The cross context VM structure.
1033 * @param GCPhys1 Start physical address of the first handler.
1034 * @param GCPhys2 Start physical address of the second handler.
1035 */
1036VMMDECL(int) PGMHandlerPhysicalJoin(PVMCC pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2)
1037{
1038 /*
1039 * Get the handlers.
1040 */
1041 int rc;
1042 PGM_LOCK_VOID(pVM);
1043 PPGMPHYSHANDLER pCur1 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys1);
1044 if (RT_LIKELY(pCur1))
1045 {
1046 PPGMPHYSHANDLER pCur2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
1047 if (RT_LIKELY(pCur2))
1048 {
1049 /*
1050 * Make sure that they are adjacent, and that they've got the same callbacks.
1051 */
1052 if (RT_LIKELY(pCur1->Core.KeyLast + 1 == pCur2->Core.Key))
1053 {
1054 if (RT_LIKELY(pCur1->hType == pCur2->hType))
1055 {
1056 PPGMPHYSHANDLER pCur3 = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
1057 if (RT_LIKELY(pCur3 == pCur2))
1058 {
1059 pCur1->Core.KeyLast = pCur2->Core.KeyLast;
1060 pCur1->cPages = (pCur1->Core.KeyLast - (pCur1->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
1061 LogFlow(("PGMHandlerPhysicalJoin: %RGp-%RGp %RGp-%RGp\n",
1062 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
1063 pVM->pgm.s.pLastPhysHandlerR0 = 0;
1064 pVM->pgm.s.pLastPhysHandlerR3 = 0;
1065 PGMHandlerPhysicalTypeRelease(pVM, pCur2->hType);
1066 MMHyperFree(pVM, pCur2);
1067 PGM_UNLOCK(pVM);
1068 return VINF_SUCCESS;
1069 }
1070
1071 Assert(pCur3 == pCur2);
1072 rc = VERR_PGM_PHYS_HANDLER_IPE;
1073 }
1074 else
1075 {
1076 AssertMsgFailed(("mismatching handlers\n"));
1077 rc = VERR_ACCESS_DENIED;
1078 }
1079 }
1080 else
1081 {
1082 AssertMsgFailed(("not adjacent: %RGp-%RGp %RGp-%RGp\n",
1083 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
1084 rc = VERR_INVALID_PARAMETER;
1085 }
1086 }
1087 else
1088 {
1089 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys2));
1090 rc = VERR_PGM_HANDLER_NOT_FOUND;
1091 }
1092 }
1093 else
1094 {
1095 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys1));
1096 rc = VERR_PGM_HANDLER_NOT_FOUND;
1097 }
1098 PGM_UNLOCK(pVM);
1099 return rc;
1100
1101}
1102
1103
1104/**
1105 * Resets any modifications to individual pages in a physical page access
1106 * handler region.
1107 *
1108 * This is used in pair with PGMHandlerPhysicalPageTempOff(),
1109 * PGMHandlerPhysicalPageAliasMmio2() or PGMHandlerPhysicalPageAliasHC().
1110 *
1111 * @returns VBox status code.
1112 * @param pVM The cross context VM structure.
1113 * @param GCPhys The start address of the handler regions, i.e. what you
1114 * passed to PGMR3HandlerPhysicalRegister(),
1115 * PGMHandlerPhysicalRegisterEx() or
1116 * PGMHandlerPhysicalModify().
1117 */
1118VMMDECL(int) PGMHandlerPhysicalReset(PVMCC pVM, RTGCPHYS GCPhys)
1119{
1120 LogFlow(("PGMHandlerPhysicalReset GCPhys=%RGp\n", GCPhys));
1121 PGM_LOCK_VOID(pVM);
1122
1123 /*
1124 * Find the handler.
1125 */
1126 int rc;
1127 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1128 if (RT_LIKELY(pCur))
1129 {
1130 /*
1131 * Validate kind.
1132 */
1133 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1134 switch (pCurType->enmKind)
1135 {
1136 case PGMPHYSHANDLERKIND_WRITE:
1137 case PGMPHYSHANDLERKIND_ALL:
1138 case PGMPHYSHANDLERKIND_MMIO: /* NOTE: Only use when clearing MMIO ranges with aliased MMIO2 pages! */
1139 {
1140 STAM_COUNTER_INC(&pVM->pgm.s.Stats.CTX_MID_Z(Stat,PhysHandlerReset)); /** @todo move out of switch */
1141 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
1142 Assert(pRam);
1143 Assert(pRam->GCPhys <= pCur->Core.Key);
1144 Assert(pRam->GCPhysLast >= pCur->Core.KeyLast);
1145
1146 if (pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO)
1147 {
1148 /*
1149 * Reset all the PGMPAGETYPE_MMIO2_ALIAS_MMIO pages first and that's it.
1150 * This could probably be optimized a bit wrt to flushing, but I'm too lazy
1151 * to do that now...
1152 */
1153 if (pCur->cAliasedPages)
1154 {
1155 PPGMPAGE pPage = &pRam->aPages[(pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT];
1156 uint32_t cLeft = pCur->cPages;
1157 while (cLeft-- > 0)
1158 {
1159 if ( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
1160 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO)
1161 {
1162 Assert(pCur->cAliasedPages > 0);
1163 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)cLeft << PAGE_SHIFT),
1164 false /*fDoAccounting*/);
1165 --pCur->cAliasedPages;
1166#ifndef VBOX_STRICT
1167 if (pCur->cAliasedPages == 0)
1168 break;
1169#endif
1170 }
1171 Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO);
1172 pPage++;
1173 }
1174 Assert(pCur->cAliasedPages == 0);
1175 }
1176 }
1177 else if (pCur->cTmpOffPages > 0)
1178 {
1179 /*
1180 * Set the flags and flush shadow PT entries.
1181 */
1182 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
1183 }
1184
1185 pCur->cAliasedPages = 0;
1186 pCur->cTmpOffPages = 0;
1187
1188 rc = VINF_SUCCESS;
1189 break;
1190 }
1191
1192 /*
1193 * Invalid.
1194 */
1195 default:
1196 AssertMsgFailed(("Invalid type %d! Corruption!\n", pCurType->enmKind));
1197 rc = VERR_PGM_PHYS_HANDLER_IPE;
1198 break;
1199 }
1200 }
1201 else
1202 {
1203 AssertMsgFailed(("Didn't find MMIO Range starting at %#x\n", GCPhys));
1204 rc = VERR_PGM_HANDLER_NOT_FOUND;
1205 }
1206
1207 PGM_UNLOCK(pVM);
1208 return rc;
1209}
1210
1211
1212/**
1213 * Temporarily turns off the access monitoring of a page within a monitored
1214 * physical write/all page access handler region.
1215 *
1216 * Use this when no further \#PFs are required for that page. Be aware that
1217 * a page directory sync might reset the flags, and turn on access monitoring
1218 * for the page.
1219 *
1220 * The caller must do required page table modifications.
1221 *
1222 * @returns VBox status code.
1223 * @param pVM The cross context VM structure.
1224 * @param GCPhys The start address of the access handler. This
1225 * must be a fully page aligned range or we risk
1226 * messing up other handlers installed for the
1227 * start and end pages.
1228 * @param GCPhysPage The physical address of the page to turn off
1229 * access monitoring for.
1230 */
1231VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)
1232{
1233 LogFlow(("PGMHandlerPhysicalPageTempOff GCPhysPage=%RGp\n", GCPhysPage));
1234 PGM_LOCK_VOID(pVM);
1235
1236 /*
1237 * Validate the range.
1238 */
1239 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1240 if (RT_LIKELY(pCur))
1241 {
1242 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1243 && GCPhysPage <= pCur->Core.KeyLast))
1244 {
1245 Assert(!(pCur->Core.Key & PAGE_OFFSET_MASK));
1246 Assert((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
1247
1248 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1249 AssertReturnStmt( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE
1250 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL,
1251 PGM_UNLOCK(pVM), VERR_ACCESS_DENIED);
1252
1253 /*
1254 * Change the page status.
1255 */
1256 PPGMPAGE pPage;
1257 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
1258 AssertReturnStmt(RT_SUCCESS_NP(rc), PGM_UNLOCK(pVM), rc);
1259 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
1260 {
1261 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1262 pCur->cTmpOffPages++;
1263
1264 /* Tell NEM about the protection change (VGA is using this to track dirty pages). */
1265 if (VM_IS_NEM_ENABLED(pVM))
1266 {
1267 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
1268 PGMPAGETYPE enmType = (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage);
1269 NEMHCNotifyPhysPageProtChanged(pVM, GCPhysPage, PGM_PAGE_GET_HCPHYS(pPage),
1270 pgmPhysPageCalcNemProtection(pPage, enmType), enmType, &u2State);
1271 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
1272 }
1273 }
1274 PGM_UNLOCK(pVM);
1275 return VINF_SUCCESS;
1276 }
1277 PGM_UNLOCK(pVM);
1278 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1279 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1280 return VERR_INVALID_PARAMETER;
1281 }
1282 PGM_UNLOCK(pVM);
1283 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1284 return VERR_PGM_HANDLER_NOT_FOUND;
1285}
1286
1287
1288/**
1289 * Resolves an MMIO2 page.
1290 *
1291 * Caller as taken the PGM lock.
1292 *
1293 * @returns Pointer to the page if valid, NULL otherwise
1294 * @param pVM The cross context VM structure.
1295 * @param pDevIns The device owning it.
1296 * @param hMmio2 The MMIO2 region.
1297 * @param offMmio2Page The offset into the region.
1298 */
1299static PPGMPAGE pgmPhysResolveMmio2PageLocked(PVMCC pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS offMmio2Page)
1300{
1301 /* Only works if the handle is in the handle table! */
1302 AssertReturn(hMmio2 != 0, NULL);
1303 hMmio2--;
1304
1305 /* Must check the first one for PGMREGMMIO2RANGE_F_FIRST_CHUNK. */
1306 AssertReturn(hMmio2 < RT_ELEMENTS(pVM->pgm.s.apMmio2RangesR3), NULL);
1307 PPGMREGMMIO2RANGE pCur = pVM->pgm.s.CTX_SUFF(apMmio2Ranges)[hMmio2];
1308 AssertReturn(pCur, NULL);
1309 AssertReturn(pCur->fFlags & PGMREGMMIO2RANGE_F_FIRST_CHUNK, NULL);
1310
1311 /* Loop thru the sub-ranges till we find the one covering offMmio2. */
1312 for (;;)
1313 {
1314 AssertReturn(pCur->fFlags & PGMREGMMIO2RANGE_F_MMIO2, NULL);
1315#ifdef IN_RING3
1316 AssertReturn(pCur->pDevInsR3 == pDevIns, NULL);
1317#else
1318 AssertReturn(pCur->pDevInsR3 == pDevIns->pDevInsForR3, NULL);
1319#endif
1320
1321 /* Does it match the offset? */
1322 if (offMmio2Page < pCur->cbReal)
1323 return &pCur->RamRange.aPages[offMmio2Page >> PAGE_SHIFT];
1324
1325 /* Advance if we can. */
1326 AssertReturn(!(pCur->fFlags & PGMREGMMIO2RANGE_F_LAST_CHUNK), NULL);
1327 offMmio2Page -= pCur->cbReal;
1328 hMmio2++;
1329 AssertReturn(hMmio2 < RT_ELEMENTS(pVM->pgm.s.apMmio2RangesR3), NULL);
1330 pCur = pVM->pgm.s.CTX_SUFF(apMmio2Ranges)[hMmio2];
1331 AssertReturn(pCur, NULL);
1332 }
1333}
1334
1335
1336/**
1337 * Replaces an MMIO page with an MMIO2 page.
1338 *
1339 * This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
1340 * PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
1341 * backing, the caller must provide a replacement page. For various reasons the
1342 * replacement page must be an MMIO2 page.
1343 *
1344 * The caller must do required page table modifications. You can get away
1345 * without making any modifications since it's an MMIO page, the cost is an extra
1346 * \#PF which will the resync the page.
1347 *
1348 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
1349 *
1350 * The caller may still get handler callback even after this call and must be
1351 * able to deal correctly with such calls. The reason for these callbacks are
1352 * either that we're executing in the recompiler (which doesn't know about this
1353 * arrangement) or that we've been restored from saved state (where we won't
1354 * save the change).
1355 *
1356 * @returns VBox status code.
1357 * @param pVM The cross context VM structure.
1358 * @param GCPhys The start address of the access handler. This
1359 * must be a fully page aligned range or we risk
1360 * messing up other handlers installed for the
1361 * start and end pages.
1362 * @param GCPhysPage The physical address of the page to turn off
1363 * access monitoring for and replace with the MMIO2
1364 * page.
1365 * @param pDevIns The device instance owning @a hMmio2.
1366 * @param hMmio2 Handle to the MMIO2 region containing the page
1367 * to remap in the the MMIO page at @a GCPhys.
1368 * @param offMmio2PageRemap The offset into @a hMmio2 of the MMIO2 page that
1369 * should serve as backing memory.
1370 *
1371 * @remark May cause a page pool flush if used on a page that is already
1372 * aliased.
1373 *
1374 * @note This trick does only work reliably if the two pages are never ever
1375 * mapped in the same page table. If they are the page pool code will
1376 * be confused should either of them be flushed. See the special case
1377 * of zero page aliasing mentioned in #3170.
1378 *
1379 */
1380VMMDECL(int) PGMHandlerPhysicalPageAliasMmio2(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage,
1381 PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS offMmio2PageRemap)
1382{
1383 PGM_LOCK_VOID(pVM);
1384
1385 /*
1386 * Resolve the MMIO2 reference.
1387 */
1388 PPGMPAGE pPageRemap = pgmPhysResolveMmio2PageLocked(pVM, pDevIns, hMmio2, offMmio2PageRemap);
1389 if (RT_LIKELY(pPageRemap))
1390 AssertMsgReturnStmt(PGM_PAGE_GET_TYPE(pPageRemap) == PGMPAGETYPE_MMIO2,
1391 ("hMmio2=%RU64 offMmio2PageRemap=%RGp %R[pgmpage]\n", hMmio2, offMmio2PageRemap, pPageRemap),
1392 PGM_UNLOCK(pVM), VERR_PGM_PHYS_NOT_MMIO2);
1393 else
1394 {
1395 PGM_UNLOCK(pVM);
1396 return VERR_OUT_OF_RANGE;
1397 }
1398
1399 /*
1400 * Lookup and validate the range.
1401 */
1402 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1403 if (RT_LIKELY(pCur))
1404 {
1405 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1406 && GCPhysPage <= pCur->Core.KeyLast))
1407 {
1408 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1409 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, PGM_UNLOCK(pVM), VERR_ACCESS_DENIED);
1410 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), PGM_UNLOCK(pVM), VERR_INVALID_PARAMETER);
1411 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, PGM_UNLOCK(pVM), VERR_INVALID_PARAMETER);
1412
1413 /*
1414 * Validate the page.
1415 */
1416 PPGMPAGE pPage;
1417 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
1418 AssertReturnStmt(RT_SUCCESS_NP(rc), PGM_UNLOCK(pVM), rc);
1419 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1420 {
1421 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1422 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1423 VERR_PGM_PHYS_NOT_MMIO2);
1424 if (PGM_PAGE_GET_HCPHYS(pPage) == PGM_PAGE_GET_HCPHYS(pPageRemap))
1425 {
1426 PGM_UNLOCK(pVM);
1427 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1428 }
1429
1430 /*
1431 * The page is already mapped as some other page, reset it
1432 * to an MMIO/ZERO page before doing the new mapping.
1433 */
1434 Log(("PGMHandlerPhysicalPageAliasMmio2: GCPhysPage=%RGp (%R[pgmpage]; %RHp -> %RHp\n",
1435 GCPhysPage, pPage, PGM_PAGE_GET_HCPHYS(pPage), PGM_PAGE_GET_HCPHYS(pPageRemap)));
1436 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage, false /*fDoAccounting*/);
1437 pCur->cAliasedPages--;
1438 }
1439 Assert(PGM_PAGE_IS_ZERO(pPage));
1440
1441 /*
1442 * Do the actual remapping here.
1443 * This page now serves as an alias for the backing memory specified.
1444 */
1445 LogFlow(("PGMHandlerPhysicalPageAliasMmio2: %RGp (%R[pgmpage]) alias for %RU64/%RGp (%R[pgmpage])\n",
1446 GCPhysPage, pPage, hMmio2, offMmio2PageRemap, pPageRemap ));
1447 PGM_PAGE_SET_HCPHYS(pVM, pPage, PGM_PAGE_GET_HCPHYS(pPageRemap));
1448 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1449 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
1450 PGM_PAGE_SET_PAGEID(pVM, pPage, PGM_PAGE_GET_PAGEID(pPageRemap));
1451 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1452 pCur->cAliasedPages++;
1453 Assert(pCur->cAliasedPages <= pCur->cPages);
1454
1455 /* Flush its TLB entry. */
1456 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1457
1458 /* Tell NEM about the backing and protection change. */
1459 if (VM_IS_NEM_ENABLED(pVM))
1460 {
1461 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
1462 NEMHCNotifyPhysPageChanged(pVM, GCPhysPage, pVM->pgm.s.HCPhysZeroPg, PGM_PAGE_GET_HCPHYS(pPage),
1463 pgmPhysPageCalcNemProtection(pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO),
1464 PGMPAGETYPE_MMIO2_ALIAS_MMIO, &u2State);
1465 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
1466 }
1467 LogFlow(("PGMHandlerPhysicalPageAliasMmio2: => %R[pgmpage]\n", pPage));
1468 PGM_UNLOCK(pVM);
1469 return VINF_SUCCESS;
1470 }
1471
1472 PGM_UNLOCK(pVM);
1473 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1474 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1475 return VERR_INVALID_PARAMETER;
1476 }
1477
1478 PGM_UNLOCK(pVM);
1479 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1480 return VERR_PGM_HANDLER_NOT_FOUND;
1481}
1482
1483
1484/**
1485 * Replaces an MMIO page with an arbitrary HC page in the shadow page tables.
1486 *
1487 * This differs from PGMHandlerPhysicalPageAliasMmio2 in that the page doesn't
1488 * need to be a known MMIO2 page and that only shadow paging may access the
1489 * page. The latter distinction is important because the only use for this
1490 * feature is for mapping the special APIC access page that VT-x uses to detect
1491 * APIC MMIO operations, the page is shared between all guest CPUs and actually
1492 * not written to. At least at the moment.
1493 *
1494 * The caller must do required page table modifications. You can get away
1495 * without making any modifications since it's an MMIO page, the cost is an extra
1496 * \#PF which will the resync the page.
1497 *
1498 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
1499 *
1500 *
1501 * @returns VBox status code.
1502 * @param pVM The cross context VM structure.
1503 * @param GCPhys The start address of the access handler. This
1504 * must be a fully page aligned range or we risk
1505 * messing up other handlers installed for the
1506 * start and end pages.
1507 * @param GCPhysPage The physical address of the page to turn off
1508 * access monitoring for.
1509 * @param HCPhysPageRemap The physical address of the HC page that
1510 * serves as backing memory.
1511 *
1512 * @remark May cause a page pool flush if used on a page that is already
1513 * aliased.
1514 */
1515VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap)
1516{
1517/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
1518 PGM_LOCK_VOID(pVM);
1519
1520 /*
1521 * Lookup and validate the range.
1522 */
1523 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1524 if (RT_LIKELY(pCur))
1525 {
1526 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1527 && GCPhysPage <= pCur->Core.KeyLast))
1528 {
1529 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1530 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, PGM_UNLOCK(pVM), VERR_ACCESS_DENIED);
1531 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), PGM_UNLOCK(pVM), VERR_INVALID_PARAMETER);
1532 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, PGM_UNLOCK(pVM), VERR_INVALID_PARAMETER);
1533
1534 /*
1535 * Get and validate the pages.
1536 */
1537 PPGMPAGE pPage;
1538 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
1539 AssertReturnStmt(RT_SUCCESS_NP(rc), PGM_UNLOCK(pVM), rc);
1540 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1541 {
1542 PGM_UNLOCK(pVM);
1543 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO,
1544 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1545 VERR_PGM_PHYS_NOT_MMIO2);
1546 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1547 }
1548 Assert(PGM_PAGE_IS_ZERO(pPage));
1549
1550 /*
1551 * Do the actual remapping here.
1552 * This page now serves as an alias for the backing memory
1553 * specified as far as shadow paging is concerned.
1554 */
1555 LogFlow(("PGMHandlerPhysicalPageAliasHC: %RGp (%R[pgmpage]) alias for %RHp\n",
1556 GCPhysPage, pPage, HCPhysPageRemap));
1557 PGM_PAGE_SET_HCPHYS(pVM, pPage, HCPhysPageRemap);
1558 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_SPECIAL_ALIAS_MMIO);
1559 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
1560 PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
1561 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1562 pCur->cAliasedPages++;
1563 Assert(pCur->cAliasedPages <= pCur->cPages);
1564
1565 /* Flush its TLB entry. */
1566 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1567
1568 /* Tell NEM about the backing and protection change. */
1569 if (VM_IS_NEM_ENABLED(pVM))
1570 {
1571 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
1572 NEMHCNotifyPhysPageChanged(pVM, GCPhysPage, pVM->pgm.s.HCPhysZeroPg, PGM_PAGE_GET_HCPHYS(pPage),
1573 pgmPhysPageCalcNemProtection(pPage, PGMPAGETYPE_SPECIAL_ALIAS_MMIO),
1574 PGMPAGETYPE_SPECIAL_ALIAS_MMIO, &u2State);
1575 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
1576 }
1577 LogFlow(("PGMHandlerPhysicalPageAliasHC: => %R[pgmpage]\n", pPage));
1578 PGM_UNLOCK(pVM);
1579 return VINF_SUCCESS;
1580 }
1581 PGM_UNLOCK(pVM);
1582 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1583 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1584 return VERR_INVALID_PARAMETER;
1585 }
1586 PGM_UNLOCK(pVM);
1587
1588 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1589 return VERR_PGM_HANDLER_NOT_FOUND;
1590}
1591
1592
1593/**
1594 * Checks if a physical range is handled
1595 *
1596 * @returns boolean
1597 * @param pVM The cross context VM structure.
1598 * @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister().
1599 * @remarks Caller must take the PGM lock...
1600 * @thread EMT.
1601 */
1602VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVMCC pVM, RTGCPHYS GCPhys)
1603{
1604 /*
1605 * Find the handler.
1606 */
1607 PGM_LOCK_VOID(pVM);
1608 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1609 if (pCur)
1610 {
1611#ifdef VBOX_STRICT
1612 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1613 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1614 Assert( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE
1615 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL
1616 || pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO);
1617#endif
1618 PGM_UNLOCK(pVM);
1619 return true;
1620 }
1621 PGM_UNLOCK(pVM);
1622 return false;
1623}
1624
1625
1626/**
1627 * Checks if it's an disabled all access handler or write access handler at the
1628 * given address.
1629 *
1630 * @returns true if it's an all access handler, false if it's a write access
1631 * handler.
1632 * @param pVM The cross context VM structure.
1633 * @param GCPhys The address of the page with a disabled handler.
1634 *
1635 * @remarks The caller, PGMR3PhysTlbGCPhys2Ptr, must hold the PGM lock.
1636 */
1637bool pgmHandlerPhysicalIsAll(PVMCC pVM, RTGCPHYS GCPhys)
1638{
1639 PGM_LOCK_VOID(pVM);
1640 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1641 if (!pCur)
1642 {
1643 PGM_UNLOCK(pVM);
1644 AssertFailed();
1645 return true;
1646 }
1647 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1648 Assert( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE
1649 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL
1650 || pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO); /* sanity */
1651 /* Only whole pages can be disabled. */
1652 Assert( pCur->Core.Key <= (GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK)
1653 && pCur->Core.KeyLast >= (GCPhys | PAGE_OFFSET_MASK));
1654
1655 bool bRet = pCurType->enmKind != PGMPHYSHANDLERKIND_WRITE;
1656 PGM_UNLOCK(pVM);
1657 return bRet;
1658}
1659
1660#ifdef VBOX_STRICT
1661
1662/**
1663 * State structure used by the PGMAssertHandlerAndFlagsInSync() function
1664 * and its AVL enumerators.
1665 */
1666typedef struct PGMAHAFIS
1667{
1668 /** The current physical address. */
1669 RTGCPHYS GCPhys;
1670 /** Number of errors. */
1671 unsigned cErrors;
1672 /** Pointer to the VM. */
1673 PVM pVM;
1674} PGMAHAFIS, *PPGMAHAFIS;
1675
1676
1677/**
1678 * Asserts that the handlers+guest-page-tables == ramrange-flags and
1679 * that the physical addresses associated with virtual handlers are correct.
1680 *
1681 * @returns Number of mismatches.
1682 * @param pVM The cross context VM structure.
1683 */
1684VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVMCC pVM)
1685{
1686 PPGM pPGM = &pVM->pgm.s;
1687 PGMAHAFIS State;
1688 State.GCPhys = 0;
1689 State.cErrors = 0;
1690 State.pVM = pVM;
1691
1692 PGM_LOCK_ASSERT_OWNER(pVM);
1693
1694 /*
1695 * Check the RAM flags against the handlers.
1696 */
1697 for (PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRangesX); pRam; pRam = pRam->CTX_SUFF(pNext))
1698 {
1699 const uint32_t cPages = pRam->cb >> PAGE_SHIFT;
1700 for (uint32_t iPage = 0; iPage < cPages; iPage++)
1701 {
1702 PGMPAGE const *pPage = &pRam->aPages[iPage];
1703 if (PGM_PAGE_HAS_ANY_HANDLERS(pPage))
1704 {
1705 State.GCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT);
1706
1707 /*
1708 * Physical first - calculate the state based on the handlers
1709 * active on the page, then compare.
1710 */
1711 if (PGM_PAGE_HAS_ANY_PHYSICAL_HANDLERS(pPage))
1712 {
1713 /* the first */
1714 PPGMPHYSHANDLER pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys);
1715 if (!pPhys)
1716 {
1717 pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys, true);
1718 if ( pPhys
1719 && pPhys->Core.Key > (State.GCPhys + PAGE_SIZE - 1))
1720 pPhys = NULL;
1721 Assert(!pPhys || pPhys->Core.Key >= State.GCPhys);
1722 }
1723 if (pPhys)
1724 {
1725 PPGMPHYSHANDLERTYPEINT pPhysType = (PPGMPHYSHANDLERTYPEINT)MMHyperHeapOffsetToPtr(pVM, pPhys->hType);
1726 unsigned uState = pPhysType->uState;
1727
1728 /* more? */
1729 while (pPhys->Core.KeyLast < (State.GCPhys | PAGE_OFFSET_MASK))
1730 {
1731 PPGMPHYSHANDLER pPhys2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers,
1732 pPhys->Core.KeyLast + 1, true);
1733 if ( !pPhys2
1734 || pPhys2->Core.Key > (State.GCPhys | PAGE_OFFSET_MASK))
1735 break;
1736 PPGMPHYSHANDLERTYPEINT pPhysType2 = (PPGMPHYSHANDLERTYPEINT)MMHyperHeapOffsetToPtr(pVM, pPhys2->hType);
1737 uState = RT_MAX(uState, pPhysType2->uState);
1738 pPhys = pPhys2;
1739 }
1740
1741 /* compare.*/
1742 if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != uState
1743 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
1744 {
1745 AssertMsgFailed(("ram range vs phys handler flags mismatch. GCPhys=%RGp state=%d expected=%d %s\n",
1746 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), uState, pPhysType->pszDesc));
1747 State.cErrors++;
1748 }
1749 }
1750 else
1751 {
1752 AssertMsgFailed(("ram range vs phys handler mismatch. no handler for GCPhys=%RGp\n", State.GCPhys));
1753 State.cErrors++;
1754 }
1755 }
1756 }
1757 } /* foreach page in ram range. */
1758 } /* foreach ram range. */
1759
1760 /*
1761 * Do the reverse check for physical handlers.
1762 */
1763 /** @todo */
1764
1765 return State.cErrors;
1766}
1767
1768#endif /* VBOX_STRICT */
1769
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