VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp@ 92561

Last change on this file since 92561 was 92162, checked in by vboxsync, 3 years ago

VMM/PGM,DevVGA: Baked MMIO2 dirty page tracking into PGM, moving it out of DevVGA. Using the handler state to record a page as dirty (PGM_PAGE_HNDL_PHYS_STATE_DISABLED). bugref:10122
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1/* $Id: PGMAllHandler.cpp 92162 2021-10-31 23:34:31Z vboxsync $ */
2/** @file
3 * PGM - Page Manager / Monitor, Access Handlers.
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_PGM
23#define VBOX_WITHOUT_PAGING_BIT_FIELDS /* 64-bit bitfields are just asking for trouble. See @bugref{9841} and others. */
24#include <VBox/vmm/dbgf.h>
25#include <VBox/vmm/pgm.h>
26#include <VBox/vmm/iom.h>
27#include <VBox/vmm/mm.h>
28#include <VBox/vmm/em.h>
29#include <VBox/vmm/nem.h>
30#include <VBox/vmm/stam.h>
31#include <VBox/vmm/dbgf.h>
32#ifdef IN_RING0
33# include <VBox/vmm/pdmdev.h>
34#endif
35#include "PGMInternal.h"
36#include <VBox/vmm/vmcc.h>
37#include "PGMInline.h"
38
39#include <VBox/log.h>
40#include <iprt/assert.h>
41#include <iprt/asm-amd64-x86.h>
42#include <iprt/string.h>
43#include <VBox/param.h>
44#include <VBox/err.h>
45#include <VBox/vmm/selm.h>
46
47
48/*********************************************************************************************************************************
49* Internal Functions *
50*********************************************************************************************************************************/
51static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVMCC pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam,
52 void *pvBitmap, uint32_t offBitmap);
53static void pgmHandlerPhysicalDeregisterNotifyNEM(PVMCC pVM, PPGMPHYSHANDLER pCur);
54static void pgmHandlerPhysicalResetRamFlags(PVMCC pVM, PPGMPHYSHANDLER pCur);
55
56
57/**
58 * Internal worker for releasing a physical handler type registration reference.
59 *
60 * @returns New reference count. UINT32_MAX if invalid input (asserted).
61 * @param pVM The cross context VM structure.
62 * @param pType Pointer to the type registration.
63 */
64DECLINLINE(uint32_t) pgmHandlerPhysicalTypeRelease(PVMCC pVM, PPGMPHYSHANDLERTYPEINT pType)
65{
66 AssertMsgReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX);
67 uint32_t cRefs = ASMAtomicDecU32(&pType->cRefs);
68 if (cRefs == 0)
69 {
70 PGM_LOCK_VOID(pVM);
71 pType->u32Magic = PGMPHYSHANDLERTYPEINT_MAGIC_DEAD;
72 RTListOff32NodeRemove(&pType->ListNode);
73 PGM_UNLOCK(pVM);
74 MMHyperFree(pVM, pType);
75 }
76 return cRefs;
77}
78
79
80/**
81 * Internal worker for retaining a physical handler type registration reference.
82 *
83 * @returns New reference count. UINT32_MAX if invalid input (asserted).
84 * @param pVM The cross context VM structure.
85 * @param pType Pointer to the type registration.
86 */
87DECLINLINE(uint32_t) pgmHandlerPhysicalTypeRetain(PVM pVM, PPGMPHYSHANDLERTYPEINT pType)
88{
89 NOREF(pVM);
90 AssertMsgReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX);
91 uint32_t cRefs = ASMAtomicIncU32(&pType->cRefs);
92 Assert(cRefs < _1M && cRefs > 0);
93 return cRefs;
94}
95
96
97/**
98 * Releases a reference to a physical handler type registration.
99 *
100 * @returns New reference count. UINT32_MAX if invalid input (asserted).
101 * @param pVM The cross context VM structure.
102 * @param hType The type regiration handle.
103 */
104VMMDECL(uint32_t) PGMHandlerPhysicalTypeRelease(PVMCC pVM, PGMPHYSHANDLERTYPE hType)
105{
106 if (hType != NIL_PGMPHYSHANDLERTYPE)
107 return pgmHandlerPhysicalTypeRelease(pVM, PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType));
108 return 0;
109}
110
111
112/**
113 * Retains a reference to a physical handler type registration.
114 *
115 * @returns New reference count. UINT32_MAX if invalid input (asserted).
116 * @param pVM The cross context VM structure.
117 * @param hType The type regiration handle.
118 */
119VMMDECL(uint32_t) PGMHandlerPhysicalTypeRetain(PVM pVM, PGMPHYSHANDLERTYPE hType)
120{
121 return pgmHandlerPhysicalTypeRetain(pVM, PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType));
122}
123
124
125/**
126 * Creates a physical access handler.
127 *
128 * @returns VBox status code.
129 * @retval VINF_SUCCESS when successfully installed.
130 * @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
131 * the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
132 * flagged together with a pool clearing.
133 * @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
134 * one. A debug assertion is raised.
135 *
136 * @param pVM The cross context VM structure.
137 * @param hType The handler type registration handle.
138 * @param pvUserR3 User argument to the R3 handler.
139 * @param pvUserR0 User argument to the R0 handler.
140 * @param pvUserRC User argument to the RC handler. This can be a value
141 * less that 0x10000 or a (non-null) pointer that is
142 * automatically relocated.
143 * @param pszDesc Description of this handler. If NULL, the type
144 * description will be used instead.
145 * @param ppPhysHandler Where to return the access handler structure on
146 * success.
147 */
148int pgmHandlerPhysicalExCreate(PVMCC pVM, PGMPHYSHANDLERTYPE hType, RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC,
149 R3PTRTYPE(const char *) pszDesc, PPGMPHYSHANDLER *ppPhysHandler)
150{
151 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType);
152 Log(("pgmHandlerPhysicalExCreate: pvUserR3=%RHv pvUserR0=%RHv pvUserGC=%RRv hType=%#x (%d, %s) pszDesc=%RHv:%s\n",
153 pvUserR3, pvUserR0, pvUserRC, hType, pType->enmKind, R3STRING(pType->pszDesc), pszDesc, R3STRING(pszDesc)));
154
155 /*
156 * Validate input.
157 */
158 AssertPtr(ppPhysHandler);
159 AssertReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, VERR_INVALID_HANDLE);
160#ifdef VBOX_WITH_RAW_MODE_KEEP
161 AssertMsgReturn( (RTRCUINTPTR)pvUserRC < 0x10000
162 || MMHyperR3ToRC(pVM, MMHyperRCToR3(pVM, pvUserRC)) == pvUserRC,
163 ("Not RC pointer! pvUserRC=%RRv\n", pvUserRC),
164 VERR_INVALID_PARAMETER);
165#else
166 RT_NOREF(pvUserRC);
167#endif
168#if 0 /* No longer valid. */
169 AssertMsgReturn( (RTR0UINTPTR)pvUserR0 < 0x10000
170 || MMHyperR3ToR0(pVM, MMHyperR0ToR3(pVM, pvUserR0)) == pvUserR0,
171 ("Not R0 pointer! pvUserR0=%RHv\n", pvUserR0),
172 VERR_INVALID_PARAMETER);
173#endif
174
175 /*
176 * Allocate and initialize the new entry.
177 */
178 PPGMPHYSHANDLER pNew;
179 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
180 if (RT_SUCCESS(rc))
181 {
182 pNew->Core.Key = NIL_RTGCPHYS;
183 pNew->Core.KeyLast = NIL_RTGCPHYS;
184 pNew->cPages = 0;
185 pNew->cAliasedPages = 0;
186 pNew->cTmpOffPages = 0;
187 pNew->pvUserR3 = pvUserR3;
188 pNew->pvUserR0 = pvUserR0;
189 pNew->hType = hType;
190 pNew->pszDesc = pszDesc != NIL_RTR3PTR ? pszDesc : pType->pszDesc;
191 pgmHandlerPhysicalTypeRetain(pVM, pType);
192 *ppPhysHandler = pNew;
193 return VINF_SUCCESS;
194 }
195
196 return rc;
197}
198
199
200/**
201 * Duplicates a physical access handler.
202 *
203 * @returns VBox status code.
204 * @retval VINF_SUCCESS when successfully installed.
205 *
206 * @param pVM The cross context VM structure.
207 * @param pPhysHandlerSrc The source handler to duplicate
208 * @param ppPhysHandler Where to return the access handler structure on
209 * success.
210 */
211int pgmHandlerPhysicalExDup(PVMCC pVM, PPGMPHYSHANDLER pPhysHandlerSrc, PPGMPHYSHANDLER *ppPhysHandler)
212{
213 return pgmHandlerPhysicalExCreate(pVM,
214 pPhysHandlerSrc->hType,
215 pPhysHandlerSrc->pvUserR3,
216 pPhysHandlerSrc->pvUserR0,
217 NIL_RTR0PTR,
218 pPhysHandlerSrc->pszDesc,
219 ppPhysHandler);
220}
221
222
223/**
224 * Register a access handler for a physical range.
225 *
226 * @returns VBox status code.
227 * @retval VINF_SUCCESS when successfully installed.
228 *
229 * @param pVM The cross context VM structure.
230 * @param pPhysHandler The physical handler.
231 * @param GCPhys Start physical address.
232 * @param GCPhysLast Last physical address. (inclusive)
233 */
234int pgmHandlerPhysicalExRegister(PVMCC pVM, PPGMPHYSHANDLER pPhysHandler, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
235{
236 /*
237 * Validate input.
238 */
239 AssertPtr(pPhysHandler);
240 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, pPhysHandler->hType);
241 Assert(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC);
242 Log(("pgmHandlerPhysicalExRegister: GCPhys=%RGp GCPhysLast=%RGp hType=%#x (%d, %s) pszDesc=%RHv:%s\n",
243 GCPhys, GCPhysLast, pPhysHandler->hType, pType->enmKind, R3STRING(pType->pszDesc), pPhysHandler->pszDesc, R3STRING(pPhysHandler->pszDesc)));
244 AssertReturn(pPhysHandler->Core.Key == NIL_RTGCPHYS, VERR_WRONG_ORDER);
245
246 AssertMsgReturn(GCPhys < GCPhysLast, ("GCPhys >= GCPhysLast (%#x >= %#x)\n", GCPhys, GCPhysLast), VERR_INVALID_PARAMETER);
247 switch (pType->enmKind)
248 {
249 case PGMPHYSHANDLERKIND_WRITE:
250 break;
251 case PGMPHYSHANDLERKIND_MMIO:
252 case PGMPHYSHANDLERKIND_ALL:
253 /* Simplification for PGMPhysRead, PGMR0Trap0eHandlerNPMisconfig and others: Full pages. */
254 AssertMsgReturn(!(GCPhys & PAGE_OFFSET_MASK), ("%RGp\n", GCPhys), VERR_INVALID_PARAMETER);
255 AssertMsgReturn((GCPhysLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, ("%RGp\n", GCPhysLast), VERR_INVALID_PARAMETER);
256 break;
257 default:
258 AssertMsgFailed(("Invalid input enmKind=%d!\n", pType->enmKind));
259 return VERR_INVALID_PARAMETER;
260 }
261
262 /*
263 * We require the range to be within registered ram.
264 * There is no apparent need to support ranges which cover more than one ram range.
265 */
266 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
267 if ( !pRam
268 || GCPhysLast > pRam->GCPhysLast)
269 {
270#ifdef IN_RING3
271 DBGFR3Info(pVM->pUVM, "phys", NULL, NULL);
272#endif
273 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
274 return VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
275 }
276 Assert(GCPhys >= pRam->GCPhys && GCPhys < pRam->GCPhysLast);
277 Assert(GCPhysLast <= pRam->GCPhysLast && GCPhysLast >= pRam->GCPhys);
278
279 /*
280 * Try insert into list.
281 */
282 pPhysHandler->Core.Key = GCPhys;
283 pPhysHandler->Core.KeyLast = GCPhysLast;
284 pPhysHandler->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
285
286 PGM_LOCK_VOID(pVM);
287 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pPhysHandler->Core))
288 {
289 int rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pPhysHandler, pRam, NULL /*pvBitmap*/, 0 /*offBitmap*/);
290 if (rc == VINF_PGM_SYNC_CR3)
291 rc = VINF_PGM_GCPHYS_ALIASED;
292
293#if defined(IN_RING3) || defined(IN_RING0)
294 NEMHCNotifyHandlerPhysicalRegister(pVM, pType->enmKind, GCPhys, GCPhysLast - GCPhys + 1);
295#endif
296 PGM_UNLOCK(pVM);
297
298 if (rc != VINF_SUCCESS)
299 Log(("PGMHandlerPhysicalRegisterEx: returns %Rrc (%RGp-%RGp)\n", rc, GCPhys, GCPhysLast));
300 return rc;
301 }
302 PGM_UNLOCK(pVM);
303
304 pPhysHandler->Core.Key = NIL_RTGCPHYS;
305 pPhysHandler->Core.KeyLast = NIL_RTGCPHYS;
306
307#if defined(IN_RING3) && defined(VBOX_STRICT)
308 DBGFR3Info(pVM->pUVM, "handlers", "phys nostats", NULL);
309#endif
310 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp pszDesc=%s/%s\n",
311 GCPhys, GCPhysLast, R3STRING(pPhysHandler->pszDesc), R3STRING(pType->pszDesc)));
312 return VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
313}
314
315
316/**
317 * Register a access handler for a physical range.
318 *
319 * @returns VBox status code.
320 * @retval VINF_SUCCESS when successfully installed.
321 * @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
322 * the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
323 * flagged together with a pool clearing.
324 * @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
325 * one. A debug assertion is raised.
326 *
327 * @param pVM The cross context VM structure.
328 * @param GCPhys Start physical address.
329 * @param GCPhysLast Last physical address. (inclusive)
330 * @param hType The handler type registration handle.
331 * @param pvUserR3 User argument to the R3 handler.
332 * @param pvUserR0 User argument to the R0 handler.
333 * @param pvUserRC User argument to the RC handler. This can be a value
334 * less that 0x10000 or a (non-null) pointer that is
335 * automatically relocated.
336 * @param pszDesc Description of this handler. If NULL, the type
337 * description will be used instead.
338 */
339VMMDECL(int) PGMHandlerPhysicalRegister(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, PGMPHYSHANDLERTYPE hType,
340 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, R3PTRTYPE(const char *) pszDesc)
341{
342#ifdef LOG_ENABLED
343 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType);
344 Log(("PGMHandlerPhysicalRegister: GCPhys=%RGp GCPhysLast=%RGp pvUserR3=%RHv pvUserR0=%RHv pvUserGC=%RRv hType=%#x (%d, %s) pszDesc=%RHv:%s\n",
345 GCPhys, GCPhysLast, pvUserR3, pvUserR0, pvUserRC, hType, pType->enmKind, R3STRING(pType->pszDesc), pszDesc, R3STRING(pszDesc)));
346#endif
347
348 PPGMPHYSHANDLER pNew;
349 int rc = pgmHandlerPhysicalExCreate(pVM, hType, pvUserR3, pvUserR0, pvUserRC, pszDesc, &pNew);
350 if (RT_SUCCESS(rc))
351 {
352 rc = pgmHandlerPhysicalExRegister(pVM, pNew, GCPhys, GCPhysLast);
353 if (RT_SUCCESS(rc))
354 return rc;
355 pgmHandlerPhysicalExDestroy(pVM, pNew);
356 }
357 return rc;
358}
359
360
361/**
362 * Sets ram range flags and attempts updating shadow PTs.
363 *
364 * @returns VBox status code.
365 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
366 * @retval VINF_PGM_SYNC_CR3 when the shadow PTs could be updated because
367 * the guest page aliased or/and mapped by multiple PTs. FFs set.
368 * @param pVM The cross context VM structure.
369 * @param pCur The physical handler.
370 * @param pRam The RAM range.
371 * @param pvBitmap Dirty bitmap. Optional.
372 * @param offBitmap Dirty bitmap offset.
373 */
374static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVMCC pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam,
375 void *pvBitmap, uint32_t offBitmap)
376{
377 /*
378 * Iterate the guest ram pages updating the flags and flushing PT entries
379 * mapping the page.
380 */
381 bool fFlushTLBs = false;
382 int rc = VINF_SUCCESS;
383 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
384 const unsigned uState = pCurType->uState;
385 uint32_t cPages = pCur->cPages;
386 uint32_t i = (pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT;
387 for (;;)
388 {
389 PPGMPAGE pPage = &pRam->aPages[i];
390 AssertMsg(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO || PGM_PAGE_IS_MMIO(pPage),
391 ("%RGp %R[pgmpage]\n", pRam->GCPhys + (i << PAGE_SHIFT), pPage));
392
393 /* Only do upgrades. */
394 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
395 {
396 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
397
398 const RTGCPHYS GCPhysPage = pRam->GCPhys + (i << PAGE_SHIFT);
399 int rc2 = pgmPoolTrackUpdateGCPhys(pVM, GCPhysPage, pPage,
400 false /* allow updates of PTEs (instead of flushing) */, &fFlushTLBs);
401 if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
402 rc = rc2;
403
404#ifdef VBOX_WITH_NATIVE_NEM
405 /* Tell NEM about the protection update. */
406 if (VM_IS_NEM_ENABLED(pVM))
407 {
408 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
409 PGMPAGETYPE enmType = (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage);
410 NEMHCNotifyPhysPageProtChanged(pVM, GCPhysPage, PGM_PAGE_GET_HCPHYS(pPage),
411 PGM_RAMRANGE_CALC_PAGE_R3PTR(pRam, GCPhysPage),
412 pgmPhysPageCalcNemProtection(pPage, enmType), enmType, &u2State);
413 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
414 }
415#endif
416 if (pvBitmap)
417 ASMBitSet(pvBitmap, offBitmap);
418 }
419
420 /* next */
421 if (--cPages == 0)
422 break;
423 i++;
424 offBitmap++;
425 }
426
427 if (fFlushTLBs)
428 {
429 PGM_INVL_ALL_VCPU_TLBS(pVM);
430 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: flushing guest TLBs; rc=%d\n", rc));
431 }
432 else
433 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: doesn't flush guest TLBs. rc=%Rrc; sync flags=%x VMCPU_FF_PGM_SYNC_CR3=%d\n", rc, VMMGetCpu(pVM)->pgm.s.fSyncFlags, VMCPU_FF_IS_SET(VMMGetCpu(pVM), VMCPU_FF_PGM_SYNC_CR3)));
434
435 return rc;
436}
437
438
439/**
440 * Deregister a physical page access handler.
441 *
442 * @returns VBox status code.
443 * @param pVM The cross context VM structure.
444 * @param pPhysHandler The handler to deregister (but not free).
445 */
446int pgmHandlerPhysicalExDeregister(PVMCC pVM, PPGMPHYSHANDLER pPhysHandler)
447{
448 LogFlow(("pgmHandlerPhysicalExDeregister: Removing Range %RGp-%RGp %s\n",
449 pPhysHandler->Core.Key, pPhysHandler->Core.KeyLast, R3STRING(pPhysHandler->pszDesc)));
450 AssertReturn(pPhysHandler->Core.Key != NIL_RTGCPHYS, VERR_PGM_HANDLER_NOT_FOUND);
451
452 /*
453 * Remove the handler from the tree.
454 */
455 PGM_LOCK_VOID(pVM);
456 PPGMPHYSHANDLER pRemoved = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers,
457 pPhysHandler->Core.Key);
458 if (pRemoved == pPhysHandler)
459 {
460 /*
461 * Clear the page bits, notify the REM about this change and clear
462 * the cache.
463 */
464 pgmHandlerPhysicalResetRamFlags(pVM, pPhysHandler);
465 if (VM_IS_NEM_ENABLED(pVM))
466 pgmHandlerPhysicalDeregisterNotifyNEM(pVM, pPhysHandler);
467 pVM->pgm.s.pLastPhysHandlerR0 = 0;
468 pVM->pgm.s.pLastPhysHandlerR3 = 0;
469
470 pPhysHandler->Core.Key = NIL_RTGCPHYS;
471 pPhysHandler->Core.KeyLast = NIL_RTGCPHYS;
472
473 PGM_UNLOCK(pVM);
474
475 return VINF_SUCCESS;
476 }
477
478 /*
479 * Both of the failure conditions here are considered internal processing
480 * errors because they can only be caused by race conditions or corruption.
481 * If we ever need to handle concurrent deregistration, we have to move
482 * the NIL_RTGCPHYS check inside the PGM lock.
483 */
484 if (pRemoved)
485 RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pRemoved->Core);
486
487 PGM_UNLOCK(pVM);
488
489 if (!pRemoved)
490 AssertMsgFailed(("Didn't find range starting at %RGp in the tree!\n", pPhysHandler->Core.Key));
491 else
492 AssertMsgFailed(("Found different handle at %RGp in the tree: got %p insteaded of %p\n",
493 pPhysHandler->Core.Key, pRemoved, pPhysHandler));
494 return VERR_PGM_HANDLER_IPE_1;
495}
496
497
498/**
499 * Destroys (frees) a physical handler.
500 *
501 * The caller must deregister it before destroying it!
502 *
503 * @returns VBox status code.
504 * @param pVM The cross context VM structure.
505 * @param pHandler The handler to free. NULL if ignored.
506 */
507int pgmHandlerPhysicalExDestroy(PVMCC pVM, PPGMPHYSHANDLER pHandler)
508{
509 if (pHandler)
510 {
511 AssertPtr(pHandler);
512 AssertReturn(pHandler->Core.Key == NIL_RTGCPHYS, VERR_WRONG_ORDER);
513 PGMHandlerPhysicalTypeRelease(pVM, pHandler->hType);
514 MMHyperFree(pVM, pHandler);
515 }
516 return VINF_SUCCESS;
517}
518
519
520/**
521 * Deregister a physical page access handler.
522 *
523 * @returns VBox status code.
524 * @param pVM The cross context VM structure.
525 * @param GCPhys Start physical address.
526 */
527VMMDECL(int) PGMHandlerPhysicalDeregister(PVMCC pVM, RTGCPHYS GCPhys)
528{
529 /*
530 * Find the handler.
531 */
532 PGM_LOCK_VOID(pVM);
533 PPGMPHYSHANDLER pRemoved = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
534 if (pRemoved)
535 {
536 LogFlow(("PGMHandlerPhysicalDeregister: Removing Range %RGp-%RGp %s\n",
537 pRemoved->Core.Key, pRemoved->Core.KeyLast, R3STRING(pRemoved->pszDesc)));
538
539 /*
540 * Clear the page bits, notify the REM about this change and clear
541 * the cache.
542 */
543 pgmHandlerPhysicalResetRamFlags(pVM, pRemoved);
544 if (VM_IS_NEM_ENABLED(pVM))
545 pgmHandlerPhysicalDeregisterNotifyNEM(pVM, pRemoved);
546 pVM->pgm.s.pLastPhysHandlerR0 = 0;
547 pVM->pgm.s.pLastPhysHandlerR3 = 0;
548
549 PGM_UNLOCK(pVM);
550
551 pRemoved->Core.Key = NIL_RTGCPHYS;
552 pgmHandlerPhysicalExDestroy(pVM, pRemoved);
553 return VINF_SUCCESS;
554 }
555
556 PGM_UNLOCK(pVM);
557
558 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
559 return VERR_PGM_HANDLER_NOT_FOUND;
560}
561
562
563/**
564 * Shared code with modify.
565 */
566static void pgmHandlerPhysicalDeregisterNotifyNEM(PVMCC pVM, PPGMPHYSHANDLER pCur)
567{
568#ifdef VBOX_WITH_NATIVE_NEM
569 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
570 RTGCPHYS GCPhysStart = pCur->Core.Key;
571 RTGCPHYS GCPhysLast = pCur->Core.KeyLast;
572
573 /*
574 * Page align the range.
575 *
576 * Since we've reset (recalculated) the physical handler state of all pages
577 * we can make use of the page states to figure out whether a page should be
578 * included in the REM notification or not.
579 */
580 if ( (pCur->Core.Key & PAGE_OFFSET_MASK)
581 || ((pCur->Core.KeyLast + 1) & PAGE_OFFSET_MASK))
582 {
583 Assert(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO);
584
585 if (GCPhysStart & PAGE_OFFSET_MASK)
586 {
587 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysStart);
588 if ( pPage
589 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
590 {
591 RTGCPHYS GCPhys = (GCPhysStart + (PAGE_SIZE - 1)) & X86_PTE_PAE_PG_MASK;
592 if ( GCPhys > GCPhysLast
593 || GCPhys < GCPhysStart)
594 return;
595 GCPhysStart = GCPhys;
596 }
597 else
598 GCPhysStart &= X86_PTE_PAE_PG_MASK;
599 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
600 }
601
602 if (GCPhysLast & PAGE_OFFSET_MASK)
603 {
604 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysLast);
605 if ( pPage
606 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
607 {
608 RTGCPHYS GCPhys = (GCPhysLast & X86_PTE_PAE_PG_MASK) - 1;
609 if ( GCPhys < GCPhysStart
610 || GCPhys > GCPhysLast)
611 return;
612 GCPhysLast = GCPhys;
613 }
614 else
615 GCPhysLast |= PAGE_OFFSET_MASK;
616 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
617 }
618 }
619
620 /*
621 * Tell NEM.
622 */
623 PPGMRAMRANGE const pRam = pgmPhysGetRange(pVM, GCPhysStart);
624 RTGCPHYS const cb = GCPhysLast - GCPhysStart + 1;
625 uint8_t u2State = UINT8_MAX;
626 NEMHCNotifyHandlerPhysicalDeregister(pVM, pCurType->enmKind, GCPhysStart, cb,
627 pRam ? PGM_RAMRANGE_CALC_PAGE_R3PTR(pRam, GCPhysStart) : NULL, &u2State);
628 if (u2State != UINT8_MAX && pRam)
629 pgmPhysSetNemStateForPages(&pRam->aPages[(GCPhysStart - pRam->GCPhys) >> PAGE_SHIFT], cb >> PAGE_SHIFT, u2State);
630#else
631 RT_NOREF(pVM, pCur);
632#endif
633}
634
635
636/**
637 * pgmHandlerPhysicalResetRamFlags helper that checks for other handlers on
638 * edge pages.
639 */
640DECLINLINE(void) pgmHandlerPhysicalRecalcPageState(PVMCC pVM, RTGCPHYS GCPhys, bool fAbove, PPGMRAMRANGE *ppRamHint)
641{
642 /*
643 * Look for other handlers.
644 */
645 unsigned uState = PGM_PAGE_HNDL_PHYS_STATE_NONE;
646 for (;;)
647 {
648 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys, fAbove);
649 if ( !pCur
650 || ((fAbove ? pCur->Core.Key : pCur->Core.KeyLast) >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
651 break;
652 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
653 uState = RT_MAX(uState, pCurType->uState);
654
655 /* next? */
656 RTGCPHYS GCPhysNext = fAbove
657 ? pCur->Core.KeyLast + 1
658 : pCur->Core.Key - 1;
659 if ((GCPhysNext >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
660 break;
661 GCPhys = GCPhysNext;
662 }
663
664 /*
665 * Update if we found something that is a higher priority
666 * state than the current.
667 */
668 if (uState != PGM_PAGE_HNDL_PHYS_STATE_NONE)
669 {
670 PPGMPAGE pPage;
671 int rc = pgmPhysGetPageWithHintEx(pVM, GCPhys, &pPage, ppRamHint);
672 if ( RT_SUCCESS(rc)
673 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
674 {
675 /* This should normally not be necessary. */
676 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
677 bool fFlushTLBs ;
678 rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhys, pPage, false /*fFlushPTEs*/, &fFlushTLBs);
679 if (RT_SUCCESS(rc) && fFlushTLBs)
680 PGM_INVL_ALL_VCPU_TLBS(pVM);
681 else
682 AssertRC(rc);
683
684#ifdef VBOX_WITH_NATIVE_NEM
685 /* Tell NEM about the protection update. */
686 if (VM_IS_NEM_ENABLED(pVM))
687 {
688 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
689 PGMPAGETYPE enmType = (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage);
690 NEMHCNotifyPhysPageProtChanged(pVM, GCPhys, PGM_PAGE_GET_HCPHYS(pPage),
691 PGM_RAMRANGE_CALC_PAGE_R3PTR(*ppRamHint, GCPhys),
692 pgmPhysPageCalcNemProtection(pPage, enmType), enmType, &u2State);
693 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
694 }
695#endif
696 }
697 else
698 AssertRC(rc);
699 }
700}
701
702
703/**
704 * Resets an aliased page.
705 *
706 * @param pVM The cross context VM structure.
707 * @param pPage The page.
708 * @param GCPhysPage The page address in case it comes in handy.
709 * @param pRam The RAM range the page is associated with (for NEM
710 * notifications).
711 * @param fDoAccounting Whether to perform accounting. (Only set during
712 * reset where pgmR3PhysRamReset doesn't have the
713 * handler structure handy.)
714 */
715void pgmHandlerPhysicalResetAliasedPage(PVMCC pVM, PPGMPAGE pPage, RTGCPHYS GCPhysPage, PPGMRAMRANGE pRam, bool fDoAccounting)
716{
717 Assert( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
718 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO);
719 Assert(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
720#ifdef VBOX_WITH_NATIVE_NEM
721 RTHCPHYS const HCPhysPrev = PGM_PAGE_GET_HCPHYS(pPage);
722#endif
723
724 /*
725 * Flush any shadow page table references *first*.
726 */
727 bool fFlushTLBs = false;
728 int rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhysPage, pPage, true /*fFlushPTEs*/, &fFlushTLBs);
729 AssertLogRelRCReturnVoid(rc);
730 HMFlushTlbOnAllVCpus(pVM);
731
732 /*
733 * Make it an MMIO/Zero page.
734 */
735 PGM_PAGE_SET_HCPHYS(pVM, pPage, pVM->pgm.s.HCPhysZeroPg);
736 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO);
737 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ZERO);
738 PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
739 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_ALL);
740
741 /* Flush its TLB entry. */
742 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
743
744 /*
745 * Do accounting for pgmR3PhysRamReset.
746 */
747 if (fDoAccounting)
748 {
749 PPGMPHYSHANDLER pHandler = pgmHandlerPhysicalLookup(pVM, GCPhysPage);
750 if (RT_LIKELY(pHandler))
751 {
752 Assert(pHandler->cAliasedPages > 0);
753 pHandler->cAliasedPages--;
754 }
755 else
756 AssertFailed();
757 }
758
759#ifdef VBOX_WITH_NATIVE_NEM
760 /*
761 * Tell NEM about the protection change.
762 */
763 if (VM_IS_NEM_ENABLED(pVM))
764 {
765 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
766 NEMHCNotifyPhysPageChanged(pVM, GCPhysPage, HCPhysPrev, pVM->pgm.s.HCPhysZeroPg,
767 PGM_RAMRANGE_CALC_PAGE_R3PTR(pRam, GCPhysPage),
768 NEM_PAGE_PROT_NONE, PGMPAGETYPE_MMIO, &u2State);
769 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
770 }
771#else
772 RT_NOREF(pRam);
773#endif
774}
775
776
777/**
778 * Resets ram range flags.
779 *
780 * @returns VBox status code.
781 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
782 * @param pVM The cross context VM structure.
783 * @param pCur The physical handler.
784 *
785 * @remark We don't start messing with the shadow page tables, as we've
786 * already got code in Trap0e which deals with out of sync handler
787 * flags (originally conceived for global pages).
788 */
789static void pgmHandlerPhysicalResetRamFlags(PVMCC pVM, PPGMPHYSHANDLER pCur)
790{
791 /*
792 * Iterate the guest ram pages updating the state.
793 */
794 RTUINT cPages = pCur->cPages;
795 RTGCPHYS GCPhys = pCur->Core.Key;
796 PPGMRAMRANGE pRamHint = NULL;
797 for (;;)
798 {
799 PPGMPAGE pPage;
800 int rc = pgmPhysGetPageWithHintEx(pVM, GCPhys, &pPage, &pRamHint);
801 if (RT_SUCCESS(rc))
802 {
803 /* Reset aliased MMIO pages to MMIO, since this aliasing is our business.
804 (We don't flip MMIO to RAM though, that's PGMPhys.cpp's job.) */
805 bool fNemNotifiedAlready = false;
806 if ( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
807 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO)
808 {
809 Assert(pCur->cAliasedPages > 0);
810 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhys, pRamHint, false /*fDoAccounting*/);
811 pCur->cAliasedPages--;
812 fNemNotifiedAlready = true;
813 }
814#ifdef VBOX_STRICT
815 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
816 AssertMsg(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO || PGM_PAGE_IS_MMIO(pPage), ("%RGp %R[pgmpage]\n", GCPhys, pPage));
817#endif
818 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_NONE);
819
820#ifdef VBOX_WITH_NATIVE_NEM
821 /* Tell NEM about the protection change. */
822 if (VM_IS_NEM_ENABLED(pVM) && !fNemNotifiedAlready)
823 {
824 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
825 PGMPAGETYPE enmType = (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage);
826 NEMHCNotifyPhysPageProtChanged(pVM, GCPhys, PGM_PAGE_GET_HCPHYS(pPage),
827 PGM_RAMRANGE_CALC_PAGE_R3PTR(pRamHint, GCPhys),
828 pgmPhysPageCalcNemProtection(pPage, enmType), enmType, &u2State);
829 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
830 }
831#endif
832 RT_NOREF(fNemNotifiedAlready);
833 }
834 else
835 AssertRC(rc);
836
837 /* next */
838 if (--cPages == 0)
839 break;
840 GCPhys += PAGE_SIZE;
841 }
842
843 pCur->cAliasedPages = 0;
844 pCur->cTmpOffPages = 0;
845
846 /*
847 * Check for partial start and end pages.
848 */
849 if (pCur->Core.Key & PAGE_OFFSET_MASK)
850 pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.Key - 1, false /* fAbove */, &pRamHint);
851 if ((pCur->Core.KeyLast & PAGE_OFFSET_MASK) != PAGE_OFFSET_MASK)
852 pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.KeyLast + 1, true /* fAbove */, &pRamHint);
853}
854
855
856#if 0 /* unused */
857/**
858 * Modify a physical page access handler.
859 *
860 * Modification can only be done to the range it self, not the type or anything else.
861 *
862 * @returns VBox status code.
863 * For all return codes other than VERR_PGM_HANDLER_NOT_FOUND and VINF_SUCCESS the range is deregistered
864 * and a new registration must be performed!
865 * @param pVM The cross context VM structure.
866 * @param GCPhysCurrent Current location.
867 * @param GCPhys New location.
868 * @param GCPhysLast New last location.
869 */
870VMMDECL(int) PGMHandlerPhysicalModify(PVMCC pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
871{
872 /*
873 * Remove it.
874 */
875 int rc;
876 PGM_LOCK_VOID(pVM);
877 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhysCurrent);
878 if (pCur)
879 {
880 /*
881 * Clear the ram flags. (We're gonna move or free it!)
882 */
883 pgmHandlerPhysicalResetRamFlags(pVM, pCur);
884 PPGMPHYSHANDLERTYPEINT const pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
885 bool const fRestoreAsRAM = pCurType->pfnHandlerR3 /** @todo this isn't entirely correct. */
886 && pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO;
887
888 /*
889 * Validate the new range, modify and reinsert.
890 */
891 if (GCPhysLast >= GCPhys)
892 {
893 /*
894 * We require the range to be within registered ram.
895 * There is no apparent need to support ranges which cover more than one ram range.
896 */
897 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
898 if ( pRam
899 && GCPhys <= pRam->GCPhysLast
900 && GCPhysLast >= pRam->GCPhys)
901 {
902 pCur->Core.Key = GCPhys;
903 pCur->Core.KeyLast = GCPhysLast;
904 pCur->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + 1) >> PAGE_SHIFT;
905
906 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pCur->Core))
907 {
908 RTGCPHYS const cb = GCPhysLast - GCPhys + 1;
909 PGMPHYSHANDLERKIND const enmKind = pCurType->enmKind;
910
911 /*
912 * Set ram flags, flush shadow PT entries and finally tell REM about this.
913 */
914 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam, NULL, 0);
915
916 /** @todo NEM: not sure we need this notification... */
917 NEMHCNotifyHandlerPhysicalModify(pVM, enmKind, GCPhysCurrent, GCPhys, cb, fRestoreAsRAM);
918
919 PGM_UNLOCK(pVM);
920
921 PGM_INVL_ALL_VCPU_TLBS(pVM);
922 Log(("PGMHandlerPhysicalModify: GCPhysCurrent=%RGp -> GCPhys=%RGp GCPhysLast=%RGp\n",
923 GCPhysCurrent, GCPhys, GCPhysLast));
924 return VINF_SUCCESS;
925 }
926
927 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp\n", GCPhys, GCPhysLast));
928 rc = VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
929 }
930 else
931 {
932 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
933 rc = VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
934 }
935 }
936 else
937 {
938 AssertMsgFailed(("Invalid range %RGp-%RGp\n", GCPhys, GCPhysLast));
939 rc = VERR_INVALID_PARAMETER;
940 }
941
942 /*
943 * Invalid new location, flush the cache and free it.
944 * We've only gotta notify REM and free the memory.
945 */
946 if (VM_IS_NEM_ENABLED(pVM))
947 pgmHandlerPhysicalDeregisterNotifyNEM(pVM, pCur);
948 pVM->pgm.s.pLastPhysHandlerR0 = 0;
949 pVM->pgm.s.pLastPhysHandlerR3 = 0;
950 PGMHandlerPhysicalTypeRelease(pVM, pCur->hType);
951 MMHyperFree(pVM, pCur);
952 }
953 else
954 {
955 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhysCurrent));
956 rc = VERR_PGM_HANDLER_NOT_FOUND;
957 }
958
959 PGM_UNLOCK(pVM);
960 return rc;
961}
962#endif /* unused */
963
964
965/**
966 * Changes the user callback arguments associated with a physical access handler.
967 *
968 * @returns VBox status code.
969 * @param pVM The cross context VM structure.
970 * @param GCPhys Start physical address of the handler.
971 * @param pvUserR3 User argument to the R3 handler.
972 * @param pvUserR0 User argument to the R0 handler.
973 */
974VMMDECL(int) PGMHandlerPhysicalChangeUserArgs(PVMCC pVM, RTGCPHYS GCPhys, RTR3PTR pvUserR3, RTR0PTR pvUserR0)
975{
976 /*
977 * Find the handler.
978 */
979 int rc = VINF_SUCCESS;
980 PGM_LOCK_VOID(pVM);
981 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
982 if (pCur)
983 {
984 /*
985 * Change arguments.
986 */
987 pCur->pvUserR3 = pvUserR3;
988 pCur->pvUserR0 = pvUserR0;
989 }
990 else
991 {
992 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
993 rc = VERR_PGM_HANDLER_NOT_FOUND;
994 }
995
996 PGM_UNLOCK(pVM);
997 return rc;
998}
999
1000#if 0 /* unused */
1001
1002/**
1003 * Splits a physical access handler in two.
1004 *
1005 * @returns VBox status code.
1006 * @param pVM The cross context VM structure.
1007 * @param GCPhys Start physical address of the handler.
1008 * @param GCPhysSplit The split address.
1009 */
1010VMMDECL(int) PGMHandlerPhysicalSplit(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit)
1011{
1012 AssertReturn(GCPhys < GCPhysSplit, VERR_INVALID_PARAMETER);
1013
1014 /*
1015 * Do the allocation without owning the lock.
1016 */
1017 PPGMPHYSHANDLER pNew;
1018 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
1019 if (RT_FAILURE(rc))
1020 return rc;
1021
1022 /*
1023 * Get the handler.
1024 */
1025 PGM_LOCK_VOID(pVM);
1026 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1027 if (RT_LIKELY(pCur))
1028 {
1029 if (RT_LIKELY(GCPhysSplit <= pCur->Core.KeyLast))
1030 {
1031 /*
1032 * Create new handler node for the 2nd half.
1033 */
1034 *pNew = *pCur;
1035 pNew->Core.Key = GCPhysSplit;
1036 pNew->cPages = (pNew->Core.KeyLast - (pNew->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
1037
1038 pCur->Core.KeyLast = GCPhysSplit - 1;
1039 pCur->cPages = (pCur->Core.KeyLast - (pCur->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
1040
1041 if (RT_LIKELY(RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core)))
1042 {
1043 LogFlow(("PGMHandlerPhysicalSplit: %RGp-%RGp and %RGp-%RGp\n",
1044 pCur->Core.Key, pCur->Core.KeyLast, pNew->Core.Key, pNew->Core.KeyLast));
1045 PGM_UNLOCK(pVM);
1046 return VINF_SUCCESS;
1047 }
1048 AssertMsgFailed(("whu?\n"));
1049 rc = VERR_PGM_PHYS_HANDLER_IPE;
1050 }
1051 else
1052 {
1053 AssertMsgFailed(("outside range: %RGp-%RGp split %RGp\n", pCur->Core.Key, pCur->Core.KeyLast, GCPhysSplit));
1054 rc = VERR_INVALID_PARAMETER;
1055 }
1056 }
1057 else
1058 {
1059 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
1060 rc = VERR_PGM_HANDLER_NOT_FOUND;
1061 }
1062 PGM_UNLOCK(pVM);
1063 MMHyperFree(pVM, pNew);
1064 return rc;
1065}
1066
1067
1068/**
1069 * Joins up two adjacent physical access handlers which has the same callbacks.
1070 *
1071 * @returns VBox status code.
1072 * @param pVM The cross context VM structure.
1073 * @param GCPhys1 Start physical address of the first handler.
1074 * @param GCPhys2 Start physical address of the second handler.
1075 */
1076VMMDECL(int) PGMHandlerPhysicalJoin(PVMCC pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2)
1077{
1078 /*
1079 * Get the handlers.
1080 */
1081 int rc;
1082 PGM_LOCK_VOID(pVM);
1083 PPGMPHYSHANDLER pCur1 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys1);
1084 if (RT_LIKELY(pCur1))
1085 {
1086 PPGMPHYSHANDLER pCur2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
1087 if (RT_LIKELY(pCur2))
1088 {
1089 /*
1090 * Make sure that they are adjacent, and that they've got the same callbacks.
1091 */
1092 if (RT_LIKELY(pCur1->Core.KeyLast + 1 == pCur2->Core.Key))
1093 {
1094 if (RT_LIKELY(pCur1->hType == pCur2->hType))
1095 {
1096 PPGMPHYSHANDLER pCur3 = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
1097 if (RT_LIKELY(pCur3 == pCur2))
1098 {
1099 pCur1->Core.KeyLast = pCur2->Core.KeyLast;
1100 pCur1->cPages = (pCur1->Core.KeyLast - (pCur1->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
1101 LogFlow(("PGMHandlerPhysicalJoin: %RGp-%RGp %RGp-%RGp\n",
1102 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
1103 pVM->pgm.s.pLastPhysHandlerR0 = 0;
1104 pVM->pgm.s.pLastPhysHandlerR3 = 0;
1105 PGMHandlerPhysicalTypeRelease(pVM, pCur2->hType);
1106 MMHyperFree(pVM, pCur2);
1107 PGM_UNLOCK(pVM);
1108 return VINF_SUCCESS;
1109 }
1110
1111 Assert(pCur3 == pCur2);
1112 rc = VERR_PGM_PHYS_HANDLER_IPE;
1113 }
1114 else
1115 {
1116 AssertMsgFailed(("mismatching handlers\n"));
1117 rc = VERR_ACCESS_DENIED;
1118 }
1119 }
1120 else
1121 {
1122 AssertMsgFailed(("not adjacent: %RGp-%RGp %RGp-%RGp\n",
1123 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
1124 rc = VERR_INVALID_PARAMETER;
1125 }
1126 }
1127 else
1128 {
1129 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys2));
1130 rc = VERR_PGM_HANDLER_NOT_FOUND;
1131 }
1132 }
1133 else
1134 {
1135 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys1));
1136 rc = VERR_PGM_HANDLER_NOT_FOUND;
1137 }
1138 PGM_UNLOCK(pVM);
1139 return rc;
1140
1141}
1142
1143#endif /* unused */
1144
1145/**
1146 * Resets any modifications to individual pages in a physical page access
1147 * handler region.
1148 *
1149 * This is used in pair with PGMHandlerPhysicalPageTempOff(),
1150 * PGMHandlerPhysicalPageAliasMmio2() or PGMHandlerPhysicalPageAliasHC().
1151 *
1152 * @returns VBox status code.
1153 * @param pVM The cross context VM structure.
1154 * @param GCPhys The start address of the handler regions, i.e. what you
1155 * passed to PGMR3HandlerPhysicalRegister(),
1156 * PGMHandlerPhysicalRegisterEx() or
1157 * PGMHandlerPhysicalModify().
1158 */
1159VMMDECL(int) PGMHandlerPhysicalReset(PVMCC pVM, RTGCPHYS GCPhys)
1160{
1161 LogFlow(("PGMHandlerPhysicalReset GCPhys=%RGp\n", GCPhys));
1162 PGM_LOCK_VOID(pVM);
1163
1164 /*
1165 * Find the handler.
1166 */
1167 int rc;
1168 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1169 if (RT_LIKELY(pCur))
1170 {
1171 /*
1172 * Validate kind.
1173 */
1174 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1175 switch (pCurType->enmKind)
1176 {
1177 case PGMPHYSHANDLERKIND_WRITE:
1178 case PGMPHYSHANDLERKIND_ALL:
1179 case PGMPHYSHANDLERKIND_MMIO: /* NOTE: Only use when clearing MMIO ranges with aliased MMIO2 pages! */
1180 {
1181 STAM_COUNTER_INC(&pVM->pgm.s.Stats.CTX_MID_Z(Stat,PhysHandlerReset)); /** @todo move out of switch */
1182 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
1183 Assert(pRam);
1184 Assert(pRam->GCPhys <= pCur->Core.Key);
1185 Assert(pRam->GCPhysLast >= pCur->Core.KeyLast);
1186
1187 if (pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO)
1188 {
1189 /*
1190 * Reset all the PGMPAGETYPE_MMIO2_ALIAS_MMIO pages first and that's it.
1191 * This could probably be optimized a bit wrt to flushing, but I'm too lazy
1192 * to do that now...
1193 */
1194 if (pCur->cAliasedPages)
1195 {
1196 PPGMPAGE pPage = &pRam->aPages[(pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT];
1197 RTGCPHYS GCPhysPage = pCur->Core.Key;
1198 uint32_t cLeft = pCur->cPages;
1199 while (cLeft-- > 0)
1200 {
1201 if ( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
1202 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO)
1203 {
1204 Assert(pCur->cAliasedPages > 0);
1205 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage, pRam, false /*fDoAccounting*/);
1206 --pCur->cAliasedPages;
1207#ifndef VBOX_STRICT
1208 if (pCur->cAliasedPages == 0)
1209 break;
1210#endif
1211 }
1212 Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO);
1213 GCPhysPage += PAGE_SIZE;
1214 pPage++;
1215 }
1216 Assert(pCur->cAliasedPages == 0);
1217 }
1218 }
1219 else if (pCur->cTmpOffPages > 0)
1220 {
1221 /*
1222 * Set the flags and flush shadow PT entries.
1223 */
1224 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam, NULL /*pvBitmap*/, 0 /*offBitmap*/);
1225 }
1226
1227 pCur->cAliasedPages = 0;
1228 pCur->cTmpOffPages = 0;
1229
1230 rc = VINF_SUCCESS;
1231 break;
1232 }
1233
1234 /*
1235 * Invalid.
1236 */
1237 default:
1238 AssertMsgFailed(("Invalid type %d! Corruption!\n", pCurType->enmKind));
1239 rc = VERR_PGM_PHYS_HANDLER_IPE;
1240 break;
1241 }
1242 }
1243 else
1244 {
1245 AssertMsgFailed(("Didn't find MMIO Range starting at %#x\n", GCPhys));
1246 rc = VERR_PGM_HANDLER_NOT_FOUND;
1247 }
1248
1249 PGM_UNLOCK(pVM);
1250 return rc;
1251}
1252
1253
1254/**
1255 * Special version of PGMHandlerPhysicalReset used by MMIO2 w/ dirty page
1256 * tracking.
1257 *
1258 * @returns VBox status code.
1259 * @param pVM The cross context VM structure.
1260 * @param GCPhys The start address of the handler region.
1261 * @param pvBitmap Dirty bitmap. Caller has cleared this already, only
1262 * dirty bits will be set. Caller also made sure it's big
1263 * enough.
1264 * @param offBitmap Dirty bitmap offset.
1265 * @remarks Caller must own the PGM critical section.
1266 */
1267DECLHIDDEN(int) pgmHandlerPhysicalResetMmio2WithBitmap(PVMCC pVM, RTGCPHYS GCPhys, void *pvBitmap, uint32_t offBitmap)
1268{
1269 LogFlow(("pgmHandlerPhysicalResetMmio2WithBitmap GCPhys=%RGp\n", GCPhys));
1270 PGM_LOCK_ASSERT_OWNER(pVM);
1271
1272 /*
1273 * Find the handler.
1274 */
1275 int rc;
1276 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1277 if (RT_LIKELY(pCur))
1278 {
1279 /*
1280 * Validate kind.
1281 */
1282 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1283 if (pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE)
1284 {
1285 STAM_COUNTER_INC(&pVM->pgm.s.Stats.CTX_MID_Z(Stat,PhysHandlerReset));
1286
1287 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
1288 Assert(pRam);
1289 Assert(pRam->GCPhys <= pCur->Core.Key);
1290 Assert(pRam->GCPhysLast >= pCur->Core.KeyLast);
1291
1292 /*
1293 * Set the flags and flush shadow PT entries.
1294 */
1295 if (pCur->cTmpOffPages > 0)
1296 {
1297 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam, pvBitmap, offBitmap);
1298 pCur->cTmpOffPages = 0;
1299 }
1300 else
1301 rc = VINF_SUCCESS;
1302 }
1303 else
1304 {
1305 AssertFailed();
1306 rc = VERR_WRONG_TYPE;
1307 }
1308 }
1309 else
1310 {
1311 AssertMsgFailed(("Didn't find MMIO Range starting at %#x\n", GCPhys));
1312 rc = VERR_PGM_HANDLER_NOT_FOUND;
1313 }
1314
1315 return rc;
1316}
1317
1318
1319/**
1320 * Temporarily turns off the access monitoring of a page within a monitored
1321 * physical write/all page access handler region.
1322 *
1323 * Use this when no further \#PFs are required for that page. Be aware that
1324 * a page directory sync might reset the flags, and turn on access monitoring
1325 * for the page.
1326 *
1327 * The caller must do required page table modifications.
1328 *
1329 * @returns VBox status code.
1330 * @param pVM The cross context VM structure.
1331 * @param GCPhys The start address of the access handler. This
1332 * must be a fully page aligned range or we risk
1333 * messing up other handlers installed for the
1334 * start and end pages.
1335 * @param GCPhysPage The physical address of the page to turn off
1336 * access monitoring for.
1337 */
1338VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)
1339{
1340 LogFlow(("PGMHandlerPhysicalPageTempOff GCPhysPage=%RGp\n", GCPhysPage));
1341 PGM_LOCK_VOID(pVM);
1342
1343 /*
1344 * Validate the range.
1345 */
1346 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1347 if (RT_LIKELY(pCur))
1348 {
1349 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1350 && GCPhysPage <= pCur->Core.KeyLast))
1351 {
1352 Assert(!(pCur->Core.Key & PAGE_OFFSET_MASK));
1353 Assert((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
1354
1355 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1356 AssertReturnStmt( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE
1357 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL,
1358 PGM_UNLOCK(pVM), VERR_ACCESS_DENIED);
1359
1360 /*
1361 * Change the page status.
1362 */
1363 PPGMPAGE pPage;
1364 PPGMRAMRANGE pRam;
1365 int rc = pgmPhysGetPageAndRangeEx(pVM, GCPhysPage, &pPage, &pRam);
1366 AssertReturnStmt(RT_SUCCESS_NP(rc), PGM_UNLOCK(pVM), rc);
1367 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
1368 {
1369 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1370 pCur->cTmpOffPages++;
1371
1372#ifdef VBOX_WITH_NATIVE_NEM
1373 /* Tell NEM about the protection change (VGA is using this to track dirty pages). */
1374 if (VM_IS_NEM_ENABLED(pVM))
1375 {
1376 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
1377 PGMPAGETYPE enmType = (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage);
1378 NEMHCNotifyPhysPageProtChanged(pVM, GCPhysPage, PGM_PAGE_GET_HCPHYS(pPage),
1379 PGM_RAMRANGE_CALC_PAGE_R3PTR(pRam, GCPhysPage),
1380 pgmPhysPageCalcNemProtection(pPage, enmType), enmType, &u2State);
1381 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
1382 }
1383#endif
1384 }
1385 PGM_UNLOCK(pVM);
1386 return VINF_SUCCESS;
1387 }
1388 PGM_UNLOCK(pVM);
1389 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1390 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1391 return VERR_INVALID_PARAMETER;
1392 }
1393 PGM_UNLOCK(pVM);
1394 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1395 return VERR_PGM_HANDLER_NOT_FOUND;
1396}
1397
1398
1399/**
1400 * Resolves an MMIO2 page.
1401 *
1402 * Caller as taken the PGM lock.
1403 *
1404 * @returns Pointer to the page if valid, NULL otherwise
1405 * @param pVM The cross context VM structure.
1406 * @param pDevIns The device owning it.
1407 * @param hMmio2 The MMIO2 region.
1408 * @param offMmio2Page The offset into the region.
1409 */
1410static PPGMPAGE pgmPhysResolveMmio2PageLocked(PVMCC pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS offMmio2Page)
1411{
1412 /* Only works if the handle is in the handle table! */
1413 AssertReturn(hMmio2 != 0, NULL);
1414 hMmio2--;
1415
1416 /* Must check the first one for PGMREGMMIO2RANGE_F_FIRST_CHUNK. */
1417 AssertReturn(hMmio2 < RT_ELEMENTS(pVM->pgm.s.apMmio2RangesR3), NULL);
1418 PPGMREGMMIO2RANGE pCur = pVM->pgm.s.CTX_SUFF(apMmio2Ranges)[hMmio2];
1419 AssertReturn(pCur, NULL);
1420 AssertReturn(pCur->fFlags & PGMREGMMIO2RANGE_F_FIRST_CHUNK, NULL);
1421
1422 /* Loop thru the sub-ranges till we find the one covering offMmio2. */
1423 for (;;)
1424 {
1425#ifdef IN_RING3
1426 AssertReturn(pCur->pDevInsR3 == pDevIns, NULL);
1427#else
1428 AssertReturn(pCur->pDevInsR3 == pDevIns->pDevInsForR3, NULL);
1429#endif
1430
1431 /* Does it match the offset? */
1432 if (offMmio2Page < pCur->cbReal)
1433 return &pCur->RamRange.aPages[offMmio2Page >> PAGE_SHIFT];
1434
1435 /* Advance if we can. */
1436 AssertReturn(!(pCur->fFlags & PGMREGMMIO2RANGE_F_LAST_CHUNK), NULL);
1437 offMmio2Page -= pCur->cbReal;
1438 hMmio2++;
1439 AssertReturn(hMmio2 < RT_ELEMENTS(pVM->pgm.s.apMmio2RangesR3), NULL);
1440 pCur = pVM->pgm.s.CTX_SUFF(apMmio2Ranges)[hMmio2];
1441 AssertReturn(pCur, NULL);
1442 }
1443}
1444
1445
1446/**
1447 * Replaces an MMIO page with an MMIO2 page.
1448 *
1449 * This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
1450 * PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
1451 * backing, the caller must provide a replacement page. For various reasons the
1452 * replacement page must be an MMIO2 page.
1453 *
1454 * The caller must do required page table modifications. You can get away
1455 * without making any modifications since it's an MMIO page, the cost is an extra
1456 * \#PF which will the resync the page.
1457 *
1458 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
1459 *
1460 * The caller may still get handler callback even after this call and must be
1461 * able to deal correctly with such calls. The reason for these callbacks are
1462 * either that we're executing in the recompiler (which doesn't know about this
1463 * arrangement) or that we've been restored from saved state (where we won't
1464 * save the change).
1465 *
1466 * @returns VBox status code.
1467 * @param pVM The cross context VM structure.
1468 * @param GCPhys The start address of the access handler. This
1469 * must be a fully page aligned range or we risk
1470 * messing up other handlers installed for the
1471 * start and end pages.
1472 * @param GCPhysPage The physical address of the page to turn off
1473 * access monitoring for and replace with the MMIO2
1474 * page.
1475 * @param pDevIns The device instance owning @a hMmio2.
1476 * @param hMmio2 Handle to the MMIO2 region containing the page
1477 * to remap in the the MMIO page at @a GCPhys.
1478 * @param offMmio2PageRemap The offset into @a hMmio2 of the MMIO2 page that
1479 * should serve as backing memory.
1480 *
1481 * @remark May cause a page pool flush if used on a page that is already
1482 * aliased.
1483 *
1484 * @note This trick does only work reliably if the two pages are never ever
1485 * mapped in the same page table. If they are the page pool code will
1486 * be confused should either of them be flushed. See the special case
1487 * of zero page aliasing mentioned in #3170.
1488 *
1489 */
1490VMMDECL(int) PGMHandlerPhysicalPageAliasMmio2(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage,
1491 PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS offMmio2PageRemap)
1492{
1493#ifdef VBOX_WITH_PGM_NEM_MODE
1494 AssertReturn(!VM_IS_NEM_ENABLED(pVM) || !pVM->pgm.s.fNemMode, VERR_PGM_NOT_SUPPORTED_FOR_NEM_MODE);
1495#endif
1496 PGM_LOCK_VOID(pVM);
1497
1498 /*
1499 * Resolve the MMIO2 reference.
1500 */
1501 PPGMPAGE pPageRemap = pgmPhysResolveMmio2PageLocked(pVM, pDevIns, hMmio2, offMmio2PageRemap);
1502 if (RT_LIKELY(pPageRemap))
1503 AssertMsgReturnStmt(PGM_PAGE_GET_TYPE(pPageRemap) == PGMPAGETYPE_MMIO2,
1504 ("hMmio2=%RU64 offMmio2PageRemap=%RGp %R[pgmpage]\n", hMmio2, offMmio2PageRemap, pPageRemap),
1505 PGM_UNLOCK(pVM), VERR_PGM_PHYS_NOT_MMIO2);
1506 else
1507 {
1508 PGM_UNLOCK(pVM);
1509 return VERR_OUT_OF_RANGE;
1510 }
1511
1512 /*
1513 * Lookup and validate the range.
1514 */
1515 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1516 if (RT_LIKELY(pCur))
1517 {
1518 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1519 && GCPhysPage <= pCur->Core.KeyLast))
1520 {
1521 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1522 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, PGM_UNLOCK(pVM), VERR_ACCESS_DENIED);
1523 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), PGM_UNLOCK(pVM), VERR_INVALID_PARAMETER);
1524 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, PGM_UNLOCK(pVM), VERR_INVALID_PARAMETER);
1525
1526 /*
1527 * Validate the page.
1528 */
1529 PPGMPAGE pPage;
1530 PPGMRAMRANGE pRam;
1531 int rc = pgmPhysGetPageAndRangeEx(pVM, GCPhysPage, &pPage, &pRam);
1532 AssertReturnStmt(RT_SUCCESS_NP(rc), PGM_UNLOCK(pVM), rc);
1533 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1534 {
1535 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1536 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1537 VERR_PGM_PHYS_NOT_MMIO2);
1538 if (PGM_PAGE_GET_HCPHYS(pPage) == PGM_PAGE_GET_HCPHYS(pPageRemap))
1539 {
1540 PGM_UNLOCK(pVM);
1541 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1542 }
1543
1544 /*
1545 * The page is already mapped as some other page, reset it
1546 * to an MMIO/ZERO page before doing the new mapping.
1547 */
1548 Log(("PGMHandlerPhysicalPageAliasMmio2: GCPhysPage=%RGp (%R[pgmpage]; %RHp -> %RHp\n",
1549 GCPhysPage, pPage, PGM_PAGE_GET_HCPHYS(pPage), PGM_PAGE_GET_HCPHYS(pPageRemap)));
1550 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage, pRam, false /*fDoAccounting*/);
1551 pCur->cAliasedPages--;
1552 }
1553 Assert(PGM_PAGE_IS_ZERO(pPage));
1554
1555 /*
1556 * Do the actual remapping here.
1557 * This page now serves as an alias for the backing memory specified.
1558 */
1559 LogFlow(("PGMHandlerPhysicalPageAliasMmio2: %RGp (%R[pgmpage]) alias for %RU64/%RGp (%R[pgmpage])\n",
1560 GCPhysPage, pPage, hMmio2, offMmio2PageRemap, pPageRemap ));
1561 PGM_PAGE_SET_HCPHYS(pVM, pPage, PGM_PAGE_GET_HCPHYS(pPageRemap));
1562 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1563 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
1564 PGM_PAGE_SET_PAGEID(pVM, pPage, PGM_PAGE_GET_PAGEID(pPageRemap));
1565 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1566 pCur->cAliasedPages++;
1567 Assert(pCur->cAliasedPages <= pCur->cPages);
1568
1569 /* Flush its TLB entry. */
1570 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1571
1572#ifdef VBOX_WITH_NATIVE_NEM
1573 /* Tell NEM about the backing and protection change. */
1574 if (VM_IS_NEM_ENABLED(pVM))
1575 {
1576 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
1577 NEMHCNotifyPhysPageChanged(pVM, GCPhysPage, pVM->pgm.s.HCPhysZeroPg, PGM_PAGE_GET_HCPHYS(pPage),
1578 PGM_RAMRANGE_CALC_PAGE_R3PTR(pRam, GCPhysPage),
1579 pgmPhysPageCalcNemProtection(pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO),
1580 PGMPAGETYPE_MMIO2_ALIAS_MMIO, &u2State);
1581 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
1582 }
1583#endif
1584 LogFlow(("PGMHandlerPhysicalPageAliasMmio2: => %R[pgmpage]\n", pPage));
1585 PGM_UNLOCK(pVM);
1586 return VINF_SUCCESS;
1587 }
1588
1589 PGM_UNLOCK(pVM);
1590 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1591 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1592 return VERR_INVALID_PARAMETER;
1593 }
1594
1595 PGM_UNLOCK(pVM);
1596 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1597 return VERR_PGM_HANDLER_NOT_FOUND;
1598}
1599
1600
1601/**
1602 * Replaces an MMIO page with an arbitrary HC page in the shadow page tables.
1603 *
1604 * This differs from PGMHandlerPhysicalPageAliasMmio2 in that the page doesn't
1605 * need to be a known MMIO2 page and that only shadow paging may access the
1606 * page. The latter distinction is important because the only use for this
1607 * feature is for mapping the special APIC access page that VT-x uses to detect
1608 * APIC MMIO operations, the page is shared between all guest CPUs and actually
1609 * not written to. At least at the moment.
1610 *
1611 * The caller must do required page table modifications. You can get away
1612 * without making any modifications since it's an MMIO page, the cost is an extra
1613 * \#PF which will the resync the page.
1614 *
1615 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
1616 *
1617 *
1618 * @returns VBox status code.
1619 * @param pVM The cross context VM structure.
1620 * @param GCPhys The start address of the access handler. This
1621 * must be a fully page aligned range or we risk
1622 * messing up other handlers installed for the
1623 * start and end pages.
1624 * @param GCPhysPage The physical address of the page to turn off
1625 * access monitoring for.
1626 * @param HCPhysPageRemap The physical address of the HC page that
1627 * serves as backing memory.
1628 *
1629 * @remark May cause a page pool flush if used on a page that is already
1630 * aliased.
1631 */
1632VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap)
1633{
1634/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
1635#ifdef VBOX_WITH_PGM_NEM_MODE
1636 AssertReturn(!VM_IS_NEM_ENABLED(pVM) || !pVM->pgm.s.fNemMode, VERR_PGM_NOT_SUPPORTED_FOR_NEM_MODE);
1637#endif
1638 PGM_LOCK_VOID(pVM);
1639
1640 /*
1641 * Lookup and validate the range.
1642 */
1643 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1644 if (RT_LIKELY(pCur))
1645 {
1646 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1647 && GCPhysPage <= pCur->Core.KeyLast))
1648 {
1649 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1650 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, PGM_UNLOCK(pVM), VERR_ACCESS_DENIED);
1651 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), PGM_UNLOCK(pVM), VERR_INVALID_PARAMETER);
1652 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, PGM_UNLOCK(pVM), VERR_INVALID_PARAMETER);
1653
1654 /*
1655 * Get and validate the pages.
1656 */
1657 PPGMPAGE pPage;
1658 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
1659 AssertReturnStmt(RT_SUCCESS_NP(rc), PGM_UNLOCK(pVM), rc);
1660 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1661 {
1662 PGM_UNLOCK(pVM);
1663 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO,
1664 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1665 VERR_PGM_PHYS_NOT_MMIO2);
1666 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1667 }
1668 Assert(PGM_PAGE_IS_ZERO(pPage));
1669
1670 /*
1671 * Do the actual remapping here.
1672 * This page now serves as an alias for the backing memory
1673 * specified as far as shadow paging is concerned.
1674 */
1675 LogFlow(("PGMHandlerPhysicalPageAliasHC: %RGp (%R[pgmpage]) alias for %RHp\n",
1676 GCPhysPage, pPage, HCPhysPageRemap));
1677 PGM_PAGE_SET_HCPHYS(pVM, pPage, HCPhysPageRemap);
1678 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_SPECIAL_ALIAS_MMIO);
1679 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
1680 PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
1681 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1682 pCur->cAliasedPages++;
1683 Assert(pCur->cAliasedPages <= pCur->cPages);
1684
1685 /* Flush its TLB entry. */
1686 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1687
1688#ifdef VBOX_WITH_NATIVE_NEM
1689 /* Tell NEM about the backing and protection change. */
1690 if (VM_IS_NEM_ENABLED(pVM))
1691 {
1692 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhysPage);
1693 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
1694 NEMHCNotifyPhysPageChanged(pVM, GCPhysPage, pVM->pgm.s.HCPhysZeroPg, PGM_PAGE_GET_HCPHYS(pPage),
1695 PGM_RAMRANGE_CALC_PAGE_R3PTR(pRam, GCPhysPage),
1696 pgmPhysPageCalcNemProtection(pPage, PGMPAGETYPE_SPECIAL_ALIAS_MMIO),
1697 PGMPAGETYPE_SPECIAL_ALIAS_MMIO, &u2State);
1698 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
1699 }
1700#endif
1701 LogFlow(("PGMHandlerPhysicalPageAliasHC: => %R[pgmpage]\n", pPage));
1702 PGM_UNLOCK(pVM);
1703 return VINF_SUCCESS;
1704 }
1705 PGM_UNLOCK(pVM);
1706 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1707 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1708 return VERR_INVALID_PARAMETER;
1709 }
1710 PGM_UNLOCK(pVM);
1711
1712 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1713 return VERR_PGM_HANDLER_NOT_FOUND;
1714}
1715
1716
1717/**
1718 * Checks if a physical range is handled
1719 *
1720 * @returns boolean
1721 * @param pVM The cross context VM structure.
1722 * @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister().
1723 * @remarks Caller must take the PGM lock...
1724 * @thread EMT.
1725 */
1726VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVMCC pVM, RTGCPHYS GCPhys)
1727{
1728 /*
1729 * Find the handler.
1730 */
1731 PGM_LOCK_VOID(pVM);
1732 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1733 if (pCur)
1734 {
1735#ifdef VBOX_STRICT
1736 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1737 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1738 Assert( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE
1739 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL
1740 || pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO);
1741#endif
1742 PGM_UNLOCK(pVM);
1743 return true;
1744 }
1745 PGM_UNLOCK(pVM);
1746 return false;
1747}
1748
1749
1750/**
1751 * Checks if it's an disabled all access handler or write access handler at the
1752 * given address.
1753 *
1754 * @returns true if it's an all access handler, false if it's a write access
1755 * handler.
1756 * @param pVM The cross context VM structure.
1757 * @param GCPhys The address of the page with a disabled handler.
1758 *
1759 * @remarks The caller, PGMR3PhysTlbGCPhys2Ptr, must hold the PGM lock.
1760 */
1761bool pgmHandlerPhysicalIsAll(PVMCC pVM, RTGCPHYS GCPhys)
1762{
1763 PGM_LOCK_VOID(pVM);
1764 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1765 if (!pCur)
1766 {
1767 PGM_UNLOCK(pVM);
1768 AssertFailed();
1769 return true;
1770 }
1771 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1772 Assert( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE
1773 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL
1774 || pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO); /* sanity */
1775 /* Only whole pages can be disabled. */
1776 Assert( pCur->Core.Key <= (GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK)
1777 && pCur->Core.KeyLast >= (GCPhys | PAGE_OFFSET_MASK));
1778
1779 bool bRet = pCurType->enmKind != PGMPHYSHANDLERKIND_WRITE;
1780 PGM_UNLOCK(pVM);
1781 return bRet;
1782}
1783
1784#ifdef VBOX_STRICT
1785
1786/**
1787 * State structure used by the PGMAssertHandlerAndFlagsInSync() function
1788 * and its AVL enumerators.
1789 */
1790typedef struct PGMAHAFIS
1791{
1792 /** The current physical address. */
1793 RTGCPHYS GCPhys;
1794 /** Number of errors. */
1795 unsigned cErrors;
1796 /** Pointer to the VM. */
1797 PVM pVM;
1798} PGMAHAFIS, *PPGMAHAFIS;
1799
1800
1801/**
1802 * Asserts that the handlers+guest-page-tables == ramrange-flags and
1803 * that the physical addresses associated with virtual handlers are correct.
1804 *
1805 * @returns Number of mismatches.
1806 * @param pVM The cross context VM structure.
1807 */
1808VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVMCC pVM)
1809{
1810 PPGM pPGM = &pVM->pgm.s;
1811 PGMAHAFIS State;
1812 State.GCPhys = 0;
1813 State.cErrors = 0;
1814 State.pVM = pVM;
1815
1816 PGM_LOCK_ASSERT_OWNER(pVM);
1817
1818 /*
1819 * Check the RAM flags against the handlers.
1820 */
1821 for (PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRangesX); pRam; pRam = pRam->CTX_SUFF(pNext))
1822 {
1823 const uint32_t cPages = pRam->cb >> PAGE_SHIFT;
1824 for (uint32_t iPage = 0; iPage < cPages; iPage++)
1825 {
1826 PGMPAGE const *pPage = &pRam->aPages[iPage];
1827 if (PGM_PAGE_HAS_ANY_HANDLERS(pPage))
1828 {
1829 State.GCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT);
1830
1831 /*
1832 * Physical first - calculate the state based on the handlers
1833 * active on the page, then compare.
1834 */
1835 if (PGM_PAGE_HAS_ANY_PHYSICAL_HANDLERS(pPage))
1836 {
1837 /* the first */
1838 PPGMPHYSHANDLER pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys);
1839 if (!pPhys)
1840 {
1841 pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys, true);
1842 if ( pPhys
1843 && pPhys->Core.Key > (State.GCPhys + PAGE_SIZE - 1))
1844 pPhys = NULL;
1845 Assert(!pPhys || pPhys->Core.Key >= State.GCPhys);
1846 }
1847 if (pPhys)
1848 {
1849 PPGMPHYSHANDLERTYPEINT pPhysType = (PPGMPHYSHANDLERTYPEINT)MMHyperHeapOffsetToPtr(pVM, pPhys->hType);
1850 unsigned uState = pPhysType->uState;
1851
1852 /* more? */
1853 while (pPhys->Core.KeyLast < (State.GCPhys | PAGE_OFFSET_MASK))
1854 {
1855 PPGMPHYSHANDLER pPhys2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers,
1856 pPhys->Core.KeyLast + 1, true);
1857 if ( !pPhys2
1858 || pPhys2->Core.Key > (State.GCPhys | PAGE_OFFSET_MASK))
1859 break;
1860 PPGMPHYSHANDLERTYPEINT pPhysType2 = (PPGMPHYSHANDLERTYPEINT)MMHyperHeapOffsetToPtr(pVM, pPhys2->hType);
1861 uState = RT_MAX(uState, pPhysType2->uState);
1862 pPhys = pPhys2;
1863 }
1864
1865 /* compare.*/
1866 if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != uState
1867 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
1868 {
1869 AssertMsgFailed(("ram range vs phys handler flags mismatch. GCPhys=%RGp state=%d expected=%d %s\n",
1870 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), uState, pPhysType->pszDesc));
1871 State.cErrors++;
1872 }
1873 }
1874 else
1875 {
1876 AssertMsgFailed(("ram range vs phys handler mismatch. no handler for GCPhys=%RGp\n", State.GCPhys));
1877 State.cErrors++;
1878 }
1879 }
1880 }
1881 } /* foreach page in ram range. */
1882 } /* foreach ram range. */
1883
1884 /*
1885 * Do the reverse check for physical handlers.
1886 */
1887 /** @todo */
1888
1889 return State.cErrors;
1890}
1891
1892#endif /* VBOX_STRICT */
1893
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