1 | /* $Id: PGMAllMap.cpp 16418 2009-01-30 14:49:06Z vboxsync $ */
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2 | /** @file
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3 | * PGM - Page Manager and Monitor - All context code.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2007 Sun Microsystems, Inc.
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | *
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17 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
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18 | * Clara, CA 95054 USA or visit http://www.sun.com if you need
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19 | * additional information or have any questions.
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20 | */
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21 |
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22 | /*******************************************************************************
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23 | * Header Files *
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24 | *******************************************************************************/
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25 | #define LOG_GROUP LOG_GROUP_PGM
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26 | #include <VBox/pgm.h>
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27 | #include "PGMInternal.h"
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28 | #include <VBox/vm.h>
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29 | #include <iprt/assert.h>
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30 | #include <iprt/asm.h>
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31 | #include <VBox/err.h>
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32 |
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33 |
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34 | /**
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35 | * Maps a range of physical pages at a given virtual address
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36 | * in the guest context.
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37 | *
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38 | * The GC virtual address range must be within an existing mapping.
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39 | *
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40 | * @returns VBox status code.
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41 | * @param pVM The virtual machine.
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42 | * @param GCPtr Where to map the page(s). Must be page aligned.
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43 | * @param HCPhys Start of the range of physical pages. Must be page aligned.
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44 | * @param cbPages Number of bytes to map. Must be page aligned.
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45 | * @param fFlags Page flags (X86_PTE_*).
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46 | */
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47 | VMMDECL(int) PGMMap(PVM pVM, RTGCUINTPTR GCPtr, RTHCPHYS HCPhys, uint32_t cbPages, unsigned fFlags)
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48 | {
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49 | AssertMsg(pVM->pgm.s.offVM, ("Bad init order\n"));
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50 |
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51 | /*
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52 | * Validate input.
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53 | */
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54 | AssertMsg(RT_ALIGN_T(GCPtr, PAGE_SIZE, RTGCUINTPTR) == GCPtr, ("Invalid alignment GCPtr=%#x\n", GCPtr));
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55 | AssertMsg(cbPages > 0 && RT_ALIGN_32(cbPages, PAGE_SIZE) == cbPages, ("Invalid cbPages=%#x\n", cbPages));
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56 | AssertMsg(!(fFlags & X86_PDE_PG_MASK), ("Invalid flags %#x\n", fFlags));
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57 |
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58 | /* hypervisor defaults */
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59 | if (!fFlags)
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60 | fFlags = X86_PTE_P | X86_PTE_A | X86_PTE_D;
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61 |
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62 | /*
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63 | * Find the mapping.
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64 | */
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65 | PPGMMAPPING pCur = pVM->pgm.s.CTX_SUFF(pMappings);
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66 | while (pCur)
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67 | {
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68 | if (GCPtr - pCur->GCPtr < pCur->cb)
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69 | {
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70 | if (GCPtr + cbPages - 1 > pCur->GCPtrLast)
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71 | {
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72 | AssertMsgFailed(("Invalid range!!\n"));
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73 | return VERR_INVALID_PARAMETER;
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74 | }
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75 |
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76 | /*
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77 | * Setup PTE.
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78 | */
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79 | X86PTEPAE Pte;
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80 | Pte.u = fFlags | (HCPhys & X86_PTE_PAE_PG_MASK);
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81 |
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82 | /*
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83 | * Update the page tables.
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84 | */
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85 | for (;;)
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86 | {
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87 | RTGCUINTPTR off = GCPtr - pCur->GCPtr;
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88 | const unsigned iPT = off >> X86_PD_SHIFT;
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89 | const unsigned iPageNo = (off >> PAGE_SHIFT) & X86_PT_MASK;
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90 |
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91 | /* 32-bit */
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92 | pCur->aPTs[iPT].CTX_SUFF(pPT)->a[iPageNo].u = (uint32_t)Pte.u; /* ASSUMES HCPhys < 4GB and/or that we're never gonna do 32-bit on a PAE host! */
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93 |
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94 | /* pae */
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95 | pCur->aPTs[iPT].CTX_SUFF(paPaePTs)[iPageNo / 512].a[iPageNo % 512].u = Pte.u;
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96 |
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97 | /* next */
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98 | cbPages -= PAGE_SIZE;
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99 | if (!cbPages)
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100 | break;
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101 | GCPtr += PAGE_SIZE;
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102 | Pte.u += PAGE_SIZE;
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103 | }
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104 |
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105 | return VINF_SUCCESS;
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106 | }
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107 |
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108 | /* next */
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109 | pCur = pCur->CTX_SUFF(pNext);
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110 | }
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111 |
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112 | AssertMsgFailed(("GCPtr=%#x was not found in any mapping ranges!\n", GCPtr));
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113 | return VERR_INVALID_PARAMETER;
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114 | }
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115 |
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116 |
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117 | /**
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118 | * Sets (replaces) the page flags for a range of pages in a mapping.
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119 | *
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120 | * @returns VBox status.
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121 | * @param pVM VM handle.
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122 | * @param GCPtr Virtual address of the first page in the range.
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123 | * @param cb Size (in bytes) of the range to apply the modification to.
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124 | * @param fFlags Page flags X86_PTE_*, excluding the page mask of course.
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125 | */
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126 | VMMDECL(int) PGMMapSetPage(PVM pVM, RTGCPTR GCPtr, uint64_t cb, uint64_t fFlags)
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127 | {
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128 | return PGMMapModifyPage(pVM, GCPtr, cb, fFlags, 0);
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129 | }
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130 |
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131 |
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132 | /**
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133 | * Modify page flags for a range of pages in a mapping.
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134 | *
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135 | * The existing flags are ANDed with the fMask and ORed with the fFlags.
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136 | *
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137 | * @returns VBox status code.
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138 | * @param pVM VM handle.
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139 | * @param GCPtr Virtual address of the first page in the range.
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140 | * @param cb Size (in bytes) of the range to apply the modification to.
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141 | * @param fFlags The OR mask - page flags X86_PTE_*, excluding the page mask of course.
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142 | * @param fMask The AND mask - page flags X86_PTE_*, excluding the page mask of course.
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143 | */
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144 | VMMDECL(int) PGMMapModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
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145 | {
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146 | /*
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147 | * Validate input.
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148 | */
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149 | AssertMsg(!(fFlags & X86_PTE_PAE_PG_MASK), ("fFlags=%#x\n", fFlags));
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150 | Assert(cb);
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151 |
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152 | /*
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153 | * Align the input.
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154 | */
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155 | cb += (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK;
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156 | cb = RT_ALIGN_Z(cb, PAGE_SIZE);
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157 | GCPtr = (RTGCPTR)((RTGCUINTPTR)GCPtr & PAGE_BASE_GC_MASK);
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158 |
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159 | /*
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160 | * Find the mapping.
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161 | */
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162 | PPGMMAPPING pCur = pVM->pgm.s.CTX_SUFF(pMappings);
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163 | while (pCur)
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164 | {
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165 | RTGCUINTPTR off = (RTGCUINTPTR)GCPtr - (RTGCUINTPTR)pCur->GCPtr;
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166 | if (off < pCur->cb)
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167 | {
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168 | AssertMsgReturn(off + cb <= pCur->cb,
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169 | ("Invalid page range %#x LB%#x. mapping '%s' %#x to %#x\n",
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170 | GCPtr, cb, pCur->pszDesc, pCur->GCPtr, pCur->GCPtrLast),
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171 | VERR_INVALID_PARAMETER);
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172 |
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173 | /*
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174 | * Perform the requested operation.
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175 | */
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176 | while (cb > 0)
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177 | {
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178 | unsigned iPT = off >> X86_PD_SHIFT;
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179 | unsigned iPTE = (off >> PAGE_SHIFT) & X86_PT_MASK;
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180 | while (cb > 0 && iPTE < RT_ELEMENTS(pCur->aPTs[iPT].CTX_SUFF(pPT)->a))
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181 | {
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182 | /* 32-Bit */
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183 | pCur->aPTs[iPT].CTX_SUFF(pPT)->a[iPTE].u &= fMask | X86_PTE_PG_MASK;
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184 | pCur->aPTs[iPT].CTX_SUFF(pPT)->a[iPTE].u |= fFlags & ~X86_PTE_PG_MASK;
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185 |
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186 | /* PAE */
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187 | pCur->aPTs[iPT].CTX_SUFF(paPaePTs)[iPTE / 512].a[iPTE % 512].u &= fMask | X86_PTE_PAE_PG_MASK;
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188 | pCur->aPTs[iPT].CTX_SUFF(paPaePTs)[iPTE / 512].a[iPTE % 512].u |= fFlags & ~X86_PTE_PAE_PG_MASK;
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189 |
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190 | /* invalidate tls */
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191 | PGM_INVL_PG((RTGCUINTPTR)pCur->GCPtr + off);
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192 |
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193 | /* next */
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194 | iPTE++;
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195 | cb -= PAGE_SIZE;
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196 | off += PAGE_SIZE;
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197 | }
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198 | }
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199 |
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200 | return VINF_SUCCESS;
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201 | }
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202 | /* next */
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203 | pCur = pCur->CTX_SUFF(pNext);
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204 | }
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205 |
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206 | AssertMsgFailed(("Page range %#x LB%#x not found\n", GCPtr, cb));
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207 | return VERR_INVALID_PARAMETER;
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208 | }
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209 |
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210 |
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211 | /**
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212 | * Sets all PDEs involved with the mapping in the shadow page table.
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213 | *
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214 | * @param pVM The VM handle.
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215 | * @param pMap Pointer to the mapping in question.
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216 | * @param iNewPDE The index of the 32-bit PDE corresponding to the base of the mapping.
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217 | */
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218 | void pgmMapSetShadowPDEs(PVM pVM, PPGMMAPPING pMap, unsigned iNewPDE)
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219 | {
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220 | if (!pgmMapAreMappingsEnabled(&pVM->pgm.s))
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221 | return;
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222 |
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223 | #ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
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224 | if (!pVM->pgm.s.CTX_SUFF(pShwPageCR3))
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225 | return; /* too early */
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226 | #endif
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227 |
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228 | PGMMODE enmShadowMode = PGMGetShadowMode(pVM);
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229 | Assert(enmShadowMode <= PGMMODE_PAE_NX);
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230 |
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231 | /*
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232 | * Init the page tables and insert them into the page directories.
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233 | */
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234 | unsigned i = pMap->cPTs;
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235 | iNewPDE += i;
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236 | while (i-- > 0)
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237 | {
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238 | iNewPDE--;
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239 |
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240 | switch(enmShadowMode)
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241 | {
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242 | case PGMMODE_32_BIT:
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243 | {
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244 | PX86PD pShw32BitPd = pgmShwGet32BitPDPtr(&pVM->pgm.s);
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245 | AssertFatal(pShw32BitPd);
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246 |
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247 | if (pShw32BitPd->a[iNewPDE].n.u1Present)
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248 | {
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249 | Assert(!(pShw32BitPd->a[iNewPDE].u & PGM_PDFLAGS_MAPPING));
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250 | pgmPoolFree(pVM, pShw32BitPd->a[iNewPDE].u & X86_PDE_PG_MASK, pVM->pgm.s.CTX_SUFF(pShwPageCR3)->idx, iNewPDE);
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251 | }
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252 |
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253 | X86PDE Pde;
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254 | /* Default mapping page directory flags are read/write and supervisor; individual page attributes determine the final flags */
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255 | Pde.u = PGM_PDFLAGS_MAPPING | X86_PDE_P | X86_PDE_A | X86_PDE_RW | X86_PDE_US | (uint32_t)pMap->aPTs[i].HCPhysPT;
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256 | pShw32BitPd->a[iNewPDE] = Pde;
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257 | break;
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258 | }
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259 |
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260 | case PGMMODE_PAE:
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261 | case PGMMODE_PAE_NX:
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262 | {
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263 | PX86PDPT pShwPdpt;
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264 | PX86PDPAE pShwPaePd;
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265 | const unsigned iPdPt = iNewPDE / 256;
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266 | unsigned iPDE = iNewPDE * 2 % 512;
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267 |
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268 | pShwPdpt = pgmShwGetPaePDPTPtr(&pVM->pgm.s);
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269 | Assert(pShwPdpt);
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270 | pShwPaePd = pgmShwGetPaePDPtr(&pVM->pgm.s, (iPdPt << X86_PDPT_SHIFT));
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271 | AssertFatal(pShwPaePd);
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272 |
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273 | PPGMPOOLPAGE pPoolPagePde = pgmPoolGetPageByHCPhys(pVM, pShwPdpt->a[iPdPt].u & X86_PDPE_PG_MASK);
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274 | AssertFatal(pPoolPagePde);
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275 |
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276 | if (pShwPaePd->a[iPDE].n.u1Present)
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277 | {
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278 | Assert(!(pShwPaePd->a[iPDE].u & PGM_PDFLAGS_MAPPING));
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279 | pgmPoolFree(pVM, pShwPaePd->a[iPDE].u & X86_PDE_PG_MASK, pPoolPagePde->idx, iNewPDE);
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280 | }
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281 |
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282 | X86PDEPAE PdePae0;
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283 | PdePae0.u = PGM_PDFLAGS_MAPPING | X86_PDE_P | X86_PDE_A | X86_PDE_RW | X86_PDE_US | pMap->aPTs[i].HCPhysPaePT0;
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284 | pShwPaePd->a[iPDE] = PdePae0;
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285 |
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286 | /* 2nd 2 MB PDE of the 4 MB region */
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287 | iPDE++;
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288 | AssertFatal(iPDE < 512);
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289 |
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290 | if (pShwPaePd->a[iPDE].n.u1Present)
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291 | {
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292 | Assert(!(pShwPaePd->a[iPDE].u & PGM_PDFLAGS_MAPPING));
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293 | pgmPoolFree(pVM, pShwPaePd->a[iPDE].u & X86_PDE_PG_MASK, pPoolPagePde->idx, iNewPDE);
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294 | }
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295 |
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296 | X86PDEPAE PdePae1;
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297 | PdePae1.u = PGM_PDFLAGS_MAPPING | X86_PDE_P | X86_PDE_A | X86_PDE_RW | X86_PDE_US | pMap->aPTs[i].HCPhysPaePT1;
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298 | pShwPaePd->a[iPDE] = PdePae1;
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299 |
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300 | /* Set the PGM_PDFLAGS_MAPPING flag in the page directory pointer entry. (legacy PAE guest mode) */
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301 | pShwPdpt->a[iPdPt].u |= PGM_PLXFLAGS_MAPPING;
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302 | }
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303 |
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304 | default:
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305 | AssertFailed();
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306 | break;
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307 | }
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308 | }
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309 | }
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310 |
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311 | /**
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312 | * Clears all PDEs involved with the mapping in the shadow page table.
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313 | *
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314 | * @param pVM The VM handle.
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315 | * @param pMap Pointer to the mapping in question.
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316 | * @param iOldPDE The index of the 32-bit PDE corresponding to the base of the mapping.
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317 | */
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318 | void pgmMapClearShadowPDEs(PVM pVM, PPGMMAPPING pMap, unsigned iOldPDE)
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319 | {
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320 | unsigned i = pMap->cPTs;
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321 | PGMMODE enmShadowMode = PGMGetShadowMode(pVM);
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322 |
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323 | if (!pgmMapAreMappingsEnabled(&pVM->pgm.s))
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324 | return;
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325 |
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326 | #ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
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327 | if (!pVM->pgm.s.CTX_SUFF(pShwPageCR3))
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328 | return; /* too early */
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329 | #endif
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330 |
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331 | iOldPDE += i;
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332 | while (i-- > 0)
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333 | {
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334 | iOldPDE--;
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335 |
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336 | switch(enmShadowMode)
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337 | {
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338 | case PGMMODE_32_BIT:
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339 | {
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340 | PX86PD pShw32BitPd = pgmShwGet32BitPDPtr(&pVM->pgm.s);
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341 | AssertFatal(pShw32BitPd);
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342 |
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343 | pShw32BitPd->a[iOldPDE].u = 0;
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344 | break;
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345 | }
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346 |
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347 | case PGMMODE_PAE:
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348 | case PGMMODE_PAE_NX:
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349 | {
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350 | PX86PDPT pPdpt = NULL;
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351 | PX86PDPAE pShwPaePd = NULL;
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352 |
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353 | const unsigned iPD = iOldPDE / 256; /* iOldPDE * 2 / 512; iOldPDE is in 4 MB pages */
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354 | unsigned iPDE = iOldPDE * 2 % 512;
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355 | pPdpt = pgmShwGetPaePDPTPtr(&pVM->pgm.s);
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356 | pShwPaePd = pgmShwGetPaePDPtr(&pVM->pgm.s, (iPD << X86_PDPT_SHIFT));
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357 | AssertFatal(pShwPaePd);
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358 |
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359 | pShwPaePd->a[iPDE].u = 0;
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360 |
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361 | iPDE++;
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362 | AssertFatal(iPDE < 512);
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363 |
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364 | pShwPaePd->a[iPDE].u = 0;
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365 | /* Clear the PGM_PDFLAGS_MAPPING flag for the page directory pointer entry. (legacy PAE guest mode) */
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366 | pPdpt->a[iPD].u &= ~PGM_PLXFLAGS_MAPPING;
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367 | break;
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368 | }
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369 |
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370 | default:
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371 | AssertFailed();
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372 | break;
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373 | }
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374 | }
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375 | }
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376 |
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377 | /**
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378 | * Apply the hypervisor mappings to the active CR3.
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379 | *
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380 | * @returns VBox status.
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381 | * @param pVM The virtual machine.
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382 | */
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383 | VMMDECL(int) PGMMapActivateAll(PVM pVM)
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384 | {
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385 | /*
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386 | * Can skip this if mappings are safely fixed.
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387 | */
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388 | if (pVM->pgm.s.fMappingsFixed)
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389 | return VINF_SUCCESS;
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390 |
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391 | #ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
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392 | if (!pVM->pgm.s.CTX_SUFF(pShwPageCR3))
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393 | return VINF_SUCCESS; /* too early */
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394 | #endif
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395 |
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396 | Assert(PGMGetGuestMode(pVM) >= PGMMODE_32_BIT && PGMGetGuestMode(pVM) <= PGMMODE_PAE_NX);
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397 |
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398 | /*
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399 | * Iterate mappings.
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400 | */
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401 | for (PPGMMAPPING pCur = pVM->pgm.s.CTX_SUFF(pMappings); pCur; pCur = pCur->CTX_SUFF(pNext))
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402 | {
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403 | unsigned iPDE = pCur->GCPtr >> X86_PD_SHIFT;
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404 |
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405 | pgmMapSetShadowPDEs(pVM, pCur, iPDE);
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406 | }
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407 |
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408 | return VINF_SUCCESS;
|
---|
409 | }
|
---|
410 |
|
---|
411 | /**
|
---|
412 | * Remove the hypervisor mappings from the active CR3
|
---|
413 | *
|
---|
414 | * @returns VBox status.
|
---|
415 | * @param pVM The virtual machine.
|
---|
416 | */
|
---|
417 | VMMDECL(int) PGMMapDeactivateAll(PVM pVM)
|
---|
418 | {
|
---|
419 | /*
|
---|
420 | * Can skip this if mappings are safely fixed.
|
---|
421 | */
|
---|
422 | if (pVM->pgm.s.fMappingsFixed)
|
---|
423 | return VINF_SUCCESS;
|
---|
424 |
|
---|
425 | #ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
|
---|
426 | if (!pVM->pgm.s.CTX_SUFF(pShwPageCR3))
|
---|
427 | return VINF_SUCCESS; /* too early */
|
---|
428 |
|
---|
429 | Assert(PGMGetGuestMode(pVM) >= PGMMODE_32_BIT && PGMGetGuestMode(pVM) <= PGMMODE_PAE_NX);
|
---|
430 | #endif
|
---|
431 |
|
---|
432 | /*
|
---|
433 | * Iterate mappings.
|
---|
434 | */
|
---|
435 | for (PPGMMAPPING pCur = pVM->pgm.s.CTX_SUFF(pMappings); pCur; pCur = pCur->CTX_SUFF(pNext))
|
---|
436 | {
|
---|
437 | unsigned iPDE = pCur->GCPtr >> X86_PD_SHIFT;
|
---|
438 |
|
---|
439 | pgmMapClearShadowPDEs(pVM, pCur, iPDE);
|
---|
440 | }
|
---|
441 | return VINF_SUCCESS;
|
---|
442 | }
|
---|