PGMAllPhys.cpp@ 14082

Last change on this file since 14082 was 14075, checked in by vboxsync, 16 years ago
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1	/* $Id: PGMAllPhys.cpp 14075 2008-11-11 00:14:05Z vboxsync $ */
2	/** @file
3	* PGM - Page Manager and Monitor, Physical Memory Addressing.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22	/*******************************************************************************
23	* Defined Constants And Macros *
24	*******************************************************************************/
25	/** @def PGM_IGNORE_RAM_FLAGS_RESERVED
26	* Don't respect the MM_RAM_FLAGS_RESERVED flag when converting to HC addresses.
27	*
28	* Since this flag is currently incorrectly kept set for ROM regions we will
29	* have to ignore it for now so we don't break stuff.
30	*
31	* @todo this has been fixed now I believe, remove this hack.
32	*/
33	#define PGM_IGNORE_RAM_FLAGS_RESERVED
34
35
36	/*******************************************************************************
37	* Header Files *
38	*******************************************************************************/
39	#define LOG_GROUP LOG_GROUP_PGM_PHYS
40	#include <VBox/pgm.h>
41	#include <VBox/trpm.h>
42	#include <VBox/vmm.h>
43	#include <VBox/iom.h>
44	#include <VBox/em.h>
45	#include <VBox/rem.h>
46	#include "PGMInternal.h"
47	#include <VBox/vm.h>
48	#include <VBox/param.h>
49	#include <VBox/err.h>
50	#include <iprt/assert.h>
51	#include <iprt/string.h>
52	#include <iprt/asm.h>
53	#include <VBox/log.h>
54	#ifdef IN_RING3
55	# include <iprt/thread.h>
56	#endif
57
58
59
60	#ifndef IN_RING3
61
62	/**
63	* \#PF Handler callback for Guest ROM range write access.
64	* We simply ignore the writes or fall back to the recompiler if we don't support the instruction.
65	*
66	* @returns VBox status code (appropritate for trap handling and GC return).
67	* @param pVM VM Handle.
68	* @param uErrorCode CPU Error code.
69	* @param pRegFrame Trap register frame.
70	* @param pvFault The fault address (cr2).
71	* @param GCPhysFault The GC physical address corresponding to pvFault.
72	* @param pvUser User argument. Pointer to the ROM range structure.
73	*/
74	VMMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void pvFault, RTGCPHYS GCPhysFault, void pvUser)
75	{
76	int rc;
77	#ifdef VBOX_WITH_NEW_PHYS_CODE
78	PPGMROMRANGE pRom = (PPGMROMRANGE)pvUser;
79	uint32_t iPage = GCPhysFault - pRom->GCPhys;
80	Assert(iPage < (pRom->cb >> PAGE_SHIFT));
81	switch (pRom->aPages[iPage].enmProt)
82	{
83	case PGMROMPROT_READ_ROM_WRITE_IGNORE:
84	case PGMROMPROT_READ_RAM_WRITE_IGNORE:
85	{
86	#endif
87	/*
88	* If it's a simple instruction which doesn't change the cpu state
89	* we will simply skip it. Otherwise we'll have to defer it to REM.
90	*/
91	uint32_t cbOp;
92	DISCPUSTATE Cpu;
93	rc = EMInterpretDisasOne(pVM, pRegFrame, &Cpu, &cbOp);
94	if ( RT_SUCCESS(rc)
95	&& Cpu.mode == CPUMODE_32BIT /** @todo why does this matter? */
96	&& !(Cpu.prefix & (PREFIX_REPNE \| PREFIX_REP \| PREFIX_SEG)))
97	{
98	switch (Cpu.opcode)
99	{
100	/** @todo Find other instructions we can safely skip, possibly
101	* adding this kind of detection to DIS or EM. */
102	case OP_MOV:
103	pRegFrame->rip += cbOp;
104	STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestROMWriteHandled);
105	return VINF_SUCCESS;
106	}
107	}
108	else if (RT_UNLIKELY(rc == VERR_INTERNAL_ERROR))
109	return rc;
110	#ifdef VBOX_WITH_NEW_PHYS_CODE
111	break;
112	}
113
114	case PGMROMPROT_READ_RAM_WRITE_RAM:
115	rc = PGMHandlerPhysicalPageTempOff(pVM, pRom->GCPhys, GCPhysFault & X86_PTE_PG_MASK);
116	AssertRC(rc);
117	case PGMROMPROT_READ_ROM_WRITE_RAM:
118	/* Handle it in ring-3 because it's way easier there. */
119	break;
120
121	default:
122	AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhysFault=%RGp\n",
123	pRom->aPages[iPage].enmProt, iPage, GCPhysFault),
124	VERR_INTERNAL_ERROR);
125	}
126	#endif
127
128	STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestROMWriteUnhandled);
129	return VINF_EM_RAW_EMULATE_INSTR;
130	}
131
132	#endif /* IN_RING3 */
133
134	/**
135	* Checks if Address Gate 20 is enabled or not.
136	*
137	* @returns true if enabled.
138	* @returns false if disabled.
139	* @param pVM VM handle.
140	*/
141	VMMDECL(bool) PGMPhysIsA20Enabled(PVM pVM)
142	{
143	LogFlow(("PGMPhysIsA20Enabled %d\n", pVM->pgm.s.fA20Enabled));
144	return !!pVM->pgm.s.fA20Enabled ; /* stupid MS compiler doesn't trust me. */
145	}
146
147
148	/**
149	* Validates a GC physical address.
150	*
151	* @returns true if valid.
152	* @returns false if invalid.
153	* @param pVM The VM handle.
154	* @param GCPhys The physical address to validate.
155	*/
156	VMMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys)
157	{
158	PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
159	return pPage != NULL;
160	}
161
162
163	/**
164	* Checks if a GC physical address is a normal page,
165	* i.e. not ROM, MMIO or reserved.
166	*
167	* @returns true if normal.
168	* @returns false if invalid, ROM, MMIO or reserved page.
169	* @param pVM The VM handle.
170	* @param GCPhys The physical address to check.
171	*/
172	VMMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys)
173	{
174	PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
175	return pPage
176	&& !(pPage->HCPhys & (MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO2));
177	}
178
179
180	/**
181	* Converts a GC physical address to a HC physical address.
182	*
183	* @returns VINF_SUCCESS on success.
184	* @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
185	* page but has no physical backing.
186	* @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
187	* GC physical address.
188	*
189	* @param pVM The VM handle.
190	* @param GCPhys The GC physical address to convert.
191	* @param pHCPhys Where to store the HC physical address on success.
192	*/
193	VMMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
194	{
195	PPGMPAGE pPage;
196	int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhys, &pPage);
197	if (RT_FAILURE(rc))
198	return rc;
199
200	#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
201	if (RT_UNLIKELY(pPage->HCPhys & MM_RAM_FLAGS_RESERVED)) /** @todo PAGE FLAGS */
202	return VERR_PGM_PHYS_PAGE_RESERVED;
203	#endif
204
205	*pHCPhys = PGM_PAGE_GET_HCPHYS(pPage) \| (GCPhys & PAGE_OFFSET_MASK);
206	return VINF_SUCCESS;
207	}
208
209
210	/**
211	* Invalidates the GC page mapping TLB.
212	*
213	* @param pVM The VM handle.
214	*/
215	VMMDECL(void) PGMPhysInvalidatePageGCMapTLB(PVM pVM)
216	{
217	/* later */
218	NOREF(pVM);
219	}
220
221
222	/**
223	* Invalidates the ring-0 page mapping TLB.
224	*
225	* @param pVM The VM handle.
226	*/
227	VMMDECL(void) PGMPhysInvalidatePageR0MapTLB(PVM pVM)
228	{
229	PGMPhysInvalidatePageR3MapTLB(pVM);
230	}
231
232
233	/**
234	* Invalidates the ring-3 page mapping TLB.
235	*
236	* @param pVM The VM handle.
237	*/
238	VMMDECL(void) PGMPhysInvalidatePageR3MapTLB(PVM pVM)
239	{
240	pgmLock(pVM);
241	for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.PhysTlbHC.aEntries); i++)
242	{
243	pVM->pgm.s.PhysTlbHC.aEntries[i].GCPhys = NIL_RTGCPHYS;
244	pVM->pgm.s.PhysTlbHC.aEntries[i].pPage = 0;
245	pVM->pgm.s.PhysTlbHC.aEntries[i].pMap = 0;
246	pVM->pgm.s.PhysTlbHC.aEntries[i].pv = 0;
247	}
248	pgmUnlock(pVM);
249	}
250
251
252	/**
253	* Frees the specified RAM page.
254	*
255	* This is used by ballooning and remapping MMIO2.
256	*
257	* @param pVM Pointer to the shared VM structure.
258	* @param pPage Pointer to the page structure.
259	* @param GCPhys The guest physical address of the page, if applicable.
260	*/
261	void pgmPhysFreePage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
262	{
263	AssertFatal(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM);
264
265	/** @todo implement this... */
266	AssertFatalFailed();
267	}
268
269
270	/**
271	* Makes sure that there is at least one handy page ready for use.
272	*
273	* This will also take the appropriate actions when reaching water-marks.
274	*
275	* @returns The following VBox status codes.
276	* @retval VINF_SUCCESS on success.
277	* @retval VERR_EM_NO_MEMORY if we're really out of memory.
278	*
279	* @param pVM The VM handle.
280	*
281	* @remarks Must be called from within the PGM critical section. It may
282	* nip back to ring-3/0 in some cases.
283	*/
284	static int pgmPhysEnsureHandyPage(PVM pVM)
285	{
286	/** @remarks
287	* low-water mark logic for R0 & GC:
288	* - 75%: Set FF.
289	* - 50%: Force return to ring-3 ASAP.
290	*
291	* For ring-3 there is a little problem wrt to the recompiler, so:
292	* - 75%: Set FF.
293	* - 50%: Try allocate pages; on failure we'll force REM to quite ASAP.
294	*
295	* The basic idea is that we should be able to get out of any situation with
296	* only 50% of handy pages remaining.
297	*
298	* At the moment we'll not adjust the number of handy pages relative to the
299	* actual VM RAM committment, that's too much work for now.
300	*/
301	Assert(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages));
302	if ( !pVM->pgm.s.cHandyPages
303	#ifdef IN_RING3
304	\|\| pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 2 /* 50% */
305	#endif
306	)
307	{
308	Log(("PGM: cHandyPages=%u out of %u -> allocate more\n", pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
309	#ifdef IN_RING3
310	int rc = SUPCallVMMR0Ex(pVM->pVMR0, VMMR0_DO_PGM_ALLOCATE_HANDY_PAGES, 0, NULL);
311	#elif defined(IN_RING0)
312	/** @todo call PGMR0PhysAllocateHandyPages directly - need to make sure we can call kernel code first and deal with the seeding fallback. */
313	int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_ALLOCATE_HANDY_PAGES, 0);
314	#else
315	int rc = VMMGCCallHost(pVM, VMMCALLHOST_PGM_ALLOCATE_HANDY_PAGES, 0);
316	#endif
317	if (RT_UNLIKELY(rc != VINF_SUCCESS))
318	{
319	Assert(rc == VINF_EM_NO_MEMORY);
320	if (!pVM->pgm.s.cHandyPages)
321	{
322	LogRel(("PGM: no more handy pages!\n"));
323	return VERR_EM_NO_MEMORY;
324	}
325	Assert(VM_FF_ISSET(pVM, VM_FF_PGM_NEED_HANDY_PAGES));
326	#ifdef IN_RING3
327	REMR3NotifyFF(pVM);
328	#else
329	VM_FF_SET(pVM, VM_FF_TO_R3);
330	#endif
331	}
332	Assert(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages));
333	}
334	else if (pVM->pgm.s.cHandyPages - 1 <= (RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 4) * 3) /* 75% */
335	{
336	VM_FF_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
337	#ifndef IN_RING3
338	if (pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 2)
339	{
340	Log(("PGM: VM_FF_TO_R3 - cHandyPages=%u out of %u\n", pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
341	VM_FF_SET(pVM, VM_FF_TO_R3);
342	}
343	#endif
344	}
345
346	return VINF_SUCCESS;
347	}
348
349
350	/**
351	* Replace a zero or shared page with new page that we can write to.
352	*
353	* @returns The following VBox status codes.
354	* @retval VINF_SUCCESS on success, pPage is modified.
355	* @retval VERR_EM_NO_MEMORY if we're totally out of memory.
356	*
357	* @todo Propagate VERR_EM_NO_MEMORY up the call tree.
358	*
359	* @param pVM The VM address.
360	* @param pPage The physical page tracking structure. This will
361	* be modified on success.
362	* @param GCPhys The address of the page.
363	*
364	* @remarks Must be called from within the PGM critical section. It may
365	* nip back to ring-3/0 in some cases.
366	*
367	* @remarks This function shouldn't really fail, however if it does
368	* it probably means we've screwed up the size of the amount
369	* and/or the low-water mark of handy pages. Or, that some
370	* device I/O is causing a lot of pages to be allocated while
371	* while the host is in a low-memory condition.
372	*/
373	int pgmPhysAllocPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
374	{
375	/*
376	* Ensure that we've got a page handy, take it and use it.
377	*/
378	int rc = pgmPhysEnsureHandyPage(pVM);
379	if (RT_FAILURE(rc))
380	{
381	Assert(rc == VERR_EM_NO_MEMORY);
382	return rc;
383	}
384	AssertMsg(PGM_PAGE_IS_ZERO(pPage) \|\| PGM_PAGE_IS_SHARED(pPage), ("%d %RGp\n", PGM_PAGE_GET_STATE(pPage), GCPhys));
385	Assert(!PGM_PAGE_IS_RESERVED(pPage));
386	Assert(!PGM_PAGE_IS_MMIO(pPage));
387
388	uint32_t iHandyPage = --pVM->pgm.s.cHandyPages;
389	Assert(iHandyPage < RT_ELEMENTS(pVM->pgm.s.aHandyPages));
390	Assert(pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys != NIL_RTHCPHYS);
391	Assert(!(pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys & ~X86_PTE_PAE_PG_MASK));
392	Assert(pVM->pgm.s.aHandyPages[iHandyPage].idPage != NIL_GMM_PAGEID);
393	Assert(pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage == NIL_GMM_PAGEID);
394
395	/*
396	* There are one or two action to be taken the next time we allocate handy pages:
397	* - Tell the GMM (global memory manager) what the page is being used for.
398	* (Speeds up replacement operations - sharing and defragmenting.)
399	* - If the current backing is shared, it must be freed.
400	*/
401	const RTHCPHYS HCPhys = pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys;
402	pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys = GCPhys;
403
404	if (PGM_PAGE_IS_SHARED(pPage))
405	{
406	pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage = PGM_PAGE_GET_PAGEID(pPage);
407	Assert(PGM_PAGE_GET_PAGEID(pPage) != NIL_GMM_PAGEID);
408	VM_FF_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
409
410	Log2(("PGM: Replaced shared page %#x at %RGp with %#x / %RHp\n", PGM_PAGE_GET_PAGEID(pPage),
411	GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
412	STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,PageReplaceShared));
413	pVM->pgm.s.cSharedPages--;
414	/** @todo err.. what about copying the page content? */
415	}
416	else
417	{
418	Log2(("PGM: Replaced zero page %RGp with %#x / %RHp\n", GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
419	STAM_COUNTER_INC(&pVM->pgm.s.StatRZPageReplaceZero);
420	pVM->pgm.s.cZeroPages--;
421	/** @todo verify that the handy page is zero! */
422	}
423
424	/*
425	* Do the PGMPAGE modifications.
426	*/
427	pVM->pgm.s.cPrivatePages++;
428	PGM_PAGE_SET_HCPHYS(pPage, HCPhys);
429	PGM_PAGE_SET_PAGEID(pPage, pVM->pgm.s.aHandyPages[iHandyPage].idPage);
430	PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
431
432	return VINF_SUCCESS;
433	}
434
435
436	/**
437	* Deal with pages that are not writable, i.e. not in the ALLOCATED state.
438	*
439	* @returns VBox status code.
440	* @retval VINF_SUCCESS on success.
441	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
442	*
443	* @param pVM The VM address.
444	* @param pPage The physical page tracking structure.
445	* @param GCPhys The address of the page.
446	*
447	* @remarks Called from within the PGM critical section.
448	*/
449	int pgmPhysPageMakeWritable(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
450	{
451	switch (PGM_PAGE_GET_STATE(pPage))
452	{
453	case PGM_PAGE_STATE_WRITE_MONITORED:
454	PGM_PAGE_SET_WRITTEN_TO(pPage);
455	PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
456	/* fall thru */
457	default: /* to shut up GCC */
458	case PGM_PAGE_STATE_ALLOCATED:
459	return VINF_SUCCESS;
460
461	/*
462	* Zero pages can be dummy pages for MMIO or reserved memory,
463	* so we need to check the flags before joining cause with
464	* shared page replacement.
465	*/
466	case PGM_PAGE_STATE_ZERO:
467	if ( PGM_PAGE_IS_MMIO(pPage)
468	\|\| PGM_PAGE_IS_RESERVED(pPage))
469	return VERR_PGM_PHYS_PAGE_RESERVED;
470	/* fall thru */
471	case PGM_PAGE_STATE_SHARED:
472	return pgmPhysAllocPage(pVM, pPage, GCPhys);
473	}
474	}
475
476
477	/**
478	* Maps a page into the current virtual address space so it can be accessed.
479	*
480	* @returns VBox status code.
481	* @retval VINF_SUCCESS on success.
482	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
483	*
484	* @param pVM The VM address.
485	* @param pPage The physical page tracking structure.
486	* @param GCPhys The address of the page.
487	* @param ppMap Where to store the address of the mapping tracking structure.
488	* @param ppv Where to store the mapping address of the page. The page
489	* offset is masked off!
490	*
491	* @remarks Called from within the PGM critical section.
492	*/
493	int pgmPhysPageMap(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv)
494	{
495	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
496	/*
497	* Just some sketchy GC/R0-darwin code.
498	*/
499	*ppMap = NULL;
500	RTHCPHYS HCPhys = PGM_PAGE_GET_HCPHYS(pPage);
501	Assert(HCPhys != pVM->pgm.s.HCPhysZeroPg);
502	return PGMDynMapHCPage(pVM, HCPhys, ppv);
503
504	#else /* IN_RING3 \|\| IN_RING0 */
505
506	/*
507	* Find/make Chunk TLB entry for the mapping chunk.
508	*/
509	PPGMCHUNKR3MAP pMap;
510	const uint32_t idChunk = PGM_PAGE_GET_CHUNKID(pPage);
511	PPGMCHUNKR3MAPTLBE pTlbe = &pVM->pgm.s.ChunkR3Map.Tlb.aEntries[PGM_CHUNKR3MAPTLB_IDX(idChunk)];
512	if (pTlbe->idChunk == idChunk)
513	{
514	STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbHits));
515	pMap = pTlbe->pChunk;
516	}
517	else if (idChunk != NIL_GMM_CHUNKID)
518	{
519	STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbMisses));
520
521	/*
522	* Find the chunk, map it if necessary.
523	*/
524	pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
525	if (!pMap)
526	{
527	#ifdef IN_RING0
528	int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_MAP_CHUNK, idChunk);
529	AssertRCReturn(rc, rc);
530	pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
531	Assert(pMap);
532	#else
533	int rc = pgmR3PhysChunkMap(pVM, idChunk, &pMap);
534	if (RT_FAILURE(rc))
535	return rc;
536	#endif
537	}
538
539	/*
540	* Enter it into the Chunk TLB.
541	*/
542	pTlbe->idChunk = idChunk;
543	pTlbe->pChunk = pMap;
544	pMap->iAge = 0;
545	}
546	else
547	{
548	Assert(PGM_PAGE_IS_ZERO(pPage));
549	*ppv = pVM->pgm.s.CTXALLSUFF(pvZeroPg);
550	*ppMap = NULL;
551	return VINF_SUCCESS;
552	}
553
554	ppv = (uint8_t )pMap->pv + (PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) << PAGE_SHIFT);
555	*ppMap = pMap;
556	return VINF_SUCCESS;
557	#endif /* IN_RING3 */
558	}
559
560
561	#if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
562	/**
563	* Load a guest page into the ring-3 physical TLB.
564	*
565	* @returns VBox status code.
566	* @retval VINF_SUCCESS on success
567	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
568	* @param pPGM The PGM instance pointer.
569	* @param GCPhys The guest physical address in question.
570	*/
571	int pgmPhysPageLoadIntoTlb(PPGM pPGM, RTGCPHYS GCPhys)
572	{
573	STAM_COUNTER_INC(&pPGM->CTX_MID_Z(Stat,PageMapTlbMisses));
574
575	/*
576	* Find the ram range.
577	* 99.8% of requests are expected to be in the first range.
578	*/
579	PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRanges);
580	RTGCPHYS off = GCPhys - pRam->GCPhys;
581	if (RT_UNLIKELY(off >= pRam->cb))
582	{
583	do
584	{
585	pRam = pRam->CTX_SUFF(pNext);
586	if (!pRam)
587	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
588	off = GCPhys - pRam->GCPhys;
589	} while (off >= pRam->cb);
590	}
591
592	/*
593	* Map the page.
594	* Make a special case for the zero page as it is kind of special.
595	*/
596	PPGMPAGE pPage = &pRam->aPages[off >> PAGE_SHIFT];
597	PPGMPAGEMAPTLBE pTlbe = &pPGM->CTXSUFF(PhysTlb).aEntries[PGM_PAGEMAPTLB_IDX(GCPhys)];
598	if (!PGM_PAGE_IS_ZERO(pPage))
599	{
600	void *pv;
601	PPGMPAGEMAP pMap;
602	int rc = pgmPhysPageMap(PGM2VM(pPGM), pPage, GCPhys, &pMap, &pv);
603	if (RT_FAILURE(rc))
604	return rc;
605	pTlbe->pMap = pMap;
606	pTlbe->pv = pv;
607	}
608	else
609	{
610	Assert(PGM_PAGE_GET_HCPHYS(pPage) == pPGM->HCPhysZeroPg);
611	pTlbe->pMap = NULL;
612	pTlbe->pv = pPGM->CTXALLSUFF(pvZeroPg);
613	}
614	pTlbe->pPage = pPage;
615	return VINF_SUCCESS;
616	}
617	#endif /* !IN_RC && !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
618
619
620	/**
621	* Requests the mapping of a guest page into the current context.
622	*
623	* This API should only be used for very short term, as it will consume
624	* scarse resources (R0 and GC) in the mapping cache. When you're done
625	* with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
626	*
627	* This API will assume your intention is to write to the page, and will
628	* therefore replace shared and zero pages. If you do not intend to modify
629	* the page, use the PGMPhysGCPhys2CCPtrReadOnly() API.
630	*
631	* @returns VBox status code.
632	* @retval VINF_SUCCESS on success.
633	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
634	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
635	*
636	* @param pVM The VM handle.
637	* @param GCPhys The guest physical address of the page that should be mapped.
638	* @param ppv Where to store the address corresponding to GCPhys.
639	* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
640	*
641	* @remark Avoid calling this API from within critical sections (other than
642	* the PGM one) because of the deadlock risk.
643	* @thread Any thread.
644	*/
645	VMMDECL(int) PGMPhysGCPhys2CCPtr(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock)
646	{
647	#ifdef VBOX_WITH_NEW_PHYS_CODE
648	# if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
649	/** @todo this needs to be fixed, it really ain't right. */
650	/* Until a physical TLB is implemented for GC or/and R0-darwin, let PGMDynMapGCPageEx handle it. */
651	return PGMDynMapGCPageOff(pVM, GCPhys, ppv);
652
653	#else
654	int rc = pgmLock(pVM);
655	AssertRCReturn(rc);
656
657	/*
658	* Query the Physical TLB entry for the page (may fail).
659	*/
660	PGMPHYSTLBE pTlbe;
661	int rc = pgmPhysPageQueryTlbe(&pVM->pgm.s, GCPhys, &pTlbe);
662	if (RT_SUCCESS(rc))
663	{
664	/*
665	* If the page is shared, the zero page, or being write monitored
666	* it must be converted to an page that's writable if possible.
667	*/
668	PPGMPAGE pPage = pTlbe->pPage;
669	if (RT_UNLIKELY(PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED))
670	{
671	rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
672	/** @todo stuff is missing here! */
673	}
674	if (RT_SUCCESS(rc))
675	{
676	/*
677	* Now, just perform the locking and calculate the return address.
678	*/
679	PPGMPAGEMAP pMap = pTlbe->pMap;
680	pMap->cRefs++;
681	if (RT_LIKELY(pPage->cLocks != PGM_PAGE_MAX_LOCKS))
682	if (RT_UNLIKELY(++pPage->cLocks == PGM_PAGE_MAX_LOCKS))
683	{
684	AssertMsgFailed(("%RGp is entering permanent locked state!\n", GCPhys));
685	pMap->cRefs++; /* Extra ref to prevent it from going away. */
686	}
687
688	ppv = (void )((uintptr_t)pTlbe->pv \| (GCPhys & PAGE_OFFSET_MASK));
689	pLock->pvPage = pPage;
690	pLock->pvMap = pMap;
691	}
692	}
693
694	pgmUnlock(pVM);
695	return rc;
696
697	#endif /* IN_RING3 \|\| IN_RING0 */
698
699	#else
700	/*
701	* Temporary fallback code.
702	*/
703	# if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
704	/** @todo @bugref{3202}: check up this path. */
705	return PGMDynMapGCPageOff(pVM, GCPhys, ppv);
706	# else
707	return PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1, ppv);
708	# endif
709	#endif
710	}
711
712
713	/**
714	* Requests the mapping of a guest page into the current context.
715	*
716	* This API should only be used for very short term, as it will consume
717	* scarse resources (R0 and GC) in the mapping cache. When you're done
718	* with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
719	*
720	* @returns VBox status code.
721	* @retval VINF_SUCCESS on success.
722	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
723	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
724	*
725	* @param pVM The VM handle.
726	* @param GCPhys The guest physical address of the page that should be mapped.
727	* @param ppv Where to store the address corresponding to GCPhys.
728	* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
729	*
730	* @remark Avoid calling this API from within critical sections (other than
731	* the PGM one) because of the deadlock risk.
732	* @thread Any thread.
733	*/
734	VMMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock)
735	{
736	/** @todo implement this */
737	return PGMPhysGCPhys2CCPtr(pVM, GCPhys, (void **)ppv, pLock);
738	}
739
740
741	/**
742	* Requests the mapping of a guest page given by virtual address into the current context.
743	*
744	* This API should only be used for very short term, as it will consume
745	* scarse resources (R0 and GC) in the mapping cache. When you're done
746	* with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
747	*
748	* This API will assume your intention is to write to the page, and will
749	* therefore replace shared and zero pages. If you do not intend to modify
750	* the page, use the PGMPhysGCPtr2CCPtrReadOnly() API.
751	*
752	* @returns VBox status code.
753	* @retval VINF_SUCCESS on success.
754	* @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
755	* @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
756	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
757	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
758	*
759	* @param pVM The VM handle.
760	* @param GCPhys The guest physical address of the page that should be mapped.
761	* @param ppv Where to store the address corresponding to GCPhys.
762	* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
763	*
764	* @remark Avoid calling this API from within critical sections (other than
765	* the PGM one) because of the deadlock risk.
766	* @thread EMT
767	*/
768	VMMDECL(int) PGMPhysGCPtr2CCPtr(PVM pVM, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock)
769	{
770	RTGCPHYS GCPhys;
771	int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys);
772	if (RT_SUCCESS(rc))
773	rc = PGMPhysGCPhys2CCPtr(pVM, GCPhys, ppv, pLock);
774	return rc;
775	}
776
777
778	/**
779	* Requests the mapping of a guest page given by virtual address into the current context.
780	*
781	* This API should only be used for very short term, as it will consume
782	* scarse resources (R0 and GC) in the mapping cache. When you're done
783	* with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
784	*
785	* @returns VBox status code.
786	* @retval VINF_SUCCESS on success.
787	* @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
788	* @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
789	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
790	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
791	*
792	* @param pVM The VM handle.
793	* @param GCPhys The guest physical address of the page that should be mapped.
794	* @param ppv Where to store the address corresponding to GCPhys.
795	* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
796	*
797	* @remark Avoid calling this API from within critical sections (other than
798	* the PGM one) because of the deadlock risk.
799	* @thread EMT
800	*/
801	VMMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVM pVM, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock)
802	{
803	RTGCPHYS GCPhys;
804	int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys);
805	if (RT_SUCCESS(rc))
806	rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhys, ppv, pLock);
807	return rc;
808	}
809
810
811	/**
812	* Release the mapping of a guest page.
813	*
814	* This is the counter part of PGMPhysGCPhys2CCPtr, PGMPhysGCPhys2CCPtrReadOnly
815	* PGMPhysGCPtr2CCPtr and PGMPhysGCPtr2CCPtrReadOnly.
816	*
817	* @param pVM The VM handle.
818	* @param pLock The lock structure initialized by the mapping function.
819	*/
820	VMMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock)
821	{
822	#ifdef VBOX_WITH_NEW_PHYS_CODE
823	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
824	/* currently nothing to do here. */
825	/* --- postponed
826	#elif defined(IN_RING0)
827	*/
828
829	#else /* IN_RING3 */
830	pgmLock(pVM);
831
832	PPGMPAGE pPage = (PPGMPAGE)pLock->pvPage;
833	Assert(pPage->cLocks >= 1);
834	if (pPage->cLocks != PGM_PAGE_MAX_LOCKS)
835	pPage->cLocks--;
836
837	PPGMCHUNKR3MAP pChunk = (PPGMCHUNKR3MAP)pLock->pvChunk;
838	Assert(pChunk->cRefs >= 1);
839	pChunk->cRefs--;
840	pChunk->iAge = 0;
841
842	pgmUnlock(pVM);
843	#endif /* IN_RING3 */
844	#else
845	NOREF(pVM);
846	NOREF(pLock);
847	#endif
848	}
849
850
851	/**
852	* Converts a GC physical address to a HC pointer.
853	*
854	* @returns VINF_SUCCESS on success.
855	* @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
856	* page but has no physical backing.
857	* @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
858	* GC physical address.
859	* @returns VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY if the range crosses
860	* a dynamic ram chunk boundary
861	* @param pVM The VM handle.
862	* @param GCPhys The GC physical address to convert.
863	* @param cbRange Physical range
864	* @param pHCPtr Where to store the HC pointer on success.
865	*/
866	VMMDECL(int) PGMPhysGCPhys2HCPtr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR pHCPtr) /** @todo @bugref{1865}: HCPtr -> R3Ptr */
867	{
868	#ifdef VBOX_WITH_NEW_PHYS_CODE
869	VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
870	#endif
871
872	if ((GCPhys & PGM_DYNAMIC_CHUNK_BASE_MASK) != ((GCPhys+cbRange-1) & PGM_DYNAMIC_CHUNK_BASE_MASK))
873	{
874	AssertMsgFailed(("%RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
875	LogRel(("PGMPhysGCPhys2HCPtr %RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
876	return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
877	}
878
879	PPGMRAMRANGE pRam;
880	PPGMPAGE pPage;
881	int rc = pgmPhysGetPageAndRangeEx(&pVM->pgm.s, GCPhys, &pPage, &pRam);
882	if (RT_FAILURE(rc))
883	return rc;
884
885	#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
886	if (RT_UNLIKELY(PGM_PAGE_IS_RESERVED(pPage)))
887	return VERR_PGM_PHYS_PAGE_RESERVED;
888	#endif
889
890	RTGCPHYS off = GCPhys - pRam->GCPhys;
891	if (RT_UNLIKELY(off + cbRange > pRam->cb))
892	{
893	AssertMsgFailed(("%RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys + cbRange));
894	return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
895	}
896
897	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
898	{
899	unsigned iChunk = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
900	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) /* ASSUMES this is a rare occurence */
901	PRTR3UINTPTR paChunkR3Ptrs = (PRTR3UINTPTR)MMHyperR3ToCC(pVM, pRam->paChunkR3Ptrs);
902	*pHCPtr = (RTHCPTR)(paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
903	#else
904	*pHCPtr = (RTHCPTR)(pRam->paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
905	#endif
906	}
907	else if (RT_LIKELY(pRam->pvR3))
908	*pHCPtr = (RTHCPTR)((RTR3UINTPTR)pRam->pvR3 + off);
909	else
910	return VERR_PGM_PHYS_PAGE_RESERVED;
911	return VINF_SUCCESS;
912	}
913
914
915	/**
916	* PGMPhysGCPhys2HCPtr convenience for use with assertions.
917	*
918	* @returns The HCPtr, NIL_RTHCPTR on failure.
919	* @param pVM The VM handle.
920	* @param GCPhys The GC Physical addresss.
921	* @param cbRange Physical range.
922	*/
923	VMMDECL(RTHCPTR) PGMPhysGCPhys2HCPtrAssert(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange) /** @todo @bugref{1865}: HCPtr -> R3Ptr */
924	{
925	RTHCPTR HCPtr;
926	int rc = PGMPhysGCPhys2HCPtr(pVM, GCPhys, cbRange, &HCPtr);
927	if (RT_SUCCESS(rc))
928	return HCPtr;
929	return NIL_RTHCPTR;
930	}
931
932
933	/**
934	* Converts a guest pointer to a GC physical address.
935	*
936	* This uses the current CR3/CR0/CR4 of the guest.
937	*
938	* @returns VBox status code.
939	* @param pVM The VM Handle
940	* @param GCPtr The guest pointer to convert.
941	* @param pGCPhys Where to store the GC physical address.
942	*/
943	VMMDECL(int) PGMPhysGCPtr2GCPhys(PVM pVM, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
944	{
945	int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, pGCPhys);
946	if (pGCPhys && RT_SUCCESS(rc))
947	*pGCPhys \|= (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK;
948	return rc;
949	}
950
951
952	/**
953	* Converts a guest pointer to a HC physical address.
954	*
955	* This uses the current CR3/CR0/CR4 of the guest.
956	*
957	* @returns VBox status code.
958	* @param pVM The VM Handle
959	* @param GCPtr The guest pointer to convert.
960	* @param pHCPhys Where to store the HC physical address.
961	*/
962	VMMDECL(int) PGMPhysGCPtr2HCPhys(PVM pVM, RTGCPTR GCPtr, PRTHCPHYS pHCPhys)
963	{
964	RTGCPHYS GCPhys;
965	int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
966	if (RT_SUCCESS(rc))
967	rc = PGMPhysGCPhys2HCPhys(pVM, GCPhys \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), pHCPhys);
968	return rc;
969	}
970
971
972	/**
973	* Converts a guest pointer to a HC pointer.
974	*
975	* This uses the current CR3/CR0/CR4 of the guest.
976	*
977	* @returns VBox status code.
978	* @param pVM The VM Handle
979	* @param GCPtr The guest pointer to convert.
980	* @param pHCPtr Where to store the HC virtual address.
981	*/
982	VMMDECL(int) PGMPhysGCPtr2HCPtr(PVM pVM, RTGCPTR GCPtr, PRTHCPTR pHCPtr) /** @todo @bugref{1865}: HCPtr -> R3Ptr */
983	{
984	#ifdef VBOX_WITH_NEW_PHYS_CODE
985	VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
986	#endif
987
988	RTGCPHYS GCPhys;
989	int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
990	if (RT_SUCCESS(rc))
991	rc = PGMPhysGCPhys2HCPtr(pVM, GCPhys \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
992	return rc;
993	}
994
995
996	/**
997	* Converts a guest virtual address to a HC pointer by specfied CR3 and flags.
998	*
999	* @returns VBox status code.
1000	* @param pVM The VM Handle
1001	* @param GCPtr The guest pointer to convert.
1002	* @param cr3 The guest CR3.
1003	* @param fFlags Flags used for interpreting the PD correctly: X86_CR4_PSE and X86_CR4_PAE
1004	* @param pHCPtr Where to store the HC pointer.
1005	*
1006	* @remark This function is used by the REM at a time where PGM could
1007	* potentially not be in sync. It could also be used by a
1008	* future DBGF API to cpu state independent conversions.
1009	*/
1010	VMMDECL(int) PGMPhysGCPtr2HCPtrByGstCR3(PVM pVM, RTGCPTR GCPtr, uint64_t cr3, unsigned fFlags, PRTHCPTR pHCPtr) /** @todo @bugref{1865}: HCPtr -> R3Ptr */
1011	{
1012	#ifdef VBOX_WITH_NEW_PHYS_CODE
1013	VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
1014	#endif
1015	/*
1016	* PAE or 32-bit?
1017	*/
1018	Assert(!CPUMIsGuestInLongMode(pVM));
1019
1020	int rc;
1021	if (!(fFlags & X86_CR4_PAE))
1022	{
1023	PX86PD pPD;
1024	rc = PGM_GCPHYS_2_PTR(pVM, cr3 & X86_CR3_PAGE_MASK, &pPD);
1025	if (RT_SUCCESS(rc))
1026	{
1027	X86PDE Pde = pPD->a[(RTGCUINTPTR)GCPtr >> X86_PD_SHIFT];
1028	if (Pde.n.u1Present)
1029	{
1030	if ((fFlags & X86_CR4_PSE) && Pde.b.u1Size)
1031	{ /* (big page) */
1032	rc = PGMPhysGCPhys2HCPtr(pVM, pgmGstGet4MBPhysPage(&pVM->pgm.s, Pde) \| ((RTGCUINTPTR)GCPtr & X86_PAGE_4M_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
1033	}
1034	else
1035	{ /* (normal page) */
1036	PX86PT pPT;
1037	rc = PGM_GCPHYS_2_PTR(pVM, Pde.u & X86_PDE_PG_MASK, &pPT);
1038	if (RT_SUCCESS(rc))
1039	{
1040	X86PTE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_SHIFT) & X86_PT_MASK];
1041	if (Pte.n.u1Present)
1042	return PGMPhysGCPhys2HCPtr(pVM, (Pte.u & X86_PTE_PG_MASK) \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
1043	rc = VERR_PAGE_NOT_PRESENT;
1044	}
1045	}
1046	}
1047	else
1048	rc = VERR_PAGE_TABLE_NOT_PRESENT;
1049	}
1050	}
1051	else
1052	{
1053	/** @todo long mode! */
1054	Assert(PGMGetGuestMode(pVM) < PGMMODE_AMD64);
1055
1056	PX86PDPT pPdpt;
1057	rc = PGM_GCPHYS_2_PTR(pVM, cr3 & X86_CR3_PAE_PAGE_MASK, &pPdpt);
1058	if (RT_SUCCESS(rc))
1059	{
1060	X86PDPE Pdpe = pPdpt->a[((RTGCUINTPTR)GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE];
1061	if (Pdpe.n.u1Present)
1062	{
1063	PX86PDPAE pPD;
1064	rc = PGM_GCPHYS_2_PTR(pVM, Pdpe.u & X86_PDPE_PG_MASK, &pPD);
1065	if (RT_SUCCESS(rc))
1066	{
1067	X86PDEPAE Pde = pPD->a[((RTGCUINTPTR)GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK];
1068	if (Pde.n.u1Present)
1069	{
1070	if ((fFlags & X86_CR4_PSE) && Pde.b.u1Size)
1071	{ /* (big page) */
1072	rc = PGMPhysGCPhys2HCPtr(pVM, (Pde.u & X86_PDE2M_PAE_PG_MASK) \| ((RTGCUINTPTR)GCPtr & X86_PAGE_2M_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
1073	}
1074	else
1075	{ /* (normal page) */
1076	PX86PTPAE pPT;
1077	rc = PGM_GCPHYS_2_PTR(pVM, (Pde.u & X86_PDE_PAE_PG_MASK), &pPT);
1078	if (RT_SUCCESS(rc))
1079	{
1080	X86PTEPAE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK];
1081	if (Pte.n.u1Present)
1082	return PGMPhysGCPhys2HCPtr(pVM, (Pte.u & X86_PTE_PAE_PG_MASK) \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pHCPtr);
1083	rc = VERR_PAGE_NOT_PRESENT;
1084	}
1085	}
1086	}
1087	else
1088	rc = VERR_PAGE_TABLE_NOT_PRESENT;
1089	}
1090	}
1091	else
1092	rc = VERR_PAGE_TABLE_NOT_PRESENT;
1093	}
1094	}
1095	return rc;
1096	}
1097
1098
1099	#undef LOG_GROUP
1100	#define LOG_GROUP LOG_GROUP_PGM_PHYS_ACCESS
1101
1102
1103	#ifdef IN_RING3
1104	/**
1105	* Cache PGMPhys memory access
1106	*
1107	* @param pVM VM Handle.
1108	* @param pCache Cache structure pointer
1109	* @param GCPhys GC physical address
1110	* @param pbHC HC pointer corresponding to physical page
1111	*
1112	* @thread EMT.
1113	*/
1114	static void pgmPhysCacheAdd(PVM pVM, PGMPHYSCACHE pCache, RTGCPHYS GCPhys, uint8_t pbR3)
1115	{
1116	uint32_t iCacheIndex;
1117
1118	Assert(VM_IS_EMT(pVM));
1119
1120	GCPhys = PHYS_PAGE_ADDRESS(GCPhys);
1121	pbR3 = (uint8_t *)PAGE_ADDRESS(pbR3);
1122
1123	iCacheIndex = ((GCPhys >> PAGE_SHIFT) & PGM_MAX_PHYSCACHE_ENTRIES_MASK);
1124
1125	ASMBitSet(&pCache->aEntries, iCacheIndex);
1126
1127	pCache->Entry[iCacheIndex].GCPhys = GCPhys;
1128	pCache->Entry[iCacheIndex].pbR3 = pbR3;
1129	}
1130	#endif /* IN_RING3 */
1131
1132	/**
1133	* Read physical memory.
1134	*
1135	* This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
1136	* want to ignore those.
1137	*
1138	* @param pVM VM Handle.
1139	* @param GCPhys Physical address start reading from.
1140	* @param pvBuf Where to put the read bits.
1141	* @param cbRead How many bytes to read.
1142	*/
1143	VMMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
1144	{
1145	#ifdef IN_RING3
1146	bool fGrabbedLock = false;
1147	#endif
1148
1149	AssertMsg(cbRead > 0, ("don't even think about reading zero bytes!\n"));
1150	if (cbRead == 0)
1151	return;
1152
1153	LogFlow(("PGMPhysRead: %RGp %d\n", GCPhys, cbRead));
1154
1155	#ifdef IN_RING3
1156	if (!VM_IS_EMT(pVM))
1157	{
1158	pgmLock(pVM);
1159	fGrabbedLock = true;
1160	}
1161	#endif
1162
1163	/*
1164	* Copy loop on ram ranges.
1165	*/
1166	PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
1167	for (;;)
1168	{
1169	/* Find range. */
1170	while (pRam && GCPhys > pRam->GCPhysLast)
1171	pRam = pRam->CTX_SUFF(pNext);
1172	/* Inside range or not? */
1173	if (pRam && GCPhys >= pRam->GCPhys)
1174	{
1175	/*
1176	* Must work our way thru this page by page.
1177	*/
1178	RTGCPHYS off = GCPhys - pRam->GCPhys;
1179	while (off < pRam->cb)
1180	{
1181	unsigned iPage = off >> PAGE_SHIFT;
1182	PPGMPAGE pPage = &pRam->aPages[iPage];
1183	size_t cb;
1184
1185	/* Physical chunk in dynamically allocated range not present? */
1186	if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
1187	{
1188	/* Treat it as reserved; return zeros */
1189	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1190	if (cb >= cbRead)
1191	{
1192	memset(pvBuf, 0, cbRead);
1193	goto end;
1194	}
1195	memset(pvBuf, 0, cb);
1196	}
1197	/* temp hacks, will be reorganized. */
1198	/*
1199	* Physical handler.
1200	*/
1201	else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) >= PGM_PAGE_HNDL_PHYS_STATE_ALL)
1202	&& !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1203	{
1204	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1205	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1206
1207	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1208	/* find and call the handler */
1209	PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
1210	if (pNode && pNode->pfnHandlerR3)
1211	{
1212	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1213	if (cbRange < cb)
1214	cb = cbRange;
1215	if (cb > cbRead)
1216	cb = cbRead;
1217
1218	void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1219
1220	/* Note! Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1221	rc = pNode->pfnHandlerR3(pVM, GCPhys, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, pNode->pvUserR3);
1222	}
1223	#endif /* IN_RING3 */
1224	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1225	{
1226	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1227	void *pvSrc = NULL;
1228	PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvSrc);
1229	#else
1230	void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1231	#endif
1232
1233	if (cb >= cbRead)
1234	{
1235	memcpy(pvBuf, pvSrc, cbRead);
1236	goto end;
1237	}
1238	memcpy(pvBuf, pvSrc, cb);
1239	}
1240	else if (cb >= cbRead)
1241	goto end;
1242	}
1243	/*
1244	* Virtual handlers.
1245	*/
1246	else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) >= PGM_PAGE_HNDL_VIRT_STATE_ALL)
1247	&& !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1248	{
1249	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1250	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1251	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1252	/* Search the whole tree for matching physical addresses (rather expensive!) */
1253	PPGMVIRTHANDLER pNode;
1254	unsigned iPage;
1255	int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
1256	if (RT_SUCCESS(rc2) && pNode->pfnHandlerR3)
1257	{
1258	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1259	if (cbRange < cb)
1260	cb = cbRange;
1261	if (cb > cbRead)
1262	cb = cbRead;
1263	RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->Core.Key & PAGE_BASE_GC_MASK)
1264	+ (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1265
1266	void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1267
1268	/* Note! Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1269	rc = pNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, 0);
1270	}
1271	#endif /* IN_RING3 */
1272	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1273	{
1274	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1275	void *pvSrc = NULL;
1276	PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvSrc);
1277	#else
1278	void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1279	#endif
1280	if (cb >= cbRead)
1281	{
1282	memcpy(pvBuf, pvSrc, cbRead);
1283	goto end;
1284	}
1285	memcpy(pvBuf, pvSrc, cb);
1286	}
1287	else if (cb >= cbRead)
1288	goto end;
1289	}
1290	else
1291	{
1292	switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_ROM)) /** @todo PAGE FLAGS */
1293	{
1294	/*
1295	* Normal memory or ROM.
1296	*/
1297	case 0:
1298	case MM_RAM_FLAGS_ROM:
1299	case MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_RESERVED:
1300	//case MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_MMIO2: /* = shadow */ - //MMIO2 isn't in the mask.
1301	case MM_RAM_FLAGS_MMIO2: // MMIO2 isn't in the mask.
1302	{
1303	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1304	void *pvSrc = NULL;
1305	PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvSrc);
1306	#else
1307	void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1308	#endif
1309	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1310	if (cb >= cbRead)
1311	{
1312	#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
1313	if (cbRead <= 4 && !fGrabbedLock /* i.e. EMT */)
1314	pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphysreadcache, GCPhys, (uint8_t*)pvSrc);
1315	#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
1316	memcpy(pvBuf, pvSrc, cbRead);
1317	goto end;
1318	}
1319	memcpy(pvBuf, pvSrc, cb);
1320	break;
1321	}
1322
1323	/*
1324	* All reserved, nothing there.
1325	*/
1326	case MM_RAM_FLAGS_RESERVED:
1327	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1328	if (cb >= cbRead)
1329	{
1330	memset(pvBuf, 0, cbRead);
1331	goto end;
1332	}
1333	memset(pvBuf, 0, cb);
1334	break;
1335
1336	/*
1337	* The rest needs to be taken more carefully.
1338	*/
1339	default:
1340	#if 1 /** @todo r=bird: Can you do this properly please. */
1341	/** @todo Try MMIO; quick hack */
1342	if (cbRead <= 8 && IOMMMIORead(pVM, GCPhys, (uint32_t *)pvBuf, cbRead) == VINF_SUCCESS)
1343	goto end;
1344	#endif
1345
1346	/** @todo fix me later. */
1347	AssertReleaseMsgFailed(("Unknown read at %RGp size %u implement the complex physical reading case %RHp\n",
1348	GCPhys, cbRead,
1349	pPage->HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_ROM))); /** @todo PAGE FLAGS */
1350	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1351	break;
1352	}
1353	}
1354	cbRead -= cb;
1355	off += cb;
1356	pvBuf = (char *)pvBuf + cb;
1357	}
1358
1359	GCPhys = pRam->GCPhysLast + 1;
1360	}
1361	else
1362	{
1363	LogFlow(("PGMPhysRead: Unassigned %RGp size=%u\n", GCPhys, cbRead));
1364
1365	/*
1366	* Unassigned address space.
1367	*/
1368	size_t cb;
1369	if ( !pRam
1370	\|\| (cb = pRam->GCPhys - GCPhys) >= cbRead)
1371	{
1372	memset(pvBuf, 0, cbRead);
1373	goto end;
1374	}
1375
1376	memset(pvBuf, 0, cb);
1377	cbRead -= cb;
1378	pvBuf = (char *)pvBuf + cb;
1379	GCPhys += cb;
1380	}
1381	}
1382	end:
1383	#ifdef IN_RING3
1384	if (fGrabbedLock)
1385	pgmUnlock(pVM);
1386	#endif
1387	return;
1388	}
1389
1390
1391	/**
1392	* Write to physical memory.
1393	*
1394	* This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
1395	* want to ignore those.
1396	*
1397	* @param pVM VM Handle.
1398	* @param GCPhys Physical address to write to.
1399	* @param pvBuf What to write.
1400	* @param cbWrite How many bytes to write.
1401	*/
1402	VMMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
1403	{
1404	#ifdef IN_RING3
1405	bool fGrabbedLock = false;
1406	#endif
1407
1408	AssertMsg(!pVM->pgm.s.fNoMorePhysWrites, ("Calling PGMPhysWrite after pgmR3Save()!\n"));
1409	AssertMsg(cbWrite > 0, ("don't even think about writing zero bytes!\n"));
1410	if (cbWrite == 0)
1411	return;
1412
1413	LogFlow(("PGMPhysWrite: %RGp %d\n", GCPhys, cbWrite));
1414
1415	#ifdef IN_RING3
1416	if (!VM_IS_EMT(pVM))
1417	{
1418	pgmLock(pVM);
1419	fGrabbedLock = true;
1420	}
1421	#endif
1422	/*
1423	* Copy loop on ram ranges.
1424	*/
1425	PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
1426	for (;;)
1427	{
1428	/* Find range. */
1429	while (pRam && GCPhys > pRam->GCPhysLast)
1430	pRam = pRam->CTX_SUFF(pNext);
1431	/* Inside range or not? */
1432	if (pRam && GCPhys >= pRam->GCPhys)
1433	{
1434	/*
1435	* Must work our way thru this page by page.
1436	*/
1437	RTGCPTR off = GCPhys - pRam->GCPhys;
1438	while (off < pRam->cb)
1439	{
1440	RTGCPTR iPage = off >> PAGE_SHIFT;
1441	PPGMPAGE pPage = &pRam->aPages[iPage];
1442
1443	/* Physical chunk in dynamically allocated range not present? */
1444	if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
1445	{
1446	int rc;
1447	#ifdef IN_RING3
1448	if (fGrabbedLock)
1449	{
1450	pgmUnlock(pVM);
1451	rc = pgmr3PhysGrowRange(pVM, GCPhys);
1452	if (rc == VINF_SUCCESS)
1453	PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite); /* try again; can't assume pRam is still valid (paranoia) */
1454	return;
1455	}
1456	rc = pgmr3PhysGrowRange(pVM, GCPhys);
1457	#else
1458	rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1459	#endif
1460	if (rc != VINF_SUCCESS)
1461	goto end;
1462	}
1463
1464	size_t cb;
1465	/* temporary hack, will reogranize is later. */
1466	/*
1467	* Virtual handlers
1468	*/
1469	if ( PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage)
1470	&& !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1471	{
1472	if (PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage))
1473	{
1474	/*
1475	* Physical write handler + virtual write handler.
1476	* Consider this a quick workaround for the CSAM + shadow caching problem.
1477	*
1478	* We hand it to the shadow caching first since it requires the unchanged
1479	* data. CSAM will have to put up with it already being changed.
1480	*/
1481	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1482	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1483	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1484	/* 1. The physical handler */
1485	PPGMPHYSHANDLER pPhysNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
1486	if (pPhysNode && pPhysNode->pfnHandlerR3)
1487	{
1488	size_t cbRange = pPhysNode->Core.KeyLast - GCPhys + 1;
1489	if (cbRange < cb)
1490	cb = cbRange;
1491	if (cb > cbWrite)
1492	cb = cbWrite;
1493
1494	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1495
1496	/* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
1497	rc = pPhysNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pPhysNode->pvUserR3);
1498	}
1499
1500	/* 2. The virtual handler (will see incorrect data) */
1501	PPGMVIRTHANDLER pVirtNode;
1502	unsigned iPage;
1503	int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pVirtNode, &iPage);
1504	if (RT_SUCCESS(rc2) && pVirtNode->pfnHandlerR3)
1505	{
1506	size_t cbRange = pVirtNode->Core.KeyLast - GCPhys + 1;
1507	if (cbRange < cb)
1508	cb = cbRange;
1509	if (cb > cbWrite)
1510	cb = cbWrite;
1511	RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirtNode->Core.Key & PAGE_BASE_GC_MASK)
1512	+ (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1513
1514	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1515
1516	/* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
1517	rc2 = pVirtNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
1518	if ( ( rc2 != VINF_PGM_HANDLER_DO_DEFAULT
1519	&& rc == VINF_PGM_HANDLER_DO_DEFAULT)
1520	\|\| ( RT_FAILURE(rc2)
1521	&& RT_SUCCESS(rc)))
1522	rc = rc2;
1523	}
1524	#endif /* IN_RING3 */
1525	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1526	{
1527	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1528	void *pvDst = NULL;
1529	PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvDst);
1530	#else
1531	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1532	#endif
1533	if (cb >= cbWrite)
1534	{
1535	memcpy(pvDst, pvBuf, cbWrite);
1536	goto end;
1537	}
1538	memcpy(pvDst, pvBuf, cb);
1539	}
1540	else if (cb >= cbWrite)
1541	goto end;
1542	}
1543	else
1544	{
1545	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1546	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1547	#ifdef IN_RING3
1548	/** @todo deal with this in GC and R0! */
1549	/* Search the whole tree for matching physical addresses (rather expensive!) */
1550	PPGMVIRTHANDLER pNode;
1551	unsigned iPage;
1552	int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
1553	if (RT_SUCCESS(rc2) && pNode->pfnHandlerR3)
1554	{
1555	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1556	if (cbRange < cb)
1557	cb = cbRange;
1558	if (cb > cbWrite)
1559	cb = cbWrite;
1560	RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->Core.Key & PAGE_BASE_GC_MASK)
1561	+ (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1562
1563	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1564
1565	/* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
1566	rc = pNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
1567	}
1568	#endif /* IN_RING3 */
1569	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1570	{
1571	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1572	void *pvDst = NULL;
1573	PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvDst);
1574	#else
1575	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1576	#endif
1577	if (cb >= cbWrite)
1578	{
1579	memcpy(pvDst, pvBuf, cbWrite);
1580	goto end;
1581	}
1582	memcpy(pvDst, pvBuf, cb);
1583	}
1584	else if (cb >= cbWrite)
1585	goto end;
1586	}
1587	}
1588	/*
1589	* Physical handler.
1590	*/
1591	else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) >= PGM_PAGE_HNDL_PHYS_STATE_WRITE)
1592	&& !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1593	{
1594	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1595	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1596	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1597	/* find and call the handler */
1598	PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
1599	if (pNode && pNode->pfnHandlerR3)
1600	{
1601	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1602	if (cbRange < cb)
1603	cb = cbRange;
1604	if (cb > cbWrite)
1605	cb = cbWrite;
1606
1607	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1608
1609	/** @todo Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1610	rc = pNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pNode->pvUserR3);
1611	}
1612	#endif /* IN_RING3 */
1613	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1614	{
1615	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1616	void *pvDst = NULL;
1617	PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvDst);
1618	#else
1619	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1620	#endif
1621	if (cb >= cbWrite)
1622	{
1623	memcpy(pvDst, pvBuf, cbWrite);
1624	goto end;
1625	}
1626	memcpy(pvDst, pvBuf, cb);
1627	}
1628	else if (cb >= cbWrite)
1629	goto end;
1630	}
1631	else
1632	{
1633	/** @todo r=bird: missing MM_RAM_FLAGS_ROM here, we shall not allow anyone to overwrite the ROM! */
1634	switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_MMIO2)) /** @todo PAGE FLAGS */
1635	{
1636	/*
1637	* Normal memory, MMIO2 or writable shadow ROM.
1638	*/
1639	case 0:
1640	case MM_RAM_FLAGS_MMIO2:
1641	case MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_MMIO2: /* shadow rom */
1642	{
1643	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1644	void *pvDst = NULL;
1645	PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvDst);
1646	#else
1647	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1648	#endif
1649	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1650	if (cb >= cbWrite)
1651	{
1652	#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
1653	if (cbWrite <= 4 && !fGrabbedLock /* i.e. EMT */)
1654	pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphyswritecache, GCPhys, (uint8_t*)pvDst);
1655	#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
1656	memcpy(pvDst, pvBuf, cbWrite);
1657	goto end;
1658	}
1659	memcpy(pvDst, pvBuf, cb);
1660	break;
1661	}
1662
1663	/*
1664	* All reserved, nothing there.
1665	*/
1666	case MM_RAM_FLAGS_RESERVED:
1667	case MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO2:
1668	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1669	if (cb >= cbWrite)
1670	goto end;
1671	break;
1672
1673
1674	/*
1675	* The rest needs to be taken more carefully.
1676	*/
1677	default:
1678	#if 1 /** @todo r=bird: Can you do this properly please. */
1679	/** @todo Try MMIO; quick hack */
1680	if (cbWrite <= 8 && IOMMMIOWrite(pVM, GCPhys, (uint32_t )pvBuf, cbWrite) == VINF_SUCCESS)
1681	goto end;
1682	#endif
1683
1684	/** @todo fix me later. */
1685	AssertReleaseMsgFailed(("Unknown write at %RGp size %u implement the complex physical writing case %RHp\n",
1686	GCPhys, cbWrite,
1687	(pPage->HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_MMIO2)))); /** @todo PAGE FLAGS */
1688	/* skip the write */
1689	cb = cbWrite;
1690	break;
1691	}
1692	}
1693
1694	cbWrite -= cb;
1695	off += cb;
1696	pvBuf = (const char *)pvBuf + cb;
1697	}
1698
1699	GCPhys = pRam->GCPhysLast + 1;
1700	}
1701	else
1702	{
1703	/*
1704	* Unassigned address space.
1705	*/
1706	size_t cb;
1707	if ( !pRam
1708	\|\| (cb = pRam->GCPhys - GCPhys) >= cbWrite)
1709	goto end;
1710
1711	cbWrite -= cb;
1712	pvBuf = (const char *)pvBuf + cb;
1713	GCPhys += cb;
1714	}
1715	}
1716	end:
1717	#ifdef IN_RING3
1718	if (fGrabbedLock)
1719	pgmUnlock(pVM);
1720	#endif
1721	return;
1722	}
1723
1724	#ifndef IN_RC /* Ring 0 & 3 only. (Just not needed in GC.) */
1725
1726	/**
1727	* Read from guest physical memory by GC physical address, bypassing
1728	* MMIO and access handlers.
1729	*
1730	* @returns VBox status.
1731	* @param pVM VM handle.
1732	* @param pvDst The destination address.
1733	* @param GCPhysSrc The source address (GC physical address).
1734	* @param cb The number of bytes to read.
1735	*/
1736	VMMDECL(int) PGMPhysSimpleReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb)
1737	{
1738	/*
1739	* Treat the first page as a special case.
1740	*/
1741	if (!cb)
1742	return VINF_SUCCESS;
1743
1744	/* map the 1st page */
1745	void const *pvSrc;
1746	PGMPAGEMAPLOCK Lock;
1747	int rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhysSrc, &pvSrc, &Lock);
1748	if (RT_FAILURE(rc))
1749	return rc;
1750
1751	/* optimize for the case where access is completely within the first page. */
1752	size_t cbPage = PAGE_SIZE - (GCPhysSrc & PAGE_OFFSET_MASK);
1753	if (RT_LIKELY(cb <= cbPage))
1754	{
1755	memcpy(pvDst, pvSrc, cb);
1756	PGMPhysReleasePageMappingLock(pVM, &Lock);
1757	return VINF_SUCCESS;
1758	}
1759
1760	/* copy to the end of the page. */
1761	memcpy(pvDst, pvSrc, cbPage);
1762	PGMPhysReleasePageMappingLock(pVM, &Lock);
1763	GCPhysSrc += cbPage;
1764	pvDst = (uint8_t *)pvDst + cbPage;
1765	cb -= cbPage;
1766
1767	/*
1768	* Page by page.
1769	*/
1770	for (;;)
1771	{
1772	/* map the page */
1773	rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhysSrc, &pvSrc, &Lock);
1774	if (RT_FAILURE(rc))
1775	return rc;
1776
1777	/* last page? */
1778	if (cb <= PAGE_SIZE)
1779	{
1780	memcpy(pvDst, pvSrc, cb);
1781	PGMPhysReleasePageMappingLock(pVM, &Lock);
1782	return VINF_SUCCESS;
1783	}
1784
1785	/* copy the entire page and advance */
1786	memcpy(pvDst, pvSrc, PAGE_SIZE);
1787	PGMPhysReleasePageMappingLock(pVM, &Lock);
1788	GCPhysSrc += PAGE_SIZE;
1789	pvDst = (uint8_t *)pvDst + PAGE_SIZE;
1790	cb -= PAGE_SIZE;
1791	}
1792	/* won't ever get here. */
1793	}
1794
1795
1796	/**
1797	* Write to guest physical memory referenced by GC pointer.
1798	* Write memory to GC physical address in guest physical memory.
1799	*
1800	* This will bypass MMIO and access handlers.
1801	*
1802	* @returns VBox status.
1803	* @param pVM VM handle.
1804	* @param GCPhysDst The GC physical address of the destination.
1805	* @param pvSrc The source buffer.
1806	* @param cb The number of bytes to write.
1807	*/
1808	VMMDECL(int) PGMPhysSimpleWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb)
1809	{
1810	LogFlow(("PGMPhysSimpleWriteGCPhys: %RGp %zu\n", GCPhysDst, cb));
1811
1812	/*
1813	* Treat the first page as a special case.
1814	*/
1815	if (!cb)
1816	return VINF_SUCCESS;
1817
1818	/* map the 1st page */
1819	void *pvDst;
1820	PGMPAGEMAPLOCK Lock;
1821	int rc = PGMPhysGCPhys2CCPtr(pVM, GCPhysDst, &pvDst, &Lock);
1822	if (RT_FAILURE(rc))
1823	return rc;
1824
1825	/* optimize for the case where access is completely within the first page. */
1826	size_t cbPage = PAGE_SIZE - (GCPhysDst & PAGE_OFFSET_MASK);
1827	if (RT_LIKELY(cb <= cbPage))
1828	{
1829	memcpy(pvDst, pvSrc, cb);
1830	PGMPhysReleasePageMappingLock(pVM, &Lock);
1831	return VINF_SUCCESS;
1832	}
1833
1834	/* copy to the end of the page. */
1835	memcpy(pvDst, pvSrc, cbPage);
1836	PGMPhysReleasePageMappingLock(pVM, &Lock);
1837	GCPhysDst += cbPage;
1838	pvSrc = (const uint8_t *)pvSrc + cbPage;
1839	cb -= cbPage;
1840
1841	/*
1842	* Page by page.
1843	*/
1844	for (;;)
1845	{
1846	/* map the page */
1847	rc = PGMPhysGCPhys2CCPtr(pVM, GCPhysDst, &pvDst, &Lock);
1848	if (RT_FAILURE(rc))
1849	return rc;
1850
1851	/* last page? */
1852	if (cb <= PAGE_SIZE)
1853	{
1854	memcpy(pvDst, pvSrc, cb);
1855	PGMPhysReleasePageMappingLock(pVM, &Lock);
1856	return VINF_SUCCESS;
1857	}
1858
1859	/* copy the entire page and advance */
1860	memcpy(pvDst, pvSrc, PAGE_SIZE);
1861	PGMPhysReleasePageMappingLock(pVM, &Lock);
1862	GCPhysDst += PAGE_SIZE;
1863	pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
1864	cb -= PAGE_SIZE;
1865	}
1866	/* won't ever get here. */
1867	}
1868
1869
1870	/**
1871	* Read from guest physical memory referenced by GC pointer.
1872	*
1873	* This function uses the current CR3/CR0/CR4 of the guest and will
1874	* bypass access handlers and not set any accessed bits.
1875	*
1876	* @returns VBox status.
1877	* @param pVM VM handle.
1878	* @param pvDst The destination address.
1879	* @param GCPtrSrc The source address (GC pointer).
1880	* @param cb The number of bytes to read.
1881	*/
1882	VMMDECL(int) PGMPhysSimpleReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
1883	{
1884	/*
1885	* Treat the first page as a special case.
1886	*/
1887	if (!cb)
1888	return VINF_SUCCESS;
1889
1890	/* map the 1st page */
1891	void const *pvSrc;
1892	PGMPAGEMAPLOCK Lock;
1893	int rc = PGMPhysGCPtr2CCPtrReadOnly(pVM, GCPtrSrc, &pvSrc, &Lock);
1894	if (RT_FAILURE(rc))
1895	return rc;
1896
1897	/* optimize for the case where access is completely within the first page. */
1898	size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
1899	if (RT_LIKELY(cb <= cbPage))
1900	{
1901	memcpy(pvDst, pvSrc, cb);
1902	PGMPhysReleasePageMappingLock(pVM, &Lock);
1903	return VINF_SUCCESS;
1904	}
1905
1906	/* copy to the end of the page. */
1907	memcpy(pvDst, pvSrc, cbPage);
1908	PGMPhysReleasePageMappingLock(pVM, &Lock);
1909	GCPtrSrc = (RTGCPTR)((RTGCUINTPTR)GCPtrSrc + cbPage);
1910	pvDst = (uint8_t *)pvDst + cbPage;
1911	cb -= cbPage;
1912
1913	/*
1914	* Page by page.
1915	*/
1916	for (;;)
1917	{
1918	/* map the page */
1919	rc = PGMPhysGCPtr2CCPtrReadOnly(pVM, GCPtrSrc, &pvSrc, &Lock);
1920	if (RT_FAILURE(rc))
1921	return rc;
1922
1923	/* last page? */
1924	if (cb <= PAGE_SIZE)
1925	{
1926	memcpy(pvDst, pvSrc, cb);
1927	PGMPhysReleasePageMappingLock(pVM, &Lock);
1928	return VINF_SUCCESS;
1929	}
1930
1931	/* copy the entire page and advance */
1932	memcpy(pvDst, pvSrc, PAGE_SIZE);
1933	PGMPhysReleasePageMappingLock(pVM, &Lock);
1934	GCPtrSrc = (RTGCPTR)((RTGCUINTPTR)GCPtrSrc + PAGE_SIZE);
1935	pvDst = (uint8_t *)pvDst + PAGE_SIZE;
1936	cb -= PAGE_SIZE;
1937	}
1938	/* won't ever get here. */
1939	}
1940
1941
1942	/**
1943	* Write to guest physical memory referenced by GC pointer.
1944	*
1945	* This function uses the current CR3/CR0/CR4 of the guest and will
1946	* bypass access handlers and not set dirty or accessed bits.
1947	*
1948	* @returns VBox status.
1949	* @param pVM VM handle.
1950	* @param GCPtrDst The destination address (GC pointer).
1951	* @param pvSrc The source address.
1952	* @param cb The number of bytes to write.
1953	*/
1954	VMMDECL(int) PGMPhysSimpleWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
1955	{
1956	/*
1957	* Treat the first page as a special case.
1958	*/
1959	if (!cb)
1960	return VINF_SUCCESS;
1961
1962	/* map the 1st page */
1963	void *pvDst;
1964	PGMPAGEMAPLOCK Lock;
1965	int rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
1966	if (RT_FAILURE(rc))
1967	return rc;
1968
1969	/* optimize for the case where access is completely within the first page. */
1970	size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
1971	if (RT_LIKELY(cb <= cbPage))
1972	{
1973	memcpy(pvDst, pvSrc, cb);
1974	PGMPhysReleasePageMappingLock(pVM, &Lock);
1975	return VINF_SUCCESS;
1976	}
1977
1978	/* copy to the end of the page. */
1979	memcpy(pvDst, pvSrc, cbPage);
1980	PGMPhysReleasePageMappingLock(pVM, &Lock);
1981	GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbPage);
1982	pvSrc = (const uint8_t *)pvSrc + cbPage;
1983	cb -= cbPage;
1984
1985	/*
1986	* Page by page.
1987	*/
1988	for (;;)
1989	{
1990	/* map the page */
1991	rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
1992	if (RT_FAILURE(rc))
1993	return rc;
1994
1995	/* last page? */
1996	if (cb <= PAGE_SIZE)
1997	{
1998	memcpy(pvDst, pvSrc, cb);
1999	PGMPhysReleasePageMappingLock(pVM, &Lock);
2000	return VINF_SUCCESS;
2001	}
2002
2003	/* copy the entire page and advance */
2004	memcpy(pvDst, pvSrc, PAGE_SIZE);
2005	PGMPhysReleasePageMappingLock(pVM, &Lock);
2006	GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + PAGE_SIZE);
2007	pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
2008	cb -= PAGE_SIZE;
2009	}
2010	/* won't ever get here. */
2011	}
2012
2013
2014	/**
2015	* Write to guest physical memory referenced by GC pointer and update the PTE.
2016	*
2017	* This function uses the current CR3/CR0/CR4 of the guest and will
2018	* bypass access handlers but will set any dirty and accessed bits in the PTE.
2019	*
2020	* If you don't want to set the dirty bit, use PGMPhysSimpleWriteGCPtr().
2021	*
2022	* @returns VBox status.
2023	* @param pVM VM handle.
2024	* @param GCPtrDst The destination address (GC pointer).
2025	* @param pvSrc The source address.
2026	* @param cb The number of bytes to write.
2027	*/
2028	VMMDECL(int) PGMPhysSimpleDirtyWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2029	{
2030	/*
2031	* Treat the first page as a special case.
2032	* Btw. this is the same code as in PGMPhyssimpleWriteGCPtr excep for the PGMGstModifyPage.
2033	*/
2034	if (!cb)
2035	return VINF_SUCCESS;
2036
2037	/* map the 1st page */
2038	void *pvDst;
2039	PGMPAGEMAPLOCK Lock;
2040	int rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2041	if (RT_FAILURE(rc))
2042	return rc;
2043
2044	/* optimize for the case where access is completely within the first page. */
2045	size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2046	if (RT_LIKELY(cb <= cbPage))
2047	{
2048	memcpy(pvDst, pvSrc, cb);
2049	PGMPhysReleasePageMappingLock(pVM, &Lock);
2050	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D)); AssertRC(rc);
2051	return VINF_SUCCESS;
2052	}
2053
2054	/* copy to the end of the page. */
2055	memcpy(pvDst, pvSrc, cbPage);
2056	PGMPhysReleasePageMappingLock(pVM, &Lock);
2057	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D)); AssertRC(rc);
2058	GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbPage);
2059	pvSrc = (const uint8_t *)pvSrc + cbPage;
2060	cb -= cbPage;
2061
2062	/*
2063	* Page by page.
2064	*/
2065	for (;;)
2066	{
2067	/* map the page */
2068	rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2069	if (RT_FAILURE(rc))
2070	return rc;
2071
2072	/* last page? */
2073	if (cb <= PAGE_SIZE)
2074	{
2075	memcpy(pvDst, pvSrc, cb);
2076	PGMPhysReleasePageMappingLock(pVM, &Lock);
2077	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D)); AssertRC(rc);
2078	return VINF_SUCCESS;
2079	}
2080
2081	/* copy the entire page and advance */
2082	memcpy(pvDst, pvSrc, PAGE_SIZE);
2083	PGMPhysReleasePageMappingLock(pVM, &Lock);
2084	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D)); AssertRC(rc);
2085	GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + PAGE_SIZE);
2086	pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
2087	cb -= PAGE_SIZE;
2088	}
2089	/* won't ever get here. */
2090	}
2091
2092
2093	/**
2094	* Read from guest physical memory referenced by GC pointer.
2095	*
2096	* This function uses the current CR3/CR0/CR4 of the guest and will
2097	* respect access handlers and set accessed bits.
2098	*
2099	* @returns VBox status.
2100	* @param pVM VM handle.
2101	* @param pvDst The destination address.
2102	* @param GCPtrSrc The source address (GC pointer).
2103	* @param cb The number of bytes to read.
2104	*/
2105	VMMDECL(int) PGMPhysReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
2106	{
2107	RTGCPHYS GCPhys;
2108	int rc;
2109
2110	/*
2111	* Anything to do?
2112	*/
2113	if (!cb)
2114	return VINF_SUCCESS;
2115
2116	LogFlow(("PGMPhysReadGCPtr: %RGv %zu\n", GCPtrSrc, cb));
2117
2118	/*
2119	* Optimize reads within a single page.
2120	*/
2121	if (((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2122	{
2123	/* Convert virtual to physical address */
2124	rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
2125	AssertRCReturn(rc, rc);
2126
2127	/* mark the guest page as accessed. */
2128	rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
2129	AssertRC(rc);
2130
2131	PGMPhysRead(pVM, GCPhys, pvDst, cb);
2132	return VINF_SUCCESS;
2133	}
2134
2135	/*
2136	* Page by page.
2137	*/
2138	for (;;)
2139	{
2140	/* Convert virtual to physical address */
2141	rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
2142	AssertRCReturn(rc, rc);
2143
2144	/* mark the guest page as accessed. */
2145	int rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
2146	AssertRC(rc);
2147
2148	/* copy */
2149	size_t cbRead = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
2150	if (cbRead >= cb)
2151	{
2152	PGMPhysRead(pVM, GCPhys, pvDst, cb);
2153	return VINF_SUCCESS;
2154	}
2155	PGMPhysRead(pVM, GCPhys, pvDst, cbRead);
2156
2157	/* next */
2158	cb -= cbRead;
2159	pvDst = (uint8_t *)pvDst + cbRead;
2160	GCPtrSrc += cbRead;
2161	}
2162	}
2163
2164
2165	/**
2166	* Write to guest physical memory referenced by GC pointer.
2167	*
2168	* This function uses the current CR3/CR0/CR4 of the guest and will
2169	* respect access handlers and set dirty and accessed bits.
2170	*
2171	* @returns VBox status.
2172	* @param pVM VM handle.
2173	* @param GCPtrDst The destination address (GC pointer).
2174	* @param pvSrc The source address.
2175	* @param cb The number of bytes to write.
2176	*/
2177	VMMDECL(int) PGMPhysWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2178	{
2179	RTGCPHYS GCPhys;
2180	int rc;
2181
2182	/*
2183	* Anything to do?
2184	*/
2185	if (!cb)
2186	return VINF_SUCCESS;
2187
2188	LogFlow(("PGMPhysWriteGCPtr: %RGv %zu\n", GCPtrDst, cb));
2189
2190	/*
2191	* Optimize writes within a single page.
2192	*/
2193	if (((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2194	{
2195	/* Convert virtual to physical address */
2196	rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
2197	AssertRCReturn(rc, rc);
2198
2199	/* mark the guest page as accessed and dirty. */
2200	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D));
2201	AssertRC(rc);
2202
2203	PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
2204	return VINF_SUCCESS;
2205	}
2206
2207	/*
2208	* Page by page.
2209	*/
2210	for (;;)
2211	{
2212	/* Convert virtual to physical address */
2213	rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
2214	AssertRCReturn(rc, rc);
2215
2216	/* mark the guest page as accessed and dirty. */
2217	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D));
2218	AssertRC(rc);
2219
2220	/* copy */
2221	size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2222	if (cbWrite >= cb)
2223	{
2224	PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
2225	return VINF_SUCCESS;
2226	}
2227	PGMPhysWrite(pVM, GCPhys, pvSrc, cbWrite);
2228
2229	/* next */
2230	cb -= cbWrite;
2231	pvSrc = (uint8_t *)pvSrc + cbWrite;
2232	GCPtrDst += cbWrite;
2233	}
2234	}
2235
2236	#endif /* !IN_RC */
2237
2238	/**
2239	* Performs a read of guest virtual memory for instruction emulation.
2240	*
2241	* This will check permissions, raise exceptions and update the access bits.
2242	*
2243	* The current implementation will bypass all access handlers. It may later be
2244	* changed to at least respect MMIO.
2245	*
2246	*
2247	* @returns VBox status code suitable to scheduling.
2248	* @retval VINF_SUCCESS if the read was performed successfully.
2249	* @retval VINF_EM_RAW_GUEST_TRAP if an exception was raised but not dispatched yet.
2250	* @retval VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
2251	*
2252	* @param pVM The VM handle.
2253	* @param pCtxCore The context core.
2254	* @param pvDst Where to put the bytes we've read.
2255	* @param GCPtrSrc The source address.
2256	* @param cb The number of bytes to read. Not more than a page.
2257	*
2258	* @remark This function will dynamically map physical pages in GC. This may unmap
2259	* mappings done by the caller. Be careful!
2260	*/
2261	VMMDECL(int) PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb)
2262	{
2263	Assert(cb <= PAGE_SIZE);
2264
2265	/** @todo r=bird: This isn't perfect!
2266	* -# It's not checking for reserved bits being 1.
2267	* -# It's not correctly dealing with the access bit.
2268	* -# It's not respecting MMIO memory or any other access handlers.
2269	*/
2270	/*
2271	* 1. Translate virtual to physical. This may fault.
2272	* 2. Map the physical address.
2273	* 3. Do the read operation.
2274	* 4. Set access bits if required.
2275	*/
2276	int rc;
2277	unsigned cb1 = PAGE_SIZE - (GCPtrSrc & PAGE_OFFSET_MASK);
2278	if (cb <= cb1)
2279	{
2280	/*
2281	* Not crossing pages.
2282	*/
2283	RTGCPHYS GCPhys;
2284	uint64_t fFlags;
2285	rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags, &GCPhys);
2286	if (RT_SUCCESS(rc))
2287	{
2288	/** @todo we should check reserved bits ... */
2289	void *pvSrc;
2290	rc = PGM_GCPHYS_2_PTR(pVM, GCPhys, &pvSrc);
2291	switch (rc)
2292	{
2293	case VINF_SUCCESS:
2294	Log(("PGMPhysInterpretedRead: pvDst=%p pvSrc=%p cb=%d\n", pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb));
2295	memcpy(pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb);
2296	break;
2297	case VERR_PGM_PHYS_PAGE_RESERVED:
2298	case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
2299	memset(pvDst, 0, cb); /** @todo this is wrong, it should be 0xff */
2300	break;
2301	default:
2302	return rc;
2303	}
2304
2305	/** @todo access bit emulation isn't 100% correct. */
2306	if (!(fFlags & X86_PTE_A))
2307	{
2308	rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
2309	AssertRC(rc);
2310	}
2311	return VINF_SUCCESS;
2312	}
2313	}
2314	else
2315	{
2316	/*
2317	* Crosses pages.
2318	*/
2319	size_t cb2 = cb - cb1;
2320	uint64_t fFlags1;
2321	RTGCPHYS GCPhys1;
2322	uint64_t fFlags2;
2323	RTGCPHYS GCPhys2;
2324	rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags1, &GCPhys1);
2325	if (RT_SUCCESS(rc))
2326	rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
2327	if (RT_SUCCESS(rc))
2328	{
2329	/** @todo we should check reserved bits ... */
2330	AssertMsgFailed(("cb=%d cb1=%d cb2=%d GCPtrSrc=%RGv\n", cb, cb1, cb2, GCPtrSrc));
2331	void *pvSrc1;
2332	rc = PGM_GCPHYS_2_PTR(pVM, GCPhys1, &pvSrc1);
2333	switch (rc)
2334	{
2335	case VINF_SUCCESS:
2336	memcpy(pvDst, (uint8_t *)pvSrc1 + (GCPtrSrc & PAGE_OFFSET_MASK), cb1);
2337	break;
2338	case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
2339	memset(pvDst, 0, cb1); /** @todo this is wrong, it should be 0xff */
2340	break;
2341	default:
2342	return rc;
2343	}
2344
2345	void *pvSrc2;
2346	rc = PGM_GCPHYS_2_PTR(pVM, GCPhys2, &pvSrc2);
2347	switch (rc)
2348	{
2349	case VINF_SUCCESS:
2350	memcpy((uint8_t *)pvDst + cb1, pvSrc2, cb2);
2351	break;
2352	case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
2353	memset((uint8_t )pvDst + cb1, 0, cb2); /* @todo this is wrong, it should be 0xff */
2354	break;
2355	default:
2356	return rc;
2357	}
2358
2359	if (!(fFlags1 & X86_PTE_A))
2360	{
2361	rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
2362	AssertRC(rc);
2363	}
2364	if (!(fFlags2 & X86_PTE_A))
2365	{
2366	rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
2367	AssertRC(rc);
2368	}
2369	return VINF_SUCCESS;
2370	}
2371	}
2372
2373	/*
2374	* Raise a #PF.
2375	*/
2376	uint32_t uErr;
2377
2378	/* Get the current privilege level. */
2379	uint32_t cpl = CPUMGetGuestCPL(pVM, pCtxCore);
2380	switch (rc)
2381	{
2382	case VINF_SUCCESS:
2383	uErr = (cpl >= 2) ? X86_TRAP_PF_RSVD \| X86_TRAP_PF_US : X86_TRAP_PF_RSVD;
2384	break;
2385
2386	case VERR_PAGE_NOT_PRESENT:
2387	case VERR_PAGE_TABLE_NOT_PRESENT:
2388	uErr = (cpl >= 2) ? X86_TRAP_PF_US : 0;
2389	break;
2390
2391	default:
2392	AssertMsgFailed(("rc=%Rrc GCPtrSrc=%RGv cb=%#x\n", rc, GCPtrSrc, cb));
2393	return rc;
2394	}
2395	Log(("PGMPhysInterpretedRead: GCPtrSrc=%RGv cb=%#x -> #PF(%#x)\n", GCPtrSrc, cb, uErr));
2396	return TRPMRaiseXcptErrCR2(pVM, pCtxCore, X86_XCPT_PF, uErr, GCPtrSrc);
2397	}
2398
2399	/// @todo VMMDECL(int) PGMPhysInterpretedWrite(PVM pVM, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2400
2401

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source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp@ 14082

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