PGMAllPhys.cpp@ 14974

Last change on this file since 14974 was 14974, checked in by vboxsync, 16 years ago
reenabled VA in TLB code
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1	/* $Id: PGMAllPhys.cpp 14974 2008-12-04 12:45:43Z vboxsync $ */
2	/** @file
3	* PGM - Page Manager and Monitor, Physical Memory Addressing.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22	/*******************************************************************************
23	* Defined Constants And Macros *
24	*******************************************************************************/
25	/** @def PGM_IGNORE_RAM_FLAGS_RESERVED
26	* Don't respect the MM_RAM_FLAGS_RESERVED flag when converting to HC addresses.
27	*
28	* Since this flag is currently incorrectly kept set for ROM regions we will
29	* have to ignore it for now so we don't break stuff.
30	*
31	* @todo this has been fixed now I believe, remove this hack.
32	*/
33	#define PGM_IGNORE_RAM_FLAGS_RESERVED
34
35
36	/*******************************************************************************
37	* Header Files *
38	*******************************************************************************/
39	#define LOG_GROUP LOG_GROUP_PGM_PHYS
40	#include <VBox/pgm.h>
41	#include <VBox/trpm.h>
42	#include <VBox/vmm.h>
43	#include <VBox/iom.h>
44	#include <VBox/em.h>
45	#include <VBox/rem.h>
46	#include "PGMInternal.h"
47	#include <VBox/vm.h>
48	#include <VBox/param.h>
49	#include <VBox/err.h>
50	#include <iprt/assert.h>
51	#include <iprt/string.h>
52	#include <iprt/asm.h>
53	#include <VBox/log.h>
54	#ifdef IN_RING3
55	# include <iprt/thread.h>
56	#endif
57
58
59
60	#ifndef IN_RING3
61
62	/**
63	* \#PF Handler callback for Guest ROM range write access.
64	* We simply ignore the writes or fall back to the recompiler if we don't support the instruction.
65	*
66	* @returns VBox status code (appropritate for trap handling and GC return).
67	* @param pVM VM Handle.
68	* @param uErrorCode CPU Error code.
69	* @param pRegFrame Trap register frame.
70	* @param pvFault The fault address (cr2).
71	* @param GCPhysFault The GC physical address corresponding to pvFault.
72	* @param pvUser User argument. Pointer to the ROM range structure.
73	*/
74	VMMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void pvFault, RTGCPHYS GCPhysFault, void pvUser)
75	{
76	int rc;
77	#ifdef VBOX_WITH_NEW_PHYS_CODE
78	PPGMROMRANGE pRom = (PPGMROMRANGE)pvUser;
79	uint32_t iPage = GCPhysFault - pRom->GCPhys;
80	Assert(iPage < (pRom->cb >> PAGE_SHIFT));
81	switch (pRom->aPages[iPage].enmProt)
82	{
83	case PGMROMPROT_READ_ROM_WRITE_IGNORE:
84	case PGMROMPROT_READ_RAM_WRITE_IGNORE:
85	{
86	#endif
87	/*
88	* If it's a simple instruction which doesn't change the cpu state
89	* we will simply skip it. Otherwise we'll have to defer it to REM.
90	*/
91	uint32_t cbOp;
92	DISCPUSTATE Cpu;
93	rc = EMInterpretDisasOne(pVM, pRegFrame, &Cpu, &cbOp);
94	if ( RT_SUCCESS(rc)
95	&& Cpu.mode == CPUMODE_32BIT /** @todo why does this matter? */
96	&& !(Cpu.prefix & (PREFIX_REPNE \| PREFIX_REP \| PREFIX_SEG)))
97	{
98	switch (Cpu.opcode)
99	{
100	/** @todo Find other instructions we can safely skip, possibly
101	* adding this kind of detection to DIS or EM. */
102	case OP_MOV:
103	pRegFrame->rip += cbOp;
104	STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestROMWriteHandled);
105	return VINF_SUCCESS;
106	}
107	}
108	else if (RT_UNLIKELY(rc == VERR_INTERNAL_ERROR))
109	return rc;
110	#ifdef VBOX_WITH_NEW_PHYS_CODE
111	break;
112	}
113
114	case PGMROMPROT_READ_RAM_WRITE_RAM:
115	rc = PGMHandlerPhysicalPageTempOff(pVM, pRom->GCPhys, GCPhysFault & X86_PTE_PG_MASK);
116	AssertRC(rc);
117	case PGMROMPROT_READ_ROM_WRITE_RAM:
118	/* Handle it in ring-3 because it's way easier there. */
119	break;
120
121	default:
122	AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhysFault=%RGp\n",
123	pRom->aPages[iPage].enmProt, iPage, GCPhysFault),
124	VERR_INTERNAL_ERROR);
125	}
126	#endif
127
128	STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestROMWriteUnhandled);
129	return VINF_EM_RAW_EMULATE_INSTR;
130	}
131
132	#endif /* IN_RING3 */
133
134	/**
135	* Checks if Address Gate 20 is enabled or not.
136	*
137	* @returns true if enabled.
138	* @returns false if disabled.
139	* @param pVM VM handle.
140	*/
141	VMMDECL(bool) PGMPhysIsA20Enabled(PVM pVM)
142	{
143	LogFlow(("PGMPhysIsA20Enabled %d\n", pVM->pgm.s.fA20Enabled));
144	return !!pVM->pgm.s.fA20Enabled ; /* stupid MS compiler doesn't trust me. */
145	}
146
147
148	/**
149	* Validates a GC physical address.
150	*
151	* @returns true if valid.
152	* @returns false if invalid.
153	* @param pVM The VM handle.
154	* @param GCPhys The physical address to validate.
155	*/
156	VMMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys)
157	{
158	PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
159	return pPage != NULL;
160	}
161
162
163	/**
164	* Checks if a GC physical address is a normal page,
165	* i.e. not ROM, MMIO or reserved.
166	*
167	* @returns true if normal.
168	* @returns false if invalid, ROM, MMIO or reserved page.
169	* @param pVM The VM handle.
170	* @param GCPhys The physical address to check.
171	*/
172	VMMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys)
173	{
174	PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
175	return pPage
176	&& !(pPage->HCPhys & (MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO2));
177	}
178
179
180	/**
181	* Converts a GC physical address to a HC physical address.
182	*
183	* @returns VINF_SUCCESS on success.
184	* @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
185	* page but has no physical backing.
186	* @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
187	* GC physical address.
188	*
189	* @param pVM The VM handle.
190	* @param GCPhys The GC physical address to convert.
191	* @param pHCPhys Where to store the HC physical address on success.
192	*/
193	VMMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
194	{
195	PPGMPAGE pPage;
196	int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhys, &pPage);
197	if (RT_FAILURE(rc))
198	return rc;
199
200	#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
201	if (RT_UNLIKELY(pPage->HCPhys & MM_RAM_FLAGS_RESERVED)) /** @todo PAGE FLAGS */
202	return VERR_PGM_PHYS_PAGE_RESERVED;
203	#endif
204
205	*pHCPhys = PGM_PAGE_GET_HCPHYS(pPage) \| (GCPhys & PAGE_OFFSET_MASK);
206	return VINF_SUCCESS;
207	}
208
209
210	/**
211	* Invalidates the GC page mapping TLB.
212	*
213	* @param pVM The VM handle.
214	*/
215	VMMDECL(void) PGMPhysInvalidatePageGCMapTLB(PVM pVM)
216	{
217	/* later */
218	NOREF(pVM);
219	}
220
221
222	/**
223	* Invalidates the ring-0 page mapping TLB.
224	*
225	* @param pVM The VM handle.
226	*/
227	VMMDECL(void) PGMPhysInvalidatePageR0MapTLB(PVM pVM)
228	{
229	PGMPhysInvalidatePageR3MapTLB(pVM);
230	}
231
232
233	/**
234	* Invalidates the ring-3 page mapping TLB.
235	*
236	* @param pVM The VM handle.
237	*/
238	VMMDECL(void) PGMPhysInvalidatePageR3MapTLB(PVM pVM)
239	{
240	pgmLock(pVM);
241	for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.PhysTlbHC.aEntries); i++)
242	{
243	pVM->pgm.s.PhysTlbHC.aEntries[i].GCPhys = NIL_RTGCPHYS;
244	pVM->pgm.s.PhysTlbHC.aEntries[i].pPage = 0;
245	pVM->pgm.s.PhysTlbHC.aEntries[i].pMap = 0;
246	pVM->pgm.s.PhysTlbHC.aEntries[i].pv = 0;
247	}
248	pgmUnlock(pVM);
249	}
250
251
252	/**
253	* Frees the specified RAM page.
254	*
255	* This is used by ballooning and remapping MMIO2.
256	*
257	* @param pVM Pointer to the shared VM structure.
258	* @param pPage Pointer to the page structure.
259	* @param GCPhys The guest physical address of the page, if applicable.
260	*/
261	void pgmPhysFreePage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
262	{
263	AssertFatal(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM);
264
265	/** @todo implement this... */
266	AssertFatalFailed();
267	}
268
269
270	/**
271	* Makes sure that there is at least one handy page ready for use.
272	*
273	* This will also take the appropriate actions when reaching water-marks.
274	*
275	* @returns The following VBox status codes.
276	* @retval VINF_SUCCESS on success.
277	* @retval VERR_EM_NO_MEMORY if we're really out of memory.
278	*
279	* @param pVM The VM handle.
280	*
281	* @remarks Must be called from within the PGM critical section. It may
282	* nip back to ring-3/0 in some cases.
283	*/
284	static int pgmPhysEnsureHandyPage(PVM pVM)
285	{
286	/** @remarks
287	* low-water mark logic for R0 & GC:
288	* - 75%: Set FF.
289	* - 50%: Force return to ring-3 ASAP.
290	*
291	* For ring-3 there is a little problem wrt to the recompiler, so:
292	* - 75%: Set FF.
293	* - 50%: Try allocate pages; on failure we'll force REM to quite ASAP.
294	*
295	* The basic idea is that we should be able to get out of any situation with
296	* only 50% of handy pages remaining.
297	*
298	* At the moment we'll not adjust the number of handy pages relative to the
299	* actual VM RAM committment, that's too much work for now.
300	*/
301	Assert(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages));
302	if ( !pVM->pgm.s.cHandyPages
303	#ifdef IN_RING3
304	\|\| pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 2 /* 50% */
305	#endif
306	)
307	{
308	Log(("PGM: cHandyPages=%u out of %u -> allocate more\n", pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
309	#ifdef IN_RING3
310	int rc = SUPCallVMMR0Ex(pVM->pVMR0, VMMR0_DO_PGM_ALLOCATE_HANDY_PAGES, 0, NULL);
311	#elif defined(IN_RING0)
312	/** @todo call PGMR0PhysAllocateHandyPages directly - need to make sure we can call kernel code first and deal with the seeding fallback. */
313	int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_ALLOCATE_HANDY_PAGES, 0);
314	#else
315	int rc = VMMGCCallHost(pVM, VMMCALLHOST_PGM_ALLOCATE_HANDY_PAGES, 0);
316	#endif
317	if (RT_UNLIKELY(rc != VINF_SUCCESS))
318	{
319	Assert(rc == VINF_EM_NO_MEMORY);
320	if (!pVM->pgm.s.cHandyPages)
321	{
322	LogRel(("PGM: no more handy pages!\n"));
323	return VERR_EM_NO_MEMORY;
324	}
325	Assert(VM_FF_ISSET(pVM, VM_FF_PGM_NEED_HANDY_PAGES));
326	#ifdef IN_RING3
327	REMR3NotifyFF(pVM);
328	#else
329	VM_FF_SET(pVM, VM_FF_TO_R3);
330	#endif
331	}
332	Assert(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages));
333	}
334	else if (pVM->pgm.s.cHandyPages - 1 <= (RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 4) * 3) /* 75% */
335	{
336	VM_FF_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
337	#ifndef IN_RING3
338	if (pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 2)
339	{
340	Log(("PGM: VM_FF_TO_R3 - cHandyPages=%u out of %u\n", pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
341	VM_FF_SET(pVM, VM_FF_TO_R3);
342	}
343	#endif
344	}
345
346	return VINF_SUCCESS;
347	}
348
349
350	/**
351	* Replace a zero or shared page with new page that we can write to.
352	*
353	* @returns The following VBox status codes.
354	* @retval VINF_SUCCESS on success, pPage is modified.
355	* @retval VERR_EM_NO_MEMORY if we're totally out of memory.
356	*
357	* @todo Propagate VERR_EM_NO_MEMORY up the call tree.
358	*
359	* @param pVM The VM address.
360	* @param pPage The physical page tracking structure. This will
361	* be modified on success.
362	* @param GCPhys The address of the page.
363	*
364	* @remarks Must be called from within the PGM critical section. It may
365	* nip back to ring-3/0 in some cases.
366	*
367	* @remarks This function shouldn't really fail, however if it does
368	* it probably means we've screwed up the size of the amount
369	* and/or the low-water mark of handy pages. Or, that some
370	* device I/O is causing a lot of pages to be allocated while
371	* while the host is in a low-memory condition.
372	*/
373	int pgmPhysAllocPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
374	{
375	/*
376	* Ensure that we've got a page handy, take it and use it.
377	*/
378	int rc = pgmPhysEnsureHandyPage(pVM);
379	if (RT_FAILURE(rc))
380	{
381	Assert(rc == VERR_EM_NO_MEMORY);
382	return rc;
383	}
384	AssertMsg(PGM_PAGE_IS_ZERO(pPage) \|\| PGM_PAGE_IS_SHARED(pPage), ("%d %RGp\n", PGM_PAGE_GET_STATE(pPage), GCPhys));
385	Assert(!PGM_PAGE_IS_RESERVED(pPage));
386	Assert(!PGM_PAGE_IS_MMIO(pPage));
387
388	uint32_t iHandyPage = --pVM->pgm.s.cHandyPages;
389	Assert(iHandyPage < RT_ELEMENTS(pVM->pgm.s.aHandyPages));
390	Assert(pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys != NIL_RTHCPHYS);
391	Assert(!(pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys & ~X86_PTE_PAE_PG_MASK));
392	Assert(pVM->pgm.s.aHandyPages[iHandyPage].idPage != NIL_GMM_PAGEID);
393	Assert(pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage == NIL_GMM_PAGEID);
394
395	/*
396	* There are one or two action to be taken the next time we allocate handy pages:
397	* - Tell the GMM (global memory manager) what the page is being used for.
398	* (Speeds up replacement operations - sharing and defragmenting.)
399	* - If the current backing is shared, it must be freed.
400	*/
401	const RTHCPHYS HCPhys = pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys;
402	pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys = GCPhys;
403
404	if (PGM_PAGE_IS_SHARED(pPage))
405	{
406	pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage = PGM_PAGE_GET_PAGEID(pPage);
407	Assert(PGM_PAGE_GET_PAGEID(pPage) != NIL_GMM_PAGEID);
408	VM_FF_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
409
410	Log2(("PGM: Replaced shared page %#x at %RGp with %#x / %RHp\n", PGM_PAGE_GET_PAGEID(pPage),
411	GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
412	STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,PageReplaceShared));
413	pVM->pgm.s.cSharedPages--;
414	/** @todo err.. what about copying the page content? */
415	}
416	else
417	{
418	Log2(("PGM: Replaced zero page %RGp with %#x / %RHp\n", GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
419	STAM_COUNTER_INC(&pVM->pgm.s.StatRZPageReplaceZero);
420	pVM->pgm.s.cZeroPages--;
421	/** @todo verify that the handy page is zero! */
422	}
423
424	/*
425	* Do the PGMPAGE modifications.
426	*/
427	pVM->pgm.s.cPrivatePages++;
428	PGM_PAGE_SET_HCPHYS(pPage, HCPhys);
429	PGM_PAGE_SET_PAGEID(pPage, pVM->pgm.s.aHandyPages[iHandyPage].idPage);
430	PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
431
432	return VINF_SUCCESS;
433	}
434
435
436	/**
437	* Deal with pages that are not writable, i.e. not in the ALLOCATED state.
438	*
439	* @returns VBox status code.
440	* @retval VINF_SUCCESS on success.
441	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
442	*
443	* @param pVM The VM address.
444	* @param pPage The physical page tracking structure.
445	* @param GCPhys The address of the page.
446	*
447	* @remarks Called from within the PGM critical section.
448	*/
449	int pgmPhysPageMakeWritable(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
450	{
451	switch (PGM_PAGE_GET_STATE(pPage))
452	{
453	case PGM_PAGE_STATE_WRITE_MONITORED:
454	PGM_PAGE_SET_WRITTEN_TO(pPage);
455	PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
456	/* fall thru */
457	default: /* to shut up GCC */
458	case PGM_PAGE_STATE_ALLOCATED:
459	return VINF_SUCCESS;
460
461	/*
462	* Zero pages can be dummy pages for MMIO or reserved memory,
463	* so we need to check the flags before joining cause with
464	* shared page replacement.
465	*/
466	case PGM_PAGE_STATE_ZERO:
467	if ( PGM_PAGE_IS_MMIO(pPage)
468	\|\| PGM_PAGE_IS_RESERVED(pPage))
469	return VERR_PGM_PHYS_PAGE_RESERVED;
470	/* fall thru */
471	case PGM_PAGE_STATE_SHARED:
472	return pgmPhysAllocPage(pVM, pPage, GCPhys);
473	}
474	}
475
476
477	/**
478	* Maps a page into the current virtual address space so it can be accessed.
479	*
480	* @returns VBox status code.
481	* @retval VINF_SUCCESS on success.
482	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
483	*
484	* @param pVM The VM address.
485	* @param pPage The physical page tracking structure.
486	* @param GCPhys The address of the page.
487	* @param ppMap Where to store the address of the mapping tracking structure.
488	* @param ppv Where to store the mapping address of the page. The page
489	* offset is masked off!
490	*
491	* @remarks Called from within the PGM critical section.
492	*/
493	int pgmPhysPageMap(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv)
494	{
495	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
496	/*
497	* Just some sketchy GC/R0-darwin code.
498	*/
499	*ppMap = NULL;
500	RTHCPHYS HCPhys = PGM_PAGE_GET_HCPHYS(pPage);
501	Assert(HCPhys != pVM->pgm.s.HCPhysZeroPg);
502	return PGMDynMapHCPage(pVM, HCPhys, ppv);
503
504	#else /* IN_RING3 \|\| IN_RING0 */
505
506	/*
507	* Find/make Chunk TLB entry for the mapping chunk.
508	*/
509	PPGMCHUNKR3MAP pMap;
510	const uint32_t idChunk = PGM_PAGE_GET_CHUNKID(pPage);
511	PPGMCHUNKR3MAPTLBE pTlbe = &pVM->pgm.s.ChunkR3Map.Tlb.aEntries[PGM_CHUNKR3MAPTLB_IDX(idChunk)];
512	if (pTlbe->idChunk == idChunk)
513	{
514	STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbHits));
515	pMap = pTlbe->pChunk;
516	}
517	else if (idChunk != NIL_GMM_CHUNKID)
518	{
519	STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbMisses));
520
521	/*
522	* Find the chunk, map it if necessary.
523	*/
524	pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
525	if (!pMap)
526	{
527	#ifdef IN_RING0
528	int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_MAP_CHUNK, idChunk);
529	AssertRCReturn(rc, rc);
530	pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
531	Assert(pMap);
532	#else
533	int rc = pgmR3PhysChunkMap(pVM, idChunk, &pMap);
534	if (RT_FAILURE(rc))
535	return rc;
536	#endif
537	}
538
539	/*
540	* Enter it into the Chunk TLB.
541	*/
542	pTlbe->idChunk = idChunk;
543	pTlbe->pChunk = pMap;
544	pMap->iAge = 0;
545	}
546	else
547	{
548	Assert(PGM_PAGE_IS_ZERO(pPage));
549	*ppv = pVM->pgm.s.CTXALLSUFF(pvZeroPg);
550	*ppMap = NULL;
551	return VINF_SUCCESS;
552	}
553
554	ppv = (uint8_t )pMap->pv + (PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) << PAGE_SHIFT);
555	*ppMap = pMap;
556	return VINF_SUCCESS;
557	#endif /* IN_RING3 */
558	}
559
560
561	#if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
562	/**
563	* Load a guest page into the ring-3 physical TLB.
564	*
565	* @returns VBox status code.
566	* @retval VINF_SUCCESS on success
567	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
568	* @param pPGM The PGM instance pointer.
569	* @param GCPhys The guest physical address in question.
570	*/
571	int pgmPhysPageLoadIntoTlb(PPGM pPGM, RTGCPHYS GCPhys)
572	{
573	STAM_COUNTER_INC(&pPGM->CTX_MID_Z(Stat,PageMapTlbMisses));
574
575	/*
576	* Find the ram range.
577	* 99.8% of requests are expected to be in the first range.
578	*/
579	PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRanges);
580	RTGCPHYS off = GCPhys - pRam->GCPhys;
581	if (RT_UNLIKELY(off >= pRam->cb))
582	{
583	do
584	{
585	pRam = pRam->CTX_SUFF(pNext);
586	if (!pRam)
587	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
588	off = GCPhys - pRam->GCPhys;
589	} while (off >= pRam->cb);
590	}
591
592	/*
593	* Map the page.
594	* Make a special case for the zero page as it is kind of special.
595	*/
596	PPGMPAGE pPage = &pRam->aPages[off >> PAGE_SHIFT];
597	PPGMPAGEMAPTLBE pTlbe = &pPGM->CTXSUFF(PhysTlb).aEntries[PGM_PAGEMAPTLB_IDX(GCPhys)];
598	if (!PGM_PAGE_IS_ZERO(pPage))
599	{
600	void *pv;
601	PPGMPAGEMAP pMap;
602	int rc = pgmPhysPageMap(PGM2VM(pPGM), pPage, GCPhys, &pMap, &pv);
603	if (RT_FAILURE(rc))
604	return rc;
605	pTlbe->pMap = pMap;
606	pTlbe->pv = pv;
607	}
608	else
609	{
610	Assert(PGM_PAGE_GET_HCPHYS(pPage) == pPGM->HCPhysZeroPg);
611	pTlbe->pMap = NULL;
612	pTlbe->pv = pPGM->CTXALLSUFF(pvZeroPg);
613	}
614	pTlbe->pPage = pPage;
615	return VINF_SUCCESS;
616	}
617	#endif /* !IN_RC && !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
618
619
620	/**
621	* Requests the mapping of a guest page into the current context.
622	*
623	* This API should only be used for very short term, as it will consume
624	* scarse resources (R0 and GC) in the mapping cache. When you're done
625	* with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
626	*
627	* This API will assume your intention is to write to the page, and will
628	* therefore replace shared and zero pages. If you do not intend to modify
629	* the page, use the PGMPhysGCPhys2CCPtrReadOnly() API.
630	*
631	* @returns VBox status code.
632	* @retval VINF_SUCCESS on success.
633	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
634	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
635	*
636	* @param pVM The VM handle.
637	* @param GCPhys The guest physical address of the page that should be mapped.
638	* @param ppv Where to store the address corresponding to GCPhys.
639	* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
640	*
641	* @remark Avoid calling this API from within critical sections (other than
642	* the PGM one) because of the deadlock risk.
643	* @thread Any thread.
644	*/
645	VMMDECL(int) PGMPhysGCPhys2CCPtr(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock)
646	{
647	#ifdef VBOX_WITH_NEW_PHYS_CODE
648	# if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
649	/** @todo this needs to be fixed, it really ain't right. */
650	/* Until a physical TLB is implemented for GC or/and R0-darwin, let PGMDynMapGCPageEx handle it. */
651	return PGMDynMapGCPageOff(pVM, GCPhys, ppv);
652
653	#else
654	int rc = pgmLock(pVM);
655	AssertRCReturn(rc);
656
657	/*
658	* Query the Physical TLB entry for the page (may fail).
659	*/
660	PGMPHYSTLBE pTlbe;
661	int rc = pgmPhysPageQueryTlbe(&pVM->pgm.s, GCPhys, &pTlbe);
662	if (RT_SUCCESS(rc))
663	{
664	/*
665	* If the page is shared, the zero page, or being write monitored
666	* it must be converted to an page that's writable if possible.
667	*/
668	PPGMPAGE pPage = pTlbe->pPage;
669	if (RT_UNLIKELY(PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED))
670	{
671	rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
672	/** @todo stuff is missing here! */
673	}
674	if (RT_SUCCESS(rc))
675	{
676	/*
677	* Now, just perform the locking and calculate the return address.
678	*/
679	PPGMPAGEMAP pMap = pTlbe->pMap;
680	pMap->cRefs++;
681	if (RT_LIKELY(pPage->cLocks != PGM_PAGE_MAX_LOCKS))
682	if (RT_UNLIKELY(++pPage->cLocks == PGM_PAGE_MAX_LOCKS))
683	{
684	AssertMsgFailed(("%RGp is entering permanent locked state!\n", GCPhys));
685	pMap->cRefs++; /* Extra ref to prevent it from going away. */
686	}
687
688	ppv = (void )((uintptr_t)pTlbe->pv \| (GCPhys & PAGE_OFFSET_MASK));
689	pLock->pvPage = pPage;
690	pLock->pvMap = pMap;
691	}
692	}
693
694	pgmUnlock(pVM);
695	return rc;
696
697	#endif /* IN_RING3 \|\| IN_RING0 */
698
699	#else
700	/*
701	* Temporary fallback code.
702	*/
703	# if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
704	/** @todo @bugref{3202}: check up this path. */
705	return PGMDynMapGCPageOff(pVM, GCPhys, ppv);
706	# else
707	return PGMPhysGCPhys2R3Ptr(pVM, GCPhys, 1, (PRTR3PTR)ppv);
708	# endif
709	#endif
710	}
711
712
713	/**
714	* Requests the mapping of a guest page into the current context.
715	*
716	* This API should only be used for very short term, as it will consume
717	* scarse resources (R0 and GC) in the mapping cache. When you're done
718	* with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
719	*
720	* @returns VBox status code.
721	* @retval VINF_SUCCESS on success.
722	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
723	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
724	*
725	* @param pVM The VM handle.
726	* @param GCPhys The guest physical address of the page that should be mapped.
727	* @param ppv Where to store the address corresponding to GCPhys.
728	* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
729	*
730	* @remark Avoid calling this API from within critical sections (other than
731	* the PGM one) because of the deadlock risk.
732	* @thread Any thread.
733	*/
734	VMMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock)
735	{
736	/** @todo implement this */
737	return PGMPhysGCPhys2CCPtr(pVM, GCPhys, (void **)ppv, pLock);
738	}
739
740
741	/**
742	* Requests the mapping of a guest page given by virtual address into the current context.
743	*
744	* This API should only be used for very short term, as it will consume
745	* scarse resources (R0 and GC) in the mapping cache. When you're done
746	* with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
747	*
748	* This API will assume your intention is to write to the page, and will
749	* therefore replace shared and zero pages. If you do not intend to modify
750	* the page, use the PGMPhysGCPtr2CCPtrReadOnly() API.
751	*
752	* @returns VBox status code.
753	* @retval VINF_SUCCESS on success.
754	* @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
755	* @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
756	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
757	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
758	*
759	* @param pVM The VM handle.
760	* @param GCPhys The guest physical address of the page that should be mapped.
761	* @param ppv Where to store the address corresponding to GCPhys.
762	* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
763	*
764	* @remark Avoid calling this API from within critical sections (other than
765	* the PGM one) because of the deadlock risk.
766	* @thread EMT
767	*/
768	VMMDECL(int) PGMPhysGCPtr2CCPtr(PVM pVM, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock)
769	{
770	RTGCPHYS GCPhys;
771	int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys);
772	if (RT_SUCCESS(rc))
773	rc = PGMPhysGCPhys2CCPtr(pVM, GCPhys, ppv, pLock);
774	return rc;
775	}
776
777
778	/**
779	* Requests the mapping of a guest page given by virtual address into the current context.
780	*
781	* This API should only be used for very short term, as it will consume
782	* scarse resources (R0 and GC) in the mapping cache. When you're done
783	* with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
784	*
785	* @returns VBox status code.
786	* @retval VINF_SUCCESS on success.
787	* @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
788	* @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
789	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
790	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
791	*
792	* @param pVM The VM handle.
793	* @param GCPhys The guest physical address of the page that should be mapped.
794	* @param ppv Where to store the address corresponding to GCPhys.
795	* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
796	*
797	* @remark Avoid calling this API from within critical sections (other than
798	* the PGM one) because of the deadlock risk.
799	* @thread EMT
800	*/
801	VMMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVM pVM, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock)
802	{
803	RTGCPHYS GCPhys;
804	int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys);
805	if (RT_SUCCESS(rc))
806	rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhys, ppv, pLock);
807	return rc;
808	}
809
810
811	/**
812	* Release the mapping of a guest page.
813	*
814	* This is the counter part of PGMPhysGCPhys2CCPtr, PGMPhysGCPhys2CCPtrReadOnly
815	* PGMPhysGCPtr2CCPtr and PGMPhysGCPtr2CCPtrReadOnly.
816	*
817	* @param pVM The VM handle.
818	* @param pLock The lock structure initialized by the mapping function.
819	*/
820	VMMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock)
821	{
822	#ifdef VBOX_WITH_NEW_PHYS_CODE
823	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
824	/* currently nothing to do here. */
825	/* --- postponed
826	#elif defined(IN_RING0)
827	*/
828
829	#else /* IN_RING3 */
830	pgmLock(pVM);
831
832	PPGMPAGE pPage = (PPGMPAGE)pLock->pvPage;
833	Assert(pPage->cLocks >= 1);
834	if (pPage->cLocks != PGM_PAGE_MAX_LOCKS)
835	pPage->cLocks--;
836
837	PPGMCHUNKR3MAP pChunk = (PPGMCHUNKR3MAP)pLock->pvChunk;
838	Assert(pChunk->cRefs >= 1);
839	pChunk->cRefs--;
840	pChunk->iAge = 0;
841
842	pgmUnlock(pVM);
843	#endif /* IN_RING3 */
844	#else
845	NOREF(pVM);
846	NOREF(pLock);
847	#endif
848	}
849
850
851	/**
852	* Converts a GC physical address to a HC ring-3 pointer.
853	*
854	* @returns VINF_SUCCESS on success.
855	* @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
856	* page but has no physical backing.
857	* @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
858	* GC physical address.
859	* @returns VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY if the range crosses
860	* a dynamic ram chunk boundary
861	*
862	* @param pVM The VM handle.
863	* @param GCPhys The GC physical address to convert.
864	* @param cbRange Physical range
865	* @param pR3Ptr Where to store the R3 pointer on success.
866	*/
867	VMMDECL(int) PGMPhysGCPhys2R3Ptr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTR3PTR pR3Ptr)
868	{
869	#ifdef VBOX_WITH_NEW_PHYS_CODE
870	VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
871	#endif
872
873	if ((GCPhys & PGM_DYNAMIC_CHUNK_BASE_MASK) != ((GCPhys+cbRange-1) & PGM_DYNAMIC_CHUNK_BASE_MASK))
874	{
875	AssertMsgFailed(("%RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
876	LogRel(("PGMPhysGCPhys2HCPtr %RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
877	return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
878	}
879
880	PPGMRAMRANGE pRam;
881	PPGMPAGE pPage;
882	int rc = pgmPhysGetPageAndRangeEx(&pVM->pgm.s, GCPhys, &pPage, &pRam);
883	if (RT_FAILURE(rc))
884	return rc;
885
886	#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
887	if (RT_UNLIKELY(PGM_PAGE_IS_RESERVED(pPage)))
888	return VERR_PGM_PHYS_PAGE_RESERVED;
889	#endif
890
891	RTGCPHYS off = GCPhys - pRam->GCPhys;
892	if (RT_UNLIKELY(off + cbRange > pRam->cb))
893	{
894	AssertMsgFailed(("%RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys + cbRange));
895	return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
896	}
897
898	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
899	{
900	unsigned iChunk = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
901	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) /* ASSUMES this is a rare occurence */
902	PRTR3UINTPTR paChunkR3Ptrs = (PRTR3UINTPTR)MMHyperR3ToCC(pVM, pRam->paChunkR3Ptrs);
903	*pR3Ptr = (RTR3PTR)(paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
904	#else
905	*pR3Ptr = (RTR3PTR)(pRam->paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
906	#endif
907	}
908	else if (RT_LIKELY(pRam->pvR3))
909	*pR3Ptr = (RTR3PTR)((RTR3UINTPTR)pRam->pvR3 + off);
910	else
911	return VERR_PGM_PHYS_PAGE_RESERVED;
912	return VINF_SUCCESS;
913	}
914
915	/**
916	* Converts a GC physical address to a HC ring-3 pointer, with some
917	* additional checks.
918	*
919	* @returns VINF_SUCCESS on success.
920	* @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
921	* page but has no physical backing, or if partuclar
922	* memory access must always go via PGM, because of handlers.
923	* @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
924	* GC physical address.
925	*
926	* @param pVM The VM handle.
927	* @param GCPhys The GC physical address to convert.
928	* @param GCPtr The guest VA, to check virtual handler on.
929	* @param flags Flags controlling additional checks.
930	* @param pR3Ptr Where to store the R3 pointer on success.
931	*/
932	VMMDECL(int) PGMPhysGCPhys2R3PtrEx(PVM pVM, RTGCPHYS GCPhys, RTGCPTR GCPtr, uint32_t flags, PRTR3PTR pR3Ptr)
933	{
934	int rc;
935
936	rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys, 1, pR3Ptr);
937
938	if (RT_SUCCESS(rc) && (flags & PGMPHYS_TRANSLATION_FLAG_CHECK_PHYS_MONITORED))
939	{
940	/* Check if there's a physical handler for PA */
941	if (PGMHandlerPhysicalIsRegistered(pVM, GCPhys))
942	rc = VERR_PGM_PHYS_PAGE_RESERVED;
943	}
944
945	if (RT_SUCCESS(rc) && (flags & PGMPHYS_TRANSLATION_FLAG_CHECK_VIRT_MONITORED))
946	{
947	/* Check if there's a virtual handler for VA */
948	if (PGMHandlerVirtualIsRegistered(pVM, GCPtr))
949	rc = VERR_PGM_PHYS_PAGE_RESERVED;
950	}
951
952	return rc;
953	}
954	/**
955	* PGMPhysGCPhys2R3Ptr convenience for use with assertions.
956	*
957	* @returns The R3Ptr, NIL_RTR3PTR on failure.
958	* @param pVM The VM handle.
959	* @param GCPhys The GC Physical addresss.
960	* @param cbRange Physical range.
961	*/
962	VMMDECL(RTR3PTR) PGMPhysGCPhys2R3PtrAssert(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange)
963	{
964	RTR3PTR R3Ptr;
965	int rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys, cbRange, &R3Ptr);
966	if (RT_SUCCESS(rc))
967	return R3Ptr;
968	return NIL_RTR3PTR;
969	}
970
971
972	/**
973	* Converts a guest pointer to a GC physical address.
974	*
975	* This uses the current CR3/CR0/CR4 of the guest.
976	*
977	* @returns VBox status code.
978	* @param pVM The VM Handle
979	* @param GCPtr The guest pointer to convert.
980	* @param pGCPhys Where to store the GC physical address.
981	*/
982	VMMDECL(int) PGMPhysGCPtr2GCPhys(PVM pVM, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
983	{
984	int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, pGCPhys);
985	if (pGCPhys && RT_SUCCESS(rc))
986	*pGCPhys \|= (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK;
987	return rc;
988	}
989
990
991	/**
992	* Converts a guest pointer to a HC physical address.
993	*
994	* This uses the current CR3/CR0/CR4 of the guest.
995	*
996	* @returns VBox status code.
997	* @param pVM The VM Handle
998	* @param GCPtr The guest pointer to convert.
999	* @param pHCPhys Where to store the HC physical address.
1000	*/
1001	VMMDECL(int) PGMPhysGCPtr2HCPhys(PVM pVM, RTGCPTR GCPtr, PRTHCPHYS pHCPhys)
1002	{
1003	RTGCPHYS GCPhys;
1004	int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
1005	if (RT_SUCCESS(rc))
1006	rc = PGMPhysGCPhys2HCPhys(pVM, GCPhys \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), pHCPhys);
1007	return rc;
1008	}
1009
1010
1011	/**
1012	* Converts a guest pointer to a R3 pointer.
1013	*
1014	* This uses the current CR3/CR0/CR4 of the guest.
1015	*
1016	* @returns VBox status code.
1017	* @param pVM The VM Handle
1018	* @param GCPtr The guest pointer to convert.
1019	* @param pR3Ptr Where to store the R3 virtual address.
1020	*/
1021	VMMDECL(int) PGMPhysGCPtr2R3Ptr(PVM pVM, RTGCPTR GCPtr, PRTR3PTR pR3Ptr)
1022	{
1023	#ifdef VBOX_WITH_NEW_PHYS_CODE
1024	VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
1025	#endif
1026
1027	RTGCPHYS GCPhys;
1028	int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
1029	if (RT_SUCCESS(rc))
1030	rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pR3Ptr);
1031	return rc;
1032	}
1033
1034
1035	/**
1036	* Converts a guest virtual address to a HC ring-3 pointer by specfied CR3 and
1037	* flags.
1038	*
1039	* @returns VBox status code.
1040	* @param pVM The VM Handle
1041	* @param GCPtr The guest pointer to convert.
1042	* @param cr3 The guest CR3.
1043	* @param fFlags Flags used for interpreting the PD correctly: X86_CR4_PSE and X86_CR4_PAE
1044	* @param pR3Ptr Where to store the R3 pointer.
1045	*
1046	* @remark This function is used by the REM at a time where PGM could
1047	* potentially not be in sync. It could also be used by a
1048	* future DBGF API to cpu state independent conversions.
1049	*/
1050	VMMDECL(int) PGMPhysGCPtr2R3PtrByGstCR3(PVM pVM, RTGCPTR GCPtr, uint64_t cr3, unsigned fFlags, PRTR3PTR pR3Ptr)
1051	{
1052	#ifdef VBOX_WITH_NEW_PHYS_CODE
1053	VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
1054	#endif
1055	/*
1056	* PAE or 32-bit?
1057	*/
1058	Assert(!CPUMIsGuestInLongMode(pVM));
1059
1060	int rc;
1061	if (!(fFlags & X86_CR4_PAE))
1062	{
1063	PX86PD pPD;
1064	rc = PGM_GCPHYS_2_PTR(pVM, cr3 & X86_CR3_PAGE_MASK, &pPD);
1065	if (RT_SUCCESS(rc))
1066	{
1067	X86PDE Pde = pPD->a[(RTGCUINTPTR)GCPtr >> X86_PD_SHIFT];
1068	if (Pde.n.u1Present)
1069	{
1070	if ((fFlags & X86_CR4_PSE) && Pde.b.u1Size)
1071	{ /* (big page) */
1072	rc = PGMPhysGCPhys2R3Ptr(pVM, pgmGstGet4MBPhysPage(&pVM->pgm.s, Pde) \| ((RTGCUINTPTR)GCPtr & X86_PAGE_4M_OFFSET_MASK),
1073	1 /* we always stay within one page */, pR3Ptr);
1074	}
1075	else
1076	{ /* (normal page) */
1077	PX86PT pPT;
1078	rc = PGM_GCPHYS_2_PTR(pVM, Pde.u & X86_PDE_PG_MASK, &pPT);
1079	if (RT_SUCCESS(rc))
1080	{
1081	X86PTE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_SHIFT) & X86_PT_MASK];
1082	if (Pte.n.u1Present)
1083	return PGMPhysGCPhys2R3Ptr(pVM, (Pte.u & X86_PTE_PG_MASK) \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK),
1084	1 /* we always stay within one page */, pR3Ptr);
1085	rc = VERR_PAGE_NOT_PRESENT;
1086	}
1087	}
1088	}
1089	else
1090	rc = VERR_PAGE_TABLE_NOT_PRESENT;
1091	}
1092	}
1093	else
1094	{
1095	/** @todo long mode! */
1096	Assert(PGMGetGuestMode(pVM) < PGMMODE_AMD64);
1097
1098	PX86PDPT pPdpt;
1099	rc = PGM_GCPHYS_2_PTR(pVM, cr3 & X86_CR3_PAE_PAGE_MASK, &pPdpt);
1100	if (RT_SUCCESS(rc))
1101	{
1102	X86PDPE Pdpe = pPdpt->a[((RTGCUINTPTR)GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE];
1103	if (Pdpe.n.u1Present)
1104	{
1105	PX86PDPAE pPD;
1106	rc = PGM_GCPHYS_2_PTR(pVM, Pdpe.u & X86_PDPE_PG_MASK, &pPD);
1107	if (RT_SUCCESS(rc))
1108	{
1109	X86PDEPAE Pde = pPD->a[((RTGCUINTPTR)GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK];
1110	if (Pde.n.u1Present)
1111	{
1112	if ((fFlags & X86_CR4_PSE) && Pde.b.u1Size)
1113	{ /* (big page) */
1114	rc = PGMPhysGCPhys2R3Ptr(pVM, (Pde.u & X86_PDE2M_PAE_PG_MASK) \| ((RTGCUINTPTR)GCPtr & X86_PAGE_2M_OFFSET_MASK),
1115	1 /* we always stay within one page */, pR3Ptr);
1116	}
1117	else
1118	{ /* (normal page) */
1119	PX86PTPAE pPT;
1120	rc = PGM_GCPHYS_2_PTR(pVM, (Pde.u & X86_PDE_PAE_PG_MASK), &pPT);
1121	if (RT_SUCCESS(rc))
1122	{
1123	X86PTEPAE Pte = pPT->a[((RTGCUINTPTR)GCPtr >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK];
1124	if (Pte.n.u1Present)
1125	return PGMPhysGCPhys2R3Ptr(pVM, (Pte.u & X86_PTE_PAE_PG_MASK) \| ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK),
1126	1 /* we always stay within one page */, pR3Ptr);
1127	rc = VERR_PAGE_NOT_PRESENT;
1128	}
1129	}
1130	}
1131	else
1132	rc = VERR_PAGE_TABLE_NOT_PRESENT;
1133	}
1134	}
1135	else
1136	rc = VERR_PAGE_TABLE_NOT_PRESENT;
1137	}
1138	}
1139	return rc;
1140	}
1141
1142
1143	#undef LOG_GROUP
1144	#define LOG_GROUP LOG_GROUP_PGM_PHYS_ACCESS
1145
1146
1147	#ifdef IN_RING3
1148	/**
1149	* Cache PGMPhys memory access
1150	*
1151	* @param pVM VM Handle.
1152	* @param pCache Cache structure pointer
1153	* @param GCPhys GC physical address
1154	* @param pbHC HC pointer corresponding to physical page
1155	*
1156	* @thread EMT.
1157	*/
1158	static void pgmPhysCacheAdd(PVM pVM, PGMPHYSCACHE pCache, RTGCPHYS GCPhys, uint8_t pbR3)
1159	{
1160	uint32_t iCacheIndex;
1161
1162	Assert(VM_IS_EMT(pVM));
1163
1164	GCPhys = PHYS_PAGE_ADDRESS(GCPhys);
1165	pbR3 = (uint8_t *)PAGE_ADDRESS(pbR3);
1166
1167	iCacheIndex = ((GCPhys >> PAGE_SHIFT) & PGM_MAX_PHYSCACHE_ENTRIES_MASK);
1168
1169	ASMBitSet(&pCache->aEntries, iCacheIndex);
1170
1171	pCache->Entry[iCacheIndex].GCPhys = GCPhys;
1172	pCache->Entry[iCacheIndex].pbR3 = pbR3;
1173	}
1174	#endif /* IN_RING3 */
1175
1176	/**
1177	* Read physical memory.
1178	*
1179	* This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
1180	* want to ignore those.
1181	*
1182	* @param pVM VM Handle.
1183	* @param GCPhys Physical address start reading from.
1184	* @param pvBuf Where to put the read bits.
1185	* @param cbRead How many bytes to read.
1186	*/
1187	VMMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
1188	{
1189	#ifdef IN_RING3
1190	bool fGrabbedLock = false;
1191	#endif
1192
1193	AssertMsg(cbRead > 0, ("don't even think about reading zero bytes!\n"));
1194	if (cbRead == 0)
1195	return;
1196
1197	LogFlow(("PGMPhysRead: %RGp %d\n", GCPhys, cbRead));
1198
1199	#ifdef IN_RING3
1200	if (!VM_IS_EMT(pVM))
1201	{
1202	pgmLock(pVM);
1203	fGrabbedLock = true;
1204	}
1205	#endif
1206
1207	/*
1208	* Copy loop on ram ranges.
1209	*/
1210	PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
1211	for (;;)
1212	{
1213	/* Find range. */
1214	while (pRam && GCPhys > pRam->GCPhysLast)
1215	pRam = pRam->CTX_SUFF(pNext);
1216	/* Inside range or not? */
1217	if (pRam && GCPhys >= pRam->GCPhys)
1218	{
1219	/*
1220	* Must work our way thru this page by page.
1221	*/
1222	RTGCPHYS off = GCPhys - pRam->GCPhys;
1223	while (off < pRam->cb)
1224	{
1225	unsigned iPage = off >> PAGE_SHIFT;
1226	PPGMPAGE pPage = &pRam->aPages[iPage];
1227	size_t cb;
1228
1229	/* Physical chunk in dynamically allocated range not present? */
1230	if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
1231	{
1232	/* Treat it as reserved; return zeros */
1233	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1234	if (cb >= cbRead)
1235	{
1236	memset(pvBuf, 0, cbRead);
1237	goto end;
1238	}
1239	memset(pvBuf, 0, cb);
1240	}
1241	/* temp hacks, will be reorganized. */
1242	/*
1243	* Physical handler.
1244	*/
1245	else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) >= PGM_PAGE_HNDL_PHYS_STATE_ALL)
1246	&& !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1247	{
1248	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1249	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1250
1251	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1252	/* find and call the handler */
1253	PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
1254	if (pNode && pNode->pfnHandlerR3)
1255	{
1256	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1257	if (cbRange < cb)
1258	cb = cbRange;
1259	if (cb > cbRead)
1260	cb = cbRead;
1261
1262	void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1263
1264	/* Note! Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1265	rc = pNode->pfnHandlerR3(pVM, GCPhys, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, pNode->pvUserR3);
1266	}
1267	#endif /* IN_RING3 */
1268	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1269	{
1270	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1271	void *pvSrc = NULL;
1272	PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvSrc);
1273	#else
1274	void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1275	#endif
1276
1277	if (cb >= cbRead)
1278	{
1279	memcpy(pvBuf, pvSrc, cbRead);
1280	goto end;
1281	}
1282	memcpy(pvBuf, pvSrc, cb);
1283	}
1284	else if (cb >= cbRead)
1285	goto end;
1286	}
1287	/*
1288	* Virtual handlers.
1289	*/
1290	else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) >= PGM_PAGE_HNDL_VIRT_STATE_ALL)
1291	&& !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1292	{
1293	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1294	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1295	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1296	/* Search the whole tree for matching physical addresses (rather expensive!) */
1297	PPGMVIRTHANDLER pNode;
1298	unsigned iPage;
1299	int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
1300	if (RT_SUCCESS(rc2) && pNode->pfnHandlerR3)
1301	{
1302	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1303	if (cbRange < cb)
1304	cb = cbRange;
1305	if (cb > cbRead)
1306	cb = cbRead;
1307	RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->Core.Key & PAGE_BASE_GC_MASK)
1308	+ (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1309
1310	void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1311
1312	/* Note! Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1313	rc = pNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, 0);
1314	}
1315	#endif /* IN_RING3 */
1316	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1317	{
1318	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1319	void *pvSrc = NULL;
1320	PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvSrc);
1321	#else
1322	void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1323	#endif
1324	if (cb >= cbRead)
1325	{
1326	memcpy(pvBuf, pvSrc, cbRead);
1327	goto end;
1328	}
1329	memcpy(pvBuf, pvSrc, cb);
1330	}
1331	else if (cb >= cbRead)
1332	goto end;
1333	}
1334	else
1335	{
1336	switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_ROM)) /** @todo PAGE FLAGS */
1337	{
1338	/*
1339	* Normal memory or ROM.
1340	*/
1341	case 0:
1342	case MM_RAM_FLAGS_ROM:
1343	case MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_RESERVED:
1344	//case MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_MMIO2: /* = shadow */ - //MMIO2 isn't in the mask.
1345	case MM_RAM_FLAGS_MMIO2: // MMIO2 isn't in the mask.
1346	{
1347	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1348	void *pvSrc = NULL;
1349	PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvSrc);
1350	#else
1351	void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1352	#endif
1353	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1354	if (cb >= cbRead)
1355	{
1356	#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
1357	if (cbRead <= 4 && !fGrabbedLock /* i.e. EMT */)
1358	pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphysreadcache, GCPhys, (uint8_t*)pvSrc);
1359	#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
1360	memcpy(pvBuf, pvSrc, cbRead);
1361	goto end;
1362	}
1363	memcpy(pvBuf, pvSrc, cb);
1364	break;
1365	}
1366
1367	/*
1368	* All reserved, nothing there.
1369	*/
1370	case MM_RAM_FLAGS_RESERVED:
1371	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1372	if (cb >= cbRead)
1373	{
1374	memset(pvBuf, 0, cbRead);
1375	goto end;
1376	}
1377	memset(pvBuf, 0, cb);
1378	break;
1379
1380	/*
1381	* The rest needs to be taken more carefully.
1382	*/
1383	default:
1384	#if 1 /** @todo r=bird: Can you do this properly please. */
1385	/** @todo Try MMIO; quick hack */
1386	if (cbRead <= 8 && IOMMMIORead(pVM, GCPhys, (uint32_t *)pvBuf, cbRead) == VINF_SUCCESS)
1387	goto end;
1388	#endif
1389
1390	/** @todo fix me later. */
1391	AssertReleaseMsgFailed(("Unknown read at %RGp size %u implement the complex physical reading case %RHp\n",
1392	GCPhys, cbRead,
1393	pPage->HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_ROM))); /** @todo PAGE FLAGS */
1394	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1395	break;
1396	}
1397	}
1398	cbRead -= cb;
1399	off += cb;
1400	pvBuf = (char *)pvBuf + cb;
1401	}
1402
1403	GCPhys = pRam->GCPhysLast + 1;
1404	}
1405	else
1406	{
1407	LogFlow(("PGMPhysRead: Unassigned %RGp size=%u\n", GCPhys, cbRead));
1408
1409	/*
1410	* Unassigned address space.
1411	*/
1412	size_t cb;
1413	if ( !pRam
1414	\|\| (cb = pRam->GCPhys - GCPhys) >= cbRead)
1415	{
1416	memset(pvBuf, 0, cbRead);
1417	goto end;
1418	}
1419
1420	memset(pvBuf, 0, cb);
1421	cbRead -= cb;
1422	pvBuf = (char *)pvBuf + cb;
1423	GCPhys += cb;
1424	}
1425	}
1426	end:
1427	#ifdef IN_RING3
1428	if (fGrabbedLock)
1429	pgmUnlock(pVM);
1430	#endif
1431	return;
1432	}
1433
1434
1435	/**
1436	* Write to physical memory.
1437	*
1438	* This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
1439	* want to ignore those.
1440	*
1441	* @param pVM VM Handle.
1442	* @param GCPhys Physical address to write to.
1443	* @param pvBuf What to write.
1444	* @param cbWrite How many bytes to write.
1445	*/
1446	VMMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
1447	{
1448	#ifdef IN_RING3
1449	bool fGrabbedLock = false;
1450	#endif
1451
1452	AssertMsg(!pVM->pgm.s.fNoMorePhysWrites, ("Calling PGMPhysWrite after pgmR3Save()!\n"));
1453	AssertMsg(cbWrite > 0, ("don't even think about writing zero bytes!\n"));
1454	if (cbWrite == 0)
1455	return;
1456
1457	LogFlow(("PGMPhysWrite: %RGp %d\n", GCPhys, cbWrite));
1458
1459	#ifdef IN_RING3
1460	if (!VM_IS_EMT(pVM))
1461	{
1462	pgmLock(pVM);
1463	fGrabbedLock = true;
1464	}
1465	#endif
1466	/*
1467	* Copy loop on ram ranges.
1468	*/
1469	PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
1470	for (;;)
1471	{
1472	/* Find range. */
1473	while (pRam && GCPhys > pRam->GCPhysLast)
1474	pRam = pRam->CTX_SUFF(pNext);
1475	/* Inside range or not? */
1476	if (pRam && GCPhys >= pRam->GCPhys)
1477	{
1478	/*
1479	* Must work our way thru this page by page.
1480	*/
1481	RTGCPTR off = GCPhys - pRam->GCPhys;
1482	while (off < pRam->cb)
1483	{
1484	RTGCPTR iPage = off >> PAGE_SHIFT;
1485	PPGMPAGE pPage = &pRam->aPages[iPage];
1486
1487	/* Physical chunk in dynamically allocated range not present? */
1488	if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
1489	{
1490	int rc;
1491	#ifdef IN_RING3
1492	if (fGrabbedLock)
1493	{
1494	pgmUnlock(pVM);
1495	rc = pgmr3PhysGrowRange(pVM, GCPhys);
1496	if (rc == VINF_SUCCESS)
1497	PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite); /* try again; can't assume pRam is still valid (paranoia) */
1498	return;
1499	}
1500	rc = pgmr3PhysGrowRange(pVM, GCPhys);
1501	#else
1502	rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1503	#endif
1504	if (rc != VINF_SUCCESS)
1505	goto end;
1506	}
1507
1508	size_t cb;
1509	/* temporary hack, will reogranize is later. */
1510	/*
1511	* Virtual handlers
1512	*/
1513	if ( PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage)
1514	&& !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1515	{
1516	if (PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage))
1517	{
1518	/*
1519	* Physical write handler + virtual write handler.
1520	* Consider this a quick workaround for the CSAM + shadow caching problem.
1521	*
1522	* We hand it to the shadow caching first since it requires the unchanged
1523	* data. CSAM will have to put up with it already being changed.
1524	*/
1525	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1526	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1527	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1528	/* 1. The physical handler */
1529	PPGMPHYSHANDLER pPhysNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
1530	if (pPhysNode && pPhysNode->pfnHandlerR3)
1531	{
1532	size_t cbRange = pPhysNode->Core.KeyLast - GCPhys + 1;
1533	if (cbRange < cb)
1534	cb = cbRange;
1535	if (cb > cbWrite)
1536	cb = cbWrite;
1537
1538	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1539
1540	/* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
1541	rc = pPhysNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pPhysNode->pvUserR3);
1542	}
1543
1544	/* 2. The virtual handler (will see incorrect data) */
1545	PPGMVIRTHANDLER pVirtNode;
1546	unsigned iPage;
1547	int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pVirtNode, &iPage);
1548	if (RT_SUCCESS(rc2) && pVirtNode->pfnHandlerR3)
1549	{
1550	size_t cbRange = pVirtNode->Core.KeyLast - GCPhys + 1;
1551	if (cbRange < cb)
1552	cb = cbRange;
1553	if (cb > cbWrite)
1554	cb = cbWrite;
1555	RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirtNode->Core.Key & PAGE_BASE_GC_MASK)
1556	+ (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1557
1558	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1559
1560	/* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
1561	rc2 = pVirtNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
1562	if ( ( rc2 != VINF_PGM_HANDLER_DO_DEFAULT
1563	&& rc == VINF_PGM_HANDLER_DO_DEFAULT)
1564	\|\| ( RT_FAILURE(rc2)
1565	&& RT_SUCCESS(rc)))
1566	rc = rc2;
1567	}
1568	#endif /* IN_RING3 */
1569	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1570	{
1571	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1572	void *pvDst = NULL;
1573	PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvDst);
1574	#else
1575	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1576	#endif
1577	if (cb >= cbWrite)
1578	{
1579	memcpy(pvDst, pvBuf, cbWrite);
1580	goto end;
1581	}
1582	memcpy(pvDst, pvBuf, cb);
1583	}
1584	else if (cb >= cbWrite)
1585	goto end;
1586	}
1587	else
1588	{
1589	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1590	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1591	#ifdef IN_RING3
1592	/** @todo deal with this in GC and R0! */
1593	/* Search the whole tree for matching physical addresses (rather expensive!) */
1594	PPGMVIRTHANDLER pNode;
1595	unsigned iPage;
1596	int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
1597	if (RT_SUCCESS(rc2) && pNode->pfnHandlerR3)
1598	{
1599	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1600	if (cbRange < cb)
1601	cb = cbRange;
1602	if (cb > cbWrite)
1603	cb = cbWrite;
1604	RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->Core.Key & PAGE_BASE_GC_MASK)
1605	+ (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1606
1607	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1608
1609	/* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
1610	rc = pNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
1611	}
1612	#endif /* IN_RING3 */
1613	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1614	{
1615	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1616	void *pvDst = NULL;
1617	PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvDst);
1618	#else
1619	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1620	#endif
1621	if (cb >= cbWrite)
1622	{
1623	memcpy(pvDst, pvBuf, cbWrite);
1624	goto end;
1625	}
1626	memcpy(pvDst, pvBuf, cb);
1627	}
1628	else if (cb >= cbWrite)
1629	goto end;
1630	}
1631	}
1632	/*
1633	* Physical handler.
1634	*/
1635	else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) >= PGM_PAGE_HNDL_PHYS_STATE_WRITE)
1636	&& !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1637	{
1638	int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1639	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1640	#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1641	/* find and call the handler */
1642	PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
1643	if (pNode && pNode->pfnHandlerR3)
1644	{
1645	size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1646	if (cbRange < cb)
1647	cb = cbRange;
1648	if (cb > cbWrite)
1649	cb = cbWrite;
1650
1651	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1652
1653	/** @todo Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1654	rc = pNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pNode->pvUserR3);
1655	}
1656	#endif /* IN_RING3 */
1657	if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1658	{
1659	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1660	void *pvDst = NULL;
1661	PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvDst);
1662	#else
1663	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1664	#endif
1665	if (cb >= cbWrite)
1666	{
1667	memcpy(pvDst, pvBuf, cbWrite);
1668	goto end;
1669	}
1670	memcpy(pvDst, pvBuf, cb);
1671	}
1672	else if (cb >= cbWrite)
1673	goto end;
1674	}
1675	else
1676	{
1677	/** @todo r=bird: missing MM_RAM_FLAGS_ROM here, we shall not allow anyone to overwrite the ROM! */
1678	switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_MMIO2)) /** @todo PAGE FLAGS */
1679	{
1680	/*
1681	* Normal memory, MMIO2 or writable shadow ROM.
1682	*/
1683	case 0:
1684	case MM_RAM_FLAGS_MMIO2:
1685	case MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_MMIO2: /* shadow rom */
1686	{
1687	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1688	void *pvDst = NULL;
1689	PGMDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK), &pvDst);
1690	#else
1691	void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
1692	#endif
1693	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1694	if (cb >= cbWrite)
1695	{
1696	#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
1697	if (cbWrite <= 4 && !fGrabbedLock /* i.e. EMT */)
1698	pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphyswritecache, GCPhys, (uint8_t*)pvDst);
1699	#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
1700	memcpy(pvDst, pvBuf, cbWrite);
1701	goto end;
1702	}
1703	memcpy(pvDst, pvBuf, cb);
1704	break;
1705	}
1706
1707	/*
1708	* All reserved, nothing there.
1709	*/
1710	case MM_RAM_FLAGS_RESERVED:
1711	case MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO2:
1712	cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1713	if (cb >= cbWrite)
1714	goto end;
1715	break;
1716
1717
1718	/*
1719	* The rest needs to be taken more carefully.
1720	*/
1721	default:
1722	#if 1 /** @todo r=bird: Can you do this properly please. */
1723	/** @todo Try MMIO; quick hack */
1724	if (cbWrite <= 8 && IOMMMIOWrite(pVM, GCPhys, (uint32_t )pvBuf, cbWrite) == VINF_SUCCESS)
1725	goto end;
1726	#endif
1727
1728	/** @todo fix me later. */
1729	AssertReleaseMsgFailed(("Unknown write at %RGp size %u implement the complex physical writing case %RHp\n",
1730	GCPhys, cbWrite,
1731	(pPage->HCPhys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_MMIO2)))); /** @todo PAGE FLAGS */
1732	/* skip the write */
1733	cb = cbWrite;
1734	break;
1735	}
1736	}
1737
1738	cbWrite -= cb;
1739	off += cb;
1740	pvBuf = (const char *)pvBuf + cb;
1741	}
1742
1743	GCPhys = pRam->GCPhysLast + 1;
1744	}
1745	else
1746	{
1747	/*
1748	* Unassigned address space.
1749	*/
1750	size_t cb;
1751	if ( !pRam
1752	\|\| (cb = pRam->GCPhys - GCPhys) >= cbWrite)
1753	goto end;
1754
1755	cbWrite -= cb;
1756	pvBuf = (const char *)pvBuf + cb;
1757	GCPhys += cb;
1758	}
1759	}
1760	end:
1761	#ifdef IN_RING3
1762	if (fGrabbedLock)
1763	pgmUnlock(pVM);
1764	#endif
1765	return;
1766	}
1767
1768	#ifndef IN_RC /* Ring 0 & 3 only. (Just not needed in GC.) */
1769
1770	/**
1771	* Read from guest physical memory by GC physical address, bypassing
1772	* MMIO and access handlers.
1773	*
1774	* @returns VBox status.
1775	* @param pVM VM handle.
1776	* @param pvDst The destination address.
1777	* @param GCPhysSrc The source address (GC physical address).
1778	* @param cb The number of bytes to read.
1779	*/
1780	VMMDECL(int) PGMPhysSimpleReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb)
1781	{
1782	/*
1783	* Treat the first page as a special case.
1784	*/
1785	if (!cb)
1786	return VINF_SUCCESS;
1787
1788	/* map the 1st page */
1789	void const *pvSrc;
1790	PGMPAGEMAPLOCK Lock;
1791	int rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhysSrc, &pvSrc, &Lock);
1792	if (RT_FAILURE(rc))
1793	return rc;
1794
1795	/* optimize for the case where access is completely within the first page. */
1796	size_t cbPage = PAGE_SIZE - (GCPhysSrc & PAGE_OFFSET_MASK);
1797	if (RT_LIKELY(cb <= cbPage))
1798	{
1799	memcpy(pvDst, pvSrc, cb);
1800	PGMPhysReleasePageMappingLock(pVM, &Lock);
1801	return VINF_SUCCESS;
1802	}
1803
1804	/* copy to the end of the page. */
1805	memcpy(pvDst, pvSrc, cbPage);
1806	PGMPhysReleasePageMappingLock(pVM, &Lock);
1807	GCPhysSrc += cbPage;
1808	pvDst = (uint8_t *)pvDst + cbPage;
1809	cb -= cbPage;
1810
1811	/*
1812	* Page by page.
1813	*/
1814	for (;;)
1815	{
1816	/* map the page */
1817	rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhysSrc, &pvSrc, &Lock);
1818	if (RT_FAILURE(rc))
1819	return rc;
1820
1821	/* last page? */
1822	if (cb <= PAGE_SIZE)
1823	{
1824	memcpy(pvDst, pvSrc, cb);
1825	PGMPhysReleasePageMappingLock(pVM, &Lock);
1826	return VINF_SUCCESS;
1827	}
1828
1829	/* copy the entire page and advance */
1830	memcpy(pvDst, pvSrc, PAGE_SIZE);
1831	PGMPhysReleasePageMappingLock(pVM, &Lock);
1832	GCPhysSrc += PAGE_SIZE;
1833	pvDst = (uint8_t *)pvDst + PAGE_SIZE;
1834	cb -= PAGE_SIZE;
1835	}
1836	/* won't ever get here. */
1837	}
1838
1839
1840	/**
1841	* Write to guest physical memory referenced by GC pointer.
1842	* Write memory to GC physical address in guest physical memory.
1843	*
1844	* This will bypass MMIO and access handlers.
1845	*
1846	* @returns VBox status.
1847	* @param pVM VM handle.
1848	* @param GCPhysDst The GC physical address of the destination.
1849	* @param pvSrc The source buffer.
1850	* @param cb The number of bytes to write.
1851	*/
1852	VMMDECL(int) PGMPhysSimpleWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb)
1853	{
1854	LogFlow(("PGMPhysSimpleWriteGCPhys: %RGp %zu\n", GCPhysDst, cb));
1855
1856	/*
1857	* Treat the first page as a special case.
1858	*/
1859	if (!cb)
1860	return VINF_SUCCESS;
1861
1862	/* map the 1st page */
1863	void *pvDst;
1864	PGMPAGEMAPLOCK Lock;
1865	int rc = PGMPhysGCPhys2CCPtr(pVM, GCPhysDst, &pvDst, &Lock);
1866	if (RT_FAILURE(rc))
1867	return rc;
1868
1869	/* optimize for the case where access is completely within the first page. */
1870	size_t cbPage = PAGE_SIZE - (GCPhysDst & PAGE_OFFSET_MASK);
1871	if (RT_LIKELY(cb <= cbPage))
1872	{
1873	memcpy(pvDst, pvSrc, cb);
1874	PGMPhysReleasePageMappingLock(pVM, &Lock);
1875	return VINF_SUCCESS;
1876	}
1877
1878	/* copy to the end of the page. */
1879	memcpy(pvDst, pvSrc, cbPage);
1880	PGMPhysReleasePageMappingLock(pVM, &Lock);
1881	GCPhysDst += cbPage;
1882	pvSrc = (const uint8_t *)pvSrc + cbPage;
1883	cb -= cbPage;
1884
1885	/*
1886	* Page by page.
1887	*/
1888	for (;;)
1889	{
1890	/* map the page */
1891	rc = PGMPhysGCPhys2CCPtr(pVM, GCPhysDst, &pvDst, &Lock);
1892	if (RT_FAILURE(rc))
1893	return rc;
1894
1895	/* last page? */
1896	if (cb <= PAGE_SIZE)
1897	{
1898	memcpy(pvDst, pvSrc, cb);
1899	PGMPhysReleasePageMappingLock(pVM, &Lock);
1900	return VINF_SUCCESS;
1901	}
1902
1903	/* copy the entire page and advance */
1904	memcpy(pvDst, pvSrc, PAGE_SIZE);
1905	PGMPhysReleasePageMappingLock(pVM, &Lock);
1906	GCPhysDst += PAGE_SIZE;
1907	pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
1908	cb -= PAGE_SIZE;
1909	}
1910	/* won't ever get here. */
1911	}
1912
1913
1914	/**
1915	* Read from guest physical memory referenced by GC pointer.
1916	*
1917	* This function uses the current CR3/CR0/CR4 of the guest and will
1918	* bypass access handlers and not set any accessed bits.
1919	*
1920	* @returns VBox status.
1921	* @param pVM VM handle.
1922	* @param pvDst The destination address.
1923	* @param GCPtrSrc The source address (GC pointer).
1924	* @param cb The number of bytes to read.
1925	*/
1926	VMMDECL(int) PGMPhysSimpleReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
1927	{
1928	/*
1929	* Treat the first page as a special case.
1930	*/
1931	if (!cb)
1932	return VINF_SUCCESS;
1933
1934	/* map the 1st page */
1935	void const *pvSrc;
1936	PGMPAGEMAPLOCK Lock;
1937	int rc = PGMPhysGCPtr2CCPtrReadOnly(pVM, GCPtrSrc, &pvSrc, &Lock);
1938	if (RT_FAILURE(rc))
1939	return rc;
1940
1941	/* optimize for the case where access is completely within the first page. */
1942	size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
1943	if (RT_LIKELY(cb <= cbPage))
1944	{
1945	memcpy(pvDst, pvSrc, cb);
1946	PGMPhysReleasePageMappingLock(pVM, &Lock);
1947	return VINF_SUCCESS;
1948	}
1949
1950	/* copy to the end of the page. */
1951	memcpy(pvDst, pvSrc, cbPage);
1952	PGMPhysReleasePageMappingLock(pVM, &Lock);
1953	GCPtrSrc = (RTGCPTR)((RTGCUINTPTR)GCPtrSrc + cbPage);
1954	pvDst = (uint8_t *)pvDst + cbPage;
1955	cb -= cbPage;
1956
1957	/*
1958	* Page by page.
1959	*/
1960	for (;;)
1961	{
1962	/* map the page */
1963	rc = PGMPhysGCPtr2CCPtrReadOnly(pVM, GCPtrSrc, &pvSrc, &Lock);
1964	if (RT_FAILURE(rc))
1965	return rc;
1966
1967	/* last page? */
1968	if (cb <= PAGE_SIZE)
1969	{
1970	memcpy(pvDst, pvSrc, cb);
1971	PGMPhysReleasePageMappingLock(pVM, &Lock);
1972	return VINF_SUCCESS;
1973	}
1974
1975	/* copy the entire page and advance */
1976	memcpy(pvDst, pvSrc, PAGE_SIZE);
1977	PGMPhysReleasePageMappingLock(pVM, &Lock);
1978	GCPtrSrc = (RTGCPTR)((RTGCUINTPTR)GCPtrSrc + PAGE_SIZE);
1979	pvDst = (uint8_t *)pvDst + PAGE_SIZE;
1980	cb -= PAGE_SIZE;
1981	}
1982	/* won't ever get here. */
1983	}
1984
1985
1986	/**
1987	* Write to guest physical memory referenced by GC pointer.
1988	*
1989	* This function uses the current CR3/CR0/CR4 of the guest and will
1990	* bypass access handlers and not set dirty or accessed bits.
1991	*
1992	* @returns VBox status.
1993	* @param pVM VM handle.
1994	* @param GCPtrDst The destination address (GC pointer).
1995	* @param pvSrc The source address.
1996	* @param cb The number of bytes to write.
1997	*/
1998	VMMDECL(int) PGMPhysSimpleWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
1999	{
2000	/*
2001	* Treat the first page as a special case.
2002	*/
2003	if (!cb)
2004	return VINF_SUCCESS;
2005
2006	/* map the 1st page */
2007	void *pvDst;
2008	PGMPAGEMAPLOCK Lock;
2009	int rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2010	if (RT_FAILURE(rc))
2011	return rc;
2012
2013	/* optimize for the case where access is completely within the first page. */
2014	size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2015	if (RT_LIKELY(cb <= cbPage))
2016	{
2017	memcpy(pvDst, pvSrc, cb);
2018	PGMPhysReleasePageMappingLock(pVM, &Lock);
2019	return VINF_SUCCESS;
2020	}
2021
2022	/* copy to the end of the page. */
2023	memcpy(pvDst, pvSrc, cbPage);
2024	PGMPhysReleasePageMappingLock(pVM, &Lock);
2025	GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbPage);
2026	pvSrc = (const uint8_t *)pvSrc + cbPage;
2027	cb -= cbPage;
2028
2029	/*
2030	* Page by page.
2031	*/
2032	for (;;)
2033	{
2034	/* map the page */
2035	rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2036	if (RT_FAILURE(rc))
2037	return rc;
2038
2039	/* last page? */
2040	if (cb <= PAGE_SIZE)
2041	{
2042	memcpy(pvDst, pvSrc, cb);
2043	PGMPhysReleasePageMappingLock(pVM, &Lock);
2044	return VINF_SUCCESS;
2045	}
2046
2047	/* copy the entire page and advance */
2048	memcpy(pvDst, pvSrc, PAGE_SIZE);
2049	PGMPhysReleasePageMappingLock(pVM, &Lock);
2050	GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + PAGE_SIZE);
2051	pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
2052	cb -= PAGE_SIZE;
2053	}
2054	/* won't ever get here. */
2055	}
2056
2057
2058	/**
2059	* Write to guest physical memory referenced by GC pointer and update the PTE.
2060	*
2061	* This function uses the current CR3/CR0/CR4 of the guest and will
2062	* bypass access handlers but will set any dirty and accessed bits in the PTE.
2063	*
2064	* If you don't want to set the dirty bit, use PGMPhysSimpleWriteGCPtr().
2065	*
2066	* @returns VBox status.
2067	* @param pVM VM handle.
2068	* @param GCPtrDst The destination address (GC pointer).
2069	* @param pvSrc The source address.
2070	* @param cb The number of bytes to write.
2071	*/
2072	VMMDECL(int) PGMPhysSimpleDirtyWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2073	{
2074	/*
2075	* Treat the first page as a special case.
2076	* Btw. this is the same code as in PGMPhyssimpleWriteGCPtr excep for the PGMGstModifyPage.
2077	*/
2078	if (!cb)
2079	return VINF_SUCCESS;
2080
2081	/* map the 1st page */
2082	void *pvDst;
2083	PGMPAGEMAPLOCK Lock;
2084	int rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2085	if (RT_FAILURE(rc))
2086	return rc;
2087
2088	/* optimize for the case where access is completely within the first page. */
2089	size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2090	if (RT_LIKELY(cb <= cbPage))
2091	{
2092	memcpy(pvDst, pvSrc, cb);
2093	PGMPhysReleasePageMappingLock(pVM, &Lock);
2094	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D)); AssertRC(rc);
2095	return VINF_SUCCESS;
2096	}
2097
2098	/* copy to the end of the page. */
2099	memcpy(pvDst, pvSrc, cbPage);
2100	PGMPhysReleasePageMappingLock(pVM, &Lock);
2101	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D)); AssertRC(rc);
2102	GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbPage);
2103	pvSrc = (const uint8_t *)pvSrc + cbPage;
2104	cb -= cbPage;
2105
2106	/*
2107	* Page by page.
2108	*/
2109	for (;;)
2110	{
2111	/* map the page */
2112	rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2113	if (RT_FAILURE(rc))
2114	return rc;
2115
2116	/* last page? */
2117	if (cb <= PAGE_SIZE)
2118	{
2119	memcpy(pvDst, pvSrc, cb);
2120	PGMPhysReleasePageMappingLock(pVM, &Lock);
2121	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D)); AssertRC(rc);
2122	return VINF_SUCCESS;
2123	}
2124
2125	/* copy the entire page and advance */
2126	memcpy(pvDst, pvSrc, PAGE_SIZE);
2127	PGMPhysReleasePageMappingLock(pVM, &Lock);
2128	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D)); AssertRC(rc);
2129	GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + PAGE_SIZE);
2130	pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
2131	cb -= PAGE_SIZE;
2132	}
2133	/* won't ever get here. */
2134	}
2135
2136
2137	/**
2138	* Read from guest physical memory referenced by GC pointer.
2139	*
2140	* This function uses the current CR3/CR0/CR4 of the guest and will
2141	* respect access handlers and set accessed bits.
2142	*
2143	* @returns VBox status.
2144	* @param pVM VM handle.
2145	* @param pvDst The destination address.
2146	* @param GCPtrSrc The source address (GC pointer).
2147	* @param cb The number of bytes to read.
2148	*/
2149	VMMDECL(int) PGMPhysReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
2150	{
2151	RTGCPHYS GCPhys;
2152	int rc;
2153
2154	/*
2155	* Anything to do?
2156	*/
2157	if (!cb)
2158	return VINF_SUCCESS;
2159
2160	LogFlow(("PGMPhysReadGCPtr: %RGv %zu\n", GCPtrSrc, cb));
2161
2162	/*
2163	* Optimize reads within a single page.
2164	*/
2165	if (((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2166	{
2167	/* Convert virtual to physical address */
2168	rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
2169	AssertRCReturn(rc, rc);
2170
2171	/* mark the guest page as accessed. */
2172	rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
2173	AssertRC(rc);
2174
2175	PGMPhysRead(pVM, GCPhys, pvDst, cb);
2176	return VINF_SUCCESS;
2177	}
2178
2179	/*
2180	* Page by page.
2181	*/
2182	for (;;)
2183	{
2184	/* Convert virtual to physical address */
2185	rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
2186	AssertRCReturn(rc, rc);
2187
2188	/* mark the guest page as accessed. */
2189	int rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
2190	AssertRC(rc);
2191
2192	/* copy */
2193	size_t cbRead = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
2194	if (cbRead >= cb)
2195	{
2196	PGMPhysRead(pVM, GCPhys, pvDst, cb);
2197	return VINF_SUCCESS;
2198	}
2199	PGMPhysRead(pVM, GCPhys, pvDst, cbRead);
2200
2201	/* next */
2202	cb -= cbRead;
2203	pvDst = (uint8_t *)pvDst + cbRead;
2204	GCPtrSrc += cbRead;
2205	}
2206	}
2207
2208
2209	/**
2210	* Write to guest physical memory referenced by GC pointer.
2211	*
2212	* This function uses the current CR3/CR0/CR4 of the guest and will
2213	* respect access handlers and set dirty and accessed bits.
2214	*
2215	* @returns VBox status.
2216	* @param pVM VM handle.
2217	* @param GCPtrDst The destination address (GC pointer).
2218	* @param pvSrc The source address.
2219	* @param cb The number of bytes to write.
2220	*/
2221	VMMDECL(int) PGMPhysWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2222	{
2223	RTGCPHYS GCPhys;
2224	int rc;
2225
2226	/*
2227	* Anything to do?
2228	*/
2229	if (!cb)
2230	return VINF_SUCCESS;
2231
2232	LogFlow(("PGMPhysWriteGCPtr: %RGv %zu\n", GCPtrDst, cb));
2233
2234	/*
2235	* Optimize writes within a single page.
2236	*/
2237	if (((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2238	{
2239	/* Convert virtual to physical address */
2240	rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
2241	AssertMsgRCReturn(rc, ("PGMPhysGCPtr2GCPhys failed with %Rrc for %RGv\n", rc, GCPtrDst), rc);
2242
2243	/* mark the guest page as accessed and dirty. */
2244	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D));
2245	AssertRC(rc);
2246
2247	PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
2248	return VINF_SUCCESS;
2249	}
2250
2251	/*
2252	* Page by page.
2253	*/
2254	for (;;)
2255	{
2256	/* Convert virtual to physical address */
2257	rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
2258	AssertRCReturn(rc, rc);
2259
2260	/* mark the guest page as accessed and dirty. */
2261	rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A \| X86_PTE_D, ~(uint64_t)(X86_PTE_A \| X86_PTE_D));
2262	AssertRC(rc);
2263
2264	/* copy */
2265	size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2266	if (cbWrite >= cb)
2267	{
2268	PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
2269	return VINF_SUCCESS;
2270	}
2271	PGMPhysWrite(pVM, GCPhys, pvSrc, cbWrite);
2272
2273	/* next */
2274	cb -= cbWrite;
2275	pvSrc = (uint8_t *)pvSrc + cbWrite;
2276	GCPtrDst += cbWrite;
2277	}
2278	}
2279
2280	#endif /* !IN_RC */
2281
2282	/**
2283	* Performs a read of guest virtual memory for instruction emulation.
2284	*
2285	* This will check permissions, raise exceptions and update the access bits.
2286	*
2287	* The current implementation will bypass all access handlers. It may later be
2288	* changed to at least respect MMIO.
2289	*
2290	*
2291	* @returns VBox status code suitable to scheduling.
2292	* @retval VINF_SUCCESS if the read was performed successfully.
2293	* @retval VINF_EM_RAW_GUEST_TRAP if an exception was raised but not dispatched yet.
2294	* @retval VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
2295	*
2296	* @param pVM The VM handle.
2297	* @param pCtxCore The context core.
2298	* @param pvDst Where to put the bytes we've read.
2299	* @param GCPtrSrc The source address.
2300	* @param cb The number of bytes to read. Not more than a page.
2301	*
2302	* @remark This function will dynamically map physical pages in GC. This may unmap
2303	* mappings done by the caller. Be careful!
2304	*/
2305	VMMDECL(int) PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb)
2306	{
2307	Assert(cb <= PAGE_SIZE);
2308
2309	/** @todo r=bird: This isn't perfect!
2310	* -# It's not checking for reserved bits being 1.
2311	* -# It's not correctly dealing with the access bit.
2312	* -# It's not respecting MMIO memory or any other access handlers.
2313	*/
2314	/*
2315	* 1. Translate virtual to physical. This may fault.
2316	* 2. Map the physical address.
2317	* 3. Do the read operation.
2318	* 4. Set access bits if required.
2319	*/
2320	int rc;
2321	unsigned cb1 = PAGE_SIZE - (GCPtrSrc & PAGE_OFFSET_MASK);
2322	if (cb <= cb1)
2323	{
2324	/*
2325	* Not crossing pages.
2326	*/
2327	RTGCPHYS GCPhys;
2328	uint64_t fFlags;
2329	rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags, &GCPhys);
2330	if (RT_SUCCESS(rc))
2331	{
2332	/** @todo we should check reserved bits ... */
2333	void *pvSrc;
2334	rc = PGM_GCPHYS_2_PTR(pVM, GCPhys, &pvSrc);
2335	switch (rc)
2336	{
2337	case VINF_SUCCESS:
2338	Log(("PGMPhysInterpretedRead: pvDst=%p pvSrc=%p cb=%d\n", pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb));
2339	memcpy(pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb);
2340	break;
2341	case VERR_PGM_PHYS_PAGE_RESERVED:
2342	case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
2343	memset(pvDst, 0, cb); /** @todo this is wrong, it should be 0xff */
2344	break;
2345	default:
2346	return rc;
2347	}
2348
2349	/** @todo access bit emulation isn't 100% correct. */
2350	if (!(fFlags & X86_PTE_A))
2351	{
2352	rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
2353	AssertRC(rc);
2354	}
2355	return VINF_SUCCESS;
2356	}
2357	}
2358	else
2359	{
2360	/*
2361	* Crosses pages.
2362	*/
2363	size_t cb2 = cb - cb1;
2364	uint64_t fFlags1;
2365	RTGCPHYS GCPhys1;
2366	uint64_t fFlags2;
2367	RTGCPHYS GCPhys2;
2368	rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags1, &GCPhys1);
2369	if (RT_SUCCESS(rc))
2370	rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
2371	if (RT_SUCCESS(rc))
2372	{
2373	/** @todo we should check reserved bits ... */
2374	AssertMsgFailed(("cb=%d cb1=%d cb2=%d GCPtrSrc=%RGv\n", cb, cb1, cb2, GCPtrSrc));
2375	void *pvSrc1;
2376	rc = PGM_GCPHYS_2_PTR(pVM, GCPhys1, &pvSrc1);
2377	switch (rc)
2378	{
2379	case VINF_SUCCESS:
2380	memcpy(pvDst, (uint8_t *)pvSrc1 + (GCPtrSrc & PAGE_OFFSET_MASK), cb1);
2381	break;
2382	case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
2383	memset(pvDst, 0, cb1); /** @todo this is wrong, it should be 0xff */
2384	break;
2385	default:
2386	return rc;
2387	}
2388
2389	void *pvSrc2;
2390	rc = PGM_GCPHYS_2_PTR(pVM, GCPhys2, &pvSrc2);
2391	switch (rc)
2392	{
2393	case VINF_SUCCESS:
2394	memcpy((uint8_t *)pvDst + cb1, pvSrc2, cb2);
2395	break;
2396	case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
2397	memset((uint8_t )pvDst + cb1, 0, cb2); /* @todo this is wrong, it should be 0xff */
2398	break;
2399	default:
2400	return rc;
2401	}
2402
2403	if (!(fFlags1 & X86_PTE_A))
2404	{
2405	rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
2406	AssertRC(rc);
2407	}
2408	if (!(fFlags2 & X86_PTE_A))
2409	{
2410	rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
2411	AssertRC(rc);
2412	}
2413	return VINF_SUCCESS;
2414	}
2415	}
2416
2417	/*
2418	* Raise a #PF.
2419	*/
2420	uint32_t uErr;
2421
2422	/* Get the current privilege level. */
2423	uint32_t cpl = CPUMGetGuestCPL(pVM, pCtxCore);
2424	switch (rc)
2425	{
2426	case VINF_SUCCESS:
2427	uErr = (cpl >= 2) ? X86_TRAP_PF_RSVD \| X86_TRAP_PF_US : X86_TRAP_PF_RSVD;
2428	break;
2429
2430	case VERR_PAGE_NOT_PRESENT:
2431	case VERR_PAGE_TABLE_NOT_PRESENT:
2432	uErr = (cpl >= 2) ? X86_TRAP_PF_US : 0;
2433	break;
2434
2435	default:
2436	AssertMsgFailed(("rc=%Rrc GCPtrSrc=%RGv cb=%#x\n", rc, GCPtrSrc, cb));
2437	return rc;
2438	}
2439	Log(("PGMPhysInterpretedRead: GCPtrSrc=%RGv cb=%#x -> #PF(%#x)\n", GCPtrSrc, cb, uErr));
2440	return TRPMRaiseXcptErrCR2(pVM, pCtxCore, X86_XCPT_PF, uErr, GCPtrSrc);
2441	}
2442
2443	/// @todo VMMDECL(int) PGMPhysInterpretedWrite(PVM pVM, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2444
2445

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source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp@ 14974

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